diff options
| author | Dave Olson <dave.olson@qlogic.com> | 2008-04-16 21:09:30 -0700 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2008-04-16 21:09:30 -0700 |
| commit | 1d7c2e529fb6d4143d294ade7d99e29cb6b3775f (patch) | |
| tree | 15bb2a68280fbefeca12ef1db4c47e9f0d386e86 /drivers/infiniband/hw/ipath/ipath_init_chip.c | |
| parent | 0ab6b2b9abb692919902edb6606c3b898f2dac17 (diff) | |
| download | kernel_samsung_smdk4412-1d7c2e529fb6d4143d294ade7d99e29cb6b3775f.zip kernel_samsung_smdk4412-1d7c2e529fb6d4143d294ade7d99e29cb6b3775f.tar.gz kernel_samsung_smdk4412-1d7c2e529fb6d4143d294ade7d99e29cb6b3775f.tar.bz2 | |
IB/ipath: Enable reduced PIO update for HCAs that support it.
Newer HCAs have a threshold counter to reduce the number of DMAs the
chip makes to update the PIO buffer availability status bits. This
patch enables the feature.
Signed-off-by: Dave Olson <dave.olson@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_init_chip.c')
| -rw-r--r-- | drivers/infiniband/hw/ipath/ipath_init_chip.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_init_chip.c b/drivers/infiniband/hw/ipath/ipath_init_chip.c index 720ff4d..1adafa9 100644 --- a/drivers/infiniband/hw/ipath/ipath_init_chip.c +++ b/drivers/infiniband/hw/ipath/ipath_init_chip.c @@ -341,6 +341,7 @@ static int init_chip_reset(struct ipath_devdata *dd) { u32 rtmp; int i; + unsigned long flags; /* * ensure chip does no sends or receives, tail updates, or @@ -356,8 +357,13 @@ static int init_chip_reset(struct ipath_devdata *dd) ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, dd->ipath_rcvctrl); + spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags); + dd->ipath_sendctrl = 0U; /* no sdma, etc */ ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl); - ipath_write_kreg(dd, dd->ipath_kregs->kr_control, dd->ipath_control); + ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); + spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags); + + ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL); rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt); if (rtmp != dd->ipath_rcvtidcnt) @@ -478,6 +484,14 @@ static void enable_chip(struct ipath_devdata *dd, int reinit) /* Enable PIO send, and update of PIOavail regs to memory. */ dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE | INFINIPATH_S_PIOBUFAVAILUPD; + + /* + * Set the PIO avail update threshold to host memory + * on chips that support it. + */ + if (dd->ipath_pioupd_thresh) + dd->ipath_sendctrl |= dd->ipath_pioupd_thresh + << INFINIPATH_S_UPDTHRESH_SHIFT; ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl); ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags); @@ -757,6 +771,12 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit) ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u " "each for %u user ports\n", kpiobufs, piobufs, dd->ipath_pbufsport, uports); + if (dd->ipath_pioupd_thresh) { + if (dd->ipath_pbufsport < dd->ipath_pioupd_thresh) + dd->ipath_pioupd_thresh = dd->ipath_pbufsport; + if (kpiobufs < dd->ipath_pioupd_thresh) + dd->ipath_pioupd_thresh = kpiobufs; + } dd->ipath_f_early_init(dd); /* |