V4L/DVB (11085): au0828/au8522: Codingstyle fixes

Take a pass over all of the au0828/au8522 files and cleanup all the codingstyle
issues.  This patch does not make *any* functional change to the code.

Signed-off-by: Devin Heitmueller <dheitmueller@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

1 files changed, 119 insertions, 114 deletions

diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c
index 5646363..2ad84c2 100644
--- a/drivers/media/dvb/frontends/au8522_decoder.c
+++ b/drivers/media/dvb/frontends/au8522_decoder.c
@@ -67,39 +67,40 @@ struct au8522_register_config {
    0="ATV RF" 1="ATV RF13" 2="CVBS" 3="S-Video" 4="PAL" 5=CVBS13" 6="SVideo13"
 */
 struct au8522_register_config filter_coef[] = {
-	{AU8522_FILTER_COEF_R410, {0x25, 0x00, 0x25, 0x25, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R411, {0x20, 0x00, 0x20, 0x20, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R412, {0x03, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R413, {0xe6, 0x00, 0xe6, 0xe6, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R414, {0x40, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R415, {0x1b, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R416, {0xc0, 0x00, 0xc0, 0x04, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R417, {0x04, 0x00, 0x04, 0x04, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R418, {0x8c, 0x00, 0x8c, 0x8c, 0x00, 0x00, 0x00}},
-	{AU8522_FILTER_COEF_R419, {0xa0, 0x40, 0xa0, 0xa0, 0x40, 0x40, 0x40}},
-	{AU8522_FILTER_COEF_R41A, {0x21, 0x09, 0x21, 0x21, 0x09, 0x09, 0x09}},
-	{AU8522_FILTER_COEF_R41B, {0x6c, 0x38, 0x6c, 0x6c, 0x38, 0x38, 0x38}},
-	{AU8522_FILTER_COEF_R41C, {0x03, 0xff, 0x03, 0x03, 0xff, 0xff, 0xff}},
-	{AU8522_FILTER_COEF_R41D, {0xbf, 0xc7, 0xbf, 0xbf, 0xc7, 0xc7, 0xc7}},
-	{AU8522_FILTER_COEF_R41E, {0xa0, 0xdf, 0xa0, 0xa0, 0xdf, 0xdf, 0xdf}},
-	{AU8522_FILTER_COEF_R41F, {0x10, 0x06, 0x10, 0x10, 0x06, 0x06, 0x06}},
-	{AU8522_FILTER_COEF_R420, {0xae, 0x30, 0xae, 0xae, 0x30, 0x30, 0x30}},
-	{AU8522_FILTER_COEF_R421, {0xc4, 0x01, 0xc4, 0xc4, 0x01, 0x01, 0x01}},
-	{AU8522_FILTER_COEF_R422, {0x54, 0xdd, 0x54, 0x54, 0xdd, 0xdd, 0xdd}},
-	{AU8522_FILTER_COEF_R423, {0xd0, 0xaf, 0xd0, 0xd0, 0xaf, 0xaf, 0xaf}},
-	{AU8522_FILTER_COEF_R424, {0x1c, 0xf7, 0x1c, 0x1c, 0xf7, 0xf7, 0xf7}},
-	{AU8522_FILTER_COEF_R425, {0x76, 0xdb, 0x76, 0x76, 0xdb, 0xdb, 0xdb}},
-	{AU8522_FILTER_COEF_R426, {0x61, 0xc0, 0x61, 0x61, 0xc0, 0xc0, 0xc0}},
-	{AU8522_FILTER_COEF_R427, {0xd1, 0x2f, 0xd1, 0xd1, 0x2f, 0x2f, 0x2f}},
-	{AU8522_FILTER_COEF_R428, {0x84, 0xd8, 0x84, 0x84, 0xd8, 0xd8, 0xd8}},
-	{AU8522_FILTER_COEF_R429, {0x06, 0xfb, 0x06, 0x06, 0xfb, 0xfb, 0xfb}},
-	{AU8522_FILTER_COEF_R42A, {0x21, 0xd5, 0x21, 0x21, 0xd5, 0xd5, 0xd5}},
-	{AU8522_FILTER_COEF_R42B, {0x0a, 0x3e, 0x0a, 0x0a, 0x3e, 0x3e, 0x3e}},
-	{AU8522_FILTER_COEF_R42C, {0xe6, 0x15, 0xe6, 0xe6, 0x15, 0x15, 0x15}},
-	{AU8522_FILTER_COEF_R42D, {0x01, 0x34, 0x01, 0x01, 0x34, 0x34, 0x34}},
+	{AU8522_FILTER_COEF_R410, {0x25, 0x00, 0x25, 0x25, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R411, {0x20, 0x00, 0x20, 0x20, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R412, {0x03, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R413, {0xe6, 0x00, 0xe6, 0xe6, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R414, {0x40, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R415, {0x1b, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R416, {0xc0, 0x00, 0xc0, 0x04, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R417, {0x04, 0x00, 0x04, 0x04, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R418, {0x8c, 0x00, 0x8c, 0x8c, 0x00, 0x00, 0x00} },
+	{AU8522_FILTER_COEF_R419, {0xa0, 0x40, 0xa0, 0xa0, 0x40, 0x40, 0x40} },
+	{AU8522_FILTER_COEF_R41A, {0x21, 0x09, 0x21, 0x21, 0x09, 0x09, 0x09} },
+	{AU8522_FILTER_COEF_R41B, {0x6c, 0x38, 0x6c, 0x6c, 0x38, 0x38, 0x38} },
+	{AU8522_FILTER_COEF_R41C, {0x03, 0xff, 0x03, 0x03, 0xff, 0xff, 0xff} },
+	{AU8522_FILTER_COEF_R41D, {0xbf, 0xc7, 0xbf, 0xbf, 0xc7, 0xc7, 0xc7} },
+	{AU8522_FILTER_COEF_R41E, {0xa0, 0xdf, 0xa0, 0xa0, 0xdf, 0xdf, 0xdf} },
+	{AU8522_FILTER_COEF_R41F, {0x10, 0x06, 0x10, 0x10, 0x06, 0x06, 0x06} },
+	{AU8522_FILTER_COEF_R420, {0xae, 0x30, 0xae, 0xae, 0x30, 0x30, 0x30} },
+	{AU8522_FILTER_COEF_R421, {0xc4, 0x01, 0xc4, 0xc4, 0x01, 0x01, 0x01} },
+	{AU8522_FILTER_COEF_R422, {0x54, 0xdd, 0x54, 0x54, 0xdd, 0xdd, 0xdd} },
+	{AU8522_FILTER_COEF_R423, {0xd0, 0xaf, 0xd0, 0xd0, 0xaf, 0xaf, 0xaf} },
+	{AU8522_FILTER_COEF_R424, {0x1c, 0xf7, 0x1c, 0x1c, 0xf7, 0xf7, 0xf7} },
+	{AU8522_FILTER_COEF_R425, {0x76, 0xdb, 0x76, 0x76, 0xdb, 0xdb, 0xdb} },
+	{AU8522_FILTER_COEF_R426, {0x61, 0xc0, 0x61, 0x61, 0xc0, 0xc0, 0xc0} },
+	{AU8522_FILTER_COEF_R427, {0xd1, 0x2f, 0xd1, 0xd1, 0x2f, 0x2f, 0x2f} },
+	{AU8522_FILTER_COEF_R428, {0x84, 0xd8, 0x84, 0x84, 0xd8, 0xd8, 0xd8} },
+	{AU8522_FILTER_COEF_R429, {0x06, 0xfb, 0x06, 0x06, 0xfb, 0xfb, 0xfb} },
+	{AU8522_FILTER_COEF_R42A, {0x21, 0xd5, 0x21, 0x21, 0xd5, 0xd5, 0xd5} },
+	{AU8522_FILTER_COEF_R42B, {0x0a, 0x3e, 0x0a, 0x0a, 0x3e, 0x3e, 0x3e} },
+	{AU8522_FILTER_COEF_R42C, {0xe6, 0x15, 0xe6, 0xe6, 0x15, 0x15, 0x15} },
+	{AU8522_FILTER_COEF_R42D, {0x01, 0x34, 0x01, 0x01, 0x34, 0x34, 0x34} },
 
 };
-#define NUM_FILTER_COEF (sizeof (filter_coef) / sizeof(struct au8522_register_config))
+#define NUM_FILTER_COEF (sizeof(filter_coef)\
+			 / sizeof(struct au8522_register_config))
 
 
 /* Registers 0x060b through 0x0652 are the LP Filter coefficients
@@ -108,80 +109,81 @@ struct au8522_register_config filter_coef[] = {
    Note: the "ATVRF/ATVRF13" mode has never been tested
 */
 struct au8522_register_config lpfilter_coef[] = {
-	{0x060b, {0x21, 0x0b}},
-	{0x060c, {0xad, 0xad}},
-	{0x060d, {0x70, 0xf0}},
-	{0x060e, {0xea, 0xe9}},
-	{0x060f, {0xdd, 0xdd}},
-	{0x0610, {0x08, 0x64}},
-	{0x0611, {0x60, 0x60}},
-	{0x0612, {0xf8, 0xb2}},
-	{0x0613, {0x01, 0x02}},
-	{0x0614, {0xe4, 0xb4}},
-	{0x0615, {0x19, 0x02}},
-	{0x0616, {0xae, 0x2e}},
-	{0x0617, {0xee, 0xc5}},
-	{0x0618, {0x56, 0x56}},
-	{0x0619, {0x30, 0x58}},
-	{0x061a, {0xf9, 0xf8}},
-	{0x061b, {0x24, 0x64}},
-	{0x061c, {0x07, 0x07}},
-	{0x061d, {0x30, 0x30}},
-	{0x061e, {0xa9, 0xed}},
-	{0x061f, {0x09, 0x0b}},
-	{0x0620, {0x42, 0xc2}},
-	{0x0621, {0x1d, 0x2a}},
-	{0x0622, {0xd6, 0x56}},
-	{0x0623, {0x95, 0x8b}},
-	{0x0624, {0x2b, 0x2b}},
-	{0x0625, {0x30, 0x24}},
-	{0x0626, {0x3e, 0x3e}},
-	{0x0627, {0x62, 0xe2}},
-	{0x0628, {0xe9, 0xf5}},
-	{0x0629, {0x99, 0x19}},
-	{0x062a, {0xd4, 0x11}},
-	{0x062b, {0x03, 0x04}},
-	{0x062c, {0xb5, 0x85}},
-	{0x062d, {0x1e, 0x20}},
-	{0x062e, {0x2a, 0xea}},
-	{0x062f, {0xd7, 0xd2}},
-	{0x0630, {0x15, 0x15}},
-	{0x0631, {0xa3, 0xa9}},
-	{0x0632, {0x1f, 0x1f}},
-	{0x0633, {0xf9, 0xd1}},
-	{0x0634, {0xc0, 0xc3}},
-	{0x0635, {0x4d, 0x8d}},
-	{0x0636, {0x21, 0x31}},
-	{0x0637, {0x83, 0x83}},
-	{0x0638, {0x08, 0x8c}},
-	{0x0639, {0x19, 0x19}},
-	{0x063a, {0x45, 0xa5}},
-	{0x063b, {0xef, 0xec}},
-	{0x063c, {0x8a, 0x8a}},
-	{0x063d, {0xf4, 0xf6}},
-	{0x063e, {0x8f, 0x8f}},
-	{0x063f, {0x44, 0x0c}},
-	{0x0640, {0xef, 0xf0}},
-	{0x0641, {0x66, 0x66}},
-	{0x0642, {0xcc, 0xd2}},
-	{0x0643, {0x41, 0x41}},
-	{0x0644, {0x63, 0x93}},
-	{0x0645, {0x8e, 0x8e}},
-	{0x0646, {0xa2, 0x42}},
-	{0x0647, {0x7b, 0x7b}},
-	{0x0648, {0x04, 0x04}},
-	{0x0649, {0x00, 0x00}},
-	{0x064a, {0x40, 0x40}},
-	{0x064b, {0x8c, 0x98}},
-	{0x064c, {0x00, 0x00}},
-	{0x064d, {0x63, 0xc3}},
-	{0x064e, {0x04, 0x04}},
-	{0x064f, {0x20, 0x20}},
-	{0x0650, {0x00, 0x00}},
-	{0x0651, {0x40 ,0x40}},
-	{0x0652, {0x01, 0x01}},
+	{0x060b, {0x21, 0x0b} },
+	{0x060c, {0xad, 0xad} },
+	{0x060d, {0x70, 0xf0} },
+	{0x060e, {0xea, 0xe9} },
+	{0x060f, {0xdd, 0xdd} },
+	{0x0610, {0x08, 0x64} },
+	{0x0611, {0x60, 0x60} },
+	{0x0612, {0xf8, 0xb2} },
+	{0x0613, {0x01, 0x02} },
+	{0x0614, {0xe4, 0xb4} },
+	{0x0615, {0x19, 0x02} },
+	{0x0616, {0xae, 0x2e} },
+	{0x0617, {0xee, 0xc5} },
+	{0x0618, {0x56, 0x56} },
+	{0x0619, {0x30, 0x58} },
+	{0x061a, {0xf9, 0xf8} },
+	{0x061b, {0x24, 0x64} },
+	{0x061c, {0x07, 0x07} },
+	{0x061d, {0x30, 0x30} },
+	{0x061e, {0xa9, 0xed} },
+	{0x061f, {0x09, 0x0b} },
+	{0x0620, {0x42, 0xc2} },
+	{0x0621, {0x1d, 0x2a} },
+	{0x0622, {0xd6, 0x56} },
+	{0x0623, {0x95, 0x8b} },
+	{0x0624, {0x2b, 0x2b} },
+	{0x0625, {0x30, 0x24} },
+	{0x0626, {0x3e, 0x3e} },
+	{0x0627, {0x62, 0xe2} },
+	{0x0628, {0xe9, 0xf5} },
+	{0x0629, {0x99, 0x19} },
+	{0x062a, {0xd4, 0x11} },
+	{0x062b, {0x03, 0x04} },
+	{0x062c, {0xb5, 0x85} },
+	{0x062d, {0x1e, 0x20} },
+	{0x062e, {0x2a, 0xea} },
+	{0x062f, {0xd7, 0xd2} },
+	{0x0630, {0x15, 0x15} },
+	{0x0631, {0xa3, 0xa9} },
+	{0x0632, {0x1f, 0x1f} },
+	{0x0633, {0xf9, 0xd1} },
+	{0x0634, {0xc0, 0xc3} },
+	{0x0635, {0x4d, 0x8d} },
+	{0x0636, {0x21, 0x31} },
+	{0x0637, {0x83, 0x83} },
+	{0x0638, {0x08, 0x8c} },
+	{0x0639, {0x19, 0x19} },
+	{0x063a, {0x45, 0xa5} },
+	{0x063b, {0xef, 0xec} },
+	{0x063c, {0x8a, 0x8a} },
+	{0x063d, {0xf4, 0xf6} },
+	{0x063e, {0x8f, 0x8f} },
+	{0x063f, {0x44, 0x0c} },
+	{0x0640, {0xef, 0xf0} },
+	{0x0641, {0x66, 0x66} },
+	{0x0642, {0xcc, 0xd2} },
+	{0x0643, {0x41, 0x41} },
+	{0x0644, {0x63, 0x93} },
+	{0x0645, {0x8e, 0x8e} },
+	{0x0646, {0xa2, 0x42} },
+	{0x0647, {0x7b, 0x7b} },
+	{0x0648, {0x04, 0x04} },
+	{0x0649, {0x00, 0x00} },
+	{0x064a, {0x40, 0x40} },
+	{0x064b, {0x8c, 0x98} },
+	{0x064c, {0x00, 0x00} },
+	{0x064d, {0x63, 0xc3} },
+	{0x064e, {0x04, 0x04} },
+	{0x064f, {0x20, 0x20} },
+	{0x0650, {0x00, 0x00} },
+	{0x0651, {0x40, 0x40} },
+	{0x0652, {0x01, 0x01} },
 };
-#define NUM_LPFILTER_COEF (sizeof (lpfilter_coef) / sizeof(struct au8522_register_config))
+#define NUM_LPFILTER_COEF (sizeof(lpfilter_coef)\
+			   / sizeof(struct au8522_register_config))
 
 static inline struct au8522_state *to_state(struct v4l2_subdev *sd)
 {
@@ -202,14 +204,17 @@ static void setup_vbi(struct au8522_state *state, int aud_input)
 	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT2_REG01EH, 0x00);
 	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT1_REG01FH, 0x00);
 	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT0_REG020H, 0x00);
-	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK2_REG021H,0x00);
-	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK1_REG022H,0x00);
-	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK0_REG023H,0x00);
+	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK2_REG021H,
+			0x00);
+	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK1_REG022H,
+			0x00);
+	au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK0_REG023H,
+			0x00);
 
 	/* Setup the VBI registers */
-	for (i = 0x30; i < 0x60; i++) {
+	for (i = 0x30; i < 0x60; i++)
 		au8522_writereg(state, i, 0x40);
-	}
+
 	/* For some reason, every register is 0x40 except register 0x44
 	   (confirmed via the HVR-950q USB capture) */
 	au8522_writereg(state, 0x44, 0x60);
@@ -448,7 +453,7 @@ static void set_audio_input(struct au8522_state *state, int aud_input)
 
 	if (aud_input != AU8522_AUDIO_SIF) {
 		/* The caller asked for a mode we don't currently support */
-		printk("Unsupported audio mode requested! mode=%d\n",
+		printk(KERN_ERR "Unsupported audio mode requested! mode=%d\n",
 		       aud_input);
 		return;
 	}
@@ -668,7 +673,7 @@ static int au8522_s_video_routing(struct v4l2_subdev *sd,
 	} else if (route->input == AU8522_COMPOSITE_CH4_SIF) {
 		au8522_setup_cvbs_tuner_mode(state);
 	} else {
-		printk("au8522 mode not currently supported\n");
+		printk(KERN_ERR "au8522 mode not currently supported\n");
 		return -EINVAL;
 	}
 	return 0;
@@ -782,15 +787,15 @@ static int au8522_probe(struct i2c_client *client,
 	instance = au8522_get_state(&state, client->adapter, client->addr);
 	switch (instance) {
 	case 0:
-		printk("au8522_decoder allocation failed\n");
+		printk(KERN_ERR "au8522_decoder allocation failed\n");
 		return -EIO;
 	case 1:
 		/* new demod instance */
-		printk("au8522_decoder creating new instance...\n");
+		printk(KERN_INFO "au8522_decoder creating new instance...\n");
 		break;
 	default:
 		/* existing demod instance */
-		printk("au8522_decoder attaching to existing instance...\n");
+		printk(KERN_INFO "au8522_decoder attach existing instance.\n");
 		break;
 	}