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| author | Larry Finger <Larry.Finger@lwfinger.net> | 2010-08-20 10:15:30 -0500 |
|---|---|---|
| committer | Larry Finger <Larry.Finger@lwfinger.net> | 2010-08-20 10:15:30 -0500 |
| commit | 2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef (patch) | |
| tree | 430b79f753b0e1cec6379b9a4208a716c914ac65 /drivers/staging/rtl8712/rtl8712_gp_bitdef.h | |
| parent | 763008c4357b73c8d18396dfd8d79dc58fa3f99d (diff) | |
| download | kernel_samsung_smdk4412-2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef.zip kernel_samsung_smdk4412-2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef.tar.gz kernel_samsung_smdk4412-2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef.tar.bz2 | |
staging: r8712u: Add the new driver to the mainline kernel
This code is for a completely new version of the Realtek 8192 USB devices
such as the D-Link DWA-130. The Realtek code, which was originally for
Linux, Windows XP and Windows CE, has been stripped of all code not needed
for Linux. In addition, only one additional configuration variable, which
enables AP mode, remains.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com>
Tested-by: Frederic Leroy <fredo@starox.org>
Diffstat (limited to 'drivers/staging/rtl8712/rtl8712_gp_bitdef.h')
| -rw-r--r-- | drivers/staging/rtl8712/rtl8712_gp_bitdef.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/drivers/staging/rtl8712/rtl8712_gp_bitdef.h b/drivers/staging/rtl8712/rtl8712_gp_bitdef.h new file mode 100644 index 0000000..35ca809 --- /dev/null +++ b/drivers/staging/rtl8712/rtl8712_gp_bitdef.h @@ -0,0 +1,54 @@ +#ifndef __RTL8712_GP_BITDEF_H__ +#define __RTL8712_GP_BITDEF_H__ + +/*GPIO_CTRL*/ +#define _GPIO_MOD_MSK 0xFF000000 +#define _GPIO_MOD_SHT 24 +#define _GPIO_IO_SEL_MSK 0x00FF0000 +#define _GPIO_IO_SEL_SHT 16 +#define _GPIO_OUT_MSK 0x0000FF00 +#define _GPIO_OUT_SHT 8 +#define _GPIO_IN_MSK 0x000000FF +#define _GPIO_IN_SHT 0 + +/*SYS_PINMUX_CFG*/ +#define _GPIOSEL_MSK 0x0003 +#define _GPIOSEL_SHT 0 + +/*LED_CFG*/ +#define _LED1SV BIT(7) +#define _LED1CM_MSK 0x0070 +#define _LED1CM_SHT 4 +#define _LED0SV BIT(3) +#define _LED0CM_MSK 0x0007 +#define _LED0CM_SHT 0 + +/*PHY_REG*/ +#define _HST_RDRDY_SHT 0 +#define _HST_RDRDY_MSK 0xFF +#define _HST_RDRDY BIT(_HST_RDRDY_SHT) +#define _CPU_WTBUSY_SHT 1 +#define _CPU_WTBUSY_MSK 0xFF +#define _CPU_WTBUSY BIT(_CPU_WTBUSY_SHT) + +/* 11. General Purpose Registers (Offset: 0x02E0 - 0x02FF)*/ + +/* 8192S GPIO Config Setting (offset 0x2F1, 1 byte)*/ + +/*----------------------------------------------------------------------------*/ + +#define GPIOMUX_EN BIT(3) /* When this bit is set to "1", + * GPIO PINs will switch to MAC + * GPIO Function*/ +#define GPIOSEL_GPIO 0 /* UART or JTAG or pure GPIO*/ +#define GPIOSEL_PHYDBG 1 /* PHYDBG*/ +#define GPIOSEL_BT 2 /* BT_coex*/ +#define GPIOSEL_WLANDBG 3 /* WLANDBG*/ +#define GPIOSEL_GPIO_MASK (~(BIT(0)|BIT(1))) +/* HW Readio OFF switch (GPIO BIT) */ +#define HAL_8192S_HW_GPIO_OFF_BIT BIT(3) +#define HAL_8192S_HW_GPIO_OFF_MASK 0xF7 +#define HAL_8192S_HW_GPIO_WPS_BIT BIT(4) + +#endif /*__RTL8712_GP_BITDEF_H__*/ + |