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| author | Rene Sapiens <rene.sapiens@ti.com> | 2010-07-09 21:24:06 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-07-22 10:45:37 -0700 |
| commit | 0cd343a42f60a965cece191efaefe51e01e58f64 (patch) | |
| tree | d2f0c8adf077efff4bce2e5c627edce61645ecdc /drivers/staging/tidspbridge/hw/hw_mmu.c | |
| parent | 318b5df99bbbe58eb9f80105d9534117ac2f25ce (diff) | |
| download | kernel_samsung_smdk4412-0cd343a42f60a965cece191efaefe51e01e58f64.zip kernel_samsung_smdk4412-0cd343a42f60a965cece191efaefe51e01e58f64.tar.gz kernel_samsung_smdk4412-0cd343a42f60a965cece191efaefe51e01e58f64.tar.bz2 | |
staging: ti dspbridge: Rename words with camel case
The intention of this patch is to rename the remaining variables with camel
case. Variables will be renamed avoiding camel case and Hungarian notation.
The words to be renamed in this patch are:
========================================
segmentId to segmnt_id
SetPageDirty to set_page_dirty
sizeInBytes to size_in_bytes
sleepCode to sleep_code
Status to status
symName to sym_name
szVar to sz_var
Trapped_Args to trapped_args
TTBPhysAddr to ttb_phys_addr
uChirps to chirps
uChnlId to ch_id
uChnlID to ch_id
uContentSize to cont_size
uDDMAChnlId to ddma_chnl_id
uEvents to events
ulAlign to align_mask
========================================
Signed-off-by: Rene Sapiens <rene.sapiens@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/tidspbridge/hw/hw_mmu.c')
| -rw-r--r-- | drivers/staging/tidspbridge/hw/hw_mmu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/staging/tidspbridge/hw/hw_mmu.c b/drivers/staging/tidspbridge/hw/hw_mmu.c index 668fb8a..705cbe3 100644 --- a/drivers/staging/tidspbridge/hw/hw_mmu.c +++ b/drivers/staging/tidspbridge/hw/hw_mmu.c @@ -259,7 +259,7 @@ hw_status hw_mmu_fault_addr_read(const void __iomem *base_address, u32 *addr) return status; } -hw_status hw_mmu_ttb_set(const void __iomem *base_address, u32 TTBPhysAddr) +hw_status hw_mmu_ttb_set(const void __iomem *base_address, u32 ttb_phys_addr) { hw_status status = RET_OK; u32 load_ttb; @@ -268,7 +268,7 @@ hw_status hw_mmu_ttb_set(const void __iomem *base_address, u32 TTBPhysAddr) CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM, RES_MMU_BASE + RES_INVALID_INPUT_PARAM); - load_ttb = TTBPhysAddr & ~0x7FUL; + load_ttb = ttb_phys_addr & ~0x7FUL; /* write values to register */ MMUMMU_TTB_WRITE_REGISTER32(base_address, load_ttb); |