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authorcodeworkx <codeworkx@cyanogenmod.com>2012-09-22 09:48:20 +0200
committercodeworkx <codeworkx@cyanogenmod.com>2012-09-22 14:02:16 +0200
commit2489007e7d740ccbc3e0a202914e243ad5178787 (patch)
treeb8e6380ea7b1da63474ad68a5dba997e01146043 /drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h
parent5f67568eb31e3a813c7c52461dcf66ade15fc2e7 (diff)
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merge opensource jb u5
Change-Id: I1aaec157aa196f3448eff8636134fce89a814cf2
Diffstat (limited to 'drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h')
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h
index 773b645..ab4d660 100644
--- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h
+++ b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h
@@ -955,6 +955,7 @@
* CY_RQT_SDIO_RESUME
* CY_RQT_SDIO_RESET_DEV
* CY_RQT_P2S_DMA_START
+ * CY_RQT_CHANGE_SD_FREQ
*/
#ifndef __doxygen__
#define CY_RQT_STORAGE_RQT_CONTEXT (2)
@@ -1946,6 +1947,34 @@
* CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
*/
#define CY_RQT_P2S_DMA_START (35)
+#if defined(CONFIG_MACH_U1_NA_SPR) || defined(CONFIG_MACH_U1_NA_USCC)
+/* Summary
+ Changes the operating frequency of the SD card dynamically.
+
+ Direction
+ P Port Processor -> West Bridge
+
+ Length (in transfers)
+ 1
+
+ MailBox0
+ * Context = 2
+ * Request code = 36
+
+ D0
+ Bits 12 - 15 : Bus number
+ Bits 8 - 11 : Device number
+ Bits 0 - 7 : Not used
+
+ D1
+ Bits 7 - 0 : Clock source setting
+ Bits 15 - 8 : Clock divider setting
+
+ Responses
+ * CY_RESP_SUCCESS_FAILURE
+ */
+#define CY_RQT_CHANGE_SD_FREQ (36)
+#endif
/******************************************************/