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| author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2011-03-11 00:04:01 +0000 |
|---|---|---|
| committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2011-03-12 10:22:06 +0000 |
| commit | fd3cc69848b7e1873e5f12bbcdd572b20277ecf3 (patch) | |
| tree | 05ce614d358d964f36b40d3dd148770c8c8b5a4b /drivers/video/via/lcd.c | |
| parent | 97597a39778eefb628eb7734a18f32c7880ad0e0 (diff) | |
| download | kernel_samsung_smdk4412-fd3cc69848b7e1873e5f12bbcdd572b20277ecf3.zip kernel_samsung_smdk4412-fd3cc69848b7e1873e5f12bbcdd572b20277ecf3.tar.gz kernel_samsung_smdk4412-fd3cc69848b7e1873e5f12bbcdd572b20277ecf3.tar.bz2 | |
viafb: remove duplicated clock storage
The clocks can be easily recalculated by the timing and refresh value.
This brings us one step closer to removing VIAs modetable and use
generic ones and being easier extensible.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Diffstat (limited to 'drivers/video/via/lcd.c')
| -rw-r--r-- | drivers/video/via/lcd.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 2ca3bb8..fc76b27 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -612,7 +612,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, int set_vres = plvds_setting_info->v_active; int panel_hres = plvds_setting_info->lcd_panel_hres; int panel_vres = plvds_setting_info->lcd_panel_vres; - u32 pll_D_N; + u32 pll_D_N, clock; struct display_timing mode_crt_reg, panel_crt_reg; struct crt_mode_table *panel_crt_table = NULL; struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres, @@ -627,7 +627,9 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); - plvds_setting_info->vclk = panel_crt_table->clk; + clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total + * panel_crt_table->refresh_rate; + plvds_setting_info->vclk = clock; if (set_iga == IGA1) { /* IGA1 doesn't have LCD scaling, so set it as centering. */ viafb_load_crtc_timing(lcd_centering_timging @@ -662,7 +664,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, fill_lcd_format(); - pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk); + pll_D_N = viafb_get_clk_value(clock); DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N); viafb_set_vclock(pll_D_N, set_iga); lcd_patch_skew(plvds_setting_info, plvds_chip_info); |