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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2006-12-05 17:05:44 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-12-09 01:03:58 +0000
commit14b36af46a1d3652aff6734ea24816995dff8123 (patch)
tree35dc1c975faab9c25783b337155ea4df65448fb5 /include/asm-mips/mach-rm
parent88032b322a38b37335c8cb2e3473a45c81d280eb (diff)
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[MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machines
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-rm')
-rw-r--r--include/asm-mips/mach-rm/cpu-feature-overrides.h46
-rw-r--r--include/asm-mips/mach-rm/mc146818rtc.h17
-rw-r--r--include/asm-mips/mach-rm/timex.h13
3 files changed, 76 insertions, 0 deletions
diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h
new file mode 100644
index 0000000..11410ae
--- /dev/null
+++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ *
+ * SNI RM200 C apparently was only shipped with R4600 V2.0 and R5000 processors.
+ */
+#ifndef __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
+
+#include <cpu-feature-overrides.h>
+
+#define cpu_has_tlb 1
+#define cpu_has_4kex 1
+#define cpu_has_4k_cache 1
+#define cpu_has_fpu 1
+#define cpu_has_32fpr 1
+#define cpu_has_counter 1
+#define cpu_has_watch 0
+#define cpu_has_mips16 0
+#define cpu_has_divec 0
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 1
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 0
+#define cpu_has_mcheck 0
+#define cpu_has_ejtag 0
+#define cpu_has_llsc 1
+#define cpu_has_vtag_icache 0
+#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
+#define cpu_has_ic_fills_f_dc 0
+#define cpu_has_dsp 0
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 1
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#define cpu_has_mips32r1 0
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+
+#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-rm/mc146818rtc.h b/include/asm-mips/mach-rm/mc146818rtc.h
new file mode 100644
index 0000000..d37ae68
--- /dev/null
+++ b/include/asm-mips/mach-rm/mc146818rtc.h
@@ -0,0 +1,17 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 by Ralf Baechle
+ *
+ * RTC routines for PC style attached Dallas chip with ARC epoch.
+ */
+#ifndef __ASM_MACH_RM200_MC146818RTC_H
+#define __ASM_MACH_RM200_MC146818RTC_H
+
+#define mc146818_decode_year(year) ((year) + 1980)
+
+#include_next <mc146818rtc.h>
+
+#endif /* __ASM_MACH_RM200_MC146818RTC_H */
diff --git a/include/asm-mips/mach-rm/timex.h b/include/asm-mips/mach-rm/timex.h
new file mode 100644
index 0000000..11ff6cb
--- /dev/null
+++ b/include/asm-mips/mach-rm/timex.h
@@ -0,0 +1,13 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2005 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_RM200_TIMEX_H
+#define __ASM_MACH_RM200_TIMEX_H
+
+#define CLOCK_TICK_RATE 1193182
+
+#endif /* __ASM_MACH_RM200_TIMEX_H */