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authorTakashi Iwai <tiwai@suse.de>2011-04-26 15:25:02 +0200
committerTakashi Iwai <tiwai@suse.de>2011-04-26 15:33:43 +0200
commitd507cd668a3f6d07b31e914722b453c454b03204 (patch)
tree9fd9abef757ac53c5223c4565825b3f5b13982ce /sound/pci/hda/patch_sigmatel.c
parent0da2692256ed65bec588f7797c77f9c84ef4274e (diff)
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ALSA: hda - Enable sync_write workaround for AMD generically
The workaround for AMD chipset via sync_write flag seems needed for machines with Realtek codecs. So, it's better to activate it generically in hda_intel.c from the beginning. Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/hda/patch_sigmatel.c')
-rw-r--r--sound/pci/hda/patch_sigmatel.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 75b7155..6c5af3e 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -5449,13 +5449,6 @@ static int patch_stac92hd83xxx(struct hda_codec *codec)
spec->multiout.dac_nids = spec->dac_nids;
spec->init = stac92hd83xxx_core_init;
- if (codec->bus->pci && codec->bus->pci->vendor == PCI_VENDOR_ID_AMD) {
- snd_printk(KERN_INFO "idt92hd83xxx: "
- "Enable sync_write for AMD chipset\n");
- codec->bus->sync_write = 1;
- codec->bus->allow_bus_reset = 1;
- }
-
spec->board_config = snd_hda_check_board_config(codec,
STAC_92HD83XXX_MODELS,
stac92hd83xxx_models,
@@ -5736,15 +5729,6 @@ again:
if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
snd_hda_sequence_write_cache(codec, unmute_init);
- /* Some HP machines seem to have unstable codec communications
- * especially with ATI fglrx driver. For recovering from the
- * CORB/RIRB stall, allow the BUS reset and keep always sync
- */
- if (spec->board_config == STAC_HP_DV5) {
- codec->bus->sync_write = 1;
- codec->bus->allow_bus_reset = 1;
- }
-
spec->aloopback_ctl = stac92hd71bxx_loopback;
spec->aloopback_mask = 0x50;
spec->aloopback_shift = 0;