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Diffstat (limited to 'arch/arm/mach-exynos/setup-sdhci-gpio.c')
-rw-r--r--arch/arm/mach-exynos/setup-sdhci-gpio.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/setup-sdhci-gpio.c b/arch/arm/mach-exynos/setup-sdhci-gpio.c
index 05d8ed1..00b95c2 100644
--- a/arch/arm/mach-exynos/setup-sdhci-gpio.c
+++ b/arch/arm/mach-exynos/setup-sdhci-gpio.c
@@ -23,6 +23,9 @@
#include <plat/regs-sdhci.h>
#include <plat/sdhci.h>
+extern int s3c_gpio_slp_cfgpin(unsigned int pin, unsigned int config);
+extern int s3c_gpio_slp_setpull_updown(unsigned int pin, unsigned int config);
+
#if defined(CONFIG_ARCH_EXYNOS4)
void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
{
@@ -155,6 +158,45 @@ void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
+#if defined(CONFIG_WIMAX_CMC)
+ if (gpio_get_value(GPIO_WIMAX_EN)) {
+ for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2);
+ }
+ for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2);
+ }
+ for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) {
+ s3c_gpio_slp_cfgpin(gpio, S3C_GPIO_SLP_INPUT);
+ s3c_gpio_slp_setpull_updown(gpio, S3C_GPIO_PULL_NONE);
+ }
+ for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) {
+ s3c_gpio_slp_cfgpin(gpio, S3C_GPIO_SLP_INPUT);
+ s3c_gpio_slp_setpull_updown(gpio, S3C_GPIO_PULL_NONE);
+ }
+ } else {
+ for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_DOWN);
+ }
+ for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_DOWN);
+ }
+ for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) {
+ s3c_gpio_slp_cfgpin(gpio, S3C_GPIO_SLP_INPUT);
+ s3c_gpio_slp_setpull_updown(gpio, S3C_GPIO_PULL_DOWN);
+ }
+ for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) {
+ s3c_gpio_slp_cfgpin(gpio, S3C_GPIO_SLP_INPUT);
+ s3c_gpio_slp_setpull_updown(gpio, S3C_GPIO_PULL_DOWN);
+ }
+ }
+#else
/* Set all the necessary GPK3[0:1] pins to special-function 2 */
for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
@@ -208,6 +250,7 @@ void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
s3c_gpio_setpull(EXYNOS4_GPK3(2), S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2);
}
+#endif
}
#endif /* CONFIG_ARCH_EXYNOS4 */