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-rw-r--r--arch/sh/include/cpu-sh2a/cpu/cache.h40
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/dma.h1
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/freq.h16
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/rtc.h8
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/ubc.h1
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/watchdog.h1
6 files changed, 67 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh2a/cpu/cache.h b/arch/sh/include/cpu-sh2a/cpu/cache.h
new file mode 100644
index 0000000..afe228b
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/cache.h
@@ -0,0 +1,40 @@
+/*
+ * include/asm-sh/cpu-sh2a/cache.h
+ *
+ * Copyright (C) 2004 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH2A_CACHE_H
+#define __ASM_CPU_SH2A_CACHE_H
+
+#define L1_CACHE_SHIFT 4
+
+#define SH_CACHE_VALID 1
+#define SH_CACHE_UPDATED 2
+#define SH_CACHE_COMBINED 4
+#define SH_CACHE_ASSOC 8
+
+#define CCR 0xfffc1000 /* CCR1 */
+#define CCR2 0xfffc1004
+
+/*
+ * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
+ * listed here are reserved.
+ */
+#define CCR_CACHE_CB 0x0000 /* Hack */
+#define CCR_CACHE_OCE 0x0001
+#define CCR_CACHE_WT 0x0002
+#define CCR_CACHE_OCI 0x0008 /* OCF */
+#define CCR_CACHE_ICE 0x0100
+#define CCR_CACHE_ICI 0x0800 /* ICF */
+
+#define CACHE_IC_ADDRESS_ARRAY 0xf0000000
+#define CACHE_OC_ADDRESS_ARRAY 0xf0800000
+
+#define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE)
+#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
+
+#endif /* __ASM_CPU_SH2A_CACHE_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/dma.h b/arch/sh/include/cpu-sh2a/cpu/dma.h
new file mode 100644
index 0000000..27a13ef
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/dma.h
@@ -0,0 +1 @@
+#include <cpu-sh2/cpu/dma.h>
diff --git a/arch/sh/include/cpu-sh2a/cpu/freq.h b/arch/sh/include/cpu-sh2a/cpu/freq.h
new file mode 100644
index 0000000..830fd43
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/freq.h
@@ -0,0 +1,16 @@
+/*
+ * include/asm-sh/cpu-sh2a/freq.h
+ *
+ * Copyright (C) 2006 Yoshinori Sato
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH2A_FREQ_H
+#define __ASM_CPU_SH2A_FREQ_H
+
+#define FREQCR 0xfffe0010
+
+#endif /* __ASM_CPU_SH2A_FREQ_H */
+
diff --git a/arch/sh/include/cpu-sh2a/cpu/rtc.h b/arch/sh/include/cpu-sh2a/cpu/rtc.h
new file mode 100644
index 0000000..afb511e
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/rtc.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_SH_CPU_SH2A_RTC_H
+#define __ASM_SH_CPU_SH2A_RTC_H
+
+#define rtc_reg_size sizeof(u16)
+#define RTC_BIT_INVERTED 0
+#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
+
+#endif /* __ASM_SH_CPU_SH2A_RTC_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h
new file mode 100644
index 0000000..8ce2fc1c
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/ubc.h
@@ -0,0 +1 @@
+#include <cpu-sh2/cpu/ubc.h>
diff --git a/arch/sh/include/cpu-sh2a/cpu/watchdog.h b/arch/sh/include/cpu-sh2a/cpu/watchdog.h
new file mode 100644
index 0000000..e7e8259
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/watchdog.h
@@ -0,0 +1 @@
+#include <cpu-sh2/cpu/watchdog.h>