diff options
Diffstat (limited to 'drivers/net/wireless/bcmdhd/src/include')
62 files changed, 0 insertions, 21814 deletions
diff --git a/drivers/net/wireless/bcmdhd/src/include/aidmp.h b/drivers/net/wireless/bcmdhd/src/include/aidmp.h deleted file mode 100644 index ed7401a..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/aidmp.h +++ /dev/null @@ -1,375 +0,0 @@ -/* - * Broadcom AMBA Interconnect definitions. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: aidmp.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _AIDMP_H -#define _AIDMP_H - - -#define MFGID_ARM 0x43b -#define MFGID_BRCM 0x4bf -#define MFGID_MIPS 0x4a7 - - -#define CC_SIM 0 -#define CC_EROM 1 -#define CC_CORESIGHT 9 -#define CC_VERIF 0xb -#define CC_OPTIMO 0xd -#define CC_GEN 0xe -#define CC_PRIMECELL 0xf - - -#define ER_EROMENTRY 0x000 -#define ER_REMAPCONTROL 0xe00 -#define ER_REMAPSELECT 0xe04 -#define ER_MASTERSELECT 0xe10 -#define ER_ITCR 0xf00 -#define ER_ITIP 0xf04 - - -#define ER_TAG 0xe -#define ER_TAG1 0x6 -#define ER_VALID 1 -#define ER_CI 0 -#define ER_MP 2 -#define ER_ADD 4 -#define ER_END 0xe -#define ER_BAD 0xffffffff - - -#define CIA_MFG_MASK 0xfff00000 -#define CIA_MFG_SHIFT 20 -#define CIA_CID_MASK 0x000fff00 -#define CIA_CID_SHIFT 8 -#define CIA_CCL_MASK 0x000000f0 -#define CIA_CCL_SHIFT 4 - - -#define CIB_REV_MASK 0xff000000 -#define CIB_REV_SHIFT 24 -#define CIB_NSW_MASK 0x00f80000 -#define CIB_NSW_SHIFT 19 -#define CIB_NMW_MASK 0x0007c000 -#define CIB_NMW_SHIFT 14 -#define CIB_NSP_MASK 0x00003e00 -#define CIB_NSP_SHIFT 9 -#define CIB_NMP_MASK 0x000001f0 -#define CIB_NMP_SHIFT 4 - - -#define MPD_MUI_MASK 0x0000ff00 -#define MPD_MUI_SHIFT 8 -#define MPD_MP_MASK 0x000000f0 -#define MPD_MP_SHIFT 4 - - -#define AD_ADDR_MASK 0xfffff000 -#define AD_SP_MASK 0x00000f00 -#define AD_SP_SHIFT 8 -#define AD_ST_MASK 0x000000c0 -#define AD_ST_SHIFT 6 -#define AD_ST_SLAVE 0x00000000 -#define AD_ST_BRIDGE 0x00000040 -#define AD_ST_SWRAP 0x00000080 -#define AD_ST_MWRAP 0x000000c0 -#define AD_SZ_MASK 0x00000030 -#define AD_SZ_SHIFT 4 -#define AD_SZ_4K 0x00000000 -#define AD_SZ_8K 0x00000010 -#define AD_SZ_16K 0x00000020 -#define AD_SZ_SZD 0x00000030 -#define AD_AG32 0x00000008 -#define AD_ADDR_ALIGN 0x00000fff -#define AD_SZ_BASE 0x00001000 - - -#define SD_SZ_MASK 0xfffff000 -#define SD_SG32 0x00000008 -#define SD_SZ_ALIGN 0x00000fff - - -#ifndef _LANGUAGE_ASSEMBLY - -typedef volatile struct _aidmp { - uint32 oobselina30; - uint32 oobselina74; - uint32 PAD[6]; - uint32 oobselinb30; - uint32 oobselinb74; - uint32 PAD[6]; - uint32 oobselinc30; - uint32 oobselinc74; - uint32 PAD[6]; - uint32 oobselind30; - uint32 oobselind74; - uint32 PAD[38]; - uint32 oobselouta30; - uint32 oobselouta74; - uint32 PAD[6]; - uint32 oobseloutb30; - uint32 oobseloutb74; - uint32 PAD[6]; - uint32 oobseloutc30; - uint32 oobseloutc74; - uint32 PAD[6]; - uint32 oobseloutd30; - uint32 oobseloutd74; - uint32 PAD[38]; - uint32 oobsynca; - uint32 oobseloutaen; - uint32 PAD[6]; - uint32 oobsyncb; - uint32 oobseloutben; - uint32 PAD[6]; - uint32 oobsyncc; - uint32 oobseloutcen; - uint32 PAD[6]; - uint32 oobsyncd; - uint32 oobseloutden; - uint32 PAD[38]; - uint32 oobaextwidth; - uint32 oobainwidth; - uint32 oobaoutwidth; - uint32 PAD[5]; - uint32 oobbextwidth; - uint32 oobbinwidth; - uint32 oobboutwidth; - uint32 PAD[5]; - uint32 oobcextwidth; - uint32 oobcinwidth; - uint32 oobcoutwidth; - uint32 PAD[5]; - uint32 oobdextwidth; - uint32 oobdinwidth; - uint32 oobdoutwidth; - uint32 PAD[37]; - uint32 ioctrlset; - uint32 ioctrlclear; - uint32 ioctrl; - uint32 PAD[61]; - uint32 iostatus; - uint32 PAD[127]; - uint32 ioctrlwidth; - uint32 iostatuswidth; - uint32 PAD[62]; - uint32 resetctrl; - uint32 resetstatus; - uint32 resetreadid; - uint32 resetwriteid; - uint32 PAD[60]; - uint32 errlogctrl; - uint32 errlogdone; - uint32 errlogstatus; - uint32 errlogaddrlo; - uint32 errlogaddrhi; - uint32 errlogid; - uint32 errloguser; - uint32 errlogflags; - uint32 PAD[56]; - uint32 intstatus; - uint32 PAD[255]; - uint32 config; - uint32 PAD[63]; - uint32 itcr; - uint32 PAD[3]; - uint32 itipooba; - uint32 itipoobb; - uint32 itipoobc; - uint32 itipoobd; - uint32 PAD[4]; - uint32 itipoobaout; - uint32 itipoobbout; - uint32 itipoobcout; - uint32 itipoobdout; - uint32 PAD[4]; - uint32 itopooba; - uint32 itopoobb; - uint32 itopoobc; - uint32 itopoobd; - uint32 PAD[4]; - uint32 itopoobain; - uint32 itopoobbin; - uint32 itopoobcin; - uint32 itopoobdin; - uint32 PAD[4]; - uint32 itopreset; - uint32 PAD[15]; - uint32 peripherialid4; - uint32 peripherialid5; - uint32 peripherialid6; - uint32 peripherialid7; - uint32 peripherialid0; - uint32 peripherialid1; - uint32 peripherialid2; - uint32 peripherialid3; - uint32 componentid0; - uint32 componentid1; - uint32 componentid2; - uint32 componentid3; -} aidmp_t; - -#endif - - -#define OOB_BUSCONFIG 0x020 -#define OOB_STATUSA 0x100 -#define OOB_STATUSB 0x104 -#define OOB_STATUSC 0x108 -#define OOB_STATUSD 0x10c -#define OOB_ENABLEA0 0x200 -#define OOB_ENABLEA1 0x204 -#define OOB_ENABLEA2 0x208 -#define OOB_ENABLEA3 0x20c -#define OOB_ENABLEB0 0x280 -#define OOB_ENABLEB1 0x284 -#define OOB_ENABLEB2 0x288 -#define OOB_ENABLEB3 0x28c -#define OOB_ENABLEC0 0x300 -#define OOB_ENABLEC1 0x304 -#define OOB_ENABLEC2 0x308 -#define OOB_ENABLEC3 0x30c -#define OOB_ENABLED0 0x380 -#define OOB_ENABLED1 0x384 -#define OOB_ENABLED2 0x388 -#define OOB_ENABLED3 0x38c -#define OOB_ITCR 0xf00 -#define OOB_ITIPOOBA 0xf10 -#define OOB_ITIPOOBB 0xf14 -#define OOB_ITIPOOBC 0xf18 -#define OOB_ITIPOOBD 0xf1c -#define OOB_ITOPOOBA 0xf30 -#define OOB_ITOPOOBB 0xf34 -#define OOB_ITOPOOBC 0xf38 -#define OOB_ITOPOOBD 0xf3c - - -#define AI_OOBSELINA30 0x000 -#define AI_OOBSELINA74 0x004 -#define AI_OOBSELINB30 0x020 -#define AI_OOBSELINB74 0x024 -#define AI_OOBSELINC30 0x040 -#define AI_OOBSELINC74 0x044 -#define AI_OOBSELIND30 0x060 -#define AI_OOBSELIND74 0x064 -#define AI_OOBSELOUTA30 0x100 -#define AI_OOBSELOUTA74 0x104 -#define AI_OOBSELOUTB30 0x120 -#define AI_OOBSELOUTB74 0x124 -#define AI_OOBSELOUTC30 0x140 -#define AI_OOBSELOUTC74 0x144 -#define AI_OOBSELOUTD30 0x160 -#define AI_OOBSELOUTD74 0x164 -#define AI_OOBSYNCA 0x200 -#define AI_OOBSELOUTAEN 0x204 -#define AI_OOBSYNCB 0x220 -#define AI_OOBSELOUTBEN 0x224 -#define AI_OOBSYNCC 0x240 -#define AI_OOBSELOUTCEN 0x244 -#define AI_OOBSYNCD 0x260 -#define AI_OOBSELOUTDEN 0x264 -#define AI_OOBAEXTWIDTH 0x300 -#define AI_OOBAINWIDTH 0x304 -#define AI_OOBAOUTWIDTH 0x308 -#define AI_OOBBEXTWIDTH 0x320 -#define AI_OOBBINWIDTH 0x324 -#define AI_OOBBOUTWIDTH 0x328 -#define AI_OOBCEXTWIDTH 0x340 -#define AI_OOBCINWIDTH 0x344 -#define AI_OOBCOUTWIDTH 0x348 -#define AI_OOBDEXTWIDTH 0x360 -#define AI_OOBDINWIDTH 0x364 -#define AI_OOBDOUTWIDTH 0x368 - - -#define AI_IOCTRLSET 0x400 -#define AI_IOCTRLCLEAR 0x404 -#define AI_IOCTRL 0x408 -#define AI_IOSTATUS 0x500 -#define AI_RESETCTRL 0x800 -#define AI_RESETSTATUS 0x804 - -#define AI_IOCTRLWIDTH 0x700 -#define AI_IOSTATUSWIDTH 0x704 - -#define AI_RESETREADID 0x808 -#define AI_RESETWRITEID 0x80c -#define AI_ERRLOGCTRL 0xa00 -#define AI_ERRLOGDONE 0xa04 -#define AI_ERRLOGSTATUS 0xa08 -#define AI_ERRLOGADDRLO 0xa0c -#define AI_ERRLOGADDRHI 0xa10 -#define AI_ERRLOGID 0xa14 -#define AI_ERRLOGUSER 0xa18 -#define AI_ERRLOGFLAGS 0xa1c -#define AI_INTSTATUS 0xa00 -#define AI_CONFIG 0xe00 -#define AI_ITCR 0xf00 -#define AI_ITIPOOBA 0xf10 -#define AI_ITIPOOBB 0xf14 -#define AI_ITIPOOBC 0xf18 -#define AI_ITIPOOBD 0xf1c -#define AI_ITIPOOBAOUT 0xf30 -#define AI_ITIPOOBBOUT 0xf34 -#define AI_ITIPOOBCOUT 0xf38 -#define AI_ITIPOOBDOUT 0xf3c -#define AI_ITOPOOBA 0xf50 -#define AI_ITOPOOBB 0xf54 -#define AI_ITOPOOBC 0xf58 -#define AI_ITOPOOBD 0xf5c -#define AI_ITOPOOBAIN 0xf70 -#define AI_ITOPOOBBIN 0xf74 -#define AI_ITOPOOBCIN 0xf78 -#define AI_ITOPOOBDIN 0xf7c -#define AI_ITOPRESET 0xf90 -#define AI_PERIPHERIALID4 0xfd0 -#define AI_PERIPHERIALID5 0xfd4 -#define AI_PERIPHERIALID6 0xfd8 -#define AI_PERIPHERIALID7 0xfdc -#define AI_PERIPHERIALID0 0xfe0 -#define AI_PERIPHERIALID1 0xfe4 -#define AI_PERIPHERIALID2 0xfe8 -#define AI_PERIPHERIALID3 0xfec -#define AI_COMPONENTID0 0xff0 -#define AI_COMPONENTID1 0xff4 -#define AI_COMPONENTID2 0xff8 -#define AI_COMPONENTID3 0xffc - - -#define AIRC_RESET 1 - - -#define AICFG_OOB 0x00000020 -#define AICFG_IOS 0x00000010 -#define AICFG_IOC 0x00000008 -#define AICFG_TO 0x00000004 -#define AICFG_ERRL 0x00000002 -#define AICFG_RST 0x00000001 - - -#define OOB_SEL_OUTEN_B_5 15 -#define OOB_SEL_OUTEN_B_6 23 - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/bcm_cfg.h b/drivers/net/wireless/bcmdhd/src/include/bcm_cfg.h deleted file mode 100644 index 13c5786..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcm_cfg.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * BCM common config options - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcm_cfg.h 294399 2011-11-07 03:31:22Z $ - */ - -#ifndef _bcm_cfg_h_ -#define _bcm_cfg_h_ -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/bcm_mpool_pub.h b/drivers/net/wireless/bcmdhd/src/include/bcm_mpool_pub.h deleted file mode 100644 index 7d1e07a..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcm_mpool_pub.h +++ /dev/null @@ -1,361 +0,0 @@ -/* - * Memory pools library, Public interface - * - * API Overview - * - * This package provides a memory allocation subsystem based on pools of - * homogenous objects. - * - * Instrumentation is available for reporting memory utilization both - * on a per-data-structure basis and system wide. - * - * There are two main types defined in this API. - * - * pool manager: A singleton object that acts as a factory for - * pool allocators. It also is used for global - * instrumentation, such as reporting all blocks - * in use across all data structures. The pool manager - * creates and provides individual memory pools - * upon request to application code. - * - * memory pool: An object for allocating homogenous memory blocks. - * - * Global identifiers in this module use the following prefixes: - * bcm_mpm_* Memory pool manager - * bcm_mp_* Memory pool - * - * There are two main types of memory pools: - * - * prealloc: The contiguous memory block of objects can either be supplied - * by the client or malloc'ed by the memory manager. The objects are - * allocated out of a block of memory and freed back to the block. - * - * heap: The memory pool allocator uses the heap (malloc/free) for memory. - * In this case, the pool allocator is just providing statistics - * and instrumentation on top of the heap, without modifying the heap - * allocation implementation. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id$ - */ - -#ifndef _BCM_MPOOL_PUB_H -#define _BCM_MPOOL_PUB_H 1 - -#include <typedefs.h> /* needed for uint16 */ - - -/* -************************************************************************** -* -* Type definitions, handles -* -************************************************************************** -*/ - -/* Forward declaration of OSL handle. */ -struct osl_info; - -/* Forward declaration of string buffer. */ -struct bcmstrbuf; - -/* - * Opaque type definition for the pool manager handle. This object is used for global - * memory pool operations such as obtaining a new pool, deleting a pool, iterating and - * instrumentation/debugging. - */ -struct bcm_mpm_mgr; -typedef struct bcm_mpm_mgr *bcm_mpm_mgr_h; - -/* - * Opaque type definition for an instance of a pool. This handle is used for allocating - * and freeing memory through the pool, as well as management/instrumentation on this - * specific pool. - */ -struct bcm_mp_pool; -typedef struct bcm_mp_pool *bcm_mp_pool_h; - - -/* - * To make instrumentation more readable, every memory - * pool must have a readable name. Pool names are up to - * 8 bytes including '\0' termination. (7 printable characters.) - */ -#define BCM_MP_NAMELEN 8 - - -/* - * Type definition for pool statistics. - */ -typedef struct bcm_mp_stats { - char name[BCM_MP_NAMELEN]; /* Name of this pool. */ - unsigned int objsz; /* Object size allocated in this pool */ - uint16 nobj; /* Total number of objects in this pool */ - uint16 num_alloc; /* Number of objects currently allocated */ - uint16 high_water; /* Max number of allocated objects. */ - uint16 failed_alloc; /* Failed allocations. */ -} bcm_mp_stats_t; - - -/* -************************************************************************** -* -* API Routines on the pool manager. -* -************************************************************************** -*/ - -/* - * bcm_mpm_init() - initialize the whole memory pool system. - * - * Parameters: - * osh: INPUT Operating system handle. Needed for heap memory allocation. - * max_pools: INPUT Maximum number of mempools supported. - * mgr: OUTPUT The handle is written with the new pools manager object/handle. - * - * Returns: - * BCME_OK Object initialized successfully. May be used. - * BCME_NOMEM Initialization failed due to no memory. Object must not be used. - */ -int bcm_mpm_init(struct osl_info *osh, int max_pools, bcm_mpm_mgr_h *mgrp); - - -/* - * bcm_mpm_deinit() - de-initialize the whole memory pool system. - * - * Parameters: - * mgr: INPUT Pointer to pool manager handle. - * - * Returns: - * BCME_OK Memory pool manager successfully de-initialized. - * other Indicated error occured during de-initialization. - */ -int bcm_mpm_deinit(bcm_mpm_mgr_h *mgrp); - -/* - * bcm_mpm_create_prealloc_pool() - Create a new pool for fixed size objects. The - * pool uses a contiguous block of pre-alloced - * memory. The memory block may either be provided - * by the client or dynamically allocated by the - * pool manager. - * - * Parameters: - * mgr: INPUT The handle to the pool manager - * obj_sz: INPUT Size of objects that will be allocated by the new pool - * Must be >= sizeof(void *). - * nobj: INPUT Maximum number of concurrently existing objects to support - * memstart INPUT Pointer to the memory to use, or NULL to malloc() - * memsize INPUT Number of bytes referenced from memstart (for error checking). - * Must be 0 if 'memstart' is NULL. - * poolname INPUT For instrumentation, the name of the pool - * newp: OUTPUT The handle for the new pool, if creation is successful - * - * Returns: - * BCME_OK Pool created ok. - * other Pool not created due to indicated error. newpoolp set to NULL. - * - * - */ -int bcm_mpm_create_prealloc_pool(bcm_mpm_mgr_h mgr, - unsigned int obj_sz, - int nobj, - void *memstart, - unsigned int memsize, - char poolname[BCM_MP_NAMELEN], - bcm_mp_pool_h *newp); - - -/* - * bcm_mpm_delete_prealloc_pool() - Delete a memory pool. This should only be called after - * all memory objects have been freed back to the pool. - * - * Parameters: - * mgr: INPUT The handle to the pools manager - * pool: INPUT The handle of the pool to delete - * - * Returns: - * BCME_OK Pool deleted ok. - * other Pool not deleted due to indicated error. - * - */ -int bcm_mpm_delete_prealloc_pool(bcm_mpm_mgr_h mgr, bcm_mp_pool_h *poolp); - -/* - * bcm_mpm_create_heap_pool() - Create a new pool for fixed size objects. The memory - * pool allocator uses the heap (malloc/free) for memory. - * In this case, the pool allocator is just providing - * statistics and instrumentation on top of the heap, - * without modifying the heap allocation implementation. - * - * Parameters: - * mgr: INPUT The handle to the pool manager - * obj_sz: INPUT Size of objects that will be allocated by the new pool - * poolname INPUT For instrumentation, the name of the pool - * newp: OUTPUT The handle for the new pool, if creation is successful - * - * Returns: - * BCME_OK Pool created ok. - * other Pool not created due to indicated error. newpoolp set to NULL. - * - * - */ -int bcm_mpm_create_heap_pool(bcm_mpm_mgr_h mgr, unsigned int obj_sz, - char poolname[BCM_MP_NAMELEN], - bcm_mp_pool_h *newp); - - -/* - * bcm_mpm_delete_heap_pool() - Delete a memory pool. This should only be called after - * all memory objects have been freed back to the pool. - * - * Parameters: - * mgr: INPUT The handle to the pools manager - * pool: INPUT The handle of the pool to delete - * - * Returns: - * BCME_OK Pool deleted ok. - * other Pool not deleted due to indicated error. - * - */ -int bcm_mpm_delete_heap_pool(bcm_mpm_mgr_h mgr, bcm_mp_pool_h *poolp); - - -/* - * bcm_mpm_stats() - Return stats for all pools - * - * Parameters: - * mgr: INPUT The handle to the pools manager - * stats: OUTPUT Array of pool statistics. - * nentries: MOD Max elements in 'stats' array on INPUT. Actual number - * of array elements copied to 'stats' on OUTPUT. - * - * Returns: - * BCME_OK Ok - * other Error getting stats. - * - */ -int bcm_mpm_stats(bcm_mpm_mgr_h mgr, bcm_mp_stats_t *stats, int *nentries); - - -/* - * bcm_mpm_dump() - Display statistics on all pools - * - * Parameters: - * mgr: INPUT The handle to the pools manager - * b: OUTPUT Output buffer. - * - * Returns: - * BCME_OK Ok - * other Error during dump. - * - */ -int bcm_mpm_dump(bcm_mpm_mgr_h mgr, struct bcmstrbuf *b); - - -/* - * bcm_mpm_get_obj_size() - The size of memory objects may need to be padded to - * compensate for alignment requirements of the objects. - * This function provides the padded object size. If clients - * pre-allocate a memory slab for a memory pool, the - * padded object size should be used by the client to allocate - * the memory slab (in order to provide sufficent space for - * the maximum number of objects). - * - * Parameters: - * mgr: INPUT The handle to the pools manager. - * obj_sz: INPUT Input object size. - * padded_obj_sz: OUTPUT Padded object size. - * - * Returns: - * BCME_OK Ok - * BCME_BADARG Bad arguments. - * - */ -int bcm_mpm_get_obj_size(bcm_mpm_mgr_h mgr, unsigned int obj_sz, unsigned int *padded_obj_sz); - - -/* -*************************************************************************** -* -* API Routines on a specific pool. -* -*************************************************************************** -*/ - - -/* - * bcm_mp_alloc() - Allocate a memory pool object. - * - * Parameters: - * pool: INPUT The handle to the pool. - * - * Returns: - * A pointer to the new object. NULL on error. - * - */ -void* bcm_mp_alloc(bcm_mp_pool_h pool); - -/* - * bcm_mp_free() - Free a memory pool object. - * - * Parameters: - * pool: INPUT The handle to the pool. - * objp: INPUT A pointer to the object to free. - * - * Returns: - * BCME_OK Ok - * other Error during free. - * - */ -int bcm_mp_free(bcm_mp_pool_h pool, void *objp); - -/* - * bcm_mp_stats() - Return stats for this pool - * - * Parameters: - * pool: INPUT The handle to the pool - * stats: OUTPUT Pool statistics - * - * Returns: - * BCME_OK Ok - * other Error getting statistics. - * - */ -int bcm_mp_stats(bcm_mp_pool_h pool, bcm_mp_stats_t *stats); - - -/* - * bcm_mp_dump() - Dump a pool - * - * Parameters: - * pool: INPUT The handle to the pool - * b OUTPUT Output buffer - * - * Returns: - * BCME_OK Ok - * other Error during dump. - * - */ -int bcm_mp_dump(bcm_mp_pool_h pool, struct bcmstrbuf *b); - - -#endif /* _BCM_MPOOL_PUB_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmcdc.h b/drivers/net/wireless/bcmdhd/src/include/bcmcdc.h deleted file mode 100644 index f502218..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmcdc.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * CDC network driver ioctl/indication encoding - * Broadcom 802.11abg Networking Device Driver - * - * Definitions subject to change without notice. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmcdc.h 291086 2011-10-21 01:17:24Z $ - */ -#ifndef _bcmcdc_h_ -#define _bcmcdc_h_ -#include <proto/ethernet.h> - -typedef struct cdc_ioctl { - uint32 cmd; - uint32 len; - uint32 flags; - uint32 status; -} cdc_ioctl_t; - - -#define CDC_MAX_MSG_SIZE ETHER_MAX_LEN - - -#define CDCL_IOC_OUTLEN_MASK 0x0000FFFF - -#define CDCL_IOC_OUTLEN_SHIFT 0 -#define CDCL_IOC_INLEN_MASK 0xFFFF0000 -#define CDCL_IOC_INLEN_SHIFT 16 - - -#define CDCF_IOC_ERROR 0x01 -#define CDCF_IOC_SET 0x02 -#define CDCF_IOC_OVL_IDX_MASK 0x3c -#define CDCF_IOC_OVL_RSV 0x40 -#define CDCF_IOC_OVL 0x80 -#define CDCF_IOC_ACTION_MASK 0xfe -#define CDCF_IOC_ACTION_SHIFT 1 -#define CDCF_IOC_IF_MASK 0xF000 -#define CDCF_IOC_IF_SHIFT 12 -#define CDCF_IOC_ID_MASK 0xFFFF0000 -#define CDCF_IOC_ID_SHIFT 16 - -#define CDC_IOC_IF_IDX(flags) (((flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT) -#define CDC_IOC_ID(flags) (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT) - -#define CDC_GET_IF_IDX(hdr) \ - ((int)((((hdr)->flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT)) -#define CDC_SET_IF_IDX(hdr, idx) \ - ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | ((idx) << CDCF_IOC_IF_SHIFT))) - - - -struct bdc_header { - uint8 flags; - uint8 priority; - uint8 flags2; - uint8 dataOffset; -}; - -#define BDC_HEADER_LEN 4 - - -#define BDC_FLAG_80211_PKT 0x01 -#define BDC_FLAG_SUM_GOOD 0x04 -#define BDC_FLAG_SUM_NEEDED 0x08 -#define BDC_FLAG_VER_MASK 0xf0 -#define BDC_FLAG_VER_SHIFT 4 - - -#define BDC_PRIORITY_MASK 0x07 -#define BDC_PRIORITY_FC_MASK 0xf0 -#define BDC_PRIORITY_FC_SHIFT 4 - - -#define BDC_FLAG2_IF_MASK 0x0f -#define BDC_FLAG2_IF_SHIFT 0 -#define BDC_FLAG2_FC_FLAG 0x10 - - - -#define BDC_PROTO_VER_1 1 -#define BDC_PROTO_VER 2 - - -#define BDC_GET_IF_IDX(hdr) \ - ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT)) -#define BDC_SET_IF_IDX(hdr, idx) \ - ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | ((idx) << BDC_FLAG2_IF_SHIFT))) - -#define BDC_FLAG2_PAD_MASK 0xf0 -#define BDC_FLAG_PAD_MASK 0x03 -#define BDC_FLAG2_PAD_SHIFT 2 -#define BDC_FLAG_PAD_SHIFT 0 -#define BDC_FLAG2_PAD_IDX 0x3c -#define BDC_FLAG_PAD_IDX 0x03 -#define BDC_GET_PAD_LEN(hdr) \ - ((int)(((((hdr)->flags2) & BDC_FLAG2_PAD_MASK) >> BDC_FLAG2_PAD_SHIFT) | \ - ((((hdr)->flags) & BDC_FLAG_PAD_MASK) >> BDC_FLAG_PAD_SHIFT))) -#define BDC_SET_PAD_LEN(hdr, idx) \ - ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_PAD_MASK) | \ - (((idx) & BDC_FLAG2_PAD_IDX) << BDC_FLAG2_PAD_SHIFT))); \ - ((hdr)->flags = (((hdr)->flags & ~BDC_FLAG_PAD_MASK) | \ - (((idx) & BDC_FLAG_PAD_IDX) << BDC_FLAG_PAD_SHIFT))) - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmdefs.h b/drivers/net/wireless/bcmdhd/src/include/bcmdefs.h deleted file mode 100644 index cee9a1c..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmdefs.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Misc system wide definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmdefs.h 295153 2011-11-09 17:53:12Z $ - */ - -#ifndef _bcmdefs_h_ -#define _bcmdefs_h_ - -#define BCM_REFERENCE(data) ((void)(data)) - - -#define STATIC_ASSERT(expr) { \ - \ - typedef enum { _STATIC_ASSERT_NOT_CONSTANT = (expr) } _static_assert_e; \ - \ - typedef char STATIC_ASSERT_FAIL[(expr) ? 1 : -1]; \ -} - -#define bcmreclaimed 0 -#define _data _data -#define _fn _fn -#define BCMPREATTACHDATA(_data) _data -#define BCMPREATTACHFN(_fn) _fn -#define _data _data -#define _fn _fn -#define _fn _fn -#define BCMNMIATTACHFN(_fn) _fn -#define BCMNMIATTACHDATA(_data) _data -#define CONST const -#ifndef BCMFASTPATH -#define BCMFASTPATH -#endif - -#define _data _data -#define BCMROMDAT_NAME(_data) _data -#define _fn _fn -#define _fn _fn -#define STATIC static -#define BCMROMDAT_ARYSIZ(data) ARRAYSIZE(data) -#define BCMROMDAT_SIZEOF(data) sizeof(data) -#define BCMROMDAT_APATCH(data) -#define BCMROMDAT_SPATCH(data) - - -#define SI_BUS 0 -#define PCI_BUS 1 -#define PCMCIA_BUS 2 -#define SDIO_BUS 3 -#define JTAG_BUS 4 -#define USB_BUS 5 -#define SPI_BUS 6 -#define RPC_BUS 7 - - -#ifdef BCMBUSTYPE -#define BUSTYPE(bus) (BCMBUSTYPE) -#else -#define BUSTYPE(bus) (bus) -#endif - - -#ifdef BCMCHIPTYPE -#define CHIPTYPE(bus) (BCMCHIPTYPE) -#else -#define CHIPTYPE(bus) (bus) -#endif - -#if defined(BCMSPROMBUS) -#define SPROMBUS (BCMSPROMBUS) -#elif defined(SI_PCMCIA_SROM) -#define SPROMBUS (PCMCIA_BUS) -#else -#define SPROMBUS (PCI_BUS) -#endif - - -#ifdef BCMCHIPID -#define CHIPID(chip) (BCMCHIPID) -#else -#define CHIPID(chip) (chip) -#endif - -#ifdef BCMCHIPREV -#define CHIPREV(rev) (BCMCHIPREV) -#else -#define CHIPREV(rev) (rev) -#endif - - -#define DMADDR_MASK_32 0x0 -#define DMADDR_MASK_30 0xc0000000 -#define DMADDR_MASK_0 0xffffffff - -#define DMADDRWIDTH_30 30 -#define DMADDRWIDTH_32 32 -#define DMADDRWIDTH_63 63 -#define DMADDRWIDTH_64 64 - -#ifdef BCMDMA64OSL -typedef struct { - uint32 loaddr; - uint32 hiaddr; -} dma64addr_t; - -typedef dma64addr_t dmaaddr_t; -#define PHYSADDRHI(_pa) ((_pa).hiaddr) -#define PHYSADDRHISET(_pa, _val) \ - do { \ - (_pa).hiaddr = (_val); \ - } while (0) -#define PHYSADDRLO(_pa) ((_pa).loaddr) -#define PHYSADDRLOSET(_pa, _val) \ - do { \ - (_pa).loaddr = (_val); \ - } while (0) - -#else -typedef unsigned long dmaaddr_t; -#define PHYSADDRHI(_pa) (0) -#define PHYSADDRHISET(_pa, _val) -#define PHYSADDRLO(_pa) ((_pa)) -#define PHYSADDRLOSET(_pa, _val) \ - do { \ - (_pa) = (_val); \ - } while (0) -#endif /* BCMDMA64OSL */ - - -typedef struct { - dmaaddr_t addr; - uint32 length; -} hnddma_seg_t; - -#define MAX_DMA_SEGS 4 - - -typedef struct { - void *oshdmah; - uint origsize; - uint nsegs; - hnddma_seg_t segs[MAX_DMA_SEGS]; -} hnddma_seg_map_t; - -#if defined(BCM_RPC_NOCOPY) || defined(BCM_RCP_TXNOCOPY) - -#define BCMEXTRAHDROOM 220 -#else -#define BCMEXTRAHDROOM 172 -#endif - - -#ifndef SDALIGN -#define SDALIGN 32 -#endif - - -#define BCMDONGLEHDRSZ 12 -#define BCMDONGLEPADSZ 16 - -#define BCMDONGLEOVERHEAD (BCMDONGLEHDRSZ + BCMDONGLEPADSZ) - - -#if defined(NO_BCMDBG_ASSERT) -# undef BCMDBG_ASSERT -# undef BCMASSERT_LOG -#endif -#if defined(BCMASSERT_LOG) -#define BCMASSERT_SUPPORT -#endif - - -#define BITFIELD_MASK(width) \ - (((unsigned)1 << (width)) - 1) -#define GFIELD(val, field) \ - (((val) >> field ## _S) & field ## _M) -#define SFIELD(val, field, bits) \ - (((val) & (~(field ## _M << field ## _S))) | \ - ((unsigned)(bits) << field ## _S)) - - -#ifdef BCMSMALL -#undef BCMSPACE -#define bcmspace FALSE -#else -#define BCMSPACE -#define bcmspace TRUE -#endif - - -#define MAXSZ_NVRAM_VARS 4096 - -#ifdef DL_NVRAM -#define NVRAM_ARRAY_MAXSIZE DL_NVRAM -#else -#define NVRAM_ARRAY_MAXSIZE MAXSZ_NVRAM_VARS -#endif - -#ifdef BCMUSBDEV_ENABLED -extern uint32 gFWID; -#endif - -#endif /* _bcmdefs_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmdevs.h b/drivers/net/wireless/bcmdhd/src/include/bcmdevs.h deleted file mode 100644 index 8fe4fc1..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmdevs.h +++ /dev/null @@ -1,481 +0,0 @@ -/* - * Broadcom device-specific manifest constants. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmdevs.h 306883 2012-01-09 21:47:42Z $ - */ - -#ifndef _BCMDEVS_H -#define _BCMDEVS_H - - -#define VENDOR_EPIGRAM 0xfeda -#define VENDOR_BROADCOM 0x14e4 -#define VENDOR_3COM 0x10b7 -#define VENDOR_NETGEAR 0x1385 -#define VENDOR_DIAMOND 0x1092 -#define VENDOR_INTEL 0x8086 -#define VENDOR_DELL 0x1028 -#define VENDOR_HP 0x103c -#define VENDOR_HP_COMPAQ 0x0e11 -#define VENDOR_APPLE 0x106b -#define VENDOR_SI_IMAGE 0x1095 -#define VENDOR_BUFFALO 0x1154 -#define VENDOR_TI 0x104c -#define VENDOR_RICOH 0x1180 -#define VENDOR_JMICRON 0x197b - - - -#define VENDOR_BROADCOM_PCMCIA 0x02d0 - - -#define VENDOR_BROADCOM_SDIO 0x00BF - - -#define BCM_DNGL_VID 0x0a5c -#define BCM_DNGL_BL_PID_4328 0xbd12 -#define BCM_DNGL_BL_PID_4322 0xbd13 -#define BCM_DNGL_BL_PID_4319 0xbd16 -#define BCM_DNGL_BL_PID_43236 0xbd17 -#define BCM_DNGL_BL_PID_4332 0xbd18 -#define BCM_DNGL_BL_PID_4330 0xbd19 -#define BCM_DNGL_BL_PID_4334 0xbd1a -#define BCM_DNGL_BL_PID_43239 0xbd1b -#define BCM_DNGL_BL_PID_4324 0xbd1c -#define BCM_DNGL_BL_PID_4360 0xbd1d - -#define BCM_DNGL_BDC_PID 0x0bdc -#define BCM_DNGL_JTAG_PID 0x4a44 - - -#define BCM_HWUSB_PID_43239 43239 - - -#define BCM4210_DEVICE_ID 0x1072 -#define BCM4230_DEVICE_ID 0x1086 -#define BCM4401_ENET_ID 0x170c -#define BCM3352_DEVICE_ID 0x3352 -#define BCM3360_DEVICE_ID 0x3360 -#define BCM4211_DEVICE_ID 0x4211 -#define BCM4231_DEVICE_ID 0x4231 -#define BCM4303_D11B_ID 0x4303 -#define BCM4311_D11G_ID 0x4311 -#define BCM4311_D11DUAL_ID 0x4312 -#define BCM4311_D11A_ID 0x4313 -#define BCM4328_D11DUAL_ID 0x4314 -#define BCM4328_D11G_ID 0x4315 -#define BCM4328_D11A_ID 0x4316 -#define BCM4318_D11G_ID 0x4318 -#define BCM4318_D11DUAL_ID 0x4319 -#define BCM4318_D11A_ID 0x431a -#define BCM4325_D11DUAL_ID 0x431b -#define BCM4325_D11G_ID 0x431c -#define BCM4325_D11A_ID 0x431d -#define BCM4306_D11G_ID 0x4320 -#define BCM4306_D11A_ID 0x4321 -#define BCM4306_UART_ID 0x4322 -#define BCM4306_V90_ID 0x4323 -#define BCM4306_D11DUAL_ID 0x4324 -#define BCM4306_D11G_ID2 0x4325 -#define BCM4321_D11N_ID 0x4328 -#define BCM4321_D11N2G_ID 0x4329 -#define BCM4321_D11N5G_ID 0x432a -#define BCM4322_D11N_ID 0x432b -#define BCM4322_D11N2G_ID 0x432c -#define BCM4322_D11N5G_ID 0x432d -#define BCM4329_D11N_ID 0x432e -#define BCM4329_D11N2G_ID 0x432f -#define BCM4329_D11N5G_ID 0x4330 -#define BCM4315_D11DUAL_ID 0x4334 -#define BCM4315_D11G_ID 0x4335 -#define BCM4315_D11A_ID 0x4336 -#define BCM4319_D11N_ID 0x4337 -#define BCM4319_D11N2G_ID 0x4338 -#define BCM4319_D11N5G_ID 0x4339 -#define BCM43231_D11N2G_ID 0x4340 -#define BCM43221_D11N2G_ID 0x4341 -#define BCM43222_D11N_ID 0x4350 -#define BCM43222_D11N2G_ID 0x4351 -#define BCM43222_D11N5G_ID 0x4352 -#define BCM43224_D11N_ID 0x4353 -#define BCM43224_D11N_ID_VEN1 0x0576 -#define BCM43226_D11N_ID 0x4354 -#define BCM43236_D11N_ID 0x4346 -#define BCM43236_D11N2G_ID 0x4347 -#define BCM43236_D11N5G_ID 0x4348 -#define BCM43225_D11N2G_ID 0x4357 -#define BCM43421_D11N_ID 0xA99D -#define BCM4313_D11N2G_ID 0x4727 -#define BCM4330_D11N_ID 0x4360 -#define BCM4330_D11N2G_ID 0x4361 -#define BCM4330_D11N5G_ID 0x4362 -#define BCM4336_D11N_ID 0x4343 -#define BCM6362_D11N_ID 0x435f -#define BCM4331_D11N_ID 0x4331 -#define BCM4331_D11N2G_ID 0x4332 -#define BCM4331_D11N5G_ID 0x4333 -#define BCM43237_D11N_ID 0x4355 -#define BCM43237_D11N5G_ID 0x4356 -#define BCM43227_D11N2G_ID 0x4358 -#define BCM43228_D11N_ID 0x4359 -#define BCM43228_D11N5G_ID 0x435a -#define BCM43362_D11N_ID 0x4363 -#define BCM43239_D11N_ID 0x4370 -#define BCM4324_D11N_ID 0x4374 -#define BCM43217_D11N2G_ID 0x43a9 -#define BCM43131_D11N2G_ID 0x43aa -#define BCM4314_D11N2G_ID 0x4364 -#define BCM43142_D11N2G_ID 0x4365 -#define BCM4334_D11N_ID 0x4380 -#define BCM4334_D11N2G_ID 0x4381 -#define BCM4334_D11N5G_ID 0x4382 -#define BCM4360_D11AC_ID 0x43a0 -#define BCM4360_D11AC2G_ID 0x43a1 -#define BCM4360_D11AC5G_ID 0x43a2 - - -#define BCM943228HMB_SSID_VEN1 0x0607 -#define BCM94313HMGBL_SSID_VEN1 0x0608 -#define BCM94313HMG_SSID_VEN1 0x0609 - - -#define BCM4335_D11AC_ID 0x43a9 -#define BCM4335_D11AC2G_ID 0x43aa -#define BCM4335_D11AC5G_ID 0x43ab - -#define BCMGPRS_UART_ID 0x4333 -#define BCMGPRS2_UART_ID 0x4344 -#define FPGA_JTAGM_ID 0x43f0 -#define BCM_JTAGM_ID 0x43f1 -#define SDIOH_FPGA_ID 0x43f2 -#define BCM_SDIOH_ID 0x43f3 -#define SDIOD_FPGA_ID 0x43f4 -#define SPIH_FPGA_ID 0x43f5 -#define BCM_SPIH_ID 0x43f6 -#define MIMO_FPGA_ID 0x43f8 -#define BCM_JTAGM2_ID 0x43f9 -#define SDHCI_FPGA_ID 0x43fa -#define BCM4402_ENET_ID 0x4402 -#define BCM4402_V90_ID 0x4403 -#define BCM4410_DEVICE_ID 0x4410 -#define BCM4412_DEVICE_ID 0x4412 -#define BCM4430_DEVICE_ID 0x4430 -#define BCM4432_DEVICE_ID 0x4432 -#define BCM4704_ENET_ID 0x4706 -#define BCM4710_DEVICE_ID 0x4710 -#define BCM47XX_AUDIO_ID 0x4711 -#define BCM47XX_V90_ID 0x4712 -#define BCM47XX_ENET_ID 0x4713 -#define BCM47XX_EXT_ID 0x4714 -#define BCM47XX_GMAC_ID 0x4715 -#define BCM47XX_USBH_ID 0x4716 -#define BCM47XX_USBD_ID 0x4717 -#define BCM47XX_IPSEC_ID 0x4718 -#define BCM47XX_ROBO_ID 0x4719 -#define BCM47XX_USB20H_ID 0x471a -#define BCM47XX_USB20D_ID 0x471b -#define BCM47XX_ATA100_ID 0x471d -#define BCM47XX_SATAXOR_ID 0x471e -#define BCM47XX_GIGETH_ID 0x471f -#define BCM4712_MIPS_ID 0x4720 -#define BCM4716_DEVICE_ID 0x4722 -#define BCM47XX_SMBUS_EMU_ID 0x47fe -#define BCM47XX_XOR_EMU_ID 0x47ff -#define EPI41210_DEVICE_ID 0xa0fa -#define EPI41230_DEVICE_ID 0xa10e -#define JINVANI_SDIOH_ID 0x4743 -#define BCM27XX_SDIOH_ID 0x2702 -#define PCIXX21_FLASHMEDIA_ID 0x803b -#define PCIXX21_SDIOH_ID 0x803c -#define R5C822_SDIOH_ID 0x0822 -#define JMICRON_SDIOH_ID 0x2381 - - -#define BCM4306_CHIP_ID 0x4306 -#define BCM4311_CHIP_ID 0x4311 -#define BCM43111_CHIP_ID 43111 -#define BCM43112_CHIP_ID 43112 -#define BCM4312_CHIP_ID 0x4312 -#define BCM4313_CHIP_ID 0x4313 -#define BCM43131_CHIP_ID 43131 -#define BCM4315_CHIP_ID 0x4315 -#define BCM4318_CHIP_ID 0x4318 -#define BCM4319_CHIP_ID 0x4319 -#define BCM4320_CHIP_ID 0x4320 -#define BCM4321_CHIP_ID 0x4321 -#define BCM43217_CHIP_ID 43217 -#define BCM4322_CHIP_ID 0x4322 -#define BCM43221_CHIP_ID 43221 -#define BCM43222_CHIP_ID 43222 -#define BCM43224_CHIP_ID 43224 -#define BCM43225_CHIP_ID 43225 -#define BCM43227_CHIP_ID 43227 -#define BCM43228_CHIP_ID 43228 -#define BCM43226_CHIP_ID 43226 -#define BCM43231_CHIP_ID 43231 -#define BCM43234_CHIP_ID 43234 -#define BCM43235_CHIP_ID 43235 -#define BCM43236_CHIP_ID 43236 -#define BCM43237_CHIP_ID 43237 -#define BCM43238_CHIP_ID 43238 -#define BCM43239_CHIP_ID 43239 -#define BCM43420_CHIP_ID 43420 -#define BCM43421_CHIP_ID 43421 -#define BCM43428_CHIP_ID 43428 -#define BCM43431_CHIP_ID 43431 -#define BCM43460_CHIP_ID 43460 -#define BCM4325_CHIP_ID 0x4325 -#define BCM4328_CHIP_ID 0x4328 -#define BCM4329_CHIP_ID 0x4329 -#define BCM4331_CHIP_ID 0x4331 -#define BCM4336_CHIP_ID 0x4336 -#define BCM43362_CHIP_ID 43362 -#define BCM4330_CHIP_ID 0x4330 -#define BCM6362_CHIP_ID 0x6362 -#define BCM4314_CHIP_ID 0x4314 -#define BCM43142_CHIP_ID 43142 -#define BCM4324_CHIP_ID 0x4324 -#define BCM43242_CHIP_ID 43242 -#define BCM4334_CHIP_ID 0x4334 -#define BCM4360_CHIP_ID 0x4360 - -#define BCM4335_CHIP_ID 0x4335 - -#define BCM4342_CHIP_ID 4342 -#define BCM4402_CHIP_ID 0x4402 -#define BCM4704_CHIP_ID 0x4704 -#define BCM4706_CHIP_ID 0x5300 -#define BCM4710_CHIP_ID 0x4710 -#define BCM4712_CHIP_ID 0x4712 -#define BCM4716_CHIP_ID 0x4716 -#define BCM47162_CHIP_ID 47162 -#define BCM4748_CHIP_ID 0x4748 -#define BCM4749_CHIP_ID 0x4749 -#define BCM4785_CHIP_ID 0x4785 -#define BCM5350_CHIP_ID 0x5350 -#define BCM5352_CHIP_ID 0x5352 -#define BCM5354_CHIP_ID 0x5354 -#define BCM5365_CHIP_ID 0x5365 -#define BCM5356_CHIP_ID 0x5356 -#define BCM5357_CHIP_ID 0x5357 -#define BCM53572_CHIP_ID 53572 - - -#define BCM4303_PKG_ID 2 -#define BCM4309_PKG_ID 1 -#define BCM4712LARGE_PKG_ID 0 -#define BCM4712SMALL_PKG_ID 1 -#define BCM4712MID_PKG_ID 2 -#define BCM4328USBD11G_PKG_ID 2 -#define BCM4328USBDUAL_PKG_ID 3 -#define BCM4328SDIOD11G_PKG_ID 4 -#define BCM4328SDIODUAL_PKG_ID 5 -#define BCM4329_289PIN_PKG_ID 0 -#define BCM4329_182PIN_PKG_ID 1 -#define BCM5354E_PKG_ID 1 -#define BCM4716_PKG_ID 8 -#define BCM4717_PKG_ID 9 -#define BCM4718_PKG_ID 10 -#define BCM5356_PKG_NONMODE 1 -#define BCM5358U_PKG_ID 8 -#define BCM5358_PKG_ID 9 -#define BCM47186_PKG_ID 10 -#define BCM5357_PKG_ID 11 -#define BCM5356U_PKG_ID 12 -#define BCM53572_PKG_ID 8 -#define BCM5357C0_PKG_ID 8 -#define BCM47188_PKG_ID 9 -#define BCM5358C0_PKG_ID 0xa -#define BCM5356C0_PKG_ID 0xb -#define BCM4331TT_PKG_ID 8 -#define BCM4331TN_PKG_ID 9 -#define BCM4331TNA0_PKG_ID 0xb -#define BCM4706L_PKG_ID 1 - -#define HDLSIM5350_PKG_ID 1 -#define HDLSIM_PKG_ID 14 -#define HWSIM_PKG_ID 15 -#define BCM43224_FAB_CSM 0x8 -#define BCM43224_FAB_SMIC 0xa -#define BCM4336_WLBGA_PKG_ID 0x8 -#define BCM4330_WLBGA_PKG_ID 0x0 -#define BCM4314PCIE_ARM_PKG_ID (8 | 0) -#define BCM4314SDIO_PKG_ID (8 | 1) -#define BCM4314PCIE_PKG_ID (8 | 2) -#define BCM4314SDIO_ARM_PKG_ID (8 | 3) -#define BCM4314SDIO_FPBGA_PKG_ID (8 | 4) -#define BCM4314DEV_PKG_ID (8 | 6) - -#define PCIXX21_FLASHMEDIA0_ID 0x8033 -#define PCIXX21_SDIOH0_ID 0x8034 - - -#define BFL_BTC2WIRE 0x00000001 -#define BFL_BTCOEX 0x00000001 -#define BFL_PACTRL 0x00000002 -#define BFL_AIRLINEMODE 0x00000004 -#define BFL_ADCDIV 0x00000008 -#define BFL_ENETROBO 0x00000010 -#define BFL_NOPLLDOWN 0x00000020 -#define BFL_CCKHIPWR 0x00000040 -#define BFL_ENETADM 0x00000080 -#define BFL_ENETVLAN 0x00000100 -#define BFL_UNUSED 0x00000200 -#define BFL_NOPCI 0x00000400 -#define BFL_FEM 0x00000800 -#define BFL_EXTLNA 0x00001000 -#define BFL_HGPA 0x00002000 -#define BFL_BTC2WIRE_ALTGPIO 0x00004000 -#define BFL_ALTIQ 0x00008000 -#define BFL_NOPA 0x00010000 -#define BFL_RSSIINV 0x00020000 -#define BFL_PAREF 0x00040000 -#define BFL_3TSWITCH 0x00080000 -#define BFL_PHASESHIFT 0x00100000 -#define BFL_BUCKBOOST 0x00200000 -#define BFL_FEM_BT 0x00400000 -#define BFL_NOCBUCK 0x00800000 -#define BFL_CCKFAVOREVM 0x01000000 -#define BFL_PALDO 0x02000000 -#define BFL_LNLDO2_2P5 0x04000000 -#define BFL_FASTPWR 0x08000000 -#define BFL_UCPWRCTL_MININDX 0x08000000 -#define BFL_EXTLNA_5GHz 0x10000000 -#define BFL_TRSW_1by2 0x20000000 -#define BFL_LO_TRSW_R_5GHz 0x40000000 -#define BFL_ELNA_GAINDEF 0x80000000 -#define BFL_EXTLNA_TX 0x20000000 - - -#define BFL2_RXBB_INT_REG_DIS 0x00000001 -#define BFL2_APLL_WAR 0x00000002 -#define BFL2_TXPWRCTRL_EN 0x00000004 -#define BFL2_2X4_DIV 0x00000008 -#define BFL2_5G_PWRGAIN 0x00000010 -#define BFL2_PCIEWAR_OVR 0x00000020 -#define BFL2_CAESERS_BRD 0x00000040 -#define BFL2_BTC3WIRE 0x00000080 -#define BFL2_BTCLEGACY 0x00000080 -#define BFL2_SKWRKFEM_BRD 0x00000100 -#define BFL2_SPUR_WAR 0x00000200 -#define BFL2_GPLL_WAR 0x00000400 -#define BFL2_TRISTATE_LED 0x00000800 -#define BFL2_SINGLEANT_CCK 0x00001000 -#define BFL2_2G_SPUR_WAR 0x00002000 -#define BFL2_BPHY_ALL_TXCORES 0x00004000 -#define BFL2_FCC_BANDEDGE_WAR 0x00008000 -#define BFL2_GPLL_WAR2 0x00010000 -#define BFL2_IPALVLSHIFT_3P3 0x00020000 -#define BFL2_INTERNDET_TXIQCAL 0x00040000 -#define BFL2_XTALBUFOUTEN 0x00080000 - - - -#define BFL2_ANAPACTRL_2G 0x00100000 -#define BFL2_ANAPACTRL_5G 0x00200000 -#define BFL2_ELNACTRL_TRSW_2G 0x00400000 -#define BFL2_BT_SHARE_ANT0 0x00800000 -#define BFL2_TEMPSENSE_HIGHER 0x01000000 -#define BFL2_BTC3WIREONLY 0x02000000 -#define BFL2_PWR_NOMINAL 0x04000000 -#define BFL2_EXTLNA_PWRSAVE 0x08000000 - -#define BFL2_4313_RADIOREG 0x10000000 - -#define BFL2_SDR_EN 0x20000000 - - -#define BOARD_GPIO_BTC3W_IN 0x850 -#define BOARD_GPIO_BTC3W_OUT 0x020 -#define BOARD_GPIO_BTCMOD_IN 0x010 -#define BOARD_GPIO_BTCMOD_OUT 0x020 -#define BOARD_GPIO_BTC_IN 0x080 -#define BOARD_GPIO_BTC_OUT 0x100 -#define BOARD_GPIO_PACTRL 0x200 -#define BOARD_GPIO_12 0x1000 -#define BOARD_GPIO_13 0x2000 -#define BOARD_GPIO_BTC4_IN 0x0800 -#define BOARD_GPIO_BTC4_BT 0x2000 -#define BOARD_GPIO_BTC4_STAT 0x4000 -#define BOARD_GPIO_BTC4_WLAN 0x8000 -#define BOARD_GPIO_1_WLAN_PWR 0x02 -#define BOARD_GPIO_3_WLAN_PWR 0x08 -#define BOARD_GPIO_4_WLAN_PWR 0x10 - -#define GPIO_BTC4W_OUT_4312 0x010 -#define GPIO_BTC4W_OUT_43224 0x020 -#define GPIO_BTC4W_OUT_43224_SHARED 0x0e0 -#define GPIO_BTC4W_OUT_43225 0x0e0 -#define GPIO_BTC4W_OUT_43421 0x020 -#define GPIO_BTC4W_OUT_4313 0x060 -#define GPIO_BTC4W_OUT_4331_SHARED 0x010 - -#define PCI_CFG_GPIO_SCS 0x10 -#define PCI_CFG_GPIO_HWRAD 0x20 -#define PCI_CFG_GPIO_XTAL 0x40 -#define PCI_CFG_GPIO_PLL 0x80 - - -#define PLL_DELAY 150 -#define FREF_DELAY 200 -#define MIN_SLOW_CLK 32 -#define XTAL_ON_DELAY 1000 - - - -#define GPIO_NUMPINS 32 - - -#define RDL_RAM_BASE_4319 0x60000000 -#define RDL_RAM_BASE_4329 0x60000000 -#define RDL_RAM_SIZE_4319 0x48000 -#define RDL_RAM_SIZE_4329 0x48000 -#define RDL_RAM_SIZE_43236 0x70000 -#define RDL_RAM_BASE_43236 0x60000000 -#define RDL_RAM_SIZE_4328 0x60000 -#define RDL_RAM_BASE_4328 0x80000000 -#define RDL_RAM_SIZE_4322 0x60000 -#define RDL_RAM_BASE_4322 0x60000000 - - -#define MUXENAB_UART 0x00000001 -#define MUXENAB_GPIO 0x00000002 -#define MUXENAB_ERCX 0x00000004 -#define MUXENAB_JTAG 0x00000008 -#define MUXENAB_HOST_WAKE 0x00000010 -#define MUXENAB_I2S_EN 0x00000020 -#define MUXENAB_I2S_MASTER 0x00000040 -#define MUXENAB_I2S_FULL 0x00000080 -#define MUXENAB_SFLASH 0x00000100 -#define MUXENAB_RFSWCTRL0 0x00000200 -#define MUXENAB_RFSWCTRL1 0x00000400 -#define MUXENAB_RFSWCTRL2 0x00000800 -#define MUXENAB_SECI 0x00001000 -#define MUXENAB_BT_LEGACY 0x00002000 -#define MUXENAB_HOST_WAKE1 0x00004000 - - -#define FLASH_KERNEL_NFLASH 0x00000001 -#define FLASH_BOOT_NFLASH 0x00000002 - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmendian.h b/drivers/net/wireless/bcmdhd/src/include/bcmendian.h deleted file mode 100644 index 38d6bb0..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmendian.h +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Byte order utilities - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmendian.h 241182 2011-02-17 21:50:03Z $ - * - * This file by default provides proper behavior on little-endian architectures. - * On big-endian architectures, IL_BIGENDIAN should be defined. - */ - -#ifndef _BCMENDIAN_H_ -#define _BCMENDIAN_H_ - -#include <typedefs.h> - - -#define BCMSWAP16(val) \ - ((uint16)((((uint16)(val) & (uint16)0x00ffU) << 8) | \ - (((uint16)(val) & (uint16)0xff00U) >> 8))) - - -#define BCMSWAP32(val) \ - ((uint32)((((uint32)(val) & (uint32)0x000000ffU) << 24) | \ - (((uint32)(val) & (uint32)0x0000ff00U) << 8) | \ - (((uint32)(val) & (uint32)0x00ff0000U) >> 8) | \ - (((uint32)(val) & (uint32)0xff000000U) >> 24))) - - -#define BCMSWAP32BY16(val) \ - ((uint32)((((uint32)(val) & (uint32)0x0000ffffU) << 16) | \ - (((uint32)(val) & (uint32)0xffff0000U) >> 16))) - - -#ifndef hton16 -#define HTON16(i) BCMSWAP16(i) -#define hton16(i) bcmswap16(i) -#define HTON32(i) BCMSWAP32(i) -#define hton32(i) bcmswap32(i) -#define NTOH16(i) BCMSWAP16(i) -#define ntoh16(i) bcmswap16(i) -#define NTOH32(i) BCMSWAP32(i) -#define ntoh32(i) bcmswap32(i) -#define LTOH16(i) (i) -#define ltoh16(i) (i) -#define LTOH32(i) (i) -#define ltoh32(i) (i) -#define HTOL16(i) (i) -#define htol16(i) (i) -#define HTOL32(i) (i) -#define htol32(i) (i) -#endif - -#define ltoh16_buf(buf, i) -#define htol16_buf(buf, i) - - -#define load32_ua(a) ltoh32_ua(a) -#define store32_ua(a, v) htol32_ua_store(v, a) -#define load16_ua(a) ltoh16_ua(a) -#define store16_ua(a, v) htol16_ua_store(v, a) - -#define _LTOH16_UA(cp) ((cp)[0] | ((cp)[1] << 8)) -#define _LTOH32_UA(cp) ((cp)[0] | ((cp)[1] << 8) | ((cp)[2] << 16) | ((cp)[3] << 24)) -#define _NTOH16_UA(cp) (((cp)[0] << 8) | (cp)[1]) -#define _NTOH32_UA(cp) (((cp)[0] << 24) | ((cp)[1] << 16) | ((cp)[2] << 8) | (cp)[3]) - -#define ltoh_ua(ptr) \ - (sizeof(*(ptr)) == sizeof(uint8) ? *(const uint8 *)(ptr) : \ - sizeof(*(ptr)) == sizeof(uint16) ? _LTOH16_UA((const uint8 *)(ptr)) : \ - sizeof(*(ptr)) == sizeof(uint32) ? _LTOH32_UA((const uint8 *)(ptr)) : \ - *(uint8 *)0) - -#define ntoh_ua(ptr) \ - (sizeof(*(ptr)) == sizeof(uint8) ? *(const uint8 *)(ptr) : \ - sizeof(*(ptr)) == sizeof(uint16) ? _NTOH16_UA((const uint8 *)(ptr)) : \ - sizeof(*(ptr)) == sizeof(uint32) ? _NTOH32_UA((const uint8 *)(ptr)) : \ - *(uint8 *)0) - -#ifdef __GNUC__ - - - -#define bcmswap16(val) ({ \ - uint16 _val = (val); \ - BCMSWAP16(_val); \ -}) - -#define bcmswap32(val) ({ \ - uint32 _val = (val); \ - BCMSWAP32(_val); \ -}) - -#define bcmswap32by16(val) ({ \ - uint32 _val = (val); \ - BCMSWAP32BY16(_val); \ -}) - -#define bcmswap16_buf(buf, len) ({ \ - uint16 *_buf = (uint16 *)(buf); \ - uint _wds = (len) / 2; \ - while (_wds--) { \ - *_buf = bcmswap16(*_buf); \ - _buf++; \ - } \ -}) - -#define htol16_ua_store(val, bytes) ({ \ - uint16 _val = (val); \ - uint8 *_bytes = (uint8 *)(bytes); \ - _bytes[0] = _val & 0xff; \ - _bytes[1] = _val >> 8; \ -}) - -#define htol32_ua_store(val, bytes) ({ \ - uint32 _val = (val); \ - uint8 *_bytes = (uint8 *)(bytes); \ - _bytes[0] = _val & 0xff; \ - _bytes[1] = (_val >> 8) & 0xff; \ - _bytes[2] = (_val >> 16) & 0xff; \ - _bytes[3] = _val >> 24; \ -}) - -#define hton16_ua_store(val, bytes) ({ \ - uint16 _val = (val); \ - uint8 *_bytes = (uint8 *)(bytes); \ - _bytes[0] = _val >> 8; \ - _bytes[1] = _val & 0xff; \ -}) - -#define hton32_ua_store(val, bytes) ({ \ - uint32 _val = (val); \ - uint8 *_bytes = (uint8 *)(bytes); \ - _bytes[0] = _val >> 24; \ - _bytes[1] = (_val >> 16) & 0xff; \ - _bytes[2] = (_val >> 8) & 0xff; \ - _bytes[3] = _val & 0xff; \ -}) - -#define ltoh16_ua(bytes) ({ \ - const uint8 *_bytes = (const uint8 *)(bytes); \ - _LTOH16_UA(_bytes); \ -}) - -#define ltoh32_ua(bytes) ({ \ - const uint8 *_bytes = (const uint8 *)(bytes); \ - _LTOH32_UA(_bytes); \ -}) - -#define ntoh16_ua(bytes) ({ \ - const uint8 *_bytes = (const uint8 *)(bytes); \ - _NTOH16_UA(_bytes); \ -}) - -#define ntoh32_ua(bytes) ({ \ - const uint8 *_bytes = (const uint8 *)(bytes); \ - _NTOH32_UA(_bytes); \ -}) - -#else - - -static INLINE uint16 -bcmswap16(uint16 val) -{ - return BCMSWAP16(val); -} - -static INLINE uint32 -bcmswap32(uint32 val) -{ - return BCMSWAP32(val); -} - -static INLINE uint32 -bcmswap32by16(uint32 val) -{ - return BCMSWAP32BY16(val); -} - - - - -static INLINE void -bcmswap16_buf(uint16 *buf, uint len) -{ - len = len / 2; - - while (len--) { - *buf = bcmswap16(*buf); - buf++; - } -} - - -static INLINE void -htol16_ua_store(uint16 val, uint8 *bytes) -{ - bytes[0] = val & 0xff; - bytes[1] = val >> 8; -} - - -static INLINE void -htol32_ua_store(uint32 val, uint8 *bytes) -{ - bytes[0] = val & 0xff; - bytes[1] = (val >> 8) & 0xff; - bytes[2] = (val >> 16) & 0xff; - bytes[3] = val >> 24; -} - - -static INLINE void -hton16_ua_store(uint16 val, uint8 *bytes) -{ - bytes[0] = val >> 8; - bytes[1] = val & 0xff; -} - - -static INLINE void -hton32_ua_store(uint32 val, uint8 *bytes) -{ - bytes[0] = val >> 24; - bytes[1] = (val >> 16) & 0xff; - bytes[2] = (val >> 8) & 0xff; - bytes[3] = val & 0xff; -} - - -static INLINE uint16 -ltoh16_ua(const void *bytes) -{ - return _LTOH16_UA((const uint8 *)bytes); -} - - -static INLINE uint32 -ltoh32_ua(const void *bytes) -{ - return _LTOH32_UA((const uint8 *)bytes); -} - - -static INLINE uint16 -ntoh16_ua(const void *bytes) -{ - return _NTOH16_UA((const uint8 *)bytes); -} - - -static INLINE uint32 -ntoh32_ua(const void *bytes) -{ - return _NTOH32_UA((const uint8 *)bytes); -} - -#endif -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmnvram.h b/drivers/net/wireless/bcmdhd/src/include/bcmnvram.h deleted file mode 100644 index 62da907..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmnvram.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * NVRAM variable manipulation - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmnvram.h 288000 2011-10-05 19:05:16Z $ - */ - -#ifndef _bcmnvram_h_ -#define _bcmnvram_h_ - -#ifndef _LANGUAGE_ASSEMBLY - -#include <typedefs.h> -#include <bcmdefs.h> - -struct nvram_header { - uint32 magic; - uint32 len; - uint32 crc_ver_init; - uint32 config_refresh; - uint32 config_ncdl; -}; - -struct nvram_tuple { - char *name; - char *value; - struct nvram_tuple *next; -}; - - -extern char *nvram_default_get(const char *name); - - -extern int nvram_init(void *sih); - - -extern int nvram_append(void *si, char *vars, uint varsz); - -extern void nvram_get_global_vars(char **varlst, uint *varsz); - - - -extern int nvram_reset(void *sih); - - -extern void nvram_exit(void *sih); - - -extern char * nvram_get(const char *name); - - -extern int nvram_resetgpio_init(void *sih); - - -static INLINE char * -nvram_safe_get(const char *name) -{ - char *p = nvram_get(name); - return p ? p : ""; -} - - -static INLINE int -nvram_match(char *name, char *match) -{ - const char *value = nvram_get(name); - return (value && !strcmp(value, match)); -} - - -static INLINE int -nvram_invmatch(char *name, char *invmatch) -{ - const char *value = nvram_get(name); - return (value && strcmp(value, invmatch)); -} - - -extern int nvram_set(const char *name, const char *value); - - -extern int nvram_unset(const char *name); - - -extern int nvram_commit(void); - - -extern int nvram_getall(char *nvram_buf, int count); - - -uint8 nvram_calc_crc(struct nvram_header * nvh); - -#endif - - -#define NVRAM_SOFTWARE_VERSION "1" - -#define NVRAM_MAGIC 0x48534C46 -#define NVRAM_CLEAR_MAGIC 0x0 -#define NVRAM_INVALID_MAGIC 0xFFFFFFFF -#define NVRAM_VERSION 1 -#define NVRAM_HEADER_SIZE 20 -#define NVRAM_SPACE 0x8000 - -#define NVRAM_MAX_VALUE_LEN 255 -#define NVRAM_MAX_PARAM_LEN 64 - -#define NVRAM_CRC_START_POSITION 9 -#define NVRAM_CRC_VER_MASK 0xffffff00 - - -#define NVRAM_START_COMPRESSED 0x400 -#define NVRAM_START 0x1000 - -#define BCM_JUMBO_NVRAM_DELIMIT '\n' -#define BCM_JUMBO_START "Broadcom Jumbo Nvram file" -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmpcispi.h b/drivers/net/wireless/bcmdhd/src/include/bcmpcispi.h deleted file mode 100644 index 0c4b393..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmpcispi.h +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Broadcom PCI-SPI Host Controller Register Definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmpcispi.h 241182 2011-02-17 21:50:03Z $ - */ -#ifndef _BCM_PCI_SPI_H -#define _BCM_PCI_SPI_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - - -typedef volatile struct { - uint32 spih_ctrl; /* 0x00 SPI Control Register */ - uint32 spih_stat; /* 0x04 SPI Status Register */ - uint32 spih_data; /* 0x08 SPI Data Register, 32-bits wide */ - uint32 spih_ext; /* 0x0C SPI Extension Register */ - uint32 PAD[4]; /* 0x10-0x1F PADDING */ - - uint32 spih_gpio_ctrl; /* 0x20 SPI GPIO Control Register */ - uint32 spih_gpio_data; /* 0x24 SPI GPIO Data Register */ - uint32 PAD[6]; /* 0x28-0x3F PADDING */ - - uint32 spih_int_edge; /* 0x40 SPI Interrupt Edge Register (0=Level, 1=Edge) */ - uint32 spih_int_pol; /* 0x44 SPI Interrupt Polarity Register (0=Active Low, */ - /* 1=Active High) */ - uint32 spih_int_mask; /* 0x48 SPI Interrupt Mask */ - uint32 spih_int_status; /* 0x4C SPI Interrupt Status */ - uint32 PAD[4]; /* 0x50-0x5F PADDING */ - - uint32 spih_hex_disp; /* 0x60 SPI 4-digit hex display value */ - uint32 spih_current_ma; /* 0x64 SPI SD card current consumption in mA */ - uint32 PAD[1]; /* 0x68 PADDING */ - uint32 spih_disp_sel; /* 0x6c SPI 4-digit hex display mode select (1=current) */ - uint32 PAD[4]; /* 0x70-0x7F PADDING */ - uint32 PAD[8]; /* 0x80-0x9F PADDING */ - uint32 PAD[8]; /* 0xA0-0xBF PADDING */ - uint32 spih_pll_ctrl; /* 0xC0 PLL Control Register */ - uint32 spih_pll_status; /* 0xC4 PLL Status Register */ - uint32 spih_xtal_freq; /* 0xC8 External Clock Frequency in units of 10000Hz */ - uint32 spih_clk_count; /* 0xCC External Clock Count Register */ - -} spih_regs_t; - -typedef volatile struct { - uint32 cfg_space[0x40]; /* 0x000-0x0FF PCI Configuration Space (Read Only) */ - uint32 P_IMG_CTRL0; /* 0x100 PCI Image0 Control Register */ - - uint32 P_BA0; /* 0x104 32 R/W PCI Image0 Base Address register */ - uint32 P_AM0; /* 0x108 32 R/W PCI Image0 Address Mask register */ - uint32 P_TA0; /* 0x10C 32 R/W PCI Image0 Translation Address register */ - uint32 P_IMG_CTRL1; /* 0x110 32 R/W PCI Image1 Control register */ - uint32 P_BA1; /* 0x114 32 R/W PCI Image1 Base Address register */ - uint32 P_AM1; /* 0x118 32 R/W PCI Image1 Address Mask register */ - uint32 P_TA1; /* 0x11C 32 R/W PCI Image1 Translation Address register */ - uint32 P_IMG_CTRL2; /* 0x120 32 R/W PCI Image2 Control register */ - uint32 P_BA2; /* 0x124 32 R/W PCI Image2 Base Address register */ - uint32 P_AM2; /* 0x128 32 R/W PCI Image2 Address Mask register */ - uint32 P_TA2; /* 0x12C 32 R/W PCI Image2 Translation Address register */ - uint32 P_IMG_CTRL3; /* 0x130 32 R/W PCI Image3 Control register */ - uint32 P_BA3; /* 0x134 32 R/W PCI Image3 Base Address register */ - uint32 P_AM3; /* 0x138 32 R/W PCI Image3 Address Mask register */ - uint32 P_TA3; /* 0x13C 32 R/W PCI Image3 Translation Address register */ - uint32 P_IMG_CTRL4; /* 0x140 32 R/W PCI Image4 Control register */ - uint32 P_BA4; /* 0x144 32 R/W PCI Image4 Base Address register */ - uint32 P_AM4; /* 0x148 32 R/W PCI Image4 Address Mask register */ - uint32 P_TA4; /* 0x14C 32 R/W PCI Image4 Translation Address register */ - uint32 P_IMG_CTRL5; /* 0x150 32 R/W PCI Image5 Control register */ - uint32 P_BA5; /* 0x154 32 R/W PCI Image5 Base Address register */ - uint32 P_AM5; /* 0x158 32 R/W PCI Image5 Address Mask register */ - uint32 P_TA5; /* 0x15C 32 R/W PCI Image5 Translation Address register */ - uint32 P_ERR_CS; /* 0x160 32 R/W PCI Error Control and Status register */ - uint32 P_ERR_ADDR; /* 0x164 32 R PCI Erroneous Address register */ - uint32 P_ERR_DATA; /* 0x168 32 R PCI Erroneous Data register */ - - uint32 PAD[5]; /* 0x16C-0x17F PADDING */ - - uint32 WB_CONF_SPC_BAR; /* 0x180 32 R WISHBONE Configuration Space Base Address */ - uint32 W_IMG_CTRL1; /* 0x184 32 R/W WISHBONE Image1 Control register */ - uint32 W_BA1; /* 0x188 32 R/W WISHBONE Image1 Base Address register */ - uint32 W_AM1; /* 0x18C 32 R/W WISHBONE Image1 Address Mask register */ - uint32 W_TA1; /* 0x190 32 R/W WISHBONE Image1 Translation Address reg */ - uint32 W_IMG_CTRL2; /* 0x194 32 R/W WISHBONE Image2 Control register */ - uint32 W_BA2; /* 0x198 32 R/W WISHBONE Image2 Base Address register */ - uint32 W_AM2; /* 0x19C 32 R/W WISHBONE Image2 Address Mask register */ - uint32 W_TA2; /* 0x1A0 32 R/W WISHBONE Image2 Translation Address reg */ - uint32 W_IMG_CTRL3; /* 0x1A4 32 R/W WISHBONE Image3 Control register */ - uint32 W_BA3; /* 0x1A8 32 R/W WISHBONE Image3 Base Address register */ - uint32 W_AM3; /* 0x1AC 32 R/W WISHBONE Image3 Address Mask register */ - uint32 W_TA3; /* 0x1B0 32 R/W WISHBONE Image3 Translation Address reg */ - uint32 W_IMG_CTRL4; /* 0x1B4 32 R/W WISHBONE Image4 Control register */ - uint32 W_BA4; /* 0x1B8 32 R/W WISHBONE Image4 Base Address register */ - uint32 W_AM4; /* 0x1BC 32 R/W WISHBONE Image4 Address Mask register */ - uint32 W_TA4; /* 0x1C0 32 R/W WISHBONE Image4 Translation Address reg */ - uint32 W_IMG_CTRL5; /* 0x1C4 32 R/W WISHBONE Image5 Control register */ - uint32 W_BA5; /* 0x1C8 32 R/W WISHBONE Image5 Base Address register */ - uint32 W_AM5; /* 0x1CC 32 R/W WISHBONE Image5 Address Mask register */ - uint32 W_TA5; /* 0x1D0 32 R/W WISHBONE Image5 Translation Address reg */ - uint32 W_ERR_CS; /* 0x1D4 32 R/W WISHBONE Error Control and Status reg */ - uint32 W_ERR_ADDR; /* 0x1D8 32 R WISHBONE Erroneous Address register */ - uint32 W_ERR_DATA; /* 0x1DC 32 R WISHBONE Erroneous Data register */ - uint32 CNF_ADDR; /* 0x1E0 32 R/W Configuration Cycle register */ - uint32 CNF_DATA; /* 0x1E4 32 R/W Configuration Cycle Generation Data reg */ - - uint32 INT_ACK; /* 0x1E8 32 R Interrupt Acknowledge register */ - uint32 ICR; /* 0x1EC 32 R/W Interrupt Control register */ - uint32 ISR; /* 0x1F0 32 R/W Interrupt Status register */ -} spih_pciregs_t; - -/* - * PCI Core interrupt enable and status bit definitions. - */ - -/* PCI Core ICR Register bit definitions */ -#define PCI_INT_PROP_EN (1 << 0) /* Interrupt Propagation Enable */ -#define PCI_WB_ERR_INT_EN (1 << 1) /* Wishbone Error Interrupt Enable */ -#define PCI_PCI_ERR_INT_EN (1 << 2) /* PCI Error Interrupt Enable */ -#define PCI_PAR_ERR_INT_EN (1 << 3) /* Parity Error Interrupt Enable */ -#define PCI_SYS_ERR_INT_EN (1 << 4) /* System Error Interrupt Enable */ -#define PCI_SOFTWARE_RESET (1U << 31) /* Software reset of the PCI Core. */ - - -/* PCI Core ISR Register bit definitions */ -#define PCI_INT_PROP_ST (1 << 0) /* Interrupt Propagation Status */ -#define PCI_WB_ERR_INT_ST (1 << 1) /* Wishbone Error Interrupt Status */ -#define PCI_PCI_ERR_INT_ST (1 << 2) /* PCI Error Interrupt Status */ -#define PCI_PAR_ERR_INT_ST (1 << 3) /* Parity Error Interrupt Status */ -#define PCI_SYS_ERR_INT_ST (1 << 4) /* System Error Interrupt Status */ - - -/* Registers on the Wishbone bus */ -#define SPIH_CTLR_INTR (1 << 0) /* SPI Host Controller Core Interrupt */ -#define SPIH_DEV_INTR (1 << 1) /* SPI Device Interrupt */ -#define SPIH_WFIFO_INTR (1 << 2) /* SPI Tx FIFO Empty Intr (FPGA Rev >= 8) */ - -/* GPIO Bit definitions */ -#define SPIH_CS (1 << 0) /* SPI Chip Select (active low) */ -#define SPIH_SLOT_POWER (1 << 1) /* SD Card Slot Power Enable */ -#define SPIH_CARD_DETECT (1 << 2) /* SD Card Detect */ - -/* SPI Status Register Bit definitions */ -#define SPIH_STATE_MASK 0x30 /* SPI Transfer State Machine state mask */ -#define SPIH_STATE_SHIFT 4 /* SPI Transfer State Machine state shift */ -#define SPIH_WFFULL (1 << 3) /* SPI Write FIFO Full */ -#define SPIH_WFEMPTY (1 << 2) /* SPI Write FIFO Empty */ -#define SPIH_RFFULL (1 << 1) /* SPI Read FIFO Full */ -#define SPIH_RFEMPTY (1 << 0) /* SPI Read FIFO Empty */ - -#define SPIH_EXT_CLK (1U << 31) /* Use External Clock as PLL Clock source. */ - -#define SPIH_PLL_NO_CLK (1 << 1) /* Set to 1 if the PLL's input clock is lost. */ -#define SPIH_PLL_LOCKED (1 << 3) /* Set to 1 when the PLL is locked. */ - -/* Spin bit loop bound check */ -#define SPI_SPIN_BOUND 0xf4240 /* 1 million */ - -#endif /* _BCM_PCI_SPI_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmperf.h b/drivers/net/wireless/bcmdhd/src/include/bcmperf.h deleted file mode 100644 index 5373817..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmperf.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Performance counters software interface. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmperf.h 241182 2011-02-17 21:50:03Z $ - */ -/* essai */ -#ifndef _BCMPERF_H_ -#define _BCMPERF_H_ -/* get cache hits and misses */ -#define BCMPERF_ENABLE_INSTRCOUNT() -#define BCMPERF_ENABLE_ICACHE_MISS() -#define BCMPERF_ENABLE_ICACHE_HIT() -#define BCMPERF_GETICACHE_MISS(x) ((x) = 0) -#define BCMPERF_GETICACHE_HIT(x) ((x) = 0) -#define BCMPERF_GETINSTRCOUNT(x) ((x) = 0) -#endif /* _BCMPERF_H_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmsdbus.h b/drivers/net/wireless/bcmdhd/src/include/bcmsdbus.h deleted file mode 100644 index de5cd87..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmsdbus.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Definitions for API from sdio common code (bcmsdh) to individual - * host controller drivers. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmsdbus.h 299859 2011-12-01 03:53:27Z $ - */ - -#ifndef _sdio_api_h_ -#define _sdio_api_h_ - - -#define SDIOH_API_RC_SUCCESS (0x00) -#define SDIOH_API_RC_FAIL (0x01) -#define SDIOH_API_SUCCESS(status) (status == 0) - -#define SDIOH_READ 0 /* Read request */ -#define SDIOH_WRITE 1 /* Write request */ - -#define SDIOH_DATA_FIX 0 /* Fixed addressing */ -#define SDIOH_DATA_INC 1 /* Incremental addressing */ - -#define SDIOH_CMD_TYPE_NORMAL 0 /* Normal command */ -#define SDIOH_CMD_TYPE_APPEND 1 /* Append command */ -#define SDIOH_CMD_TYPE_CUTTHRU 2 /* Cut-through command */ - -#define SDIOH_DATA_PIO 0 /* PIO mode */ -#define SDIOH_DATA_DMA 1 /* DMA mode */ - - -typedef int SDIOH_API_RC; - -/* SDio Host structure */ -typedef struct sdioh_info sdioh_info_t; - -/* callback function, taking one arg */ -typedef void (*sdioh_cb_fn_t)(void *); - -/* attach, return handler on success, NULL if failed. - * The handler shall be provided by all subsequent calls. No local cache - * cfghdl points to the starting address of pci device mapped memory - */ -extern sdioh_info_t * sdioh_attach(osl_t *osh, void *cfghdl, uint irq); -extern SDIOH_API_RC sdioh_detach(osl_t *osh, sdioh_info_t *si); -extern SDIOH_API_RC sdioh_interrupt_register(sdioh_info_t *si, sdioh_cb_fn_t fn, void *argh); -extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *si); - -/* query whether SD interrupt is enabled or not */ -extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *si, bool *onoff); - -/* enable or disable SD interrupt */ -extern SDIOH_API_RC sdioh_interrupt_set(sdioh_info_t *si, bool enable_disable); - -#if defined(DHD_DEBUG) -extern bool sdioh_interrupt_pending(sdioh_info_t *si); -#endif - -/* read or write one byte using cmd52 */ -extern SDIOH_API_RC sdioh_request_byte(sdioh_info_t *si, uint rw, uint fnc, uint addr, uint8 *byte); - -/* read or write 2/4 bytes using cmd53 */ -extern SDIOH_API_RC sdioh_request_word(sdioh_info_t *si, uint cmd_type, uint rw, uint fnc, - uint addr, uint32 *word, uint nbyte); - -/* read or write any buffer using cmd53 */ -extern SDIOH_API_RC sdioh_request_buffer(sdioh_info_t *si, uint pio_dma, uint fix_inc, - uint rw, uint fnc_num, uint32 addr, uint regwidth, uint32 buflen, uint8 *buffer, - void *pkt); - -/* get cis data */ -extern SDIOH_API_RC sdioh_cis_read(sdioh_info_t *si, uint fuc, uint8 *cis, uint32 length); - -extern SDIOH_API_RC sdioh_cfg_read(sdioh_info_t *si, uint fuc, uint32 addr, uint8 *data); -extern SDIOH_API_RC sdioh_cfg_write(sdioh_info_t *si, uint fuc, uint32 addr, uint8 *data); - -/* query number of io functions */ -extern uint sdioh_query_iofnum(sdioh_info_t *si); - -/* handle iovars */ -extern int sdioh_iovar_op(sdioh_info_t *si, const char *name, - void *params, int plen, void *arg, int len, bool set); - -/* Issue abort to the specified function and clear controller as needed */ -extern int sdioh_abort(sdioh_info_t *si, uint fnc); - -/* Start and Stop SDIO without re-enumerating the SD card. */ -extern int sdioh_start(sdioh_info_t *si, int stage); -extern int sdioh_stop(sdioh_info_t *si); - -/* Wait system lock free */ -extern int sdioh_waitlockfree(sdioh_info_t *si); - -/* Reset and re-initialize the device */ -extern int sdioh_sdio_reset(sdioh_info_t *si); - -/* Helper function */ -void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); - - - -#if defined(BCMSDIOH_STD) - #define SDIOH_SLEEP_ENABLED -#endif -extern SDIOH_API_RC sdioh_sleep(sdioh_info_t *si, bool enab); - -/* GPIO support */ -extern SDIOH_API_RC sdioh_gpio_init(sdioh_info_t *sd); -extern bool sdioh_gpioin(sdioh_info_t *sd, uint32 gpio); -extern SDIOH_API_RC sdioh_gpioouten(sdioh_info_t *sd, uint32 gpio); -extern SDIOH_API_RC sdioh_gpioout(sdioh_info_t *sd, uint32 gpio, bool enab); - -#endif /* _sdio_api_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmsdh.h b/drivers/net/wireless/bcmdhd/src/include/bcmsdh.h deleted file mode 100644 index 7dbef59..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmsdh.h +++ /dev/null @@ -1,238 +0,0 @@ -/* - * SDIO host client driver interface of Broadcom HNBU - * export functions to client drivers - * abstract OS and BUS specific details of SDIO - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmsdh.h 299859 2011-12-01 03:53:27Z $ - */ - -/** - * @file bcmsdh.h - */ - -#ifndef _bcmsdh_h_ -#define _bcmsdh_h_ - -#define BCMSDH_ERROR_VAL 0x0001 /* Error */ -#define BCMSDH_INFO_VAL 0x0002 /* Info */ -extern const uint bcmsdh_msglevel; - -#define BCMSDH_ERROR(x) -#define BCMSDH_INFO(x) - -#if (defined(BCMSDIOH_STD) || defined(BCMSDIOH_BCM) || defined(BCMSDIOH_SPI)) -#define BCMSDH_ADAPTER -#endif /* BCMSDIO && (BCMSDIOH_STD || BCMSDIOH_BCM || BCMSDIOH_SPI) */ - -/* forward declarations */ -typedef struct bcmsdh_info bcmsdh_info_t; -typedef void (*bcmsdh_cb_fn_t)(void *); - -/* Attach and build an interface to the underlying SD host driver. - * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. - * - Returns the bcmsdh handle and virtual address base for register access. - * The returned handle should be used in all subsequent calls, but the bcmsh - * implementation may maintain a single "default" handle (e.g. the first or - * most recent one) to enable single-instance implementations to pass NULL. - */ - -#if defined(NDIS630) -extern bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, - void **regsva, uint irq, shared_info_t *sh); -#else -extern bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, void **regsva, uint irq); -#endif - -/* Detach - freeup resources allocated in attach */ -extern int bcmsdh_detach(osl_t *osh, void *sdh); - -/* Query if SD device interrupts are enabled */ -extern bool bcmsdh_intr_query(void *sdh); - -/* Enable/disable SD interrupt */ -extern int bcmsdh_intr_enable(void *sdh); -extern int bcmsdh_intr_disable(void *sdh); - -/* Register/deregister device interrupt handler. */ -extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); -extern int bcmsdh_intr_dereg(void *sdh); -/* Enable/disable SD card interrupt forward */ -extern void bcmsdh_intr_forward(void *sdh, bool pass); - -#if defined(DHD_DEBUG) -/* Query pending interrupt status from the host controller */ -extern bool bcmsdh_intr_pending(void *sdh); -#endif - -/* Register a callback to be called if and when bcmsdh detects - * device removal. No-op in the case of non-removable/hardwired devices. - */ -extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); - -/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). - * fn: function number - * addr: unmodified SDIO-space address - * data: data byte to write - * err: pointer to error code (or NULL) - */ -extern uint8 bcmsdh_cfg_read(void *sdh, uint func, uint32 addr, int *err); -extern void bcmsdh_cfg_write(void *sdh, uint func, uint32 addr, uint8 data, int *err); - -/* Read/Write 4bytes from/to cfg space */ -extern uint32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, uint32 addr, int *err); -extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, uint32 addr, uint32 data, int *err); - -/* Read CIS content for specified function. - * fn: function whose CIS is being requested (0 is common CIS) - * cis: pointer to memory location to place results - * length: number of bytes to read - * Internally, this routine uses the values from the cis base regs (0x9-0xB) - * to form an SDIO-space address to read the data from. - */ -extern int bcmsdh_cis_read(void *sdh, uint func, uint8 *cis, uint length); - -/* Synchronous access to device (client) core registers via CMD53 to F1. - * addr: backplane address (i.e. >= regsva from attach) - * size: register width in bytes (2 or 4) - * data: data for register write - */ -extern uint32 bcmsdh_reg_read(void *sdh, uint32 addr, uint size); -extern uint32 bcmsdh_reg_write(void *sdh, uint32 addr, uint size, uint32 data); - -/* set sb address window */ -extern int bcmsdhsdio_set_sbaddr_window(void *sdh, uint32 address, bool force_set); - -/* Indicate if last reg read/write failed */ -extern bool bcmsdh_regfail(void *sdh); - -/* Buffer transfer to/from device (client) core via cmd53. - * fn: function number - * addr: backplane address (i.e. >= regsva from attach) - * flags: backplane width, address increment, sync/async - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * pkt: pointer to packet associated with buf (if any) - * complete: callback function for command completion (async only) - * handle: handle for completion callback (first arg in callback) - * Returns 0 or error code. - * NOTE: Async operation is not currently supported. - */ -typedef void (*bcmsdh_cmplt_fn_t)(void *handle, int status, bool sync_waiting); -extern int bcmsdh_send_buf(void *sdh, uint32 addr, uint fn, uint flags, - uint8 *buf, uint nbytes, void *pkt, - bcmsdh_cmplt_fn_t complete_fn, void *handle); -extern int bcmsdh_recv_buf(void *sdh, uint32 addr, uint fn, uint flags, - uint8 *buf, uint nbytes, void *pkt, - bcmsdh_cmplt_fn_t complete_fn, void *handle); - -/* Flags bits */ -#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ -#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ -#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ -#define SDIO_BYTE_MODE 0x8 /* Byte mode request(non-block mode) */ - -/* Pending (non-error) return code */ -#define BCME_PENDING 1 - -/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). - * rw: read or write (0/1) - * addr: direct SDIO address - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * Returns 0 or error code. - */ -extern int bcmsdh_rwdata(void *sdh, uint rw, uint32 addr, uint8 *buf, uint nbytes); - -/* Issue an abort to the specified function */ -extern int bcmsdh_abort(void *sdh, uint fn); - -/* Start SDIO Host Controller communication */ -extern int bcmsdh_start(void *sdh, int stage); - -/* Stop SDIO Host Controller communication */ -extern int bcmsdh_stop(void *sdh); - -/* Wait system lock free */ -extern int bcmsdh_waitlockfree(void *sdh); - -/* Returns the "Device ID" of target device on the SDIO bus. */ -extern int bcmsdh_query_device(void *sdh); - -/* Returns the number of IO functions reported by the device */ -extern uint bcmsdh_query_iofnum(void *sdh); - -/* Miscellaneous knob tweaker. */ -extern int bcmsdh_iovar_op(void *sdh, const char *name, - void *params, int plen, void *arg, int len, bool set); - -/* Reset and reinitialize the device */ -extern int bcmsdh_reset(bcmsdh_info_t *sdh); - -/* helper functions */ - -extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); - -/* callback functions */ -typedef struct { - /* attach to device */ - void *(*attach)(uint16 vend_id, uint16 dev_id, uint16 bus, uint16 slot, - uint16 func, uint bustype, void * regsva, osl_t * osh, - void * param); - /* detach from device */ - void (*detach)(void *ch); -} bcmsdh_driver_t; - -/* platform specific/high level functions */ -extern int bcmsdh_register(bcmsdh_driver_t *driver); -extern void bcmsdh_unregister(void); -extern bool bcmsdh_chipmatch(uint16 vendor, uint16 device); -extern void bcmsdh_device_remove(void * sdh); - -extern int bcmsdh_reg_sdio_notify(void* semaphore); -extern void bcmsdh_unreg_sdio_notify(void); - -#if defined(OOB_INTR_ONLY) -extern int bcmsdh_register_oob_intr(void * dhdp); -extern void bcmsdh_unregister_oob_intr(void); -extern void bcmsdh_oob_intr_set(bool enable); -#endif /* defined(OOB_INTR_ONLY) */ - -/* Function to pass device-status bits to DHD. */ -extern uint32 bcmsdh_get_dstatus(void *sdh); - -/* Function to return current window addr */ -extern uint32 bcmsdh_cur_sbwad(void *sdh); - -/* Function to pass chipid and rev to lower layers for controlling pr's */ -extern void bcmsdh_chipinfo(void *sdh, uint32 chip, uint32 chiprev); - - -extern int bcmsdh_sleep(void *sdh, bool enab); - -/* GPIO support */ -extern int bcmsdh_gpio_init(void *sd); -extern bool bcmsdh_gpioin(void *sd, uint32 gpio); -extern int bcmsdh_gpioouten(void *sd, uint32 gpio); -extern int bcmsdh_gpioout(void *sd, uint32 gpio, bool enab); - -#endif /* _bcmsdh_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmsdh_sdmmc.h b/drivers/net/wireless/bcmdhd/src/include/bcmsdh_sdmmc.h deleted file mode 100644 index 1e06472..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmsdh_sdmmc.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * BCMSDH Function Driver for the native SDIO/MMC driver in the Linux Kernel - * - * Copyright (C) 1999-2012, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmsdh_sdmmc.h 294363 2011-11-06 23:02:20Z $ - */ - -#ifndef __BCMSDH_SDMMC_H__ -#define __BCMSDH_SDMMC_H__ - -#define sd_err(x) do{printf x;}while(0) -#define sd_trace(x) -#define sd_info(x) -#define sd_debug(x) -#define sd_data(x) -#define sd_ctrl(x) - -#define sd_sync_dma(sd, read, nbytes) -#define sd_init_dma(sd) -#define sd_ack_intr(sd) -#define sd_wakeup(sd); - -/* Allocate/init/free per-OS private data */ -extern int sdioh_sdmmc_osinit(sdioh_info_t *sd); -extern void sdioh_sdmmc_osfree(sdioh_info_t *sd); - -#define sd_log(x) - -#define SDIOH_ASSERT(exp) \ - do { if (!(exp)) \ - printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ - } while (0) - -#define BLOCK_SIZE_4318 64 -#define BLOCK_SIZE_4328 512 - -/* internal return code */ -#define SUCCESS 0 -#define ERROR 1 - -/* private bus modes */ -#define SDIOH_MODE_SD4 2 -#define CLIENT_INTR 0x100 /* Get rid of this! */ - -struct sdioh_info { - osl_t *osh; /* osh handler */ - bool client_intr_enabled; /* interrupt connnected flag */ - bool intr_handler_valid; /* client driver interrupt handler valid */ - sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ - void *intr_handler_arg; /* argument to call interrupt handler */ - uint16 intmask; /* Current active interrupts */ - void *sdos_info; /* Pointer to per-OS private data */ - - uint irq; /* Client irq */ - int intrcount; /* Client interrupts */ - - bool sd_use_dma; /* DMA on CMD53 */ - bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ - /* Must be on for sd_multiblock to be effective */ - bool use_client_ints; /* If this is false, make sure to restore */ - int sd_mode; /* SD1/SD4/SPI */ - int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ - uint8 num_funcs; /* Supported funcs on client */ - uint32 com_cis_ptr; - uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; - -#define SDIOH_SDMMC_MAX_SG_ENTRIES 32 - struct scatterlist sg_list[SDIOH_SDMMC_MAX_SG_ENTRIES]; - bool use_rxchain; -}; - -/************************************************************ - * Internal interfaces: per-port references into bcmsdh_sdmmc.c - */ - -/* Global message bits */ -extern uint sd_msglevel; - -/* OS-independent interrupt handler */ -extern bool check_client_intr(sdioh_info_t *sd); - -/* Core interrupt enable/disable of device interrupts */ -extern void sdioh_sdmmc_devintr_on(sdioh_info_t *sd); -extern void sdioh_sdmmc_devintr_off(sdioh_info_t *sd); - - -/************************************************************** - * Internal interfaces: bcmsdh_sdmmc.c references to per-port code - */ - -/* Register mapping routines */ -extern uint32 *sdioh_sdmmc_reg_map(osl_t *osh, int32 addr, int size); -extern void sdioh_sdmmc_reg_unmap(osl_t *osh, int32 addr, int size); - -/* Interrupt (de)registration routines */ -extern int sdioh_sdmmc_register_irq(sdioh_info_t *sd, uint irq); -extern void sdioh_sdmmc_free_irq(uint irq, sdioh_info_t *sd); - -typedef struct _BCMSDH_SDMMC_INSTANCE { - sdioh_info_t *sd; - struct sdio_func *func[SDIOD_MAX_IOFUNCS]; -} BCMSDH_SDMMC_INSTANCE, *PBCMSDH_SDMMC_INSTANCE; - -#endif /* __BCMSDH_SDMMC_H__ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmsdpcm.h b/drivers/net/wireless/bcmdhd/src/include/bcmsdpcm.h deleted file mode 100644 index f3b3623..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmsdpcm.h +++ /dev/null @@ -1,274 +0,0 @@ -/* - * Broadcom SDIO/PCMCIA - * Software-specific definitions shared between device and host side - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmsdpcm.h 291086 2011-10-21 01:17:24Z $ - */ - -#ifndef _bcmsdpcm_h_ -#define _bcmsdpcm_h_ - -/* - * Software allocation of To SB Mailbox resources - */ - -/* intstatus bits */ -#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ -#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ -#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ -#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ - -#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) - -/* tosbmailbox bits corresponding to intstatus bits */ -#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ -#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ -#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ -#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ -#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ - -/* tosbmailboxdata */ -#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ -#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ - -/* - * Software allocation of To Host Mailbox resources - */ - -/* intstatus bits */ -#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ -#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ -#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ -#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ - -#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) - -/* tohostmailbox bits corresponding to intstatus bits */ -#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ -#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ -#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ -#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ -#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ - -/* tohostmailboxdata */ -#define HMB_DATA_NAKHANDLED 0x01 /* we're ready to retransmit NAK'd frame to host */ -#define HMB_DATA_DEVREADY 0x02 /* we're ready to to talk to host after enable */ -#define HMB_DATA_FC 0x04 /* per prio flowcontrol update flag to host */ -#define HMB_DATA_FWREADY 0x08 /* firmware is ready for protocol activity */ -#define HMB_DATA_FWHALT 0x10 /* firmware has halted operation */ - -#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ -#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ - -#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ -#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ - -/* - * Software-defined protocol header - */ - -/* Current protocol version */ -#define SDPCM_PROT_VERSION 4 - -/* SW frame header */ -#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ -#define SDPCM_PACKET_SEQUENCE(p) (((uint8 *)p)[0] & 0xff) /* p starts w/SW Header */ - -#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ -#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ -#define SDPCM_PACKET_CHANNEL(p) (((uint8 *)p)[1] & 0x0f) /* p starts w/SW Header */ - -#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ -#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ -#define SDPCM_PACKET_FLAGS(p) ((((uint8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ - -/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ -#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ -#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ -#define SDPCM_NEXTLEN_VALUE(p) ((((uint8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ -#define SDPCM_NEXTLEN_OFFSET 2 - -/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ -#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ -#define SDPCM_DOFFSET_VALUE(p) (((uint8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) -#define SDPCM_DOFFSET_MASK 0xff000000 -#define SDPCM_DOFFSET_SHIFT 24 - -#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ -#define SDPCM_FCMASK_VALUE(p) (((uint8 *)p)[SDPCM_FCMASK_OFFSET ] & 0xff) -#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ -#define SDPCM_WINDOW_VALUE(p) (((uint8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) -#define SDPCM_VERSION_OFFSET 6 /* Version # */ -#define SDPCM_VERSION_VALUE(p) (((uint8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) -#define SDPCM_UNUSED_OFFSET 7 /* Spare */ -#define SDPCM_UNUSED_VALUE(p) (((uint8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) - -#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ - -/* logical channel numbers */ -#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ -#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ -#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ -#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ -#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ -#define SDPCM_MAX_CHANNEL 15 - -#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ - -#define SDPCM_FLAG_RESVD0 0x01 -#define SDPCM_FLAG_RESVD1 0x02 -#define SDPCM_FLAG_GSPI_TXENAB 0x04 -#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ - -/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ -#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) - -#define SDPCM_GLOMDESC(p) (((uint8 *)p)[1] & 0x80) - -/* For TEST_CHANNEL packets, define another 4-byte header */ -#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); - * Semantics of Ext byte depend on command. - * Len is current or requested frame length, not - * including test header; sent little-endian. - */ -#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ -#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ -#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ -#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ -#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ - -/* Handy macro for filling in datagen packets with a pattern */ -#define SDPCM_TEST_FILL(byteno, id) ((uint8)(id + byteno)) - -/* - * Software counters (first part matches hardware counters) - */ - -typedef volatile struct { - uint32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ - uint32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ - uint32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ - uint32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ - uint32 abort; /* AbortCount, SDIO: aborts */ - uint32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ - uint32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ - uint32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ - uint32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ - uint32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ - uint32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ - uint32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ - uint32 rxdescuflo; /* receive descriptor underflows */ - uint32 rxfifooflo; /* receive fifo overflows */ - uint32 txfifouflo; /* transmit fifo underflows */ - uint32 runt; /* runt (too short) frames recv'd from bus */ - uint32 badlen; /* frame's rxh len does not match its hw tag len */ - uint32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ - uint32 seqbreak; /* break in sequence # space from one rx frame to the next */ - uint32 rxfcrc; /* frame rx header indicates crc error */ - uint32 rxfwoos; /* frame rx header indicates write out of sync */ - uint32 rxfwft; /* frame rx header indicates write frame termination */ - uint32 rxfabort; /* frame rx header indicates frame aborted */ - uint32 woosint; /* write out of sync interrupt */ - uint32 roosint; /* read out of sync interrupt */ - uint32 rftermint; /* read frame terminate interrupt */ - uint32 wftermint; /* write frame terminate interrupt */ -} sdpcmd_cnt_t; - -/* - * Register Access Macros - */ - -#define SDIODREV_IS(var, val) ((var) == (val)) -#define SDIODREV_GE(var, val) ((var) >= (val)) -#define SDIODREV_GT(var, val) ((var) > (val)) -#define SDIODREV_LT(var, val) ((var) < (val)) -#define SDIODREV_LE(var, val) ((var) <= (val)) - -#define SDIODDMAREG32(h, dir, chnl) \ - ((dir) == DMA_TX ? \ - (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].xmt) : \ - (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].rcv)) - -#define SDIODDMAREG64(h, dir, chnl) \ - ((dir) == DMA_TX ? \ - (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].xmt) : \ - (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].rcv)) - -#define SDIODDMAREG(h, dir, chnl) \ - (SDIODREV_LT((h)->corerev, 1) ? \ - SDIODDMAREG32((h), (dir), (chnl)) : \ - SDIODDMAREG64((h), (dir), (chnl))) - -#define PCMDDMAREG(h, dir, chnl) \ - ((dir) == DMA_TX ? \ - (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.xmt) : \ - (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.rcv)) - -#define SDPCMDMAREG(h, dir, chnl, coreid) \ - ((coreid) == SDIOD_CORE_ID ? \ - SDIODDMAREG(h, dir, chnl) : \ - PCMDDMAREG(h, dir, chnl)) - -#define SDIODFIFOREG(h, corerev) \ - (SDIODREV_LT((corerev), 1) ? \ - ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod32.dmafifo)) : \ - ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod64.dmafifo))) - -#define PCMDFIFOREG(h) \ - ((dma32diag_t *)(uintptr)&((h)->regs->dma.pcm32.dmafifo)) - -#define SDPCMFIFOREG(h, coreid, corerev) \ - ((coreid) == SDIOD_CORE_ID ? \ - SDIODFIFOREG(h, corerev) : \ - PCMDFIFOREG(h)) - -/* - * Shared structure between dongle and the host. - * The structure contains pointers to trap or assert information. - */ -#define SDPCM_SHARED_VERSION 0x0001 -#define SDPCM_SHARED_VERSION_MASK 0x00FF -#define SDPCM_SHARED_ASSERT_BUILT 0x0100 -#define SDPCM_SHARED_ASSERT 0x0200 -#define SDPCM_SHARED_TRAP 0x0400 -#define SDPCM_SHARED_IN_BRPT 0x0800 -#define SDPCM_SHARED_SET_BRPT 0x1000 -#define SDPCM_SHARED_PENDING_BRPT 0x2000 - -typedef struct { - uint32 flags; - uint32 trap_addr; - uint32 assert_exp_addr; - uint32 assert_file_addr; - uint32 assert_line; - uint32 console_addr; /* Address of hndrte_cons_t */ - uint32 msgtrace_addr; - uint32 brpt_addr; -} sdpcm_shared_t; - -extern sdpcm_shared_t sdpcm_shared; - -/* Function can be used to notify host of FW halt */ -extern void sdpcmd_fwhalt(void); - -#endif /* _bcmsdpcm_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmsdspi.h b/drivers/net/wireless/bcmdhd/src/include/bcmsdspi.h deleted file mode 100644 index 45b2d11..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmsdspi.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * SD-SPI Protocol Conversion - BCMSDH->SPI Translation Layer - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmsdspi.h 294363 2011-11-06 23:02:20Z $ - */ -#ifndef _BCM_SD_SPI_H -#define _BCM_SD_SPI_H - -/* global msglevel for debug messages - bitvals come from sdiovar.h */ - -#define sd_err(x) -#define sd_trace(x) -#define sd_info(x) -#define sd_debug(x) -#define sd_data(x) -#define sd_ctrl(x) - -#define sd_log(x) - -#define SDIOH_ASSERT(exp) \ - do { if (!(exp)) \ - printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ - } while (0) - -#define BLOCK_SIZE_4318 64 -#define BLOCK_SIZE_4328 512 - -/* internal return code */ -#define SUCCESS 0 -#undef ERROR -#define ERROR 1 - -/* private bus modes */ -#define SDIOH_MODE_SPI 0 - -#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ -#define USE_MULTIBLOCK 0x4 - -struct sdioh_info { - uint cfg_bar; /* pci cfg address for bar */ - uint32 caps; /* cached value of capabilities reg */ - uint bar0; /* BAR0 for PCI Device */ - osl_t *osh; /* osh handler */ - void *controller; /* Pointer to SPI Controller's private data struct */ - - uint lockcount; /* nest count of sdspi_lock() calls */ - bool client_intr_enabled; /* interrupt connnected flag */ - bool intr_handler_valid; /* client driver interrupt handler valid */ - sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ - void *intr_handler_arg; /* argument to call interrupt handler */ - bool initialized; /* card initialized */ - uint32 target_dev; /* Target device ID */ - uint32 intmask; /* Current active interrupts */ - void *sdos_info; /* Pointer to per-OS private data */ - - uint32 controller_type; /* Host controller type */ - uint8 version; /* Host Controller Spec Compliance Version */ - uint irq; /* Client irq */ - uint32 intrcount; /* Client interrupts */ - uint32 local_intrcount; /* Controller interrupts */ - bool host_init_done; /* Controller initted */ - bool card_init_done; /* Client SDIO interface initted */ - bool polled_mode; /* polling for command completion */ - - bool sd_use_dma; /* DMA on CMD53 */ - bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ - /* Must be on for sd_multiblock to be effective */ - bool use_client_ints; /* If this is false, make sure to restore */ - bool got_hcint; /* Host Controller interrupt. */ - /* polling hack in wl_linux.c:wl_timer() */ - int adapter_slot; /* Maybe dealing with multiple slots/controllers */ - int sd_mode; /* SD1/SD4/SPI */ - int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ - uint32 data_xfer_count; /* Current register transfer size */ - uint32 cmd53_wr_data; /* Used to pass CMD53 write data */ - uint32 card_response; /* Used to pass back response status byte */ - uint32 card_rsp_data; /* Used to pass back response data word */ - uint16 card_rca; /* Current Address */ - uint8 num_funcs; /* Supported funcs on client */ - uint32 com_cis_ptr; - uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; - void *dma_buf; - ulong dma_phys; - int r_cnt; /* rx count */ - int t_cnt; /* tx_count */ -}; - -/************************************************************ - * Internal interfaces: per-port references into bcmsdspi.c - */ - -/* Global message bits */ -extern uint sd_msglevel; - -/************************************************************** - * Internal interfaces: bcmsdspi.c references to per-port code - */ - -/* Register mapping routines */ -extern uint32 *spi_reg_map(osl_t *osh, uintptr addr, int size); -extern void spi_reg_unmap(osl_t *osh, uintptr addr, int size); - -/* Interrupt (de)registration routines */ -extern int spi_register_irq(sdioh_info_t *sd, uint irq); -extern void spi_free_irq(uint irq, sdioh_info_t *sd); - -/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ -extern void spi_lock(sdioh_info_t *sd); -extern void spi_unlock(sdioh_info_t *sd); - -/* Allocate/init/free per-OS private data */ -extern int spi_osinit(sdioh_info_t *sd); -extern void spi_osfree(sdioh_info_t *sd); - -#endif /* _BCM_SD_SPI_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmsdstd.h b/drivers/net/wireless/bcmdhd/src/include/bcmsdstd.h deleted file mode 100644 index b732331..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmsdstd.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * 'Standard' SDIO HOST CONTROLLER driver - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmsdstd.h 294369 2011-11-06 23:22:23Z $ - */ -#ifndef _BCM_SD_STD_H -#define _BCM_SD_STD_H - -/* global msglevel for debug messages - bitvals come from sdiovar.h */ -#define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) -#define sd_trace(x) -#define sd_info(x) -#define sd_debug(x) -#define sd_data(x) -#define sd_ctrl(x) -#define sd_dma(x) - -#define sd_sync_dma(sd, read, nbytes) -#define sd_init_dma(sd) -#define sd_ack_intr(sd) -#define sd_wakeup(sd); -/* Allocate/init/free per-OS private data */ -extern int sdstd_osinit(sdioh_info_t *sd); -extern void sdstd_osfree(sdioh_info_t *sd); - -#define sd_log(x) - -#define SDIOH_ASSERT(exp) \ - do { if (!(exp)) \ - printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ - } while (0) - -#define BLOCK_SIZE_4318 64 -#define BLOCK_SIZE_4328 512 - -/* internal return code */ -#define SUCCESS 0 -#define ERROR 1 - -/* private bus modes */ -#define SDIOH_MODE_SPI 0 -#define SDIOH_MODE_SD1 1 -#define SDIOH_MODE_SD4 2 - -#define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */ -#define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */ - -#define SDIOH_TYPE_ARASAN_HDK 1 -#define SDIOH_TYPE_BCM27XX 2 -#define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */ -#define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */ -#define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */ - -/* For linux, allow yielding for dongle */ -#define BCMSDYIELD - -/* Expected card status value for CMD7 */ -#define SDIOH_CMD7_EXP_STATUS 0x00001E00 - -#define RETRIES_LARGE 100000 -#define sdstd_os_yield(sd) do {} while (0) -#define RETRIES_SMALL 100 - - -#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ -#define USE_MULTIBLOCK 0x4 - -#define USE_FIFO 0x8 /* Fifo vs non-fifo */ - -#define CLIENT_INTR 0x100 /* Get rid of this! */ - -#define HC_INTR_RETUNING 0x1000 - - -struct sdioh_info { - uint cfg_bar; /* pci cfg address for bar */ - uint32 caps; /* cached value of capabilities reg */ - uint32 curr_caps; /* max current capabilities reg */ - - osl_t *osh; /* osh handler */ - volatile char *mem_space; /* pci device memory va */ - uint lockcount; /* nest count of sdstd_lock() calls */ - bool client_intr_enabled; /* interrupt connnected flag */ - bool intr_handler_valid; /* client driver interrupt handler valid */ - sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ - void *intr_handler_arg; /* argument to call interrupt handler */ - bool initialized; /* card initialized */ - uint target_dev; /* Target device ID */ - uint16 intmask; /* Current active interrupts */ - void *sdos_info; /* Pointer to per-OS private data */ - - uint32 controller_type; /* Host controller type */ - uint8 version; /* Host Controller Spec Compliance Version */ - uint irq; /* Client irq */ - int intrcount; /* Client interrupts */ - int local_intrcount; /* Controller interrupts */ - bool host_init_done; /* Controller initted */ - bool card_init_done; /* Client SDIO interface initted */ - bool polled_mode; /* polling for command completion */ - - bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ - /* Must be on for sd_multiblock to be effective */ - bool use_client_ints; /* If this is false, make sure to restore */ - /* polling hack in wl_linux.c:wl_timer() */ - int adapter_slot; /* Maybe dealing with multiple slots/controllers */ - int sd_mode; /* SD1/SD4/SPI */ - int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ - uint32 data_xfer_count; /* Current transfer */ - uint16 card_rca; /* Current Address */ - int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */ - uint8 num_funcs; /* Supported funcs on client */ - uint32 com_cis_ptr; - uint32 func_cis_ptr[SDIOD_MAX_FUNCS]; - void *dma_buf; /* DMA Buffer virtual address */ - ulong dma_phys; /* DMA Buffer physical address */ - void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */ - ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */ - - /* adjustments needed to make the dma align properly */ - void *dma_start_buf; - ulong dma_start_phys; - uint alloced_dma_size; - void *adma2_dscr_start_buf; - ulong adma2_dscr_start_phys; - uint alloced_adma2_dscr_size; - - int r_cnt; /* rx count */ - int t_cnt; /* tx_count */ - bool got_hcint; /* local interrupt flag */ - uint16 last_intrstatus; /* to cache intrstatus */ - int host_UHSISupported; /* whether UHSI is supported for HC. */ - int card_UHSI_voltage_Supported; /* whether UHSI is supported for - * Card in terms of Voltage [1.8 or 3.3]. - */ - int global_UHSI_Supp; /* type of UHSI support in both host and card. - * HOST_SDR_UNSUPP: capabilities not supported/matched - * HOST_SDR_12_25: SDR12 and SDR25 supported - * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd - */ - int sd3_dat_state; /* data transfer state used for retuning check */ - int sd3_tun_state; /* tuning state used for retuning check */ - bool sd3_tuning_reqd; /* tuning requirement parameter */ - uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */ -}; - -#define DMA_MODE_NONE 0 -#define DMA_MODE_SDMA 1 -#define DMA_MODE_ADMA1 2 -#define DMA_MODE_ADMA2 3 -#define DMA_MODE_ADMA2_64 4 -#define DMA_MODE_AUTO -1 - -#define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE)) - -/* States for Tuning and corr data */ -#define TUNING_IDLE 0 -#define TUNING_START 1 -#define TUNING_START_AFTER_DAT 2 -#define TUNING_ONGOING 3 - -#define DATA_TRANSFER_IDLE 0 -#define DATA_TRANSFER_ONGOING 1 - -/************************************************************ - * Internal interfaces: per-port references into bcmsdstd.c - */ - -/* Global message bits */ -extern uint sd_msglevel; - -/* OS-independent interrupt handler */ -extern bool check_client_intr(sdioh_info_t *sd); - -/* Core interrupt enable/disable of device interrupts */ -extern void sdstd_devintr_on(sdioh_info_t *sd); -extern void sdstd_devintr_off(sdioh_info_t *sd); - -/* Enable/disable interrupts for local controller events */ -extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err); -extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err); - -/* Wait for specified interrupt and error bits to be set */ -extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err); - - -/************************************************************** - * Internal interfaces: bcmsdstd.c references to per-port code - */ - -/* Register mapping routines */ -extern uint32 *sdstd_reg_map(osl_t *osh, int32 addr, int size); -extern void sdstd_reg_unmap(osl_t *osh, int32 addr, int size); - -/* Interrupt (de)registration routines */ -extern int sdstd_register_irq(sdioh_info_t *sd, uint irq); -extern void sdstd_free_irq(uint irq, sdioh_info_t *sd); - -/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ -extern void sdstd_lock(sdioh_info_t *sd); -extern void sdstd_unlock(sdioh_info_t *sd); -extern void sdstd_waitlockfree(sdioh_info_t *sd); - -/* OS-specific wait-for-interrupt-or-status */ -extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, uint16 *bits); - -/* used by bcmsdstd_linux [implemented in sdstd] */ -extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd); -extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd); -extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd); -extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd); -extern int sdstd_3_get_tune_state(sdioh_info_t *sd); -extern int sdstd_3_get_data_state(sdioh_info_t *sd); -extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state); -extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd); -extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd); -extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode); - -/* used by sdstd [implemented in bcmsdstd_linux/ndis] */ -extern void sdstd_3_start_tuning(sdioh_info_t *sd); -extern void sdstd_3_osinit_tuning(sdioh_info_t *sd); -extern void sdstd_3_osclean_tuning(sdioh_info_t *sd); - -#endif /* _BCM_SD_STD_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmspi.h b/drivers/net/wireless/bcmdhd/src/include/bcmspi.h deleted file mode 100644 index c5261a0..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmspi.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Broadcom SPI Low-Level Hardware Driver API - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmspi.h 241182 2011-02-17 21:50:03Z $ - */ -#ifndef _BCM_SPI_H -#define _BCM_SPI_H - -extern void spi_devintr_off(sdioh_info_t *sd); -extern void spi_devintr_on(sdioh_info_t *sd); -extern bool spi_start_clock(sdioh_info_t *sd, uint16 new_sd_divisor); -extern bool spi_controller_highspeed_mode(sdioh_info_t *sd, bool hsmode); -extern bool spi_check_client_intr(sdioh_info_t *sd, int *is_dev_intr); -extern bool spi_hw_attach(sdioh_info_t *sd); -extern bool spi_hw_detach(sdioh_info_t *sd); -extern void spi_sendrecv(sdioh_info_t *sd, uint8 *msg_out, uint8 *msg_in, int msglen); -extern void spi_spinbits(sdioh_info_t *sd); -extern void spi_waitbits(sdioh_info_t *sd, bool yield); - -#endif /* _BCM_SPI_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/bcmutils.h b/drivers/net/wireless/bcmdhd/src/include/bcmutils.h deleted file mode 100644 index f1f7426..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/bcmutils.h +++ /dev/null @@ -1,759 +0,0 @@ -/* - * Misc useful os-independent macros and functions. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmutils.h 301796 2011-12-08 20:57:02Z $ - */ - -#ifndef _bcmutils_h_ -#define _bcmutils_h_ - -#define bcm_strcpy_s(dst, noOfElements, src) strcpy((dst), (src)) -#define bcm_strncpy_s(dst, noOfElements, src, count) strncpy((dst), (src), (count)) -#define bcm_strcat_s(dst, noOfElements, src) strcat((dst), (src)) - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef PKTQ_LOG -#include <wlioctl.h> -#endif - - -#define _BCM_U 0x01 -#define _BCM_L 0x02 -#define _BCM_D 0x04 -#define _BCM_C 0x08 -#define _BCM_P 0x10 -#define _BCM_S 0x20 -#define _BCM_X 0x40 -#define _BCM_SP 0x80 - -extern const unsigned char bcm_ctype[]; -#define bcm_ismask(x) (bcm_ctype[(int)(unsigned char)(x)]) - -#define bcm_isalnum(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L|_BCM_D)) != 0) -#define bcm_isalpha(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L)) != 0) -#define bcm_iscntrl(c) ((bcm_ismask(c)&(_BCM_C)) != 0) -#define bcm_isdigit(c) ((bcm_ismask(c)&(_BCM_D)) != 0) -#define bcm_isgraph(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D)) != 0) -#define bcm_islower(c) ((bcm_ismask(c)&(_BCM_L)) != 0) -#define bcm_isprint(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D|_BCM_SP)) != 0) -#define bcm_ispunct(c) ((bcm_ismask(c)&(_BCM_P)) != 0) -#define bcm_isspace(c) ((bcm_ismask(c)&(_BCM_S)) != 0) -#define bcm_isupper(c) ((bcm_ismask(c)&(_BCM_U)) != 0) -#define bcm_isxdigit(c) ((bcm_ismask(c)&(_BCM_D|_BCM_X)) != 0) -#define bcm_tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c)) -#define bcm_toupper(c) (bcm_islower((c)) ? ((c) + 'A' - 'a') : (c)) - - - -struct bcmstrbuf { - char *buf; - unsigned int size; - char *origbuf; - unsigned int origsize; -}; - - -#ifdef BCMDRIVER -#include <osl.h> - -#define GPIO_PIN_NOTDEFINED 0x20 - - -#define SPINWAIT(exp, us) { \ - uint countdown = (us) + 9; \ - while ((exp) && (countdown >= 10)) {\ - OSL_DELAY(10); \ - countdown -= 10; \ - } \ -} - - -#ifndef PKTQ_LEN_DEFAULT -#define PKTQ_LEN_DEFAULT 128 -#endif -#ifndef PKTQ_MAX_PREC -#define PKTQ_MAX_PREC 16 -#endif - -typedef struct pktq_prec { - void *head; - void *tail; - uint16 len; - uint16 max; -} pktq_prec_t; - -#ifdef PKTQ_LOG -typedef struct { - uint32 requested; - uint32 stored; - uint32 saved; - uint32 selfsaved; - uint32 full_dropped; - uint32 dropped; - uint32 sacrificed; - uint32 busy; - uint32 retry; - uint32 ps_retry; - uint32 retry_drop; - uint32 max_avail; - uint32 max_used; - uint32 queue_capacity; -} pktq_counters_t; -#endif - - -#define PKTQ_COMMON \ - uint16 num_prec; \ - uint16 hi_prec; \ - uint16 max; \ - uint16 len; - - -struct pktq { - PKTQ_COMMON - - struct pktq_prec q[PKTQ_MAX_PREC]; -#ifdef PKTQ_LOG - pktq_counters_t _prec_cnt[PKTQ_MAX_PREC]; -#endif -}; - - -struct spktq { - PKTQ_COMMON - - struct pktq_prec q[1]; -}; - -#define PKTQ_PREC_ITER(pq, prec) for (prec = (pq)->num_prec - 1; prec >= 0; prec--) - - -typedef bool (*ifpkt_cb_t)(void*, int); - -#ifdef BCMPKTPOOL -#define POOL_ENAB(pool) ((pool) && (pool)->inited) -#if defined(BCM4329C0) -#define SHARED_POOL (pktpool_shared_ptr) -#else -#define SHARED_POOL (pktpool_shared) -#endif -#else -#define POOL_ENAB(bus) 0 -#define SHARED_POOL ((struct pktpool *)NULL) -#endif - -#ifndef PKTPOOL_LEN_MAX -#define PKTPOOL_LEN_MAX 40 -#endif -#define PKTPOOL_CB_MAX 3 - -struct pktpool; -typedef void (*pktpool_cb_t)(struct pktpool *pool, void *arg); -typedef struct { - pktpool_cb_t cb; - void *arg; -} pktpool_cbinfo_t; - -#ifdef BCMDBG_POOL - -#define POOL_IDLE 0 -#define POOL_RXFILL 1 -#define POOL_RXDH 2 -#define POOL_RXD11 3 -#define POOL_TXDH 4 -#define POOL_TXD11 5 -#define POOL_AMPDU 6 -#define POOL_TXENQ 7 - -typedef struct { - void *p; - uint32 cycles; - uint32 dur; -} pktpool_dbg_t; - -typedef struct { - uint8 txdh; - uint8 txd11; - uint8 enq; - uint8 rxdh; - uint8 rxd11; - uint8 rxfill; - uint8 idle; -} pktpool_stats_t; -#endif - -typedef struct pktpool { - bool inited; - uint16 r; - uint16 w; - uint16 len; - uint16 maxlen; - uint16 plen; - bool istx; - bool empty; - uint8 cbtoggle; - uint8 cbcnt; - uint8 ecbcnt; - bool emptycb_disable; - pktpool_cbinfo_t *availcb_excl; - pktpool_cbinfo_t cbs[PKTPOOL_CB_MAX]; - pktpool_cbinfo_t ecbs[PKTPOOL_CB_MAX]; - void *q[PKTPOOL_LEN_MAX + 1]; - -#ifdef BCMDBG_POOL - uint8 dbg_cbcnt; - pktpool_cbinfo_t dbg_cbs[PKTPOOL_CB_MAX]; - uint16 dbg_qlen; - pktpool_dbg_t dbg_q[PKTPOOL_LEN_MAX + 1]; -#endif -} pktpool_t; - -#if defined(BCM4329C0) -extern pktpool_t *pktpool_shared_ptr; -#else -extern pktpool_t *pktpool_shared; -#endif - -extern int pktpool_init(osl_t *osh, pktpool_t *pktp, int *pktplen, int plen, bool istx); -extern int pktpool_deinit(osl_t *osh, pktpool_t *pktp); -extern int pktpool_fill(osl_t *osh, pktpool_t *pktp, bool minimal); -extern void* pktpool_get(pktpool_t *pktp); -extern void pktpool_free(pktpool_t *pktp, void *p); -extern int pktpool_add(pktpool_t *pktp, void *p); -extern uint16 pktpool_avail(pktpool_t *pktp); -extern int pktpool_avail_notify_normal(osl_t *osh, pktpool_t *pktp); -extern int pktpool_avail_notify_exclusive(osl_t *osh, pktpool_t *pktp, pktpool_cb_t cb); -extern int pktpool_avail_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg); -extern int pktpool_empty_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg); -extern int pktpool_setmaxlen(pktpool_t *pktp, uint16 maxlen); -extern int pktpool_setmaxlen_strict(osl_t *osh, pktpool_t *pktp, uint16 maxlen); -extern void pktpool_emptycb_disable(pktpool_t *pktp, bool disable); -extern bool pktpool_emptycb_disabled(pktpool_t *pktp); - -#define POOLPTR(pp) ((pktpool_t *)(pp)) -#define pktpool_len(pp) (POOLPTR(pp)->len - 1) -#define pktpool_plen(pp) (POOLPTR(pp)->plen) -#define pktpool_maxlen(pp) (POOLPTR(pp)->maxlen) - -#ifdef BCMDBG_POOL -extern int pktpool_dbg_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg); -extern int pktpool_start_trigger(pktpool_t *pktp, void *p); -extern int pktpool_dbg_dump(pktpool_t *pktp); -extern int pktpool_dbg_notify(pktpool_t *pktp); -extern int pktpool_stats_dump(pktpool_t *pktp, pktpool_stats_t *stats); -#endif - - - -struct ether_addr; - -extern int ether_isbcast(const void *ea); -extern int ether_isnulladdr(const void *ea); - - - -#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max)) -#define pktq_pmax(pq, prec) ((pq)->q[prec].max) -#define pktq_plen(pq, prec) ((pq)->q[prec].len) -#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len) -#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max) -#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0) - -#define pktq_ppeek(pq, prec) ((pq)->q[prec].head) -#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) - -extern void *pktq_penq(struct pktq *pq, int prec, void *p); -extern void *pktq_penq_head(struct pktq *pq, int prec, void *p); -extern void *pktq_pdeq(struct pktq *pq, int prec); -extern void *pktq_pdeq_prev(struct pktq *pq, int prec, void *prev_p); -extern void *pktq_pdeq_tail(struct pktq *pq, int prec); - -extern void pktq_pflush(osl_t *osh, struct pktq *pq, int prec, bool dir, - ifpkt_cb_t fn, int arg); - -extern bool pktq_pdel(struct pktq *pq, void *p, int prec); - - - -extern int pktq_mlen(struct pktq *pq, uint prec_bmp); -extern void *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out); -extern void *pktq_mpeek(struct pktq *pq, uint prec_bmp, int *prec_out); - - - -#define pktq_len(pq) ((int)(pq)->len) -#define pktq_max(pq) ((int)(pq)->max) -#define pktq_avail(pq) ((int)((pq)->max - (pq)->len)) -#define pktq_full(pq) ((pq)->len >= (pq)->max) -#define pktq_empty(pq) ((pq)->len == 0) - - -#define pktenq(pq, p) pktq_penq(((struct pktq *)(void *)pq), 0, (p)) -#define pktenq_head(pq, p) pktq_penq_head(((struct pktq *)(void *)pq), 0, (p)) -#define pktdeq(pq) pktq_pdeq(((struct pktq *)(void *)pq), 0) -#define pktdeq_tail(pq) pktq_pdeq_tail(((struct pktq *)(void *)pq), 0) -#define pktqinit(pq, len) pktq_init(((struct pktq *)(void *)pq), 1, len) - -extern void pktq_init(struct pktq *pq, int num_prec, int max_len); -extern void pktq_set_max_plen(struct pktq *pq, int prec, int max_len); - - -extern void *pktq_deq(struct pktq *pq, int *prec_out); -extern void *pktq_deq_tail(struct pktq *pq, int *prec_out); -extern void *pktq_peek(struct pktq *pq, int *prec_out); -extern void *pktq_peek_tail(struct pktq *pq, int *prec_out); -extern void pktq_flush(osl_t *osh, struct pktq *pq, bool dir, ifpkt_cb_t fn, int arg); - - - -extern uint pktcopy(osl_t *osh, void *p, uint offset, int len, uchar *buf); -extern uint pktfrombuf(osl_t *osh, void *p, uint offset, int len, uchar *buf); -extern uint pkttotlen(osl_t *osh, void *p); -extern void *pktlast(osl_t *osh, void *p); -extern uint pktsegcnt(osl_t *osh, void *p); -extern uint pktsegcnt_war(osl_t *osh, void *p); -extern uint8 *pktoffset(osl_t *osh, void *p, uint offset); - - -#define PKTPRIO_VDSCP 0x100 -#define PKTPRIO_VLAN 0x200 -#define PKTPRIO_UPD 0x400 -#define PKTPRIO_DSCP 0x800 - -extern uint pktsetprio(void *pkt, bool update_vtag); - - -extern int bcm_atoi(const char *s); -extern ulong bcm_strtoul(const char *cp, char **endp, uint base); -extern char *bcmstrstr(const char *haystack, const char *needle); -extern char *bcmstrcat(char *dest, const char *src); -extern char *bcmstrncat(char *dest, const char *src, uint size); -extern ulong wchar2ascii(char *abuf, ushort *wbuf, ushort wbuflen, ulong abuflen); -char* bcmstrtok(char **string, const char *delimiters, char *tokdelim); -int bcmstricmp(const char *s1, const char *s2); -int bcmstrnicmp(const char* s1, const char* s2, int cnt); - - - -extern char *bcm_ether_ntoa(const struct ether_addr *ea, char *buf); -extern int bcm_ether_atoe(const char *p, struct ether_addr *ea); - - -struct ipv4_addr; -extern char *bcm_ip_ntoa(struct ipv4_addr *ia, char *buf); - - -extern void bcm_mdelay(uint ms); - -#define NVRAM_RECLAIM_CHECK(name) - -extern char *getvar(char *vars, const char *name); -extern int getintvar(char *vars, const char *name); -extern int getintvararray(char *vars, const char *name, int index); -extern int getintvararraysize(char *vars, const char *name); -extern uint getgpiopin(char *vars, char *pin_name, uint def_pin); -#define bcm_perf_enable() -#define bcmstats(fmt) -#define bcmlog(fmt, a1, a2) -#define bcmdumplog(buf, size) *buf = '\0' -#define bcmdumplogent(buf, idx) -1 - -#define bcmtslog(tstamp, fmt, a1, a2) -#define bcmprinttslogs() -#define bcmprinttstamp(us) -#define bcmdumptslog(buf, size) - -extern char *bcm_nvram_vars(uint *length); -extern int bcm_nvram_cache(void *sih); - - - - -typedef struct bcm_iovar { - const char *name; - uint16 varid; - uint16 flags; - uint16 type; - uint16 minlen; -} bcm_iovar_t; - - - - -#define IOV_GET 0 -#define IOV_SET 1 - - -#define IOV_GVAL(id) ((id) * 2) -#define IOV_SVAL(id) ((id) * 2 + IOV_SET) -#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) -#define IOV_ID(actionid) (actionid >> 1) - - - -extern const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name); -extern int bcm_iovar_lencheck(const bcm_iovar_t *table, void *arg, int len, bool set); -#if defined(WLTINYDUMP) || defined(WLMSG_INFORM) || defined(WLMSG_ASSOC) || \ - defined(WLMSG_PRPKT) || defined(WLMSG_WSEC) -extern int bcm_format_ssid(char* buf, const uchar ssid[], uint ssid_len); -#endif -#endif - - -#define IOVT_VOID 0 -#define IOVT_BOOL 1 -#define IOVT_INT8 2 -#define IOVT_UINT8 3 -#define IOVT_INT16 4 -#define IOVT_UINT16 5 -#define IOVT_INT32 6 -#define IOVT_UINT32 7 -#define IOVT_BUFFER 8 -#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER) - - -#define BCM_IOV_TYPE_INIT { \ - "void", \ - "bool", \ - "int8", \ - "uint8", \ - "int16", \ - "uint16", \ - "int32", \ - "uint32", \ - "buffer", \ - "" } - -#define BCM_IOVT_IS_INT(type) (\ - (type == IOVT_BOOL) || \ - (type == IOVT_INT8) || \ - (type == IOVT_UINT8) || \ - (type == IOVT_INT16) || \ - (type == IOVT_UINT16) || \ - (type == IOVT_INT32) || \ - (type == IOVT_UINT32)) - - - -#define BCME_STRLEN 64 -#define VALID_BCMERROR(e) ((e <= 0) && (e >= BCME_LAST)) - - - - -#define BCME_OK 0 -#define BCME_ERROR -1 -#define BCME_BADARG -2 -#define BCME_BADOPTION -3 -#define BCME_NOTUP -4 -#define BCME_NOTDOWN -5 -#define BCME_NOTAP -6 -#define BCME_NOTSTA -7 -#define BCME_BADKEYIDX -8 -#define BCME_RADIOOFF -9 -#define BCME_NOTBANDLOCKED -10 -#define BCME_NOCLK -11 -#define BCME_BADRATESET -12 -#define BCME_BADBAND -13 -#define BCME_BUFTOOSHORT -14 -#define BCME_BUFTOOLONG -15 -#define BCME_BUSY -16 -#define BCME_NOTASSOCIATED -17 -#define BCME_BADSSIDLEN -18 -#define BCME_OUTOFRANGECHAN -19 -#define BCME_BADCHAN -20 -#define BCME_BADADDR -21 -#define BCME_NORESOURCE -22 -#define BCME_UNSUPPORTED -23 -#define BCME_BADLEN -24 -#define BCME_NOTREADY -25 -#define BCME_EPERM -26 -#define BCME_NOMEM -27 -#define BCME_ASSOCIATED -28 -#define BCME_RANGE -29 -#define BCME_NOTFOUND -30 -#define BCME_WME_NOT_ENABLED -31 -#define BCME_TSPEC_NOTFOUND -32 -#define BCME_ACM_NOTSUPPORTED -33 -#define BCME_NOT_WME_ASSOCIATION -34 -#define BCME_SDIO_ERROR -35 -#define BCME_DONGLE_DOWN -36 -#define BCME_VERSION -37 -#define BCME_TXFAIL -38 -#define BCME_RXFAIL -39 -#define BCME_NODEVICE -40 -#define BCME_NMODE_DISABLED -41 -#define BCME_NONRESIDENT -42 -#define BCME_LAST BCME_NONRESIDENT - - -#define BCMERRSTRINGTABLE { \ - "OK", \ - "Undefined error", \ - "Bad Argument", \ - "Bad Option", \ - "Not up", \ - "Not down", \ - "Not AP", \ - "Not STA", \ - "Bad Key Index", \ - "Radio Off", \ - "Not band locked", \ - "No clock", \ - "Bad Rate valueset", \ - "Bad Band", \ - "Buffer too short", \ - "Buffer too long", \ - "Busy", \ - "Not Associated", \ - "Bad SSID len", \ - "Out of Range Channel", \ - "Bad Channel", \ - "Bad Address", \ - "Not Enough Resources", \ - "Unsupported", \ - "Bad length", \ - "Not Ready", \ - "Not Permitted", \ - "No Memory", \ - "Associated", \ - "Not In Range", \ - "Not Found", \ - "WME Not Enabled", \ - "TSPEC Not Found", \ - "ACM Not Supported", \ - "Not WME Association", \ - "SDIO Bus Error", \ - "Dongle Not Accessible", \ - "Incorrect version", \ - "TX Failure", \ - "RX Failure", \ - "Device Not Present", \ - "NMODE Disabled", \ - "Nonresident overlay access", \ -} - -#ifndef ABS -#define ABS(a) (((a) < 0) ? -(a) : (a)) -#endif - -#ifndef MIN -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -#ifndef MAX -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -#define CEIL(x, y) (((x) + ((y) - 1)) / (y)) -#define ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) -#define ISALIGNED(a, x) (((uintptr)(a) & ((x) - 1)) == 0) -#define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \ - & ~((boundary) - 1)) -#define ALIGN_SIZE(size, boundary) (((size) + (boundary) - 1) \ - & ~((boundary) - 1)) -#define ISPOWEROF2(x) ((((x) - 1) & (x)) == 0) -#define VALID_MASK(mask) !((mask) & ((mask) + 1)) - -#ifndef OFFSETOF -#ifdef __ARMCC_VERSION - -#include <stddef.h> -#define OFFSETOF(type, member) offsetof(type, member) -#else -#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member) -#endif -#endif - -#ifndef ARRAYSIZE -#define ARRAYSIZE(a) (sizeof(a) / sizeof(a[0])) -#endif - - -extern void *_bcmutils_dummy_fn; -#define REFERENCE_FUNCTION(f) (_bcmutils_dummy_fn = (void *)(f)) - - -#ifndef setbit -#ifndef NBBY -#define NBBY 8 -#endif -#define setbit(a, i) (((uint8 *)a)[(i) / NBBY] |= 1 << ((i) % NBBY)) -#define clrbit(a, i) (((uint8 *)a)[(i) / NBBY] &= ~(1 << ((i) % NBBY))) -#define isset(a, i) (((const uint8 *)a)[(i) / NBBY] & (1 << ((i) % NBBY))) -#define isclr(a, i) ((((const uint8 *)a)[(i) / NBBY] & (1 << ((i) % NBBY))) == 0) -#endif - -#define NBITS(type) (sizeof(type) * 8) -#define NBITVAL(nbits) (1 << (nbits)) -#define MAXBITVAL(nbits) ((1 << (nbits)) - 1) -#define NBITMASK(nbits) MAXBITVAL(nbits) -#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8) - - -#define MUX(pred, true, false) ((pred) ? (true) : (false)) - - -#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1) -#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) - - -#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) -#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) - - -#define MODADD(x, y, bound) \ - MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y)) -#define MODSUB(x, y, bound) \ - MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y)) - - -#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) -#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) - - -#define CRC8_INIT_VALUE 0xff -#define CRC8_GOOD_VALUE 0x9f -#define CRC16_INIT_VALUE 0xffff -#define CRC16_GOOD_VALUE 0xf0b8 -#define CRC32_INIT_VALUE 0xffffffff -#define CRC32_GOOD_VALUE 0xdebb20e3 - - -typedef struct bcm_bit_desc { - uint32 bit; - const char* name; -} bcm_bit_desc_t; - - -typedef struct bcm_tlv { - uint8 id; - uint8 len; - uint8 data[1]; -} bcm_tlv_t; - - -#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len)) - - -#define ETHER_ADDR_STR_LEN 18 - - - -static INLINE void -xor_128bit_block(const uint8 *src1, const uint8 *src2, uint8 *dst) -{ - if ( -#ifdef __i386__ - 1 || -#endif - (((uintptr)src1 | (uintptr)src2 | (uintptr)dst) & 3) == 0) { - - - ((uint32 *)dst)[0] = ((const uint32 *)src1)[0] ^ ((const uint32 *)src2)[0]; - ((uint32 *)dst)[1] = ((const uint32 *)src1)[1] ^ ((const uint32 *)src2)[1]; - ((uint32 *)dst)[2] = ((const uint32 *)src1)[2] ^ ((const uint32 *)src2)[2]; - ((uint32 *)dst)[3] = ((const uint32 *)src1)[3] ^ ((const uint32 *)src2)[3]; - } else { - - int k; - for (k = 0; k < 16; k++) - dst[k] = src1[k] ^ src2[k]; - } -} - - - -extern uint8 hndcrc8(uint8 *p, uint nbytes, uint8 crc); -extern uint16 hndcrc16(uint8 *p, uint nbytes, uint16 crc); -extern uint32 hndcrc32(uint8 *p, uint nbytes, uint32 crc); - - -#if defined(DHD_DEBUG) || defined(WLMSG_PRHDRS) || defined(WLMSG_PRPKT) || \ - defined(WLMSG_ASSOC) -extern int bcm_format_flags(const bcm_bit_desc_t *bd, uint32 flags, char* buf, int len); -#endif - -#if defined(DHD_DEBUG) || defined(WLMSG_PRHDRS) || defined(WLMSG_PRPKT) || \ - defined(WLMSG_ASSOC) || defined(WLMEDIA_PEAKRATE) -extern int bcm_format_hex(char *str, const void *bytes, int len); -#endif - -extern const char *bcm_crypto_algo_name(uint algo); -extern char *bcm_chipname(uint chipid, char *buf, uint len); -extern char *bcm_brev_str(uint32 brev, char *buf); -extern void printbig(char *buf); -extern void prhex(const char *msg, uchar *buf, uint len); - - -extern bcm_tlv_t *bcm_next_tlv(bcm_tlv_t *elt, int *buflen); -extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key); -extern bcm_tlv_t *bcm_parse_ordered_tlvs(void *buf, int buflen, uint key); - - -extern const char *bcmerrorstr(int bcmerror); -extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key); - - -typedef uint32 mbool; -#define mboolset(mb, bit) ((mb) |= (bit)) -#define mboolclr(mb, bit) ((mb) &= ~(bit)) -#define mboolisset(mb, bit) (((mb) & (bit)) != 0) -#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) - - -struct fielddesc { - const char *nameandfmt; - uint32 offset; - uint32 len; -}; - -extern void bcm_binit(struct bcmstrbuf *b, char *buf, uint size); -extern void bcm_bprhex(struct bcmstrbuf *b, const char *msg, bool newline, uint8 *buf, int len); - -extern void bcm_inc_bytes(uchar *num, int num_bytes, uint8 amount); -extern int bcm_cmp_bytes(const uchar *arg1, const uchar *arg2, uint8 nbytes); -extern void bcm_print_bytes(const char *name, const uchar *cdata, int len); - -typedef uint32 (*bcmutl_rdreg_rtn)(void *arg0, uint arg1, uint32 offset); -extern uint bcmdumpfields(bcmutl_rdreg_rtn func_ptr, void *arg0, uint arg1, struct fielddesc *str, - char *buf, uint32 bufsize); -extern uint bcm_bitcount(uint8 *bitmap, uint bytelength); - -extern int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...); - - -extern uint16 bcm_qdbm_to_mw(uint8 qdbm); -extern uint8 bcm_mw_to_qdbm(uint16 mw); -extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint len); - -unsigned int process_nvram_vars(char *varbuf, unsigned int len); - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/dhdioctl.h b/drivers/net/wireless/bcmdhd/src/include/dhdioctl.h deleted file mode 100644 index c645563..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/dhdioctl.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Definitions for ioctls to access DHD iovars. - * Based on wlioctl.h (for Broadcom 802.11abg driver). - * (Moves towards generic ioctls for BCM drivers/iovars.) - * - * Definitions subject to change without notice. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: dhdioctl.h 303826 2011-12-20 06:02:09Z $ - */ - -#ifndef _dhdioctl_h_ -#define _dhdioctl_h_ - -#include <typedefs.h> - - -/* require default structure packing */ -#define BWL_DEFAULT_PACKING -#include <packed_section_start.h> - - -/* Linux network driver ioctl encoding */ -typedef struct dhd_ioctl { - uint cmd; /* common ioctl definition */ - void *buf; /* pointer to user buffer */ - uint len; /* length of user buffer */ - bool set; /* get or set request (optional) */ - uint used; /* bytes read or written (optional) */ - uint needed; /* bytes needed (optional) */ - uint driver; /* to identify target driver */ -} dhd_ioctl_t; - -/* Underlying BUS definition */ -enum { - BUS_TYPE_USB = 0, /* for USB dongles */ - BUS_TYPE_SDIO /* for SDIO dongles */ -}; - -/* per-driver magic numbers */ -#define DHD_IOCTL_MAGIC 0x00444944 - -/* bump this number if you change the ioctl interface */ -#define DHD_IOCTL_VERSION 1 - -#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ -#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ - -/* common ioctl definitions */ -#define DHD_GET_MAGIC 0 -#define DHD_GET_VERSION 1 -#define DHD_GET_VAR 2 -#define DHD_SET_VAR 3 - -/* message levels */ -#define DHD_ERROR_VAL 0x0001 -#define DHD_TRACE_VAL 0x0002 -#define DHD_INFO_VAL 0x0004 -#define DHD_DATA_VAL 0x0008 -#define DHD_CTL_VAL 0x0010 -#define DHD_TIMER_VAL 0x0020 -#define DHD_HDRS_VAL 0x0040 -#define DHD_BYTES_VAL 0x0080 -#define DHD_INTR_VAL 0x0100 -#define DHD_LOG_VAL 0x0200 -#define DHD_GLOM_VAL 0x0400 -#define DHD_EVENT_VAL 0x0800 -#define DHD_BTA_VAL 0x1000 -#if defined(NDIS630) -#define DHD_SCAN_VAL 0x2000 -#else -#define DHD_ISCAN_VAL 0x2000 -#endif -#define DHD_ARPOE_VAL 0x4000 -#define DHD_REORDER_VAL 0x8000 - -#ifdef SDTEST -/* For pktgen iovar */ -typedef struct dhd_pktgen { - uint version; /* To allow structure change tracking */ - uint freq; /* Max ticks between tx/rx attempts */ - uint count; /* Test packets to send/rcv each attempt */ - uint print; /* Print counts every <print> attempts */ - uint total; /* Total packets (or bursts) */ - uint minlen; /* Minimum length of packets to send */ - uint maxlen; /* Maximum length of packets to send */ - uint numsent; /* Count of test packets sent */ - uint numrcvd; /* Count of test packets received */ - uint numfail; /* Count of test send failures */ - uint mode; /* Test mode (type of test packets) */ - uint stop; /* Stop after this many tx failures */ -} dhd_pktgen_t; - -/* Version in case structure changes */ -#define DHD_PKTGEN_VERSION 2 - -/* Type of test packets to use */ -#define DHD_PKTGEN_ECHO 1 /* Send echo requests */ -#define DHD_PKTGEN_SEND 2 /* Send discard packets */ -#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ -#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous tx dongle */ -#endif /* SDTEST */ - -/* Enter idle immediately (no timeout) */ -#define DHD_IDLE_IMMEDIATE (-1) - -/* Values for idleclock iovar: other values are the sd_divisor to use when idle */ -#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change when idle */ -#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped (and use SD1 mode) */ - - -/* require default structure packing */ -#include <packed_section_end.h> - -#endif /* _dhdioctl_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/epivers.h b/drivers/net/wireless/bcmdhd/src/include/epivers.h deleted file mode 100644 index 4e873bb..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/epivers.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: epivers.h.in,v 13.33 2010-09-08 22:08:53 $ - * -*/ - -#ifndef _epivers_h_ -#define _epivers_h_ - -#define EPI_MAJOR_VERSION 1 - -#define EPI_MINOR_VERSION 15 - -#define EPI_RC_NUMBER 15 - -#define EPI_INCREMENTAL_NUMBER 0 - -#define EPI_BUILD_NUMBER 0 - -#define EPI_VERSION 1, 15, 15, 0 - -#define EPI_VERSION_NUM 0x010f0f00 - -#define EPI_VERSION_DEV 1.15.15 - - -#define EPI_VERSION_STR "1.15.15" - -#endif /* _epivers_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/hndpmu.h b/drivers/net/wireless/bcmdhd/src/include/hndpmu.h deleted file mode 100644 index b2911fd..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/hndpmu.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * HND SiliconBackplane PMU support. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: hndpmu.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _hndpmu_h_ -#define _hndpmu_h_ - - -extern void si_pmu_otp_power(si_t *sih, osl_t *osh, bool on); -extern void si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength); - -extern void si_pmu_minresmask_htavail_set(si_t *sih, osl_t *osh, bool set_clear); - -#endif /* _hndpmu_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/hndrte_armtrap.h b/drivers/net/wireless/bcmdhd/src/include/hndrte_armtrap.h deleted file mode 100644 index a3eae2d..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/hndrte_armtrap.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * HNDRTE arm trap handling. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: hndrte_armtrap.h 261365 2011-05-24 20:42:23Z $ - */ - -#ifndef _hndrte_armtrap_h -#define _hndrte_armtrap_h - - -/* ARM trap handling */ - -/* Trap types defined by ARM (see arminc.h) */ - -/* Trap locations in lo memory */ -#define TRAP_STRIDE 4 -#define FIRST_TRAP TR_RST -#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) - -#if defined(__ARM_ARCH_4T__) -#define MAX_TRAP_TYPE (TR_FIQ + 1) -#elif defined(__ARM_ARCH_7M__) -#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) -#endif /* __ARM_ARCH_7M__ */ - -/* The trap structure is defined here as offsets for assembly */ -#define TR_TYPE 0x00 -#define TR_EPC 0x04 -#define TR_CPSR 0x08 -#define TR_SPSR 0x0c -#define TR_REGS 0x10 -#define TR_REG(n) (TR_REGS + (n) * 4) -#define TR_SP TR_REG(13) -#define TR_LR TR_REG(14) -#define TR_PC TR_REG(15) - -#define TRAP_T_SIZE 80 - -#ifndef _LANGUAGE_ASSEMBLY - -#include <typedefs.h> - -typedef struct _trap_struct { - uint32 type; - uint32 epc; - uint32 cpsr; - uint32 spsr; - uint32 r0; /* a1 */ - uint32 r1; /* a2 */ - uint32 r2; /* a3 */ - uint32 r3; /* a4 */ - uint32 r4; /* v1 */ - uint32 r5; /* v2 */ - uint32 r6; /* v3 */ - uint32 r7; /* v4 */ - uint32 r8; /* v5 */ - uint32 r9; /* sb/v6 */ - uint32 r10; /* sl/v7 */ - uint32 r11; /* fp/v8 */ - uint32 r12; /* ip */ - uint32 r13; /* sp */ - uint32 r14; /* lr */ - uint32 pc; /* r15 */ -} trap_t; - -#endif /* !_LANGUAGE_ASSEMBLY */ - -#endif /* _hndrte_armtrap_h */ diff --git a/drivers/net/wireless/bcmdhd/src/include/hndrte_cons.h b/drivers/net/wireless/bcmdhd/src/include/hndrte_cons.h deleted file mode 100644 index 5006556..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/hndrte_cons.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Console support for hndrte. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: hndrte_cons.h 300516 2011-12-04 17:39:44Z $ - */ -#ifndef _HNDRTE_CONS_H -#define _HNDRTE_CONS_H - -#include <typedefs.h> - -#define CBUF_LEN (128) - -#define LOG_BUF_LEN 1024 - -typedef struct { - uint32 buf; /* Can't be pointer on (64-bit) hosts */ - uint buf_size; - uint idx; - char *_buf_compat; /* redundant pointer for backward compat. */ -} hndrte_log_t; - -typedef struct { - /* Virtual UART - * When there is no UART (e.g. Quickturn), the host should write a complete - * input line directly into cbuf and then write the length into vcons_in. - * This may also be used when there is a real UART (at risk of conflicting with - * the real UART). vcons_out is currently unused. - */ - volatile uint vcons_in; - volatile uint vcons_out; - - /* Output (logging) buffer - * Console output is written to a ring buffer log_buf at index log_idx. - * The host may read the output when it sees log_idx advance. - * Output will be lost if the output wraps around faster than the host polls. - */ - hndrte_log_t log; - - /* Console input line buffer - * Characters are read one at a time into cbuf until <CR> is received, then - * the buffer is processed as a command line. Also used for virtual UART. - */ - uint cbuf_idx; - char cbuf[CBUF_LEN]; -} hndrte_cons_t; - -#endif /* _HNDRTE_CONS_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/hndsoc.h b/drivers/net/wireless/bcmdhd/src/include/hndsoc.h deleted file mode 100644 index 1f11aef..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/hndsoc.h +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Broadcom HND chip & on-chip-interconnect-related definitions. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: hndsoc.h 283666 2011-09-15 00:27:45Z $ - */ - -#ifndef _HNDSOC_H -#define _HNDSOC_H - -/* Include the soci specific files */ -#include <sbconfig.h> -#include <aidmp.h> - -/* - * SOC Interconnect Address Map. - * All regions may not exist on all chips. - */ -#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ -#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ -#define SI_PCI_MEM_SZ (64 * 1024 * 1024) -#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ -#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ - -#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ - -#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ -#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ -#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software - * convenience and could be changed if we - * make any larger chips - */ - -#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ -#define SI_FASTRAM_SWAPPED 0x19800000 - -#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ -#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ -#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ -#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ -#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ -#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ -#define SI_ARMCR4_ROM 0x000f0000 /* ARM Cortex-R4 ROM */ -#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ -#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ -#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ -#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ - -#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ -#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), low 32 bits - */ -#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), high 32 bits - */ - -/* core codes */ -#define NODEV_CORE_ID 0x700 /* Invalid coreid */ -#define CC_CORE_ID 0x800 /* chipcommon core */ -#define ILINE20_CORE_ID 0x801 /* iline20 core */ -#define SRAM_CORE_ID 0x802 /* sram core */ -#define SDRAM_CORE_ID 0x803 /* sdram core */ -#define PCI_CORE_ID 0x804 /* pci core */ -#define MIPS_CORE_ID 0x805 /* mips core */ -#define ENET_CORE_ID 0x806 /* enet mac core */ -#define CODEC_CORE_ID 0x807 /* v90 codec core */ -#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ -#define ADSL_CORE_ID 0x809 /* ADSL core */ -#define ILINE100_CORE_ID 0x80a /* iline100 core */ -#define IPSEC_CORE_ID 0x80b /* ipsec core */ -#define UTOPIA_CORE_ID 0x80c /* utopia core */ -#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ -#define SOCRAM_CORE_ID 0x80e /* internal memory core */ -#define MEMC_CORE_ID 0x80f /* memc sdram core */ -#define OFDM_CORE_ID 0x810 /* OFDM phy core */ -#define EXTIF_CORE_ID 0x811 /* external interface core */ -#define D11_CORE_ID 0x812 /* 802.11 MAC core */ -#define APHY_CORE_ID 0x813 /* 802.11a phy core */ -#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ -#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ -#define MIPS33_CORE_ID 0x816 /* mips3302 core */ -#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ -#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ -#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ -#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ -#define SDIOH_CORE_ID 0x81b /* sdio host core */ -#define ROBO_CORE_ID 0x81c /* roboswitch core */ -#define ATA100_CORE_ID 0x81d /* parallel ATA core */ -#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ -#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ -#define PCIE_CORE_ID 0x820 /* pci express core */ -#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ -#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ -#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ -#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ -#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ -#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ -#define PMU_CORE_ID 0x827 /* PMU core */ -#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ -#define SDIOD_CORE_ID 0x829 /* SDIO device core */ -#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ -#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ -#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ -#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ -#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ -#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ -#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ -#define SC_CORE_ID 0x831 /* shared common core */ -#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ -#define SPIH_CORE_ID 0x833 /* SPI host core */ -#define I2S_CORE_ID 0x834 /* I2S core */ -#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ -#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ - -#define ACPHY_CORE_ID 0x83b /* Dot11 ACPHY */ -#define PCIE2_CORE_ID 0x83c /* pci express Gen2 core */ -#define USB30D_CORE_ID 0x83d /* usb 3.0 device core */ -#define ARMCR4_CORE_ID 0x83e /* ARM CR4 CPU */ -#define APB_BRIDGE_CORE_ID 0x135 /* APB bridge core ID */ -#define AXI_CORE_ID 0x301 /* AXI/GPV core ID */ -#define EROM_CORE_ID 0x366 /* EROM core ID */ -#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ -#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all - * unused address ranges - */ - -#define CC_4706_CORE_ID 0x500 /* chipcommon core */ -#define SOCRAM_4706_CORE_ID 0x50e /* internal memory core */ -#define GMAC_COMMON_4706_CORE_ID 0x5dc /* Gigabit MAC core */ -#define GMAC_4706_CORE_ID 0x52d /* Gigabit MAC core */ -#define AMEMC_CORE_ID 0x52e /* DDR1/2 memory controller core */ -#define ALTA_CORE_ID 0x534 /* I2S core */ -#define DDR23_PHY_CORE_ID 0x5dd - -#define SI_PCI1_MEM 0x40000000 /* Host Mode sb2pcitranslation0 (64 MB) */ -#define SI_PCI1_CFG 0x44000000 /* Host Mode sb2pcitranslation1 (64 MB) */ -#define SI_PCIE1_DMA_H32 0xc0000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), high 32 bits - */ -#define CC_4706B0_CORE_REV 0x8000001f /* chipcommon core */ -#define SOCRAM_4706B0_CORE_REV 0x80000005 /* internal memory core */ -#define GMAC_4706B0_CORE_REV 0x80000000 /* Gigabit MAC core */ - -/* There are TWO constants on all HND chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ -#define SI_CC_IDX 0 - -/* SOC Interconnect types (aka chip types) */ -#define SOCI_SB 0 -#define SOCI_AI 1 -#define SOCI_UBUS 2 - -/* Common core control flags */ -#define SICF_BIST_EN 0x8000 -#define SICF_PME_EN 0x4000 -#define SICF_CORE_BITS 0x3ffc -#define SICF_FGC 0x0002 -#define SICF_CLOCK_EN 0x0001 - -/* Common core status flags */ -#define SISF_BIST_DONE 0x8000 -#define SISF_BIST_ERROR 0x4000 -#define SISF_GATED_CLK 0x2000 -#define SISF_DMA64 0x1000 -#define SISF_CORE_BITS 0x0fff - -/* A register that is common to all cores to - * communicate w/PMU regarding clock control. - */ -#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ - -/* clk_ctl_st register */ -#define CCS_FORCEALP 0x00000001 /* force ALP request */ -#define CCS_FORCEHT 0x00000002 /* force HT request */ -#define CCS_FORCEILP 0x00000004 /* force ILP request */ -#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ -#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ -#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ -#define CCS_HQCLKREQ 0x00000040 /* HQ Clock Required */ -#define CCS_USBCLKREQ 0x00000100 /* USB Clock Req */ -#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ -#define CCS_ERSRC_REQ_SHIFT 8 -#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ -#define CCS_HTAVAIL 0x00020000 /* HT is available */ -#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ -#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ -#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ -#define CCS_ERSRC_STS_SHIFT 24 - -#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ -#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ - -/* Not really related to SOC Interconnect, but a couple of software - * conventions for the use the flash space: - */ - -/* Minumum amount of flash we support */ -#define FLASH_MIN 0x00020000 /* Minimum flash size */ - -/* A boot/binary may have an embedded block that describes its size */ -#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ -#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ -#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ -#define BISZ_TXTST_IDX 1 /* 1: text start */ -#define BISZ_TXTEND_IDX 2 /* 2: text end */ -#define BISZ_DATAST_IDX 3 /* 3: data start */ -#define BISZ_DATAEND_IDX 4 /* 4: data end */ -#define BISZ_BSSST_IDX 5 /* 5: bss start */ -#define BISZ_BSSEND_IDX 6 /* 6: bss end */ -#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ - -#endif /* _HNDSOC_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/linux_osl.h b/drivers/net/wireless/bcmdhd/src/include/linux_osl.h deleted file mode 100644 index fbe3d86..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/linux_osl.h +++ /dev/null @@ -1,375 +0,0 @@ -/* - * Linux OS Independent Layer - * - * Copyright (C) 1999-2012, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: linux_osl.h 309193 2012-01-19 00:03:57Z $ - */ - -#ifndef _linux_osl_h_ -#define _linux_osl_h_ - -#include <typedefs.h> - - -extern void * osl_os_open_image(char * filename); -extern int osl_os_get_image_block(char * buf, int len, void * image); -extern void osl_os_close_image(void * image); -extern int osl_os_image_size(void *image); - - -#ifdef BCMDRIVER - - -extern osl_t *osl_attach(void *pdev, uint bustype, bool pkttag); -extern void osl_detach(osl_t *osh); - - -extern uint32 g_assert_type; - - -#if defined(BCMASSERT_LOG) - #define ASSERT(exp) \ - do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0) -extern void osl_assert(const char *exp, const char *file, int line); -#else - #ifdef __GNUC__ - #define GCC_VERSION \ - (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) - #if GCC_VERSION > 30100 - #define ASSERT(exp) do {} while (0) - #else - #define ASSERT(exp) - #endif - #endif /* __GNUC__ */ -#endif /* BCMASSERT_LOG */ - -#define OSL_DELAY(usec) osl_delay(usec) -extern void osl_delay(uint usec); - -#define OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \ - osl_pcmcia_read_attr((osh), (offset), (buf), (size)) -#define OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \ - osl_pcmcia_write_attr((osh), (offset), (buf), (size)) -extern void osl_pcmcia_read_attr(osl_t *osh, uint offset, void *buf, int size); -extern void osl_pcmcia_write_attr(osl_t *osh, uint offset, void *buf, int size); - - -#define OSL_PCI_READ_CONFIG(osh, offset, size) \ - osl_pci_read_config((osh), (offset), (size)) -#define OSL_PCI_WRITE_CONFIG(osh, offset, size, val) \ - osl_pci_write_config((osh), (offset), (size), (val)) -extern uint32 osl_pci_read_config(osl_t *osh, uint offset, uint size); -extern void osl_pci_write_config(osl_t *osh, uint offset, uint size, uint val); - - -#define OSL_PCI_BUS(osh) osl_pci_bus(osh) -#define OSL_PCI_SLOT(osh) osl_pci_slot(osh) -extern uint osl_pci_bus(osl_t *osh); -extern uint osl_pci_slot(osl_t *osh); -extern struct pci_dev *osl_pci_device(osl_t *osh); - - -typedef struct { - bool pkttag; - uint pktalloced; - bool mmbus; - pktfree_cb_fn_t tx_fn; - void *tx_ctx; - void *unused[3]; -} osl_pubinfo_t; - -#define PKTFREESETCB(osh, _tx_fn, _tx_ctx) \ - do { \ - ((osl_pubinfo_t*)osh)->tx_fn = _tx_fn; \ - ((osl_pubinfo_t*)osh)->tx_ctx = _tx_ctx; \ - } while (0) - -#define BUS_SWAP32(v) (v) - - #define MALLOC(osh, size) osl_malloc((osh), (size)) - #define MFREE(osh, addr, size) osl_mfree((osh), (addr), (size)) - #define MALLOCED(osh) osl_malloced((osh)) - extern void *osl_malloc(osl_t *osh, uint size); - extern void osl_mfree(osl_t *osh, void *addr, uint size); - extern uint osl_malloced(osl_t *osh); - -#define NATIVE_MALLOC(osh, size) kmalloc(size, GFP_ATOMIC) -#define NATIVE_MFREE(osh, addr, size) kfree(addr) - -#define MALLOC_FAILED(osh) osl_malloc_failed((osh)) -extern uint osl_malloc_failed(osl_t *osh); - - -#define DMA_CONSISTENT_ALIGN osl_dma_consistent_align() -#define DMA_ALLOC_CONSISTENT(osh, size, align, tot, pap, dmah) \ - osl_dma_alloc_consistent((osh), (size), (align), (tot), (pap)) -#define DMA_FREE_CONSISTENT(osh, va, size, pa, dmah) \ - osl_dma_free_consistent((osh), (void*)(va), (size), (pa)) -extern uint osl_dma_consistent_align(void); -extern void *osl_dma_alloc_consistent(osl_t *osh, uint size, uint16 align, uint *tot, ulong *pap); -extern void osl_dma_free_consistent(osl_t *osh, void *va, uint size, ulong pa); - -#define DMA_TX 1 -#define DMA_RX 2 - - -#define DMA_UNMAP(osh, pa, size, direction, p, dmah) \ - osl_dma_unmap((osh), (pa), (size), (direction)) -extern uint osl_dma_map(osl_t *osh, void *va, uint size, int direction); -extern void osl_dma_unmap(osl_t *osh, uint pa, uint size, int direction); - - -#define OSL_DMADDRWIDTH(osh, addrwidth) do {} while (0) - - - #include <bcmsdh.h> - #define OSL_WRITE_REG(osh, r, v) (bcmsdh_reg_write(NULL, (uintptr)(r), sizeof(*(r)), (v))) - #define OSL_READ_REG(osh, r) (bcmsdh_reg_read(NULL, (uintptr)(r), sizeof(*(r)))) - - #define SELECT_BUS_WRITE(osh, mmap_op, bus_op) if (((osl_pubinfo_t*)(osh))->mmbus) \ - mmap_op else bus_op - #define SELECT_BUS_READ(osh, mmap_op, bus_op) (((osl_pubinfo_t*)(osh))->mmbus) ? \ - mmap_op : bus_op - -#define OSL_ERROR(bcmerror) osl_error(bcmerror) -extern int osl_error(int bcmerror); - - -#define PKTBUFSZ 2048 - -#include <linuxver.h> -#include <linux/kernel.h> -#include <linux/string.h> - -#define OSL_SYSUPTIME() ((uint32)jiffies * (1000 / HZ)) -#define printf(fmt, args...) printk(fmt , ## args) -#include <linux/kernel.h> -#include <linux/string.h> - -#define bcopy(src, dst, len) memcpy((dst), (src), (len)) -#define bcmp(b1, b2, len) memcmp((b1), (b2), (len)) -#define bzero(b, len) memset((b), '\0', (len)) - -#define R_REG(osh, r) (\ - SELECT_BUS_READ(osh, \ - ({ \ - __typeof(*(r)) __osl_v; \ - BCM_REFERENCE(osh); \ - switch (sizeof(*(r))) { \ - case sizeof(uint8): __osl_v = \ - readb((volatile uint8*)(r)); break; \ - case sizeof(uint16): __osl_v = \ - readw((volatile uint16*)(r)); break; \ - case sizeof(uint32): __osl_v = \ - readl((volatile uint32*)(r)); break; \ - } \ - __osl_v; \ - }), \ - OSL_READ_REG(osh, r)) \ -) - -#define W_REG(osh, r, v) do { \ - BCM_REFERENCE(osh); \ - SELECT_BUS_WRITE(osh, \ - switch (sizeof(*(r))) { \ - case sizeof(uint8): writeb((uint8)(v), (volatile uint8*)(r)); break; \ - case sizeof(uint16): writew((uint16)(v), (volatile uint16*)(r)); break; \ - case sizeof(uint32): writel((uint32)(v), (volatile uint32*)(r)); break; \ - }, \ - (OSL_WRITE_REG(osh, r, v))); \ - } while (0) - -#define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) -#define OR_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) | (v)) - - -#define bcopy(src, dst, len) memcpy((dst), (src), (len)) -#define bcmp(b1, b2, len) memcmp((b1), (b2), (len)) -#define bzero(b, len) memset((b), '\0', (len)) - - -#define OSL_UNCACHED(va) ((void *)va) -#define OSL_CACHED(va) ((void *)va) - -#define OSL_PREF_RANGE_LD(va, sz) -#define OSL_PREF_RANGE_ST(va, sz) - - -#if defined(__i386__) -#define OSL_GETCYCLES(x) rdtscl((x)) -#else -#define OSL_GETCYCLES(x) ((x) = 0) -#endif - - -#define BUSPROBE(val, addr) ({ (val) = R_REG(NULL, (addr)); 0; }) - - -#if !defined(CONFIG_MMC_MSM7X00A) -#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), (unsigned long)(size)) -#else -#define REG_MAP(pa, size) (void *)(0) -#endif -#define REG_UNMAP(va) iounmap((va)) - - -#define R_SM(r) *(r) -#define W_SM(r, v) (*(r) = (v)) -#define BZERO_SM(r, len) memset((r), '\0', (len)) - - -#include <linuxver.h> - - -#define PKTGET(osh, len, send) osl_pktget((osh), (len)) -#define PKTDUP(osh, skb) osl_pktdup((osh), (skb)) -#define PKTLIST_DUMP(osh, buf) -#define PKTDBG_TRACE(osh, pkt, bit) -#define PKTFREE(osh, skb, send) osl_pktfree((osh), (skb), (send)) -#ifdef CONFIG_DHD_USE_STATIC_BUF -#define PKTGET_STATIC(osh, len, send) osl_pktget_static((osh), (len)) -#define PKTFREE_STATIC(osh, skb, send) osl_pktfree_static((osh), (skb), (send)) -#endif -#define PKTDATA(osh, skb) (((struct sk_buff*)(skb))->data) -#define PKTLEN(osh, skb) (((struct sk_buff*)(skb))->len) -#define PKTHEADROOM(osh, skb) (PKTDATA(osh, skb)-(((struct sk_buff*)(skb))->head)) -#define PKTTAILROOM(osh, skb) ((((struct sk_buff*)(skb))->end)-(((struct sk_buff*)(skb))->tail)) -#define PKTNEXT(osh, skb) (((struct sk_buff*)(skb))->next) -#define PKTSETNEXT(osh, skb, x) (((struct sk_buff*)(skb))->next = (struct sk_buff*)(x)) -#define PKTSETLEN(osh, skb, len) __skb_trim((struct sk_buff*)(skb), (len)) -#define PKTPUSH(osh, skb, bytes) skb_push((struct sk_buff*)(skb), (bytes)) -#define PKTPULL(osh, skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes)) -#define PKTTAG(skb) ((void*)(((struct sk_buff*)(skb))->cb)) -#define PKTALLOCED(osh) ((osl_pubinfo_t *)(osh))->pktalloced -#define PKTSETPOOL(osh, skb, x, y) do {} while (0) -#define PKTPOOL(osh, skb) FALSE -#define PKTSHRINK(osh, m) (m) - -#ifdef CTFPOOL -#define CTFPOOL_REFILL_THRESH 3 -typedef struct ctfpool { - void *head; - spinlock_t lock; - uint max_obj; - uint curr_obj; - uint obj_size; - uint refills; - uint fast_allocs; - uint fast_frees; - uint slow_allocs; -} ctfpool_t; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22) -#define FASTBUF (1 << 4) -#define CTFBUF (1 << 5) -#define PKTSETFAST(osh, skb) ((((struct sk_buff*)(skb))->mac_len) |= FASTBUF) -#define PKTCLRFAST(osh, skb) ((((struct sk_buff*)(skb))->mac_len) &= (~FASTBUF)) -#define PKTSETCTF(osh, skb) ((((struct sk_buff*)(skb))->mac_len) |= CTFBUF) -#define PKTCLRCTF(osh, skb) ((((struct sk_buff*)(skb))->mac_len) &= (~CTFBUF)) -#define PKTISFAST(osh, skb) ((((struct sk_buff*)(skb))->mac_len) & FASTBUF) -#define PKTISCTF(osh, skb) ((((struct sk_buff*)(skb))->mac_len) & CTFBUF) -#define PKTFAST(osh, skb) (((struct sk_buff*)(skb))->mac_len) -#else -#define FASTBUF (1 << 0) -#define CTFBUF (1 << 1) -#define PKTSETFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) |= FASTBUF) -#define PKTCLRFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) &= (~FASTBUF)) -#define PKTSETCTF(osh, skb) ((((struct sk_buff*)(skb))->__unused) |= CTFBUF) -#define PKTCLRCTF(osh, skb) ((((struct sk_buff*)(skb))->__unused) &= (~CTFBUF)) -#define PKTISFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) & FASTBUF) -#define PKTISCTF(osh, skb) ((((struct sk_buff*)(skb))->__unused) & CTFBUF) -#define PKTFAST(osh, skb) (((struct sk_buff*)(skb))->__unused) -#endif /* LINUX_VERSION_CODE */ - -#define CTFPOOLPTR(osh, skb) (((struct sk_buff*)(skb))->sk) -#define CTFPOOLHEAD(osh, skb) (((ctfpool_t *)((struct sk_buff*)(skb))->sk)->head) - -extern void *osl_ctfpool_add(osl_t *osh); -extern void osl_ctfpool_replenish(osl_t *osh, uint thresh); -extern int32 osl_ctfpool_init(osl_t *osh, uint numobj, uint size); -extern void osl_ctfpool_cleanup(osl_t *osh); -extern void osl_ctfpool_stats(osl_t *osh, void *b); -#endif /* CTFPOOL */ - - -#ifdef HNDCTF -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22) -#define SKIPCT (1 << 6) -#define PKTSETSKIPCT(osh, skb) (((struct sk_buff*)(skb))->mac_len |= SKIPCT) -#define PKTCLRSKIPCT(osh, skb) (((struct sk_buff*)(skb))->mac_len &= (~SKIPCT)) -#define PKTSKIPCT(osh, skb) (((struct sk_buff*)(skb))->mac_len & SKIPCT) -#else -#define SKIPCT (1 << 2) -#define PKTSETSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused |= SKIPCT) -#define PKTCLRSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused &= (~SKIPCT)) -#define PKTSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused & SKIPCT) -#endif -#else -#define PKTSETSKIPCT(osh, skb) -#define PKTCLRSKIPCT(osh, skb) -#define PKTSKIPCT(osh, skb) -#endif /* HNDCTF */ - -extern void osl_pktfree(osl_t *osh, void *skb, bool send); -extern void *osl_pktget_static(osl_t *osh, uint len); -extern void osl_pktfree_static(osl_t *osh, void *skb, bool send); - -extern void *osl_pkt_frmnative(osl_t *osh, void *skb); -extern void *osl_pktget(osl_t *osh, uint len); -extern void *osl_pktdup(osl_t *osh, void *skb); -extern struct sk_buff *osl_pkt_tonative(osl_t *osh, void *pkt); -#define PKTFRMNATIVE(osh, skb) osl_pkt_frmnative(((osl_t *)osh), (struct sk_buff*)(skb)) -#define PKTTONATIVE(osh, pkt) osl_pkt_tonative((osl_t *)(osh), (pkt)) - -#define PKTLINK(skb) (((struct sk_buff*)(skb))->prev) -#define PKTSETLINK(skb, x) (((struct sk_buff*)(skb))->prev = (struct sk_buff*)(x)) -#define PKTPRIO(skb) (((struct sk_buff*)(skb))->priority) -#define PKTSETPRIO(skb, x) (((struct sk_buff*)(skb))->priority = (x)) -#define PKTSUMNEEDED(skb) (((struct sk_buff*)(skb))->ip_summed == CHECKSUM_HW) -#define PKTSETSUMGOOD(skb, x) (((struct sk_buff*)(skb))->ip_summed = \ - ((x) ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE)) - -#define PKTSHARED(skb) (((struct sk_buff*)(skb))->cloned) - -#define DMA_MAP(osh, va, size, direction, p, dmah) \ - osl_dma_map((osh), (va), (size), (direction)) - -#else - - #define ASSERT(exp) do {} while (0) - -#define MALLOC(o, l) malloc(l) -#define MFREE(o, p, l) free(p) -#include <stdlib.h> - - -#include <string.h> - - -#include <stdio.h> - - -extern void bcopy(const void *src, void *dst, size_t len); -extern int bcmp(const void *b1, const void *b2, size_t len); -extern void bzero(void *b, size_t len); -#endif /* BCMDRIVER */ - -#endif /* _linux_osl_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/linuxver.h b/drivers/net/wireless/bcmdhd/src/include/linuxver.h deleted file mode 100644 index 40830d9..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/linuxver.h +++ /dev/null @@ -1,602 +0,0 @@ -/* - * Linux-specific abstractions to gain some independence from linux kernel versions. - * Pave over some 2.2 versus 2.4 versus 2.6 kernel differences. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: linuxver.h 291086 2011-10-21 01:17:24Z $ - */ - -#ifndef _linuxver_h_ -#define _linuxver_h_ - -#include <linux/version.h> -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) -#include <linux/config.h> -#else -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) -#include <generated/autoconf.h> -#else -#include <linux/autoconf.h> -#endif -#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0) */ -#include <linux/module.h> - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 0)) - -#ifdef __UNDEF_NO_VERSION__ -#undef __NO_VERSION__ -#else -#define __NO_VERSION__ -#endif -#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 0)) */ - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0) -#define module_param(_name_, _type_, _perm_) MODULE_PARM(_name_, "i") -#define module_param_string(_name_, _string_, _size_, _perm_) \ - MODULE_PARM(_string_, "c" __MODULE_STRING(_size_)) -#endif - - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 9)) -#include <linux/malloc.h> -#else -#include <linux/slab.h> -#endif - -#include <linux/types.h> -#include <linux/init.h> -#include <linux/mm.h> -#include <linux/string.h> -#include <linux/pci.h> -#include <linux/interrupt.h> -#include <linux/netdevice.h> -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) -#include <linux/semaphore.h> -#else -#include <asm/semaphore.h> -#endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)) -#undef IP_TOS -#endif -#include <asm/io.h> - -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 41)) -#include <linux/workqueue.h> -#else -#include <linux/tqueue.h> -#ifndef work_struct -#define work_struct tq_struct -#endif -#ifndef INIT_WORK -#define INIT_WORK(_work, _func, _data) INIT_TQUEUE((_work), (_func), (_data)) -#endif -#ifndef schedule_work -#define schedule_work(_work) schedule_task((_work)) -#endif -#ifndef flush_scheduled_work -#define flush_scheduled_work() flush_scheduled_tasks() -#endif -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) -#define MY_INIT_WORK(_work, _func) INIT_WORK(_work, _func) -#else -#define MY_INIT_WORK(_work, _func) INIT_WORK(_work, _func, _work) -#if !(LINUX_VERSION_CODE == KERNEL_VERSION(2, 6, 18) && defined(RHEL_MAJOR) && \ - (RHEL_MAJOR == 5)) -typedef void (*work_func_t)(void *work); -#endif -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) - -#ifndef IRQ_NONE -typedef void irqreturn_t; -#define IRQ_NONE -#define IRQ_HANDLED -#define IRQ_RETVAL(x) -#endif -#else -typedef irqreturn_t(*FN_ISR) (int irq, void *dev_id, struct pt_regs *ptregs); -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) -#define IRQF_SHARED SA_SHIRQ -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 17) -#ifdef CONFIG_NET_RADIO -#define CONFIG_WIRELESS_EXT -#endif -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 67) -#define MOD_INC_USE_COUNT -#define MOD_DEC_USE_COUNT -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32) -#include <linux/sched.h> -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) -#include <net/lib80211.h> -#endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) -#include <linux/ieee80211.h> -#else -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 14) -#include <net/ieee80211.h> -#endif -#endif - - -#ifndef __exit -#define __exit -#endif -#ifndef __devexit -#define __devexit -#endif -#ifndef __devinit -#define __devinit __init -#endif -#ifndef __devinitdata -#define __devinitdata -#endif -#ifndef __devexit_p -#define __devexit_p(x) x -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)) - -#define pci_get_drvdata(dev) (dev)->sysdata -#define pci_set_drvdata(dev, value) (dev)->sysdata = (value) - - - -struct pci_device_id { - unsigned int vendor, device; - unsigned int subvendor, subdevice; - unsigned int class, class_mask; - unsigned long driver_data; -}; - -struct pci_driver { - struct list_head node; - char *name; - const struct pci_device_id *id_table; - int (*probe)(struct pci_dev *dev, - const struct pci_device_id *id); - void (*remove)(struct pci_dev *dev); - void (*suspend)(struct pci_dev *dev); - void (*resume)(struct pci_dev *dev); -}; - -#define MODULE_DEVICE_TABLE(type, name) -#define PCI_ANY_ID (~0) - - -#define pci_module_init pci_register_driver -extern int pci_register_driver(struct pci_driver *drv); -extern void pci_unregister_driver(struct pci_driver *drv); - -#endif - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)) -#define pci_module_init pci_register_driver -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)) -#ifdef MODULE -#define module_init(x) int init_module(void) { return x(); } -#define module_exit(x) void cleanup_module(void) { x(); } -#else -#define module_init(x) __initcall(x); -#define module_exit(x) __exitcall(x); -#endif -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31) -#define WL_USE_NETDEV_OPS -#else -#undef WL_USE_NETDEV_OPS -#endif - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) && defined(CONFIG_RFKILL) -#define WL_CONFIG_RFKILL -#else -#undef WL_CONFIG_RFKILL -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 48)) -#define list_for_each(pos, head) \ - for (pos = (head)->next; pos != (head); pos = pos->next) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 13)) -#define pci_resource_start(dev, bar) ((dev)->base_address[(bar)]) -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 44)) -#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 23)) -#define pci_enable_device(dev) do { } while (0) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 14)) -#define net_device device -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 42)) - - - -#ifndef PCI_DMA_TODEVICE -#define PCI_DMA_TODEVICE 1 -#define PCI_DMA_FROMDEVICE 2 -#endif - -typedef u32 dma_addr_t; - - -static inline int get_order(unsigned long size) -{ - int order; - - size = (size-1) >> (PAGE_SHIFT-1); - order = -1; - do { - size >>= 1; - order++; - } while (size); - return order; -} - -static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, - dma_addr_t *dma_handle) -{ - void *ret; - int gfp = GFP_ATOMIC | GFP_DMA; - - ret = (void *)__get_free_pages(gfp, get_order(size)); - - if (ret != NULL) { - memset(ret, 0, size); - *dma_handle = virt_to_bus(ret); - } - return ret; -} -static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - free_pages((unsigned long)vaddr, get_order(size)); -} -#define pci_map_single(cookie, address, size, dir) virt_to_bus(address) -#define pci_unmap_single(cookie, address, size, dir) - -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 43)) - -#define dev_kfree_skb_any(a) dev_kfree_skb(a) -#define netif_down(dev) do { (dev)->start = 0; } while (0) - - -#ifndef _COMPAT_NETDEVICE_H - - - -#define dev_kfree_skb_irq(a) dev_kfree_skb(a) -#define netif_wake_queue(dev) \ - do { clear_bit(0, &(dev)->tbusy); mark_bh(NET_BH); } while (0) -#define netif_stop_queue(dev) set_bit(0, &(dev)->tbusy) - -static inline void netif_start_queue(struct net_device *dev) -{ - dev->tbusy = 0; - dev->interrupt = 0; - dev->start = 1; -} - -#define netif_queue_stopped(dev) (dev)->tbusy -#define netif_running(dev) (dev)->start - -#endif - -#define netif_device_attach(dev) netif_start_queue(dev) -#define netif_device_detach(dev) netif_stop_queue(dev) - - -#define tasklet_struct tq_struct -static inline void tasklet_schedule(struct tasklet_struct *tasklet) -{ - queue_task(tasklet, &tq_immediate); - mark_bh(IMMEDIATE_BH); -} - -static inline void tasklet_init(struct tasklet_struct *tasklet, - void (*func)(unsigned long), - unsigned long data) -{ - tasklet->next = NULL; - tasklet->sync = 0; - tasklet->routine = (void (*)(void *))func; - tasklet->data = (void *)data; -} -#define tasklet_kill(tasklet) { do {} while (0); } - - -#define del_timer_sync(timer) del_timer(timer) - -#else - -#define netif_down(dev) - -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 3)) - - -#define PREPARE_TQUEUE(_tq, _routine, _data) \ - do { \ - (_tq)->routine = _routine; \ - (_tq)->data = _data; \ - } while (0) - - -#define INIT_TQUEUE(_tq, _routine, _data) \ - do { \ - INIT_LIST_HEAD(&(_tq)->list); \ - (_tq)->sync = 0; \ - PREPARE_TQUEUE((_tq), (_routine), (_data)); \ - } while (0) - -#endif - - -#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 9) -#define PCI_SAVE_STATE(a, b) pci_save_state(a) -#define PCI_RESTORE_STATE(a, b) pci_restore_state(a) -#else -#define PCI_SAVE_STATE(a, b) pci_save_state(a, b) -#define PCI_RESTORE_STATE(a, b) pci_restore_state(a, b) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 6)) -static inline int -pci_save_state(struct pci_dev *dev, u32 *buffer) -{ - int i; - if (buffer) { - for (i = 0; i < 16; i++) - pci_read_config_dword(dev, i * 4, &buffer[i]); - } - return 0; -} - -static inline int -pci_restore_state(struct pci_dev *dev, u32 *buffer) -{ - int i; - - if (buffer) { - for (i = 0; i < 16; i++) - pci_write_config_dword(dev, i * 4, buffer[i]); - } - - else { - for (i = 0; i < 6; i ++) - pci_write_config_dword(dev, - PCI_BASE_ADDRESS_0 + (i * 4), - pci_resource_start(dev, i)); - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } - return 0; -} -#endif - - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 19)) -#define read_c0_count() read_32bit_cp0_register(CP0_COUNT) -#endif - - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -#ifndef SET_MODULE_OWNER -#define SET_MODULE_OWNER(dev) do {} while (0) -#define OLD_MOD_INC_USE_COUNT MOD_INC_USE_COUNT -#define OLD_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT -#else -#define OLD_MOD_INC_USE_COUNT do {} while (0) -#define OLD_MOD_DEC_USE_COUNT do {} while (0) -#endif -#else -#ifndef SET_MODULE_OWNER -#define SET_MODULE_OWNER(dev) do {} while (0) -#endif -#ifndef MOD_INC_USE_COUNT -#define MOD_INC_USE_COUNT do {} while (0) -#endif -#ifndef MOD_DEC_USE_COUNT -#define MOD_DEC_USE_COUNT do {} while (0) -#endif -#define OLD_MOD_INC_USE_COUNT MOD_INC_USE_COUNT -#define OLD_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT -#endif - -#ifndef SET_NETDEV_DEV -#define SET_NETDEV_DEV(net, pdev) do {} while (0) -#endif - -#ifndef HAVE_FREE_NETDEV -#define free_netdev(dev) kfree(dev) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) - -#define af_packet_priv data -#endif - - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11) -#define DRV_SUSPEND_STATE_TYPE pm_message_t -#else -#define DRV_SUSPEND_STATE_TYPE uint32 -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) -#define CHECKSUM_HW CHECKSUM_PARTIAL -#endif - -typedef struct { - void *parent; - struct task_struct *p_task; - long thr_pid; - int prio; - struct semaphore sema; - int terminated; - struct completion completed; -} tsk_ctl_t; - - - - -#ifdef DHD_DEBUG -#define DBG_THR(x) printk x -#else -#define DBG_THR(x) -#endif - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) -#define SMP_RD_BARRIER_DEPENDS(x) smp_read_barrier_depends(x) -#else -#define SMP_RD_BARRIER_DEPENDS(x) smp_rmb(x) -#endif - - -#define PROC_START(thread_func, owner, tsk_ctl, flags) \ -{ \ - sema_init(&((tsk_ctl)->sema), 0); \ - init_completion(&((tsk_ctl)->completed)); \ - (tsk_ctl)->parent = owner; \ - (tsk_ctl)->terminated = FALSE; \ - (tsk_ctl)->thr_pid = kernel_thread(thread_func, tsk_ctl, flags); \ - DBG_THR(("%s thr:%lx created\n", __FUNCTION__, (tsk_ctl)->thr_pid)); \ - if ((tsk_ctl)->thr_pid > 0) \ - wait_for_completion(&((tsk_ctl)->completed)); \ - DBG_THR(("%s thr:%lx started\n", __FUNCTION__, (tsk_ctl)->thr_pid)); \ -} - -#define PROC_STOP(tsk_ctl) \ -{ \ - (tsk_ctl)->terminated = TRUE; \ - smp_wmb(); \ - up(&((tsk_ctl)->sema)); \ - wait_for_completion(&((tsk_ctl)->completed)); \ - DBG_THR(("%s thr:%lx terminated OK\n", __FUNCTION__, (tsk_ctl)->thr_pid)); \ - (tsk_ctl)->thr_pid = -1; \ -} - - - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) -#define KILL_PROC(nr, sig) \ -{ \ -struct task_struct *tsk; \ -struct pid *pid; \ -pid = find_get_pid((pid_t)nr); \ -tsk = pid_task(pid, PIDTYPE_PID); \ -if (tsk) send_sig(sig, tsk, 1); \ -} -#else -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) && (LINUX_VERSION_CODE <= \ - KERNEL_VERSION(2, 6, 30)) -#define KILL_PROC(pid, sig) \ -{ \ - struct task_struct *tsk; \ - tsk = find_task_by_vpid(pid); \ - if (tsk) send_sig(sig, tsk, 1); \ -} -#else -#define KILL_PROC(pid, sig) \ -{ \ - kill_proc(pid, sig, 1); \ -} -#endif -#endif - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) -#include <linux/time.h> -#include <linux/wait.h> -#else -#include <linux/sched.h> - -#define __wait_event_interruptible_timeout(wq, condition, ret) \ -do { \ - wait_queue_t __wait; \ - init_waitqueue_entry(&__wait, current); \ - \ - add_wait_queue(&wq, &__wait); \ - for (;;) { \ - set_current_state(TASK_INTERRUPTIBLE); \ - if (condition) \ - break; \ - if (!signal_pending(current)) { \ - ret = schedule_timeout(ret); \ - if (!ret) \ - break; \ - continue; \ - } \ - ret = -ERESTARTSYS; \ - break; \ - } \ - current->state = TASK_RUNNING; \ - remove_wait_queue(&wq, &__wait); \ -} while (0) - -#define wait_event_interruptible_timeout(wq, condition, timeout) \ -({ \ - long __ret = timeout; \ - if (!(condition)) \ - __wait_event_interruptible_timeout(wq, condition, __ret); \ - __ret; \ -}) - -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -#define DEV_PRIV(dev) (dev->priv) -#else -#define DEV_PRIV(dev) netdev_priv(dev) -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) -#define WL_ISR(i, d, p) wl_isr((i), (d)) -#else -#define WL_ISR(i, d, p) wl_isr((i), (d), (p)) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) -#define netdev_priv(dev) dev->priv -#endif - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/miniopt.h b/drivers/net/wireless/bcmdhd/src/include/miniopt.h deleted file mode 100644 index 055ba92..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/miniopt.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Command line options parser. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * $Id: miniopt.h 241182 2011-02-17 21:50:03Z $ - */ - - -#ifndef MINI_OPT_H -#define MINI_OPT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* ---- Include Files ---------------------------------------------------- */ -/* ---- Constants and Types ---------------------------------------------- */ - -#define MINIOPT_MAXKEY 128 /* Max options */ -typedef struct miniopt { - - /* These are persistent after miniopt_init() */ - const char* name; /* name for prompt in error strings */ - const char* flags; /* option chars that take no args */ - bool longflags; /* long options may be flags */ - bool opt_end; /* at end of options (passed a "--") */ - - /* These are per-call to miniopt() */ - - int consumed; /* number of argv entries cosumed in - * the most recent call to miniopt() - */ - bool positional; - bool good_int; /* 'val' member is the result of a sucessful - * strtol conversion of the option value - */ - char opt; - char key[MINIOPT_MAXKEY]; - char* valstr; /* positional param, or value for the option, - * or null if the option had - * no accompanying value - */ - uint uval; /* strtol translation of valstr */ - int val; /* strtol translation of valstr */ -} miniopt_t; - -void miniopt_init(miniopt_t *t, const char* name, const char* flags, bool longflags); -int miniopt(miniopt_t *t, char **argv); - - -/* ---- Variable Externs ------------------------------------------------- */ -/* ---- Function Prototypes ---------------------------------------------- */ - - -#ifdef __cplusplus - } -#endif - -#endif /* MINI_OPT_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/msgtrace.h b/drivers/net/wireless/bcmdhd/src/include/msgtrace.h deleted file mode 100644 index 348f62d..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/msgtrace.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Trace messages sent over HBUS - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: msgtrace.h 281527 2011-09-02 17:12:53Z $ - */ - -#ifndef _MSGTRACE_H -#define _MSGTRACE_H - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - - -/* This marks the start of a packed structure section. */ -#include <packed_section_start.h> - -#define MSGTRACE_VERSION 1 - -/* Message trace header */ -typedef BWL_PRE_PACKED_STRUCT struct msgtrace_hdr { - uint8 version; - uint8 spare; - uint16 len; /* Len of the trace */ - uint32 seqnum; /* Sequence number of message. Useful if the messsage has been lost - * because of DMA error or a bus reset (ex: SDIO Func2) - */ - uint32 discarded_bytes; /* Number of discarded bytes because of trace overflow */ - uint32 discarded_printf; /* Number of discarded printf because of trace overflow */ -} BWL_POST_PACKED_STRUCT msgtrace_hdr_t; - -#define MSGTRACE_HDRLEN sizeof(msgtrace_hdr_t) - -/* The hbus driver generates traces when sending a trace message. This causes endless traces. - * This flag must be set to TRUE in any hbus traces. The flag is reset in the function msgtrace_put. - * This prevents endless traces but generates hasardous lost of traces only in bus device code. - * It is recommendat to set this flag in macro SD_TRACE but not in SD_ERROR for avoiding missing - * hbus error traces. hbus error trace should not generates endless traces. - */ -extern bool msgtrace_hbus_trace; - -typedef void (*msgtrace_func_send_t)(void *hdl1, void *hdl2, uint8 *hdr, - uint16 hdrlen, uint8 *buf, uint16 buflen); -extern void msgtrace_start(void); -extern void msgtrace_stop(void); -extern void msgtrace_sent(void); -extern void msgtrace_put(char *buf, int count); -extern void msgtrace_init(void *hdl1, void *hdl2, msgtrace_func_send_t func_send); -extern bool msgtrace_event_enabled(void); - -/* This marks the end of a packed structure section. */ -#include <packed_section_end.h> - -#endif /* _MSGTRACE_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/osl.h b/drivers/net/wireless/bcmdhd/src/include/osl.h deleted file mode 100644 index 85bd25b..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/osl.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * OS Abstraction Layer - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: osl.h 301926 2011-12-09 02:00:46Z $ - */ - -#ifndef _osl_h_ -#define _osl_h_ - - -typedef struct osl_info osl_t; -typedef struct osl_dmainfo osldma_t; - -#define OSL_PKTTAG_SZ 32 - - -typedef void (*pktfree_cb_fn_t)(void *ctx, void *pkt, unsigned int status); - - -typedef unsigned int (*osl_rreg_fn_t)(void *ctx, volatile void *reg, unsigned int size); -typedef void (*osl_wreg_fn_t)(void *ctx, volatile void *reg, unsigned int val, unsigned int size); - - -#include <linux_osl.h> - -#ifndef PKTDBG_TRACE -#define PKTDBG_TRACE(osh, pkt, bit) -#endif - -#define PKTCTFMAP(osh, p) - - - -#define SET_REG(osh, r, mask, val) W_REG((osh), (r), ((R_REG((osh), r) & ~(mask)) | (val))) - -#ifndef AND_REG -#define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) -#endif - -#ifndef OR_REG -#define OR_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) | (v)) -#endif - -#if !defined(OSL_SYSUPTIME) -#define OSL_SYSUPTIME() (0) -#define OSL_SYSUPTIME_SUPPORT FALSE -#else -#define OSL_SYSUPTIME_SUPPORT TRUE -#endif - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/packed_section_end.h b/drivers/net/wireless/bcmdhd/src/include/packed_section_end.h deleted file mode 100644 index 9b7ff57..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/packed_section_end.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Declare directives for structure packing. No padding will be provided - * between the members of packed structures, and therefore, there is no - * guarantee that structure members will be aligned. - * - * Declaring packed structures is compiler specific. In order to handle all - * cases, packed structures should be delared as: - * - * #include <packed_section_start.h> - * - * typedef BWL_PRE_PACKED_STRUCT struct foobar_t { - * some_struct_members; - * } BWL_POST_PACKED_STRUCT foobar_t; - * - * #include <packed_section_end.h> - * - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * $Id: packed_section_end.h 241182 2011-02-17 21:50:03Z $ - */ - - - -#ifdef BWL_PACKED_SECTION - #undef BWL_PACKED_SECTION -#else - #error "BWL_PACKED_SECTION is NOT defined!" -#endif - - - - - -#undef BWL_PRE_PACKED_STRUCT -#undef BWL_POST_PACKED_STRUCT diff --git a/drivers/net/wireless/bcmdhd/src/include/packed_section_start.h b/drivers/net/wireless/bcmdhd/src/include/packed_section_start.h deleted file mode 100644 index 7aea56f..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/packed_section_start.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Declare directives for structure packing. No padding will be provided - * between the members of packed structures, and therefore, there is no - * guarantee that structure members will be aligned. - * - * Declaring packed structures is compiler specific. In order to handle all - * cases, packed structures should be delared as: - * - * #include <packed_section_start.h> - * - * typedef BWL_PRE_PACKED_STRUCT struct foobar_t { - * some_struct_members; - * } BWL_POST_PACKED_STRUCT foobar_t; - * - * #include <packed_section_end.h> - * - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * $Id: packed_section_start.h 286783 2011-09-29 06:18:57Z $ - */ - - - -#ifdef BWL_PACKED_SECTION - #error "BWL_PACKED_SECTION is already defined!" -#else - #define BWL_PACKED_SECTION -#endif - - - - - -#if defined(__GNUC__) || defined(__lint) - #define BWL_PRE_PACKED_STRUCT - #define BWL_POST_PACKED_STRUCT __attribute__ ((packed)) -#elif defined(__CC_ARM) - #define BWL_PRE_PACKED_STRUCT __packed - #define BWL_POST_PACKED_STRUCT -#else - #error "Unknown compiler!" -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/pcicfg.h b/drivers/net/wireless/bcmdhd/src/include/pcicfg.h deleted file mode 100644 index 8a5d996..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/pcicfg.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * pcicfg.h: PCI configuration constants and structures. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: pcicfg.h 296577 2011-11-16 03:09:51Z $ - */ - -#ifndef _h_pcicfg_ -#define _h_pcicfg_ - - -#define PCI_CFG_VID 0 -#define PCI_CFG_DID 2 -#define PCI_CFG_CMD 4 -#define PCI_CFG_STAT 6 -#define PCI_CFG_REV 8 -#define PCI_CFG_PROGIF 9 -#define PCI_CFG_SUBCL 0xa -#define PCI_CFG_BASECL 0xb -#define PCI_CFG_CLSZ 0xc -#define PCI_CFG_LATTIM 0xd -#define PCI_CFG_HDR 0xe -#define PCI_CFG_BIST 0xf -#define PCI_CFG_BAR0 0x10 -#define PCI_CFG_BAR1 0x14 -#define PCI_CFG_BAR2 0x18 -#define PCI_CFG_BAR3 0x1c -#define PCI_CFG_BAR4 0x20 -#define PCI_CFG_BAR5 0x24 -#define PCI_CFG_CIS 0x28 -#define PCI_CFG_SVID 0x2c -#define PCI_CFG_SSID 0x2e -#define PCI_CFG_ROMBAR 0x30 -#define PCI_CFG_CAPPTR 0x34 -#define PCI_CFG_INT 0x3c -#define PCI_CFG_PIN 0x3d -#define PCI_CFG_MINGNT 0x3e -#define PCI_CFG_MAXLAT 0x3f -#define PCI_BAR0_WIN 0x80 -#define PCI_BAR1_WIN 0x84 -#define PCI_SPROM_CONTROL 0x88 -#define PCI_BAR1_CONTROL 0x8c -#define PCI_INT_STATUS 0x90 -#define PCI_INT_MASK 0x94 -#define PCI_TO_SB_MB 0x98 -#define PCI_BACKPLANE_ADDR 0xa0 -#define PCI_BACKPLANE_DATA 0xa4 -#define PCI_CLK_CTL_ST 0xa8 -#define PCI_BAR0_WIN2 0xac -#define PCI_GPIO_IN 0xb0 -#define PCI_GPIO_OUT 0xb4 -#define PCI_GPIO_OUTEN 0xb8 - -#define PCI_BAR0_SHADOW_OFFSET (2 * 1024) -#define PCI_BAR0_SPROM_OFFSET (4 * 1024) -#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) -#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) - -#define PCIE2_BAR0_WIN2 0x70 -#define PCIE2_BAR0_CORE2_WIN 0x74 -#define PCIE2_BAR0_CORE2_WIN2 0x78 - -#define PCI_BAR0_WINSZ (16 * 1024) - -#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) -#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) -#define PCI_16KBB0_WINSZ (16 * 1024) - - -#define PCI_CONFIG_SPACE_SIZE 256 -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/802.11.h b/drivers/net/wireless/bcmdhd/src/include/proto/802.11.h deleted file mode 100755 index 23d55d8..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/802.11.h +++ /dev/null @@ -1,2240 +0,0 @@ -/* - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * Fundamental types and constants relating to 802.11 - * - * $Id: 802.11.h 297130 2011-11-18 01:41:36Z $ - */ - -#ifndef _802_11_H_ -#define _802_11_H_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - -#ifndef _NET_ETHERNET_H_ -#include <proto/ethernet.h> -#endif - -#include <proto/wpa.h> - - -#include <packed_section_start.h> - - -#define DOT11_TU_TO_US 1024 - - -#define DOT11_A3_HDR_LEN 24 -#define DOT11_A4_HDR_LEN 30 -#define DOT11_MAC_HDR_LEN DOT11_A3_HDR_LEN -#define DOT11_FCS_LEN 4 -#define DOT11_ICV_LEN 4 -#define DOT11_ICV_AES_LEN 8 -#define DOT11_QOS_LEN 2 -#define DOT11_HTC_LEN 4 - -#define DOT11_KEY_INDEX_SHIFT 6 -#define DOT11_IV_LEN 4 -#define DOT11_IV_TKIP_LEN 8 -#define DOT11_IV_AES_OCB_LEN 4 -#define DOT11_IV_AES_CCM_LEN 8 -#define DOT11_IV_MAX_LEN 8 - - -#define DOT11_MAX_MPDU_BODY_LEN 2304 - -#define DOT11_MAX_MPDU_LEN (DOT11_A4_HDR_LEN + \ - DOT11_QOS_LEN + \ - DOT11_IV_AES_CCM_LEN + \ - DOT11_MAX_MPDU_BODY_LEN + \ - DOT11_ICV_LEN + \ - DOT11_FCS_LEN) - -#define DOT11_MAX_SSID_LEN 32 - - -#define DOT11_DEFAULT_RTS_LEN 2347 -#define DOT11_MAX_RTS_LEN 2347 - - -#define DOT11_MIN_FRAG_LEN 256 -#define DOT11_MAX_FRAG_LEN 2346 -#define DOT11_DEFAULT_FRAG_LEN 2346 - - -#define DOT11_MIN_BEACON_PERIOD 1 -#define DOT11_MAX_BEACON_PERIOD 0xFFFF - - -#define DOT11_MIN_DTIM_PERIOD 1 -#define DOT11_MAX_DTIM_PERIOD 0xFF - - -#define DOT11_LLC_SNAP_HDR_LEN 8 -#define DOT11_OUI_LEN 3 -BWL_PRE_PACKED_STRUCT struct dot11_llc_snap_header { - uint8 dsap; - uint8 ssap; - uint8 ctl; - uint8 oui[DOT11_OUI_LEN]; - uint16 type; -} BWL_POST_PACKED_STRUCT; - - -#define RFC1042_HDR_LEN (ETHER_HDR_LEN + DOT11_LLC_SNAP_HDR_LEN) - - - -BWL_PRE_PACKED_STRUCT struct dot11_header { - uint16 fc; - uint16 durid; - struct ether_addr a1; - struct ether_addr a2; - struct ether_addr a3; - uint16 seq; - struct ether_addr a4; -} BWL_POST_PACKED_STRUCT; - - - -BWL_PRE_PACKED_STRUCT struct dot11_rts_frame { - uint16 fc; - uint16 durid; - struct ether_addr ra; - struct ether_addr ta; -} BWL_POST_PACKED_STRUCT; -#define DOT11_RTS_LEN 16 - -BWL_PRE_PACKED_STRUCT struct dot11_cts_frame { - uint16 fc; - uint16 durid; - struct ether_addr ra; -} BWL_POST_PACKED_STRUCT; -#define DOT11_CTS_LEN 10 - -BWL_PRE_PACKED_STRUCT struct dot11_ack_frame { - uint16 fc; - uint16 durid; - struct ether_addr ra; -} BWL_POST_PACKED_STRUCT; -#define DOT11_ACK_LEN 10 - -BWL_PRE_PACKED_STRUCT struct dot11_ps_poll_frame { - uint16 fc; - uint16 durid; - struct ether_addr bssid; - struct ether_addr ta; -} BWL_POST_PACKED_STRUCT; -#define DOT11_PS_POLL_LEN 16 - -BWL_PRE_PACKED_STRUCT struct dot11_cf_end_frame { - uint16 fc; - uint16 durid; - struct ether_addr ra; - struct ether_addr bssid; -} BWL_POST_PACKED_STRUCT; -#define DOT11_CS_END_LEN 16 - - -BWL_PRE_PACKED_STRUCT struct dot11_action_wifi_vendor_specific { - uint8 category; - uint8 OUI[3]; - uint8 type; - uint8 subtype; - uint8 data[1040]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_action_wifi_vendor_specific dot11_action_wifi_vendor_specific_t; - - -BWL_PRE_PACKED_STRUCT struct dot11_action_vs_frmhdr { - uint8 category; - uint8 OUI[3]; - uint8 type; - uint8 subtype; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_action_vs_frmhdr dot11_action_vs_frmhdr_t; -#define DOT11_ACTION_VS_HDR_LEN 6 - -#define BCM_ACTION_OUI_BYTE0 0x00 -#define BCM_ACTION_OUI_BYTE1 0x90 -#define BCM_ACTION_OUI_BYTE2 0x4c - - -#define DOT11_BA_CTL_POLICY_NORMAL 0x0000 -#define DOT11_BA_CTL_POLICY_NOACK 0x0001 -#define DOT11_BA_CTL_POLICY_MASK 0x0001 - -#define DOT11_BA_CTL_MTID 0x0002 -#define DOT11_BA_CTL_COMPRESSED 0x0004 - -#define DOT11_BA_CTL_NUMMSDU_MASK 0x0FC0 -#define DOT11_BA_CTL_NUMMSDU_SHIFT 6 - -#define DOT11_BA_CTL_TID_MASK 0xF000 -#define DOT11_BA_CTL_TID_SHIFT 12 - - -BWL_PRE_PACKED_STRUCT struct dot11_ctl_header { - uint16 fc; - uint16 durid; - struct ether_addr ra; - struct ether_addr ta; -} BWL_POST_PACKED_STRUCT; -#define DOT11_CTL_HDR_LEN 16 - - -BWL_PRE_PACKED_STRUCT struct dot11_bar { - uint16 bar_control; - uint16 seqnum; -} BWL_POST_PACKED_STRUCT; -#define DOT11_BAR_LEN 4 - -#define DOT11_BA_BITMAP_LEN 128 -#define DOT11_BA_CMP_BITMAP_LEN 8 - -BWL_PRE_PACKED_STRUCT struct dot11_ba { - uint16 ba_control; - uint16 seqnum; - uint8 bitmap[DOT11_BA_BITMAP_LEN]; -} BWL_POST_PACKED_STRUCT; -#define DOT11_BA_LEN 4 - - -BWL_PRE_PACKED_STRUCT struct dot11_management_header { - uint16 fc; - uint16 durid; - struct ether_addr da; - struct ether_addr sa; - struct ether_addr bssid; - uint16 seq; -} BWL_POST_PACKED_STRUCT; -#define DOT11_MGMT_HDR_LEN 24 - - - -BWL_PRE_PACKED_STRUCT struct dot11_bcn_prb { - uint32 timestamp[2]; - uint16 beacon_interval; - uint16 capability; -} BWL_POST_PACKED_STRUCT; -#define DOT11_BCN_PRB_LEN 12 -#define DOT11_BCN_PRB_FIXED_LEN 12 - -BWL_PRE_PACKED_STRUCT struct dot11_auth { - uint16 alg; - uint16 seq; - uint16 status; -} BWL_POST_PACKED_STRUCT; -#define DOT11_AUTH_FIXED_LEN 6 - -BWL_PRE_PACKED_STRUCT struct dot11_assoc_req { - uint16 capability; - uint16 listen; -} BWL_POST_PACKED_STRUCT; -#define DOT11_ASSOC_REQ_FIXED_LEN 4 - -BWL_PRE_PACKED_STRUCT struct dot11_reassoc_req { - uint16 capability; - uint16 listen; - struct ether_addr ap; -} BWL_POST_PACKED_STRUCT; -#define DOT11_REASSOC_REQ_FIXED_LEN 10 - -BWL_PRE_PACKED_STRUCT struct dot11_assoc_resp { - uint16 capability; - uint16 status; - uint16 aid; -} BWL_POST_PACKED_STRUCT; -#define DOT11_ASSOC_RESP_FIXED_LEN 6 - -BWL_PRE_PACKED_STRUCT struct dot11_action_measure { - uint8 category; - uint8 action; - uint8 token; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -#define DOT11_ACTION_MEASURE_LEN 3 - -BWL_PRE_PACKED_STRUCT struct dot11_action_ht_ch_width { - uint8 category; - uint8 action; - uint8 ch_width; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct dot11_action_ht_mimops { - uint8 category; - uint8 action; - uint8 control; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct dot11_action_sa_query { - uint8 category; - uint8 action; - uint16 id; -} BWL_POST_PACKED_STRUCT; - -#define SM_PWRSAVE_ENABLE 1 -#define SM_PWRSAVE_MODE 2 - - -BWL_PRE_PACKED_STRUCT struct dot11_power_cnst { - uint8 id; - uint8 len; - uint8 power; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_power_cnst dot11_power_cnst_t; - -BWL_PRE_PACKED_STRUCT struct dot11_power_cap { - uint8 min; - uint8 max; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_power_cap dot11_power_cap_t; - -BWL_PRE_PACKED_STRUCT struct dot11_tpc_rep { - uint8 id; - uint8 len; - uint8 tx_pwr; - uint8 margin; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_tpc_rep dot11_tpc_rep_t; -#define DOT11_MNG_IE_TPC_REPORT_LEN 2 - -BWL_PRE_PACKED_STRUCT struct dot11_supp_channels { - uint8 id; - uint8 len; - uint8 first_channel; - uint8 num_channels; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_supp_channels dot11_supp_channels_t; - - -BWL_PRE_PACKED_STRUCT struct dot11_extch { - uint8 id; - uint8 len; - uint8 extch; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_extch dot11_extch_ie_t; - -BWL_PRE_PACKED_STRUCT struct dot11_brcm_extch { - uint8 id; - uint8 len; - uint8 oui[3]; - uint8 type; - uint8 extch; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_brcm_extch dot11_brcm_extch_ie_t; - -#define BRCM_EXTCH_IE_LEN 5 -#define BRCM_EXTCH_IE_TYPE 53 -#define DOT11_EXTCH_IE_LEN 1 -#define DOT11_EXT_CH_MASK 0x03 -#define DOT11_EXT_CH_UPPER 0x01 -#define DOT11_EXT_CH_LOWER 0x03 -#define DOT11_EXT_CH_NONE 0x00 - -BWL_PRE_PACKED_STRUCT struct dot11_action_frmhdr { - uint8 category; - uint8 action; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -#define DOT11_ACTION_FRMHDR_LEN 2 - - -BWL_PRE_PACKED_STRUCT struct dot11_channel_switch { - uint8 id; - uint8 len; - uint8 mode; - uint8 channel; - uint8 count; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_channel_switch dot11_chan_switch_ie_t; - -#define DOT11_SWITCH_IE_LEN 3 - -#define DOT11_CSA_MODE_ADVISORY 0 -#define DOT11_CSA_MODE_NO_TX 1 - -BWL_PRE_PACKED_STRUCT struct dot11_action_switch_channel { - uint8 category; - uint8 action; - dot11_chan_switch_ie_t chan_switch_ie; - dot11_brcm_extch_ie_t extch_ie; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct dot11_csa_body { - uint8 mode; - uint8 reg; - uint8 channel; - uint8 count; -} BWL_POST_PACKED_STRUCT; - - -BWL_PRE_PACKED_STRUCT struct dot11_ext_csa { - uint8 id; - uint8 len; - struct dot11_csa_body b; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_ext_csa dot11_ext_csa_ie_t; -#define DOT11_EXT_CSA_IE_LEN 4 - -BWL_PRE_PACKED_STRUCT struct dot11_action_ext_csa { - uint8 category; - uint8 action; - dot11_ext_csa_ie_t chan_switch_ie; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct dot11y_action_ext_csa { - uint8 category; - uint8 action; - struct dot11_csa_body b; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct dot11_obss_coex { - uint8 id; - uint8 len; - uint8 info; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_obss_coex dot11_obss_coex_t; -#define DOT11_OBSS_COEXINFO_LEN 1 - -#define DOT11_OBSS_COEX_INFO_REQ 0x01 -#define DOT11_OBSS_COEX_40MHZ_INTOLERANT 0x02 -#define DOT11_OBSS_COEX_20MHZ_WIDTH_REQ 0x04 - -BWL_PRE_PACKED_STRUCT struct dot11_obss_chanlist { - uint8 id; - uint8 len; - uint8 regclass; - uint8 chanlist[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_obss_chanlist dot11_obss_chanlist_t; -#define DOT11_OBSS_CHANLIST_FIXED_LEN 1 - -BWL_PRE_PACKED_STRUCT struct dot11_extcap_ie { - uint8 id; - uint8 len; - uint8 cap[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_extcap_ie dot11_extcap_ie_t; - -#define DOT11_EXTCAP_LEN_MAX 7 -#define DOT11_EXTCAP_LEN_COEX 1 -#define DOT11_EXTCAP_LEN_BT 3 -#define DOT11_EXTCAP_LEN_IW 4 -#define DOT11_EXTCAP_LEN_SI 6 - -#define DOT11_EXTCAP_LEN_TDLS 5 -BWL_PRE_PACKED_STRUCT struct dot11_extcap { - uint8 extcap[DOT11_EXTCAP_LEN_TDLS]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_extcap dot11_extcap_t; - - -#define TDLS_CAP_TDLS 37 -#define TDLS_CAP_PU_BUFFER_STA 28 -#define TDLS_CAP_PEER_PSM 20 -#define TDLS_CAP_CH_SW 30 -#define TDLS_CAP_PROH 38 -#define TDLS_CAP_CH_SW_PROH 39 - -#define TDLS_CAP_MAX_BIT 39 - - - -#define DOT11_MEASURE_TYPE_BASIC 0 -#define DOT11_MEASURE_TYPE_CCA 1 -#define DOT11_MEASURE_TYPE_RPI 2 -#define DOT11_MEASURE_TYPE_CHLOAD 3 -#define DOT11_MEASURE_TYPE_NOISE 4 -#define DOT11_MEASURE_TYPE_BEACON 5 -#define DOT11_MEASURE_TYPE_FRAME 6 -#define DOT11_MEASURE_TYPE_STATS 7 -#define DOT11_MEASURE_TYPE_LCI 8 -#define DOT11_MEASURE_TYPE_TXSTREAM 9 -#define DOT11_MEASURE_TYPE_PAUSE 255 - - -#define DOT11_MEASURE_MODE_PARALLEL (1<<0) -#define DOT11_MEASURE_MODE_ENABLE (1<<1) -#define DOT11_MEASURE_MODE_REQUEST (1<<2) -#define DOT11_MEASURE_MODE_REPORT (1<<3) -#define DOT11_MEASURE_MODE_DUR (1<<4) - -#define DOT11_MEASURE_MODE_LATE (1<<0) -#define DOT11_MEASURE_MODE_INCAPABLE (1<<1) -#define DOT11_MEASURE_MODE_REFUSED (1<<2) - -#define DOT11_MEASURE_BASIC_MAP_BSS ((uint8)(1<<0)) -#define DOT11_MEASURE_BASIC_MAP_OFDM ((uint8)(1<<1)) -#define DOT11_MEASURE_BASIC_MAP_UKNOWN ((uint8)(1<<2)) -#define DOT11_MEASURE_BASIC_MAP_RADAR ((uint8)(1<<3)) -#define DOT11_MEASURE_BASIC_MAP_UNMEAS ((uint8)(1<<4)) - -BWL_PRE_PACKED_STRUCT struct dot11_meas_req { - uint8 id; - uint8 len; - uint8 token; - uint8 mode; - uint8 type; - uint8 channel; - uint8 start_time[8]; - uint16 duration; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_meas_req dot11_meas_req_t; -#define DOT11_MNG_IE_MREQ_LEN 14 - -#define DOT11_MNG_IE_MREQ_FIXED_LEN 3 - -BWL_PRE_PACKED_STRUCT struct dot11_meas_rep { - uint8 id; - uint8 len; - uint8 token; - uint8 mode; - uint8 type; - BWL_PRE_PACKED_STRUCT union - { - BWL_PRE_PACKED_STRUCT struct { - uint8 channel; - uint8 start_time[8]; - uint16 duration; - uint8 map; - } BWL_POST_PACKED_STRUCT basic; - uint8 data[1]; - } BWL_POST_PACKED_STRUCT rep; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_meas_rep dot11_meas_rep_t; - - -#define DOT11_MNG_IE_MREP_FIXED_LEN 3 - -BWL_PRE_PACKED_STRUCT struct dot11_meas_rep_basic { - uint8 channel; - uint8 start_time[8]; - uint16 duration; - uint8 map; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_meas_rep_basic dot11_meas_rep_basic_t; -#define DOT11_MEASURE_BASIC_REP_LEN 12 - -BWL_PRE_PACKED_STRUCT struct dot11_quiet { - uint8 id; - uint8 len; - uint8 count; - uint8 period; - uint16 duration; - uint16 offset; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_quiet dot11_quiet_t; - -BWL_PRE_PACKED_STRUCT struct chan_map_tuple { - uint8 channel; - uint8 map; -} BWL_POST_PACKED_STRUCT; -typedef struct chan_map_tuple chan_map_tuple_t; - -BWL_PRE_PACKED_STRUCT struct dot11_ibss_dfs { - uint8 id; - uint8 len; - uint8 eaddr[ETHER_ADDR_LEN]; - uint8 interval; - chan_map_tuple_t map[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_ibss_dfs dot11_ibss_dfs_t; - - -#define WME_OUI "\x00\x50\xf2" -#define WME_OUI_LEN 3 -#define WME_OUI_TYPE 2 -#define WME_TYPE 2 -#define WME_SUBTYPE_IE 0 -#define WME_SUBTYPE_PARAM_IE 1 -#define WME_SUBTYPE_TSPEC 2 -#define WME_VER 1 - - -#define AC_BE 0 -#define AC_BK 1 -#define AC_VI 2 -#define AC_VO 3 -#define AC_COUNT 4 - -typedef uint8 ac_bitmap_t; - -#define AC_BITMAP_NONE 0x0 -#define AC_BITMAP_ALL 0xf -#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) -#define AC_BITMAP_SET(ab, ac) (((ab) |= (1 << (ac)))) -#define AC_BITMAP_RESET(ab, ac) (((ab) &= ~(1 << (ac)))) - - -BWL_PRE_PACKED_STRUCT struct wme_ie { - uint8 oui[3]; - uint8 type; - uint8 subtype; - uint8 version; - uint8 qosinfo; -} BWL_POST_PACKED_STRUCT; -typedef struct wme_ie wme_ie_t; -#define WME_IE_LEN 7 - -BWL_PRE_PACKED_STRUCT struct edcf_acparam { - uint8 ACI; - uint8 ECW; - uint16 TXOP; -} BWL_POST_PACKED_STRUCT; -typedef struct edcf_acparam edcf_acparam_t; - - -BWL_PRE_PACKED_STRUCT struct wme_param_ie { - uint8 oui[3]; - uint8 type; - uint8 subtype; - uint8 version; - uint8 qosinfo; - uint8 rsvd; - edcf_acparam_t acparam[AC_COUNT]; -} BWL_POST_PACKED_STRUCT; -typedef struct wme_param_ie wme_param_ie_t; -#define WME_PARAM_IE_LEN 24 - - -#define WME_QI_AP_APSD_MASK 0x80 -#define WME_QI_AP_APSD_SHIFT 7 -#define WME_QI_AP_COUNT_MASK 0x0f -#define WME_QI_AP_COUNT_SHIFT 0 - - -#define WME_QI_STA_MAXSPLEN_MASK 0x60 -#define WME_QI_STA_MAXSPLEN_SHIFT 5 -#define WME_QI_STA_APSD_ALL_MASK 0xf -#define WME_QI_STA_APSD_ALL_SHIFT 0 -#define WME_QI_STA_APSD_BE_MASK 0x8 -#define WME_QI_STA_APSD_BE_SHIFT 3 -#define WME_QI_STA_APSD_BK_MASK 0x4 -#define WME_QI_STA_APSD_BK_SHIFT 2 -#define WME_QI_STA_APSD_VI_MASK 0x2 -#define WME_QI_STA_APSD_VI_SHIFT 1 -#define WME_QI_STA_APSD_VO_MASK 0x1 -#define WME_QI_STA_APSD_VO_SHIFT 0 - - -#define EDCF_AIFSN_MIN 1 -#define EDCF_AIFSN_MAX 15 -#define EDCF_AIFSN_MASK 0x0f -#define EDCF_ACM_MASK 0x10 -#define EDCF_ACI_MASK 0x60 -#define EDCF_ACI_SHIFT 5 -#define EDCF_AIFSN_SHIFT 12 - - -#define EDCF_ECW_MIN 0 -#define EDCF_ECW_MAX 15 -#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) -#define EDCF_ECWMIN_MASK 0x0f -#define EDCF_ECWMAX_MASK 0xf0 -#define EDCF_ECWMAX_SHIFT 4 - - -#define EDCF_TXOP_MIN 0 -#define EDCF_TXOP_MAX 65535 -#define EDCF_TXOP2USEC(txop) ((txop) << 5) - - -#define NON_EDCF_AC_BE_ACI_STA 0x02 - - -#define EDCF_AC_BE_ACI_STA 0x03 -#define EDCF_AC_BE_ECW_STA 0xA4 -#define EDCF_AC_BE_TXOP_STA 0x0000 -#define EDCF_AC_BK_ACI_STA 0x27 -#define EDCF_AC_BK_ECW_STA 0xA4 -#define EDCF_AC_BK_TXOP_STA 0x0000 -#define EDCF_AC_VI_ACI_STA 0x42 -#define EDCF_AC_VI_ECW_STA 0x43 -#define EDCF_AC_VI_TXOP_STA 0x005e -#define EDCF_AC_VO_ACI_STA 0x62 -#define EDCF_AC_VO_ECW_STA 0x32 -#define EDCF_AC_VO_TXOP_STA 0x002f - - -#define EDCF_AC_BE_ACI_AP 0x03 -#define EDCF_AC_BE_ECW_AP 0x64 -#define EDCF_AC_BE_TXOP_AP 0x0000 -#define EDCF_AC_BK_ACI_AP 0x27 -#define EDCF_AC_BK_ECW_AP 0xA4 -#define EDCF_AC_BK_TXOP_AP 0x0000 -#define EDCF_AC_VI_ACI_AP 0x41 -#define EDCF_AC_VI_ECW_AP 0x43 -#define EDCF_AC_VI_TXOP_AP 0x005e -#define EDCF_AC_VO_ACI_AP 0x61 -#define EDCF_AC_VO_ECW_AP 0x32 -#define EDCF_AC_VO_TXOP_AP 0x002f - - -BWL_PRE_PACKED_STRUCT struct edca_param_ie { - uint8 qosinfo; - uint8 rsvd; - edcf_acparam_t acparam[AC_COUNT]; -} BWL_POST_PACKED_STRUCT; -typedef struct edca_param_ie edca_param_ie_t; -#define EDCA_PARAM_IE_LEN 18 - - -BWL_PRE_PACKED_STRUCT struct qos_cap_ie { - uint8 qosinfo; -} BWL_POST_PACKED_STRUCT; -typedef struct qos_cap_ie qos_cap_ie_t; - -BWL_PRE_PACKED_STRUCT struct dot11_qbss_load_ie { - uint8 id; - uint8 length; - uint16 station_count; - uint8 channel_utilization; - uint16 aac; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_qbss_load_ie dot11_qbss_load_ie_t; -#define BSS_LOAD_IE_SIZE 7 - - -#define FIXED_MSDU_SIZE 0x8000 -#define MSDU_SIZE_MASK 0x7fff - - - -#define INTEGER_SHIFT 13 -#define FRACTION_MASK 0x1FFF - - -BWL_PRE_PACKED_STRUCT struct dot11_management_notification { - uint8 category; - uint8 action; - uint8 token; - uint8 status; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -#define DOT11_MGMT_NOTIFICATION_LEN 4 - - -BWL_PRE_PACKED_STRUCT struct ti_ie { - uint8 ti_type; - uint32 ti_val; -} BWL_POST_PACKED_STRUCT; -typedef struct ti_ie ti_ie_t; -#define TI_TYPE_REASSOC_DEADLINE 1 -#define TI_TYPE_KEY_LIFETIME 2 - - -#define WME_ADDTS_REQUEST 0 -#define WME_ADDTS_RESPONSE 1 -#define WME_DELTS_REQUEST 2 - - -#define WME_ADMISSION_ACCEPTED 0 -#define WME_INVALID_PARAMETERS 1 -#define WME_ADMISSION_REFUSED 3 - - -#define BCN_PRB_SSID(body) ((char*)(body) + DOT11_BCN_PRB_LEN) - - -#define DOT11_OPEN_SYSTEM 0 -#define DOT11_SHARED_KEY 1 -#define DOT11_FAST_BSS 2 -#define DOT11_CHALLENGE_LEN 128 - - -#define FC_PVER_MASK 0x3 -#define FC_PVER_SHIFT 0 -#define FC_TYPE_MASK 0xC -#define FC_TYPE_SHIFT 2 -#define FC_SUBTYPE_MASK 0xF0 -#define FC_SUBTYPE_SHIFT 4 -#define FC_TODS 0x100 -#define FC_TODS_SHIFT 8 -#define FC_FROMDS 0x200 -#define FC_FROMDS_SHIFT 9 -#define FC_MOREFRAG 0x400 -#define FC_MOREFRAG_SHIFT 10 -#define FC_RETRY 0x800 -#define FC_RETRY_SHIFT 11 -#define FC_PM 0x1000 -#define FC_PM_SHIFT 12 -#define FC_MOREDATA 0x2000 -#define FC_MOREDATA_SHIFT 13 -#define FC_WEP 0x4000 -#define FC_WEP_SHIFT 14 -#define FC_ORDER 0x8000 -#define FC_ORDER_SHIFT 15 - - -#define SEQNUM_SHIFT 4 -#define SEQNUM_MAX 0x1000 -#define FRAGNUM_MASK 0xF - - - - -#define FC_TYPE_MNG 0 -#define FC_TYPE_CTL 1 -#define FC_TYPE_DATA 2 - - -#define FC_SUBTYPE_ASSOC_REQ 0 -#define FC_SUBTYPE_ASSOC_RESP 1 -#define FC_SUBTYPE_REASSOC_REQ 2 -#define FC_SUBTYPE_REASSOC_RESP 3 -#define FC_SUBTYPE_PROBE_REQ 4 -#define FC_SUBTYPE_PROBE_RESP 5 -#define FC_SUBTYPE_BEACON 8 -#define FC_SUBTYPE_ATIM 9 -#define FC_SUBTYPE_DISASSOC 10 -#define FC_SUBTYPE_AUTH 11 -#define FC_SUBTYPE_DEAUTH 12 -#define FC_SUBTYPE_ACTION 13 -#define FC_SUBTYPE_ACTION_NOACK 14 - - -#define FC_SUBTYPE_CTL_WRAPPER 7 -#define FC_SUBTYPE_BLOCKACK_REQ 8 -#define FC_SUBTYPE_BLOCKACK 9 -#define FC_SUBTYPE_PS_POLL 10 -#define FC_SUBTYPE_RTS 11 -#define FC_SUBTYPE_CTS 12 -#define FC_SUBTYPE_ACK 13 -#define FC_SUBTYPE_CF_END 14 -#define FC_SUBTYPE_CF_END_ACK 15 - - -#define FC_SUBTYPE_DATA 0 -#define FC_SUBTYPE_DATA_CF_ACK 1 -#define FC_SUBTYPE_DATA_CF_POLL 2 -#define FC_SUBTYPE_DATA_CF_ACK_POLL 3 -#define FC_SUBTYPE_NULL 4 -#define FC_SUBTYPE_CF_ACK 5 -#define FC_SUBTYPE_CF_POLL 6 -#define FC_SUBTYPE_CF_ACK_POLL 7 -#define FC_SUBTYPE_QOS_DATA 8 -#define FC_SUBTYPE_QOS_DATA_CF_ACK 9 -#define FC_SUBTYPE_QOS_DATA_CF_POLL 10 -#define FC_SUBTYPE_QOS_DATA_CF_ACK_POLL 11 -#define FC_SUBTYPE_QOS_NULL 12 -#define FC_SUBTYPE_QOS_CF_POLL 14 -#define FC_SUBTYPE_QOS_CF_ACK_POLL 15 - - -#define FC_SUBTYPE_ANY_QOS(s) (((s) & 8) != 0) -#define FC_SUBTYPE_ANY_NULL(s) (((s) & 4) != 0) -#define FC_SUBTYPE_ANY_CF_POLL(s) (((s) & 2) != 0) -#define FC_SUBTYPE_ANY_CF_ACK(s) (((s) & 1) != 0) - - -#define FC_KIND_MASK (FC_TYPE_MASK | FC_SUBTYPE_MASK) - -#define FC_KIND(t, s) (((t) << FC_TYPE_SHIFT) | ((s) << FC_SUBTYPE_SHIFT)) - -#define FC_SUBTYPE(fc) (((fc) & FC_SUBTYPE_MASK) >> FC_SUBTYPE_SHIFT) -#define FC_TYPE(fc) (((fc) & FC_TYPE_MASK) >> FC_TYPE_SHIFT) - -#define FC_ASSOC_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_REQ) -#define FC_ASSOC_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_RESP) -#define FC_REASSOC_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_REQ) -#define FC_REASSOC_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_RESP) -#define FC_PROBE_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_REQ) -#define FC_PROBE_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_RESP) -#define FC_BEACON FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_BEACON) -#define FC_DISASSOC FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DISASSOC) -#define FC_AUTH FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_AUTH) -#define FC_DEAUTH FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DEAUTH) -#define FC_ACTION FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ACTION) -#define FC_ACTION_NOACK FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ACTION_NOACK) - -#define FC_CTL_WRAPPER FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CTL_WRAPPER) -#define FC_BLOCKACK_REQ FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_BLOCKACK_REQ) -#define FC_BLOCKACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_BLOCKACK) -#define FC_PS_POLL FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_PS_POLL) -#define FC_RTS FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_RTS) -#define FC_CTS FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CTS) -#define FC_ACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_ACK) -#define FC_CF_END FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END) -#define FC_CF_END_ACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END_ACK) - -#define FC_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA) -#define FC_NULL_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_NULL) -#define FC_DATA_CF_ACK FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA_CF_ACK) -#define FC_QOS_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_DATA) -#define FC_QOS_NULL FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_NULL) - - - - -#define QOS_PRIO_SHIFT 0 -#define QOS_PRIO_MASK 0x0007 -#define QOS_PRIO(qos) (((qos) & QOS_PRIO_MASK) >> QOS_PRIO_SHIFT) - - -#define QOS_TID_SHIFT 0 -#define QOS_TID_MASK 0x000f -#define QOS_TID(qos) (((qos) & QOS_TID_MASK) >> QOS_TID_SHIFT) - - -#define QOS_EOSP_SHIFT 4 -#define QOS_EOSP_MASK 0x0010 -#define QOS_EOSP(qos) (((qos) & QOS_EOSP_MASK) >> QOS_EOSP_SHIFT) - - -#define QOS_ACK_NORMAL_ACK 0 -#define QOS_ACK_NO_ACK 1 -#define QOS_ACK_NO_EXP_ACK 2 -#define QOS_ACK_BLOCK_ACK 3 -#define QOS_ACK_SHIFT 5 -#define QOS_ACK_MASK 0x0060 -#define QOS_ACK(qos) (((qos) & QOS_ACK_MASK) >> QOS_ACK_SHIFT) - - -#define QOS_AMSDU_SHIFT 7 -#define QOS_AMSDU_MASK 0x0080 - - - - - - -#define DOT11_MNG_AUTH_ALGO_LEN 2 -#define DOT11_MNG_AUTH_SEQ_LEN 2 -#define DOT11_MNG_BEACON_INT_LEN 2 -#define DOT11_MNG_CAP_LEN 2 -#define DOT11_MNG_AP_ADDR_LEN 6 -#define DOT11_MNG_LISTEN_INT_LEN 2 -#define DOT11_MNG_REASON_LEN 2 -#define DOT11_MNG_AID_LEN 2 -#define DOT11_MNG_STATUS_LEN 2 -#define DOT11_MNG_TIMESTAMP_LEN 8 - - -#define DOT11_AID_MASK 0x3fff - - -#define DOT11_RC_RESERVED 0 -#define DOT11_RC_UNSPECIFIED 1 -#define DOT11_RC_AUTH_INVAL 2 -#define DOT11_RC_DEAUTH_LEAVING 3 -#define DOT11_RC_INACTIVITY 4 -#define DOT11_RC_BUSY 5 -#define DOT11_RC_INVAL_CLASS_2 6 -#define DOT11_RC_INVAL_CLASS_3 7 -#define DOT11_RC_DISASSOC_LEAVING 8 -#define DOT11_RC_NOT_AUTH 9 -#define DOT11_RC_BAD_PC 10 -#define DOT11_RC_BAD_CHANNELS 11 - - - -#define DOT11_RC_UNSPECIFIED_QOS 32 -#define DOT11_RC_INSUFFCIENT_BW 33 -#define DOT11_RC_EXCESSIVE_FRAMES 34 -#define DOT11_RC_TX_OUTSIDE_TXOP 35 -#define DOT11_RC_LEAVING_QBSS 36 -#define DOT11_RC_BAD_MECHANISM 37 -#define DOT11_RC_SETUP_NEEDED 38 -#define DOT11_RC_TIMEOUT 39 - -#define DOT11_RC_MAX 23 - -#define DOT11_RC_TDLS_PEER_UNREACH 25 -#define DOT11_RC_TDLS_DOWN_UNSPECIFIED 26 - - -#define DOT11_SC_SUCCESS 0 -#define DOT11_SC_FAILURE 1 -#define DOT11_SC_TDLS_WAKEUP_SCH_ALT 2 - -#define DOT11_SC_TDLS_WAKEUP_SCH_REJ 3 -#define DOT11_SC_TDLS_SEC_DISABLED 5 -#define DOT11_SC_LIFETIME_REJ 6 -#define DOT11_SC_NOT_SAME_BSS 7 -#define DOT11_SC_CAP_MISMATCH 10 -#define DOT11_SC_REASSOC_FAIL 11 -#define DOT11_SC_ASSOC_FAIL 12 -#define DOT11_SC_AUTH_MISMATCH 13 -#define DOT11_SC_AUTH_SEQ 14 -#define DOT11_SC_AUTH_CHALLENGE_FAIL 15 -#define DOT11_SC_AUTH_TIMEOUT 16 -#define DOT11_SC_ASSOC_BUSY_FAIL 17 -#define DOT11_SC_ASSOC_RATE_MISMATCH 18 -#define DOT11_SC_ASSOC_SHORT_REQUIRED 19 -#define DOT11_SC_ASSOC_PBCC_REQUIRED 20 -#define DOT11_SC_ASSOC_AGILITY_REQUIRED 21 -#define DOT11_SC_ASSOC_SPECTRUM_REQUIRED 22 -#define DOT11_SC_ASSOC_BAD_POWER_CAP 23 -#define DOT11_SC_ASSOC_BAD_SUP_CHANNELS 24 -#define DOT11_SC_ASSOC_SHORTSLOT_REQUIRED 25 -#define DOT11_SC_ASSOC_ERPBCC_REQUIRED 26 -#define DOT11_SC_ASSOC_DSSOFDM_REQUIRED 27 -#define DOT11_SC_ASSOC_R0KH_UNREACHABLE 28 -#define DOT11_SC_ASSOC_TRY_LATER 30 -#define DOT11_SC_ASSOC_MFP_VIOLATION 31 - -#define DOT11_SC_DECLINED 37 -#define DOT11_SC_INVALID_PARAMS 38 -#define DOT11_SC_INVALID_PAIRWISE_CIPHER 42 -#define DOT11_SC_INVALID_AKMP 43 -#define DOT11_SC_INVALID_RSNIE_CAP 45 -#define DOT11_SC_DLS_NOT_ALLOWED 48 -#define DOT11_SC_INVALID_PMKID 53 -#define DOT11_SC_INVALID_MDID 54 -#define DOT11_SC_INVALID_FTIE 55 - -#define DOT11_SC_UNEXP_MSG 70 -#define DOT11_SC_INVALID_SNONCE 71 -#define DOT11_SC_INVALID_RSNIE 72 - - -#define DOT11_MNG_DS_PARAM_LEN 1 -#define DOT11_MNG_IBSS_PARAM_LEN 2 - - -#define DOT11_MNG_TIM_FIXED_LEN 3 -#define DOT11_MNG_TIM_DTIM_COUNT 0 -#define DOT11_MNG_TIM_DTIM_PERIOD 1 -#define DOT11_MNG_TIM_BITMAP_CTL 2 -#define DOT11_MNG_TIM_PVB 3 - - -#define TLV_TAG_OFF 0 -#define TLV_LEN_OFF 1 -#define TLV_HDR_LEN 2 -#define TLV_BODY_OFF 2 - - -#define DOT11_MNG_SSID_ID 0 -#define DOT11_MNG_RATES_ID 1 -#define DOT11_MNG_FH_PARMS_ID 2 -#define DOT11_MNG_DS_PARMS_ID 3 -#define DOT11_MNG_CF_PARMS_ID 4 -#define DOT11_MNG_TIM_ID 5 -#define DOT11_MNG_IBSS_PARMS_ID 6 -#define DOT11_MNG_COUNTRY_ID 7 -#define DOT11_MNG_HOPPING_PARMS_ID 8 -#define DOT11_MNG_HOPPING_TABLE_ID 9 -#define DOT11_MNG_REQUEST_ID 10 -#define DOT11_MNG_QBSS_LOAD_ID 11 -#define DOT11_MNG_EDCA_PARAM_ID 12 -#define DOT11_MNG_CHALLENGE_ID 16 -#define DOT11_MNG_PWR_CONSTRAINT_ID 32 -#define DOT11_MNG_PWR_CAP_ID 33 -#define DOT11_MNG_TPC_REQUEST_ID 34 -#define DOT11_MNG_TPC_REPORT_ID 35 -#define DOT11_MNG_SUPP_CHANNELS_ID 36 -#define DOT11_MNG_CHANNEL_SWITCH_ID 37 -#define DOT11_MNG_MEASURE_REQUEST_ID 38 -#define DOT11_MNG_MEASURE_REPORT_ID 39 -#define DOT11_MNG_QUIET_ID 40 -#define DOT11_MNG_IBSS_DFS_ID 41 -#define DOT11_MNG_ERP_ID 42 -#define DOT11_MNG_TS_DELAY_ID 43 -#define DOT11_MNG_HT_CAP 45 -#define DOT11_MNG_QOS_CAP_ID 46 -#define DOT11_MNG_NONERP_ID 47 -#define DOT11_MNG_RSN_ID 48 -#define DOT11_MNG_EXT_RATES_ID 50 -#define DOT11_MNG_AP_CHREP_ID 51 -#define DOT11_MNG_NBR_REP_ID 52 -#define DOT11_MNG_MDIE_ID 54 -#define DOT11_MNG_FTIE_ID 55 -#define DOT11_MNG_FT_TI_ID 56 -#define DOT11_MNG_REGCLASS_ID 59 -#define DOT11_MNG_EXT_CSA_ID 60 -#define DOT11_MNG_HT_ADD 61 -#define DOT11_MNG_EXT_CHANNEL_OFFSET 62 -#define DOT11_MNG_WAPI_ID 68 -#define DOT11_MNG_TIME_ADVERTISE_ID 69 -#define DOT11_MNG_RRM_CAP_ID 70 -#define DOT11_MNG_HT_BSS_COEXINFO_ID 72 -#define DOT11_MNG_HT_BSS_CHANNEL_REPORT_ID 73 -#define DOT11_MNG_HT_OBSS_ID 74 -#define DOT11_MNG_CHANNEL_USAGE 97 -#define DOT11_MNG_TIME_ZONE_ID 98 -#define DOT11_MNG_LINK_IDENTIFIER_ID 101 -#define DOT11_MNG_WAKEUP_SCHEDULE_ID 102 -#define DOT11_MNG_CHANNEL_SWITCH_TIMING_ID 104 -#define DOT11_MNG_PTI_CONTROL_ID 105 -#define DOT11_MNG_PU_BUFFER_STATUS_ID 106 -#define DOT11_MNG_INTERWORKING_ID 107 -#define DOT11_MNG_ADVERTISEMENT_ID 108 -#define DOT11_MNG_EXP_BW_REQ_ID 109 -#define DOT11_MNG_QOS_MAP_ID 110 -#define DOT11_MNG_ROAM_CONSORT_ID 111 -#define DOT11_MNG_EMERGCY_ALERT_ID 112 -#define DOT11_MNG_EXT_CAP_ID 127 -#define DOT11_MNG_VHT_CAP_ID 191 -#define DOT11_MNG_VHT_OPERATION_ID 192 - -#define DOT11_MNG_WPA_ID 221 -#define DOT11_MNG_PROPR_ID 221 - -#define DOT11_MNG_VS_ID 221 - - -#define DOT11_RATE_BASIC 0x80 -#define DOT11_RATE_MASK 0x7F - - -#define DOT11_MNG_ERP_LEN 1 -#define DOT11_MNG_NONERP_PRESENT 0x01 -#define DOT11_MNG_USE_PROTECTION 0x02 -#define DOT11_MNG_BARKER_PREAMBLE 0x04 - -#define DOT11_MGN_TS_DELAY_LEN 4 -#define TS_DELAY_FIELD_SIZE 4 - - -#define DOT11_CAP_ESS 0x0001 -#define DOT11_CAP_IBSS 0x0002 -#define DOT11_CAP_POLLABLE 0x0004 -#define DOT11_CAP_POLL_RQ 0x0008 -#define DOT11_CAP_PRIVACY 0x0010 -#define DOT11_CAP_SHORT 0x0020 -#define DOT11_CAP_PBCC 0x0040 -#define DOT11_CAP_AGILITY 0x0080 -#define DOT11_CAP_SPECTRUM 0x0100 -#define DOT11_CAP_SHORTSLOT 0x0400 -#define DOT11_CAP_RRM 0x1000 -#define DOT11_CAP_CCK_OFDM 0x2000 - - - -#define DOT11_EXT_CAP_OBSS_COEX_MGMT 0 - -#define DOT11_EXT_CAP_SPSMP 6 - -#define DOT11_EXT_CAP_BSS_TRANSITION_MGMT 19 - -#define DOT11_EXT_CAP_IW 31 - -#define DOT11_EXT_CAP_SI 41 -#define DOT11_EXT_CAP_SI_MASK 0x0E - - -#define DOT11_ACTION_HDR_LEN 2 -#define DOT11_ACTION_CAT_OFF 0 -#define DOT11_ACTION_ACT_OFF 1 - - -#define DOT11_ACTION_CAT_ERR_MASK 0x80 -#define DOT11_ACTION_CAT_MASK 0x7F -#define DOT11_ACTION_CAT_SPECT_MNG 0 -#define DOT11_ACTION_CAT_QOS 1 -#define DOT11_ACTION_CAT_DLS 2 -#define DOT11_ACTION_CAT_BLOCKACK 3 -#define DOT11_ACTION_CAT_PUBLIC 4 -#define DOT11_ACTION_CAT_RRM 5 -#define DOT11_ACTION_CAT_FBT 6 -#define DOT11_ACTION_CAT_HT 7 -#define DOT11_ACTION_CAT_SA_QUERY 8 -#define DOT11_ACTION_CAT_PDPA 9 -#define DOT11_ACTION_CAT_BSSMGMT 10 -#define DOT11_ACTION_NOTIFICATION 17 -#define DOT11_ACTION_CAT_VSP 126 -#define DOT11_ACTION_CAT_VS 127 - - -#define DOT11_SM_ACTION_M_REQ 0 -#define DOT11_SM_ACTION_M_REP 1 -#define DOT11_SM_ACTION_TPC_REQ 2 -#define DOT11_SM_ACTION_TPC_REP 3 -#define DOT11_SM_ACTION_CHANNEL_SWITCH 4 -#define DOT11_SM_ACTION_EXT_CSA 5 - - -#define DOT11_ACTION_ID_HT_CH_WIDTH 0 -#define DOT11_ACTION_ID_HT_MIMO_PS 1 - - -#define DOT11_PUB_ACTION_BSS_COEX_MNG 0 -#define DOT11_PUB_ACTION_CHANNEL_SWITCH 4 - - -#define DOT11_BA_ACTION_ADDBA_REQ 0 -#define DOT11_BA_ACTION_ADDBA_RESP 1 -#define DOT11_BA_ACTION_DELBA 2 - - -#define DOT11_ADDBA_PARAM_AMSDU_SUP 0x0001 -#define DOT11_ADDBA_PARAM_POLICY_MASK 0x0002 -#define DOT11_ADDBA_PARAM_POLICY_SHIFT 1 -#define DOT11_ADDBA_PARAM_TID_MASK 0x003c -#define DOT11_ADDBA_PARAM_TID_SHIFT 2 -#define DOT11_ADDBA_PARAM_BSIZE_MASK 0xffc0 -#define DOT11_ADDBA_PARAM_BSIZE_SHIFT 6 - -#define DOT11_ADDBA_POLICY_DELAYED 0 -#define DOT11_ADDBA_POLICY_IMMEDIATE 1 - - -#define DOT11_FT_ACTION_FT_RESERVED 0 -#define DOT11_FT_ACTION_FT_REQ 1 -#define DOT11_FT_ACTION_FT_RES 2 -#define DOT11_FT_ACTION_FT_CON 3 -#define DOT11_FT_ACTION_FT_ACK 4 - - -#define DOT11_DLS_ACTION_REQ 0 -#define DOT11_DLS_ACTION_RESP 1 -#define DOT11_DLS_ACTION_TD 2 - - -#define DOT11_WNM_ACTION_EVENT_REQ 0 -#define DOT11_WNM_ACTION_EVENT_REP 1 -#define DOT11_WNM_ACTION_DIAG_REQ 2 -#define DOT11_WNM_ACTION_DIAG_REP 3 -#define DOT11_WNM_ACTION_LOC_CFG_REQ 4 -#define DOT11_WNM_ACTION_LOC_RFG_RESP 5 -#define DOT11_WNM_ACTION_BSS_TRANS_QURY 6 -#define DOT11_WNM_ACTION_BSS_TRANS_REQ 7 -#define DOT11_WNM_ACTION_BSS_TRANS_RESP 8 -#define DOT11_WNM_ACTION_FMS_REQ 9 -#define DOT11_WNM_ACTION_FMS_RESP 10 -#define DOT11_WNM_ACTION_COL_INTRFRNCE_REQ 11 -#define DOT11_WNM_ACTION_COL_INTRFRNCE_REP 12 -#define DOT11_WNM_ACTION_TFS_REQ 13 -#define DOT11_WNM_ACTION_TFS_RESP 14 -#define DOT11_WNM_ACTION_TFS_NOTIFY 15 -#define DOT11_WNM_ACTION_WNM_SLEEP_REQ 16 -#define DOT11_WNM_ACTION_WNM_SLEEP_RESP 17 -#define DOT11_WNM_ACTION_TIM_BCAST_REQ 18 -#define DOT11_WNM_ACTION_TIM_BCAST_RESP 19 -#define DOT11_WNM_ACTION_QOS_TRFC_CAP_UPD 20 -#define DOT11_WNM_ACTION_CHAN_USAGE_REQ 21 -#define DOT11_WNM_ACTION_CHAN_USAGE_RESP 22 -#define DOT11_WNM_ACTION_DMS_REQ 23 -#define DOT11_WNM_ACTION_DMS_RESP 24 -#define DOT11_WNM_ACTION_TMNG_MEASUR_REQ 25 -#define DOT11_WNM_ACTION_NOTFCTN_REQ 26 -#define DOT11_WNM_ACTION_NOTFCTN_RES 27 - -#define DOT11_MNG_COUNTRY_ID_LEN 3 - - -BWL_PRE_PACKED_STRUCT struct dot11_dls_req { - uint8 category; - uint8 action; - struct ether_addr da; - struct ether_addr sa; - uint16 cap; - uint16 timeout; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_dls_req dot11_dls_req_t; -#define DOT11_DLS_REQ_LEN 18 - - -BWL_PRE_PACKED_STRUCT struct dot11_dls_resp { - uint8 category; - uint8 action; - uint16 status; - struct ether_addr da; - struct ether_addr sa; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_dls_resp dot11_dls_resp_t; -#define DOT11_DLS_RESP_LEN 16 - - - -BWL_PRE_PACKED_STRUCT struct dot11_bss_trans_query { - uint8 category; - uint8 action; - uint8 token; - uint8 reason; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_bss_trans_query dot11_bss_trans_query_t; -#define DOT11_BSS_TRANS_QUERY_LEN 4 - - -BWL_PRE_PACKED_STRUCT struct dot11_bss_trans_req { - uint8 category; - uint8 action; - uint8 token; - uint8 reqmode; - uint16 disassoc_tmr; - uint8 validity_intrvl; - uint8 data[1]; - -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_bss_trans_req dot11_bss_trans_req_t; -#define DOT11_BSS_TRANS_REQ_LEN 7 - -#define DOT11_BSS_TERM_DUR_LEN 12 - - - -#define DOT11_BSS_TRNS_REQMODE_PREF_LIST_INCL 0x01 -#define DOT11_BSS_TRNS_REQMODE_ABRIDGED 0x02 -#define DOT11_BSS_TRNS_REQMODE_DISASSOC_IMMINENT 0x04 -#define DOT11_BSS_TRNS_REQMODE_BSS_TERM_INCL 0x08 -#define DOT11_BSS_TRNS_REQMODE_ESS_DISASSOC_IMNT 0x10 - - - -BWL_PRE_PACKED_STRUCT struct dot11_bss_trans_res { - uint8 category; - uint8 action; - uint8 token; - uint8 status; - uint8 term_delay; - uint8 data[1]; - -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_bss_trans_res dot11_bss_trans_res_t; -#define DOT11_BSS_TRANS_RES_LEN 5 - - -#define DOT11_BSS_TRNS_RES_STATUS_ACCEPT 0 -#define DOT11_BSS_TRNS_RES_STATUS_REJECT 1 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_INSUFF_BCN 2 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_INSUFF_CAP 3 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_TERM_UNDESIRED 4 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_TERM_DELAY_REQ 5 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_BSS_LIST_PROVIDED 6 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_NO_SUITABLE_BSS 7 -#define DOT11_BSS_TRNS_RES_STATUS_REJ_LEAVING_ESS 8 - - - -#define DOT11_NBR_RPRT_BSSID_INFO_REACHABILTY 0x0003 -#define DOT11_NBR_RPRT_BSSID_INFO_SEC 0x0004 -#define DOT11_NBR_RPRT_BSSID_INFO_KEY_SCOPE 0x0008 -#define DOT11_NBR_RPRT_BSSID_INFO_CAP 0x03f0 - -#define DOT11_NBR_RPRT_BSSID_INFO_CAP_SPEC_MGMT 0x0010 -#define DOT11_NBR_RPRT_BSSID_INFO_CAP_QOS 0x0020 -#define DOT11_NBR_RPRT_BSSID_INFO_CAP_APSD 0x0040 -#define DOT11_NBR_RPRT_BSSID_INFO_CAP_RDIO_MSMT 0x0080 -#define DOT11_NBR_RPRT_BSSID_INFO_CAP_DEL_BA 0x0100 -#define DOT11_NBR_RPRT_BSSID_INFO_CAP_IMM_BA 0x0200 - - -#define DOT11_NBR_RPRT_SUBELEM_BSS_CANDDT_PREF_ID 3 - - -BWL_PRE_PACKED_STRUCT struct dot11_addba_req { - uint8 category; - uint8 action; - uint8 token; - uint16 addba_param_set; - uint16 timeout; - uint16 start_seqnum; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_addba_req dot11_addba_req_t; -#define DOT11_ADDBA_REQ_LEN 9 - -BWL_PRE_PACKED_STRUCT struct dot11_addba_resp { - uint8 category; - uint8 action; - uint8 token; - uint16 status; - uint16 addba_param_set; - uint16 timeout; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_addba_resp dot11_addba_resp_t; -#define DOT11_ADDBA_RESP_LEN 9 - - -#define DOT11_DELBA_PARAM_INIT_MASK 0x0800 -#define DOT11_DELBA_PARAM_INIT_SHIFT 11 -#define DOT11_DELBA_PARAM_TID_MASK 0xf000 -#define DOT11_DELBA_PARAM_TID_SHIFT 12 - -BWL_PRE_PACKED_STRUCT struct dot11_delba { - uint8 category; - uint8 action; - uint16 delba_param_set; - uint16 reason; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_delba dot11_delba_t; -#define DOT11_DELBA_LEN 6 - - -#define SA_QUERY_REQUEST 0 -#define SA_QUERY_RESPONSE 1 - - - - -BWL_PRE_PACKED_STRUCT struct dot11_ft_req { - uint8 category; - uint8 action; - uint8 sta_addr[ETHER_ADDR_LEN]; - uint8 tgt_ap_addr[ETHER_ADDR_LEN]; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_ft_req dot11_ft_req_t; -#define DOT11_FT_REQ_FIXED_LEN 14 - - -BWL_PRE_PACKED_STRUCT struct dot11_ft_res { - uint8 category; - uint8 action; - uint8 sta_addr[ETHER_ADDR_LEN]; - uint8 tgt_ap_addr[ETHER_ADDR_LEN]; - uint16 status; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_ft_res dot11_ft_res_t; -#define DOT11_FT_RES_FIXED_LEN 16 - - - - - - -#define DOT11_RRM_CAP_LEN 5 -BWL_PRE_PACKED_STRUCT struct dot11_rrm_cap_ie { - uint8 cap[DOT11_RRM_CAP_LEN]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rrm_cap_ie dot11_rrm_cap_ie_t; - - -#define DOT11_RRM_CAP_LINK 0 -#define DOT11_RRM_CAP_NEIGHBOR_REPORT 1 -#define DOT11_RRM_CAP_PARALLEL 2 -#define DOT11_RRM_CAP_REPEATED 3 -#define DOT11_RRM_CAP_BCN_PASSIVE 4 -#define DOT11_RRM_CAP_BCN_ACTIVE 5 -#define DOT11_RRM_CAP_BCN_TABLE 6 -#define DOT11_RRM_CAP_BCN_REP_COND 7 -#define DOT11_RRM_CAP_AP_CHANREP 16 - - - -#define DOT11_OP_CLASS_NONE 255 - - - -#define DOT11_RM_ACTION_RM_REQ 0 -#define DOT11_RM_ACTION_RM_REP 1 -#define DOT11_RM_ACTION_LM_REQ 2 -#define DOT11_RM_ACTION_LM_REP 3 -#define DOT11_RM_ACTION_NR_REQ 4 -#define DOT11_RM_ACTION_NR_REP 5 - - -BWL_PRE_PACKED_STRUCT struct dot11_rm_action { - uint8 category; - uint8 action; - uint8 token; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rm_action dot11_rm_action_t; -#define DOT11_RM_ACTION_LEN 3 - -BWL_PRE_PACKED_STRUCT struct dot11_rmreq { - uint8 category; - uint8 action; - uint8 token; - uint16 reps; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rmreq dot11_rmreq_t; -#define DOT11_RMREQ_LEN 5 - -BWL_PRE_PACKED_STRUCT struct dot11_rm_ie { - uint8 id; - uint8 len; - uint8 token; - uint8 mode; - uint8 type; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rm_ie dot11_rm_ie_t; -#define DOT11_RM_IE_LEN 5 - - -#define DOT11_RMREQ_MODE_PARALLEL 1 -#define DOT11_RMREQ_MODE_ENABLE 2 -#define DOT11_RMREQ_MODE_REQUEST 4 -#define DOT11_RMREQ_MODE_REPORT 8 -#define DOT11_RMREQ_MODE_DURMAND 0x10 - - -#define DOT11_RMREP_MODE_LATE 1 -#define DOT11_RMREP_MODE_INCAPABLE 2 -#define DOT11_RMREP_MODE_REFUSED 4 - -BWL_PRE_PACKED_STRUCT struct dot11_rmreq_bcn { - uint8 id; - uint8 len; - uint8 token; - uint8 mode; - uint8 type; - uint8 reg; - uint8 channel; - uint16 interval; - uint16 duration; - uint8 bcn_mode; - struct ether_addr bssid; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rmreq_bcn dot11_rmreq_bcn_t; -#define DOT11_RMREQ_BCN_LEN 18 - -BWL_PRE_PACKED_STRUCT struct dot11_rmrep_bcn { - uint8 reg; - uint8 channel; - uint32 starttime[2]; - uint16 duration; - uint8 frame_info; - uint8 rcpi; - uint8 rsni; - struct ether_addr bssid; - uint8 antenna_id; - uint32 parent_tsf; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rmrep_bcn dot11_rmrep_bcn_t; -#define DOT11_RMREP_BCN_LEN 26 - - -#define DOT11_RMREQ_BCN_PASSIVE 0 -#define DOT11_RMREQ_BCN_ACTIVE 1 -#define DOT11_RMREQ_BCN_TABLE 2 - - -#define DOT11_RMREQ_BCN_SSID_ID 0 -#define DOT11_RMREQ_BCN_REPINFO_ID 1 -#define DOT11_RMREQ_BCN_REPDET_ID 2 -#define DOT11_RMREQ_BCN_REQUEST_ID 10 -#define DOT11_RMREQ_BCN_APCHREP_ID 51 - - -#define DOT11_RMREQ_BCN_REPDET_FIXED 0 -#define DOT11_RMREQ_BCN_REPDET_REQUEST 1 -#define DOT11_RMREQ_BCN_REPDET_ALL 2 - - -#define DOT11_RMREP_BCN_FRM_BODY 1 - - -BWL_PRE_PACKED_STRUCT struct dot11_rmrep_nbr { - struct ether_addr bssid; - uint32 bssid_info; - uint8 reg; - uint8 channel; - uint8 phytype; - uchar sub_elements[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_rmrep_nbr dot11_rmrep_nbr_t; -#define DOT11_RMREP_NBR_LEN 13 - - -#define DOT11_BSSTYPE_INFRASTRUCTURE 0 -#define DOT11_BSSTYPE_INDEPENDENT 1 -#define DOT11_BSSTYPE_ANY 2 -#define DOT11_SCANTYPE_ACTIVE 0 -#define DOT11_SCANTYPE_PASSIVE 1 - - -BWL_PRE_PACKED_STRUCT struct dot11_lmreq { - uint8 category; - uint8 action; - uint8 token; - uint8 txpwr; - uint8 maxtxpwr; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_lmreq dot11_lmreq_t; -#define DOT11_LMREQ_LEN 5 - -BWL_PRE_PACKED_STRUCT struct dot11_lmrep { - uint8 category; - uint8 action; - uint8 token; - dot11_tpc_rep_t tpc; - uint8 rxant; - uint8 txant; - uint8 rcpi; - uint8 rsni; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_lmrep dot11_lmrep_t; -#define DOT11_LMREP_LEN 11 - - -#define PREN_PREAMBLE 24 -#define PREN_MM_EXT 12 -#define PREN_PREAMBLE_EXT 4 - - -#define RIFS_11N_TIME 2 - - - -#define HT_SIG1_MCS_MASK 0x00007F -#define HT_SIG1_CBW 0x000080 -#define HT_SIG1_HT_LENGTH 0xFFFF00 - - -#define HT_SIG2_SMOOTHING 0x000001 -#define HT_SIG2_NOT_SOUNDING 0x000002 -#define HT_SIG2_RESERVED 0x000004 -#define HT_SIG2_AGGREGATION 0x000008 -#define HT_SIG2_STBC_MASK 0x000030 -#define HT_SIG2_STBC_SHIFT 4 -#define HT_SIG2_FEC_CODING 0x000040 -#define HT_SIG2_SHORT_GI 0x000080 -#define HT_SIG2_ESS_MASK 0x000300 -#define HT_SIG2_ESS_SHIFT 8 -#define HT_SIG2_CRC 0x03FC00 -#define HT_SIG2_TAIL 0x1C0000 - - -#define APHY_SLOT_TIME 9 -#define APHY_SIFS_TIME 16 -#define APHY_DIFS_TIME (APHY_SIFS_TIME + (2 * APHY_SLOT_TIME)) -#define APHY_PREAMBLE_TIME 16 -#define APHY_SIGNAL_TIME 4 -#define APHY_SYMBOL_TIME 4 -#define APHY_SERVICE_NBITS 16 -#define APHY_TAIL_NBITS 6 -#define APHY_CWMIN 15 - - -#define BPHY_SLOT_TIME 20 -#define BPHY_SIFS_TIME 10 -#define BPHY_DIFS_TIME 50 -#define BPHY_PLCP_TIME 192 -#define BPHY_PLCP_SHORT_TIME 96 -#define BPHY_CWMIN 31 - - -#define DOT11_OFDM_SIGNAL_EXTENSION 6 - -#define PHY_CWMAX 1023 - -#define DOT11_MAXNUMFRAGS 16 - - - -typedef int vht_group_id_t; - - - -#define VHT_SIGA1_CONST_MASK 0x800004 - -#define VHT_SIGA1_20MHZ_VAL 0x000000 -#define VHT_SIGA1_40MHZ_VAL 0x000001 -#define VHT_SIGA1_80MHZ_VAL 0x000002 -#define VHT_SIGA1_160MHZ_VAL 0x000003 - -#define VHT_SIGA1_STBC 0x000008 - -#define VHT_SIGA1_GID_MAX_GID 0x3f -#define VHT_SIGA1_GID_SHIFT 4 -#define VHT_SIGA1_GID_TO_AP 0x00 -#define VHT_SIGA1_GID_NOT_TO_AP 0x3f - -#define VHT_SIGA1_NSTS_SHIFT 10 -#define VHT_SIGA1_NSTS_SHIFT_MASK_USER0 0x001C00 - -#define VHT_SIGA1_PARTIAL_AID_SHIFT 13 - - -#define VHT_SIGA2_GI_NONE 0x000000 -#define VHT_SIGA2_GI_SHORT 0x000001 -#define VHT_SIGA2_GI_W_MOD10 0x000002 -#define VHT_SIGA2_CODING_LDPC 0x000004 -#define VHT_SIGA2_BEAMFORM_ENABLE 0x000100 -#define VHT_SIGA2_MCS_SHIFT 4 - -#define VHT_SIGA2_B9_RESERVED 0x000200 -#define VHT_SIGA2_TAIL_MASK 0xfc0000 -#define VHT_SIGA2_TAIL_VALUE 0x000000 - -#define VHT_SIGA2_SVC_BITS 16 -#define VHT_SIGA2_TAIL_BITS 6 - - - -typedef struct d11cnt { - uint32 txfrag; - uint32 txmulti; - uint32 txfail; - uint32 txretry; - uint32 txretrie; - uint32 rxdup; - uint32 txrts; - uint32 txnocts; - uint32 txnoack; - uint32 rxfrag; - uint32 rxmulti; - uint32 rxcrc; - uint32 txfrmsnt; - uint32 rxundec; -} d11cnt_t; - - -#define BRCM_PROP_OUI "\x00\x90\x4C" - - - -#define BRCM_OUI "\x00\x10\x18" - - -BWL_PRE_PACKED_STRUCT struct brcm_ie { - uint8 id; - uint8 len; - uint8 oui[3]; - uint8 ver; - uint8 assoc; - uint8 flags; - uint8 flags1; - uint16 amsdu_mtu_pref; -} BWL_POST_PACKED_STRUCT; -typedef struct brcm_ie brcm_ie_t; -#define BRCM_IE_LEN 11 -#define BRCM_IE_VER 2 -#define BRCM_IE_LEGACY_AES_VER 1 - - -#define BRF_LZWDS 0x4 -#define BRF_BLOCKACK 0x8 - - -#define BRF1_AMSDU 0x1 -#define BRF1_WMEPS 0x4 -#define BRF1_PSOFIX 0x8 -#define BRF1_RX_LARGE_AGG 0x10 -#define BRF1_RFAWARE_DCS 0x20 -#define BRF1_SOFTAP 0x40 - - -BWL_PRE_PACKED_STRUCT struct vndr_ie { - uchar id; - uchar len; - uchar oui [3]; - uchar data [1]; -} BWL_POST_PACKED_STRUCT; -typedef struct vndr_ie vndr_ie_t; - -#define VNDR_IE_HDR_LEN 2 -#define VNDR_IE_MIN_LEN 3 -#define VNDR_IE_MAX_LEN 256 - - -#define MCSSET_LEN 16 -#define MAX_MCS_NUM (128) - -BWL_PRE_PACKED_STRUCT struct ht_cap_ie { - uint16 cap; - uint8 params; - uint8 supp_mcs[MCSSET_LEN]; - uint16 ext_htcap; - uint32 txbf_cap; - uint8 as_cap; -} BWL_POST_PACKED_STRUCT; -typedef struct ht_cap_ie ht_cap_ie_t; - - - -BWL_PRE_PACKED_STRUCT struct ht_prop_cap_ie { - uint8 id; - uint8 len; - uint8 oui[3]; - uint8 type; - ht_cap_ie_t cap_ie; -} BWL_POST_PACKED_STRUCT; -typedef struct ht_prop_cap_ie ht_prop_cap_ie_t; - -#define HT_PROP_IE_OVERHEAD 4 -#define HT_CAP_IE_LEN 26 -#define HT_CAP_IE_TYPE 51 - -#define HT_CAP_LDPC_CODING 0x0001 -#define HT_CAP_40MHZ 0x0002 -#define HT_CAP_MIMO_PS_MASK 0x000C -#define HT_CAP_MIMO_PS_SHIFT 0x0002 -#define HT_CAP_MIMO_PS_OFF 0x0003 -#define HT_CAP_MIMO_PS_RTS 0x0001 -#define HT_CAP_MIMO_PS_ON 0x0000 -#define HT_CAP_GF 0x0010 -#define HT_CAP_SHORT_GI_20 0x0020 -#define HT_CAP_SHORT_GI_40 0x0040 -#define HT_CAP_TX_STBC 0x0080 -#define HT_CAP_RX_STBC_MASK 0x0300 -#define HT_CAP_RX_STBC_SHIFT 8 -#define HT_CAP_DELAYED_BA 0x0400 -#define HT_CAP_MAX_AMSDU 0x0800 - -#define HT_CAP_DSSS_CCK 0x1000 -#define HT_CAP_PSMP 0x2000 -#define HT_CAP_40MHZ_INTOLERANT 0x4000 -#define HT_CAP_LSIG_TXOP 0x8000 - -#define HT_CAP_RX_STBC_NO 0x0 -#define HT_CAP_RX_STBC_ONE_STREAM 0x1 -#define HT_CAP_RX_STBC_TWO_STREAM 0x2 -#define HT_CAP_RX_STBC_THREE_STREAM 0x3 - -#define VHT_MAX_MPDU 11454 -#define VHT_MPDU_MSDU_DELTA 56 - -#define VHT_MAX_AMSDU (VHT_MAX_MPDU - VHT_MPDU_MSDU_DELTA) - -#define HT_MAX_AMSDU 7935 -#define HT_MIN_AMSDU 3835 - -#define HT_PARAMS_RX_FACTOR_MASK 0x03 -#define HT_PARAMS_DENSITY_MASK 0x1C -#define HT_PARAMS_DENSITY_SHIFT 2 - - -#define AMPDU_MAX_MPDU_DENSITY 7 -#define AMPDU_RX_FACTOR_8K 0 -#define AMPDU_RX_FACTOR_16K 1 -#define AMPDU_RX_FACTOR_32K 2 -#define AMPDU_RX_FACTOR_64K 3 -#define AMPDU_RX_FACTOR_BASE 8*1024 - -#define AMPDU_DELIMITER_LEN 4 -#define AMPDU_DELIMITER_LEN_MAX 63 - -#define HT_CAP_EXT_PCO 0x0001 -#define HT_CAP_EXT_PCO_TTIME_MASK 0x0006 -#define HT_CAP_EXT_PCO_TTIME_SHIFT 1 -#define HT_CAP_EXT_MCS_FEEDBACK_MASK 0x0300 -#define HT_CAP_EXT_MCS_FEEDBACK_SHIFT 8 -#define HT_CAP_EXT_HTC 0x0400 -#define HT_CAP_EXT_RD_RESP 0x0800 - -BWL_PRE_PACKED_STRUCT struct ht_add_ie { - uint8 ctl_ch; - uint8 byte1; - uint16 opmode; - uint16 misc_bits; - uint8 basic_mcs[MCSSET_LEN]; -} BWL_POST_PACKED_STRUCT; -typedef struct ht_add_ie ht_add_ie_t; - - - -BWL_PRE_PACKED_STRUCT struct ht_prop_add_ie { - uint8 id; - uint8 len; - uint8 oui[3]; - uint8 type; - ht_add_ie_t add_ie; -} BWL_POST_PACKED_STRUCT; -typedef struct ht_prop_add_ie ht_prop_add_ie_t; - -#define HT_ADD_IE_LEN 22 -#define HT_ADD_IE_TYPE 52 - - -#define HT_BW_ANY 0x04 -#define HT_RIFS_PERMITTED 0x08 - - -#define HT_OPMODE_MASK 0x0003 -#define HT_OPMODE_SHIFT 0 -#define HT_OPMODE_PURE 0x0000 -#define HT_OPMODE_OPTIONAL 0x0001 -#define HT_OPMODE_HT20IN40 0x0002 -#define HT_OPMODE_MIXED 0x0003 -#define HT_OPMODE_NONGF 0x0004 -#define DOT11N_TXBURST 0x0008 -#define DOT11N_OBSS_NONHT 0x0010 - - -#define HT_BASIC_STBC_MCS 0x007f -#define HT_DUAL_STBC_PROT 0x0080 -#define HT_SECOND_BCN 0x0100 -#define HT_LSIG_TXOP 0x0200 -#define HT_PCO_ACTIVE 0x0400 -#define HT_PCO_PHASE 0x0800 -#define HT_DUALCTS_PROTECTION 0x0080 - - -#define DOT11N_2G_TXBURST_LIMIT 6160 -#define DOT11N_5G_TXBURST_LIMIT 3080 - - -#define GET_HT_OPMODE(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ - >> HT_OPMODE_SHIFT) -#define HT_MIXEDMODE_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ - == HT_OPMODE_MIXED) -#define HT_HT20_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ - == HT_OPMODE_HT20IN40) -#define HT_OPTIONAL_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ - == HT_OPMODE_OPTIONAL) -#define HT_USE_PROTECTION(add_ie) (HT_HT20_PRESENT((add_ie)) || \ - HT_MIXEDMODE_PRESENT((add_ie))) -#define HT_NONGF_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_NONGF) \ - == HT_OPMODE_NONGF) -#define DOT11N_TXBURST_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & DOT11N_TXBURST) \ - == DOT11N_TXBURST) -#define DOT11N_OBSS_NONHT_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & DOT11N_OBSS_NONHT) \ - == DOT11N_OBSS_NONHT) - -BWL_PRE_PACKED_STRUCT struct obss_params { - uint16 passive_dwell; - uint16 active_dwell; - uint16 bss_widthscan_interval; - uint16 passive_total; - uint16 active_total; - uint16 chanwidth_transition_dly; - uint16 activity_threshold; -} BWL_POST_PACKED_STRUCT; -typedef struct obss_params obss_params_t; - -BWL_PRE_PACKED_STRUCT struct dot11_obss_ie { - uint8 id; - uint8 len; - obss_params_t obss_params; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_obss_ie dot11_obss_ie_t; -#define DOT11_OBSS_SCAN_IE_LEN sizeof(obss_params_t) - - -#define HT_CTRL_LA_TRQ 0x00000002 -#define HT_CTRL_LA_MAI 0x0000003C -#define HT_CTRL_LA_MAI_SHIFT 2 -#define HT_CTRL_LA_MAI_MRQ 0x00000004 -#define HT_CTRL_LA_MAI_MSI 0x00000038 -#define HT_CTRL_LA_MFSI 0x000001C0 -#define HT_CTRL_LA_MFSI_SHIFT 6 -#define HT_CTRL_LA_MFB_ASELC 0x0000FE00 -#define HT_CTRL_LA_MFB_ASELC_SH 9 -#define HT_CTRL_LA_ASELC_CMD 0x00000C00 -#define HT_CTRL_LA_ASELC_DATA 0x0000F000 -#define HT_CTRL_CAL_POS 0x00030000 -#define HT_CTRL_CAL_SEQ 0x000C0000 -#define HT_CTRL_CSI_STEERING 0x00C00000 -#define HT_CTRL_CSI_STEER_SHIFT 22 -#define HT_CTRL_CSI_STEER_NFB 0 -#define HT_CTRL_CSI_STEER_CSI 1 -#define HT_CTRL_CSI_STEER_NCOM 2 -#define HT_CTRL_CSI_STEER_COM 3 -#define HT_CTRL_NDP_ANNOUNCE 0x01000000 -#define HT_CTRL_AC_CONSTRAINT 0x40000000 -#define HT_CTRL_RDG_MOREPPDU 0x80000000 - -#define HT_OPMODE_OPTIONAL 0x0001 -#define HT_OPMODE_HT20IN40 0x0002 -#define HT_OPMODE_MIXED 0x0003 -#define HT_OPMODE_NONGF 0x0004 -#define DOT11N_TXBURST 0x0008 -#define DOT11N_OBSS_NONHT 0x0010 - - - -BWL_PRE_PACKED_STRUCT struct vht_cap_ie { - uint32 vht_cap_info; - - uint16 rx_mcs_map; - uint16 rx_max_rate; - uint16 tx_mcs_map; - uint16 tx_max_rate; -} BWL_POST_PACKED_STRUCT; -typedef struct vht_cap_ie vht_cap_ie_t; - -#define VHT_CAP_IE_LEN 12 - -#define VHT_CAP_INFO_MAX_MPDU_LEN_MASK 0x00000003 -#define VHT_CAP_INFO_SUPP_CHAN_WIDTH_MASK 0x0000000c -#define VHT_CAP_INFO_LDPC 0x00000010 -#define VHT_CAP_INFO_SGI_80MHZ 0x00000020 -#define VHT_CAP_INFO_SGI_160MHZ 0x00000040 -#define VHT_CAP_INFO_TX_STBC 0x00000080 - -#define VHT_CAP_INFO_RX_STBC_MASK 0x00000700 -#define VHT_CAP_INFO_RX_STBC_SHIFT 8 -#define VHT_CAP_INFO_SU_BEAMFMR 0x00000800 -#define VHT_CAP_INFO_SU_BEAMFMEE 0x00001000 -#define VHT_CAP_INFO_NUM_BMFMR_ANT_MASK 0x0000e000 -#define VHT_CAP_INFO_NUM_BMFMR_ANT_SHIFT 13 - -#define VHT_CAP_INFO_NUM_SOUNDING_DIM_MASK 0x00070000 -#define VHT_CAP_INFO_NUM_SOUNDING_DIM_SHIFT 16 -#define VHT_CAP_INFO_MU_BEAMFMR 0x00080000 -#define VHT_CAP_INFO_MU_BEAMFMEE 0x00100000 -#define VHT_CAP_INFO_TXOPPS 0x00200000 -#define VHT_CAP_INFO_HTCVHT 0x00400000 -#define VHT_CAP_INFO_AMPDU_MAXLEN_EXP_MASK 0x03800000 -#define VHT_CAP_INFO_AMPDU_MAXLEN_EXP_SHIFT 23 - -#define VHT_CAP_INFO_LINK_ADAPT_CAP_MASK 0x0c000000 -#define VHT_CAP_INFO_LINK_ADAPT_CAP_SHIFT 26 - - -#define VHT_CAP_SUPP_MCS_RX_HIGHEST_RATE_MASK 0x1fff -#define VHT_CAP_SUPP_MCS_RX_HIGHEST_RATE_SHIFT 0 - -#define VHT_CAP_SUPP_MCS_TX_HIGHEST_RATE_MASK 0x1fff -#define VHT_CAP_SUPP_MCS_TX_HIGHEST_RATE_SHIFT 0 - -#define VHT_CAP_MCS_MAP_0_7 0 -#define VHT_CAP_MCS_MAP_0_8 1 -#define VHT_CAP_MCS_MAP_0_9 2 -#define VHT_CAP_MCS_MAP_NONE 3 - -#define VHT_CAP_MCS_MAP_NSS_MAX 8 - - -typedef enum vht_cap_chan_width { - VHT_CAP_CHAN_WIDTH_20_40 = 0x00, - VHT_CAP_CHAN_WIDTH_80 = 0x04, - VHT_CAP_CHAN_WIDTH_160 = 0x08 -} vht_cap_chan_width_t; - - -typedef enum vht_cap_max_mpdu_len { - VHT_CAP_MPDU_MAX_4K = 0x00, - VHT_CAP_MPDU_MAX_8K = 0x01, - VHT_CAP_MPDU_MAX_11K = 0x02 -} vht_cap_max_mpdu_len_t; - - -BWL_PRE_PACKED_STRUCT struct vht_op_ie { - uint8 chan_width; - uint8 chan1; - uint8 chan2; - uint16 supp_mcs; -} BWL_POST_PACKED_STRUCT; -typedef struct vht_op_ie vht_op_ie_t; - -#define VHT_OP_IE_LEN 5 - -typedef enum vht_op_chan_width { - VHT_OP_CHAN_WIDTH_20_40 = 0, - VHT_OP_CHAN_WIDTH_80 = 1, - VHT_OP_CHAN_WIDTH_160 = 2, - VHT_OP_CHAN_WIDTH_80_80 = 3 -} vht_op_chan_width_t; - - -#define VHT_MCS_MAP_GET_SS_IDX(numSpatialStreams) ((numSpatialStreams-1)*2) -#define VHT_MCS_MAP_GET_MCS_PER_SS(numSpatialStreams, mcsMap) \ - ((mcsMap >> VHT_MCS_MAP_GET_SS_IDX(numSpatialStreams)) & 0x3) -#define VHT_MCS_MAP_SET_MCS_PER_SS(numSpatialStreams, numMcs, mcsMap) \ - (mcsMap |= ((numMcs & 0x3) << VHT_MCS_MAP_GET_SS_IDX(numSpatialStreams))) - - -#define WPA_OUI "\x00\x50\xF2" -#define WPA_OUI_LEN 3 -#define WPA_OUI_TYPE 1 -#define WPA_VERSION 1 -#define WPA2_OUI "\x00\x0F\xAC" -#define WPA2_OUI_LEN 3 -#define WPA2_VERSION 1 -#define WPA2_VERSION_LEN 2 - - -#define WPS_OUI "\x00\x50\xF2" -#define WPS_OUI_LEN 3 -#define WPS_OUI_TYPE 4 - - - -#ifdef P2P_IE_OVRD -#define WFA_OUI MAC_OUI -#else -#define WFA_OUI "\x50\x6F\x9A" -#endif -#define WFA_OUI_LEN 3 -#ifdef P2P_IE_OVRD -#define WFA_OUI_TYPE_P2P MAC_OUI_TYPE_P2P -#else -#define WFA_OUI_TYPE_P2P 9 -#endif - -#define WFA_OUI_TYPE_TPC 8 - - -#define RSN_AKM_NONE 0 -#define RSN_AKM_UNSPECIFIED 1 -#define RSN_AKM_PSK 2 -#define RSN_AKM_FBT_1X 3 -#define RSN_AKM_FBT_PSK 4 -#define RSN_AKM_MFP_1X 5 -#define RSN_AKM_MFP_PSK 6 -#define RSN_AKM_TPK 7 - - -#define DOT11_MAX_DEFAULT_KEYS 4 -#define DOT11_MAX_KEY_SIZE 32 -#define DOT11_MAX_IV_SIZE 16 -#define DOT11_EXT_IV_FLAG (1<<5) -#define DOT11_WPA_KEY_RSC_LEN 8 - -#define WEP1_KEY_SIZE 5 -#define WEP1_KEY_HEX_SIZE 10 -#define WEP128_KEY_SIZE 13 -#define WEP128_KEY_HEX_SIZE 26 -#define TKIP_MIC_SIZE 8 -#define TKIP_EOM_SIZE 7 -#define TKIP_EOM_FLAG 0x5a -#define TKIP_KEY_SIZE 32 -#define TKIP_MIC_AUTH_TX 16 -#define TKIP_MIC_AUTH_RX 24 -#define TKIP_MIC_SUP_RX TKIP_MIC_AUTH_TX -#define TKIP_MIC_SUP_TX TKIP_MIC_AUTH_RX -#define AES_KEY_SIZE 16 -#define AES_MIC_SIZE 8 -#define BIP_KEY_SIZE 16 - - -#define WCN_OUI "\x00\x50\xf2" -#define WCN_TYPE 4 - -#ifdef BCMWAPI_WPI -#define SMS4_KEY_LEN 16 -#define SMS4_WPI_CBC_MAC_LEN 16 -#endif - - - - -BWL_PRE_PACKED_STRUCT struct dot11_mdid_ie { - uint8 id; - uint8 len; - uint16 mdid; - uint8 cap; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_mdid_ie dot11_mdid_ie_t; - -#define FBT_MDID_CAP_OVERDS 0x01 -#define FBT_MDID_CAP_RRP 0x02 - - -BWL_PRE_PACKED_STRUCT struct dot11_ft_ie { - uint8 id; - uint8 len; - uint16 mic_control; - uint8 mic[16]; - uint8 anonce[32]; - uint8 snonce[32]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_ft_ie dot11_ft_ie_t; - -#define TIE_TYPE_RESERVED 0 -#define TIE_TYPE_REASSOC_DEADLINE 1 -#define TIE_TYPE_KEY_LIEFTIME 2 -#define TIE_TYPE_ASSOC_COMEBACK 3 -BWL_PRE_PACKED_STRUCT struct dot11_timeout_ie { - uint8 id; - uint8 len; - uint8 type; - uint32 value; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_timeout_ie dot11_timeout_ie_t; - - -BWL_PRE_PACKED_STRUCT struct dot11_gtk_ie { - uint8 id; - uint8 len; - uint16 key_info; - uint8 key_len; - uint8 rsc[8]; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct dot11_gtk_ie dot11_gtk_ie_t; - -#define BSSID_INVALID "\x00\x00\x00\x00\x00\x00" -#define BSSID_BROADCAST "\xFF\xFF\xFF\xFF\xFF\xFF" - -#ifdef BCMWAPI_WAI -#define WAPI_IE_MIN_LEN 20 -#define WAPI_VERSION 1 -#define WAPI_VERSION_LEN 2 -#define WAPI_OUI "\x00\x14\x72" -#define WAPI_OUI_LEN DOT11_OUI_LEN -#endif - - -#define WMM_OUI "\x00\x50\xF2" -#define WMM_OUI_LEN 3 -#define WMM_OUI_TYPE 2 -#define WMM_VERSION 1 -#define WMM_VERSION_LEN 1 - - -#define WMM_OUI_SUBTYPE_PARAMETER 1 -#define WMM_PARAMETER_IE_LEN 24 - - -BWL_PRE_PACKED_STRUCT struct link_id_ie { - uint8 id; - uint8 len; - struct ether_addr bssid; - struct ether_addr tdls_init_mac; - struct ether_addr tdls_resp_mac; -} BWL_POST_PACKED_STRUCT; -typedef struct link_id_ie link_id_ie_t; -#define TDLS_LINK_ID_IE_LEN 18 - - -BWL_PRE_PACKED_STRUCT struct wakeup_sch_ie { - uint8 id; - uint8 len; - uint32 offset; - uint32 interval; - uint32 awake_win_slots; - uint32 max_wake_win; - uint16 idle_cnt; -} BWL_POST_PACKED_STRUCT; -typedef struct wakeup_sch_ie wakeup_sch_ie_t; -#define TDLS_WAKEUP_SCH_IE_LEN 18 - - -BWL_PRE_PACKED_STRUCT struct channel_switch_timing_ie { - uint8 id; - uint8 len; - uint16 switch_time; - uint16 switch_timeout; -} BWL_POST_PACKED_STRUCT; -typedef struct channel_switch_timing_ie channel_switch_timing_ie_t; -#define TDLS_CHANNEL_SWITCH_TIMING_IE_LEN 4 - - -BWL_PRE_PACKED_STRUCT struct pti_control_ie { - uint8 id; - uint8 len; - uint8 tid; - uint16 seq_control; -} BWL_POST_PACKED_STRUCT; -typedef struct pti_control_ie pti_control_ie_t; -#define TDLS_PTI_CONTROL_IE_LEN 3 - - -BWL_PRE_PACKED_STRUCT struct pu_buffer_status_ie { - uint8 id; - uint8 len; - uint8 status; -} BWL_POST_PACKED_STRUCT; -typedef struct pu_buffer_status_ie pu_buffer_status_ie_t; -#define TDLS_PU_BUFFER_STATUS_IE_LEN 1 -#define TDLS_PU_BUFFER_STATUS_AC_BK 1 -#define TDLS_PU_BUFFER_STATUS_AC_BE 2 -#define TDLS_PU_BUFFER_STATUS_AC_VI 4 -#define TDLS_PU_BUFFER_STATUS_AC_VO 8 - - -#include <packed_section_end.h> - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/802.11_bta.h b/drivers/net/wireless/bcmdhd/src/include/proto/802.11_bta.h deleted file mode 100755 index ba790b8..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/802.11_bta.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * BT-AMP (BlueTooth Alternate Mac and Phy) 802.11 PAL (Protocol Adaptation Layer) - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: 802.11_bta.h 294267 2011-11-04 23:41:52Z $ -*/ - -#ifndef _802_11_BTA_H_ -#define _802_11_BTA_H_ - -#define BT_SIG_SNAP_MPROT "\xAA\xAA\x03\x00\x19\x58" - -/* BT-AMP 802.11 PAL Protocols */ -#define BTA_PROT_L2CAP 1 -#define BTA_PROT_ACTIVITY_REPORT 2 -#define BTA_PROT_SECURITY 3 -#define BTA_PROT_LINK_SUPERVISION_REQUEST 4 -#define BTA_PROT_LINK_SUPERVISION_REPLY 5 - -/* BT-AMP 802.11 PAL AMP_ASSOC Type IDs */ -#define BTA_TYPE_ID_MAC_ADDRESS 1 -#define BTA_TYPE_ID_PREFERRED_CHANNELS 2 -#define BTA_TYPE_ID_CONNECTED_CHANNELS 3 -#define BTA_TYPE_ID_CAPABILITIES 4 -#define BTA_TYPE_ID_VERSION 5 -#endif /* _802_11_bta_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/802.11e.h b/drivers/net/wireless/bcmdhd/src/include/proto/802.11e.h deleted file mode 100755 index a053d61..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/802.11e.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * 802.11e protocol header file - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: 802.11e.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _802_11e_H_ -#define _802_11e_H_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - -/* This marks the start of a packed structure section. */ -#include <packed_section_start.h> - - -/* WME Traffic Specification (TSPEC) element */ -#define WME_TSPEC_HDR_LEN 2 /* WME TSPEC header length */ -#define WME_TSPEC_BODY_OFF 2 /* WME TSPEC body offset */ - -#define WME_CATEGORY_CODE_OFFSET 0 /* WME Category code offset */ -#define WME_ACTION_CODE_OFFSET 1 /* WME Action code offset */ -#define WME_TOKEN_CODE_OFFSET 2 /* WME Token code offset */ -#define WME_STATUS_CODE_OFFSET 3 /* WME Status code offset */ - -BWL_PRE_PACKED_STRUCT struct tsinfo { - uint8 octets[3]; -} BWL_POST_PACKED_STRUCT; - -typedef struct tsinfo tsinfo_t; - -/* 802.11e TSPEC IE */ -typedef BWL_PRE_PACKED_STRUCT struct tspec { - uint8 oui[DOT11_OUI_LEN]; /* WME_OUI */ - uint8 type; /* WME_TYPE */ - uint8 subtype; /* WME_SUBTYPE_TSPEC */ - uint8 version; /* WME_VERSION */ - tsinfo_t tsinfo; /* TS Info bit field */ - uint16 nom_msdu_size; /* (Nominal or fixed) MSDU Size (bytes) */ - uint16 max_msdu_size; /* Maximum MSDU Size (bytes) */ - uint32 min_srv_interval; /* Minimum Service Interval (us) */ - uint32 max_srv_interval; /* Maximum Service Interval (us) */ - uint32 inactivity_interval; /* Inactivity Interval (us) */ - uint32 suspension_interval; /* Suspension Interval (us) */ - uint32 srv_start_time; /* Service Start Time (us) */ - uint32 min_data_rate; /* Minimum Data Rate (bps) */ - uint32 mean_data_rate; /* Mean Data Rate (bps) */ - uint32 peak_data_rate; /* Peak Data Rate (bps) */ - uint32 max_burst_size; /* Maximum Burst Size (bytes) */ - uint32 delay_bound; /* Delay Bound (us) */ - uint32 min_phy_rate; /* Minimum PHY Rate (bps) */ - uint16 surplus_bw; /* Surplus Bandwidth Allowance (range 1.0-8.0) */ - uint16 medium_time; /* Medium Time (32 us/s periods) */ -} BWL_POST_PACKED_STRUCT tspec_t; - -#define WME_TSPEC_LEN (sizeof(tspec_t)) /* not including 2-bytes of header */ - -/* ts_info */ -/* 802.1D priority is duplicated - bits 13-11 AND bits 3-1 */ -#define TS_INFO_TID_SHIFT 1 /* TS info. TID shift */ -#define TS_INFO_TID_MASK (0xf << TS_INFO_TID_SHIFT) /* TS info. TID mask */ -#define TS_INFO_CONTENTION_SHIFT 7 /* TS info. contention shift */ -#define TS_INFO_CONTENTION_MASK (0x1 << TS_INFO_CONTENTION_SHIFT) /* TS info. contention mask */ -#define TS_INFO_DIRECTION_SHIFT 5 /* TS info. direction shift */ -#define TS_INFO_DIRECTION_MASK (0x3 << TS_INFO_DIRECTION_SHIFT) /* TS info. direction mask */ -#define TS_INFO_PSB_SHIFT 2 /* TS info. PSB bit Shift */ -#define TS_INFO_PSB_MASK (1 << TS_INFO_PSB_SHIFT) /* TS info. PSB mask */ -#define TS_INFO_UPLINK (0 << TS_INFO_DIRECTION_SHIFT) /* TS info. uplink */ -#define TS_INFO_DOWNLINK (1 << TS_INFO_DIRECTION_SHIFT) /* TS info. downlink */ -#define TS_INFO_BIDIRECTIONAL (3 << TS_INFO_DIRECTION_SHIFT) /* TS info. bidirectional */ -#define TS_INFO_USER_PRIO_SHIFT 3 /* TS info. user priority shift */ -/* TS info. user priority mask */ -#define TS_INFO_USER_PRIO_MASK (0x7 << TS_INFO_USER_PRIO_SHIFT) - -/* Macro to get/set bit(s) field in TSINFO */ -#define WLC_CAC_GET_TID(pt) ((((pt).octets[0]) & TS_INFO_TID_MASK) >> TS_INFO_TID_SHIFT) -#define WLC_CAC_GET_DIR(pt) ((((pt).octets[0]) & \ - TS_INFO_DIRECTION_MASK) >> TS_INFO_DIRECTION_SHIFT) -#define WLC_CAC_GET_PSB(pt) ((((pt).octets[1]) & TS_INFO_PSB_MASK) >> TS_INFO_PSB_SHIFT) -#define WLC_CAC_GET_USER_PRIO(pt) ((((pt).octets[1]) & \ - TS_INFO_USER_PRIO_MASK) >> TS_INFO_USER_PRIO_SHIFT) - -#define WLC_CAC_SET_TID(pt, id) ((((pt).octets[0]) & (~TS_INFO_TID_MASK)) | \ - ((id) << TS_INFO_TID_SHIFT)) -#define WLC_CAC_SET_USER_PRIO(pt, prio) ((((pt).octets[0]) & (~TS_INFO_USER_PRIO_MASK)) | \ - ((prio) << TS_INFO_USER_PRIO_SHIFT)) - -/* 802.11e QBSS Load IE */ -#define QBSS_LOAD_IE_LEN 5 /* QBSS Load IE length */ -#define QBSS_LOAD_AAC_OFF 3 /* AAC offset in IE */ - -#define CAC_ADDTS_RESP_TIMEOUT 300 /* default ADDTS response timeout in ms */ - -/* 802.11e ADDTS status code */ -#define DOT11E_STATUS_ADMISSION_ACCEPTED 0 /* TSPEC Admission accepted status */ -#define DOT11E_STATUS_ADDTS_INVALID_PARAM 1 /* TSPEC invalid parameter status */ -#define DOT11E_STATUS_ADDTS_REFUSED_NSBW 3 /* ADDTS refused (non-sufficient BW) */ -#define DOT11E_STATUS_ADDTS_REFUSED_AWHILE 47 /* ADDTS refused but could retry later */ - -/* 802.11e DELTS status code */ -#define DOT11E_STATUS_QSTA_LEAVE_QBSS 36 /* STA leave QBSS */ -#define DOT11E_STATUS_END_TS 37 /* END TS */ -#define DOT11E_STATUS_UNKNOWN_TS 38 /* UNKNOWN TS */ -#define DOT11E_STATUS_QSTA_REQ_TIMEOUT 39 /* STA ADDTS request timeout */ - - -/* This marks the end of a packed structure section. */ -#include <packed_section_end.h> - -#endif /* _802_11e_CAC_H_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/802.1d.h b/drivers/net/wireless/bcmdhd/src/include/proto/802.1d.h deleted file mode 100755 index 94b5627..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/802.1d.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * Fundamental types and constants relating to 802.1D - * - * $Id: 802.1d.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _802_1_D_ -#define _802_1_D_ - - -#define PRIO_8021D_NONE 2 -#define PRIO_8021D_BK 1 -#define PRIO_8021D_BE 0 -#define PRIO_8021D_EE 3 -#define PRIO_8021D_CL 4 -#define PRIO_8021D_VI 5 -#define PRIO_8021D_VO 6 -#define PRIO_8021D_NC 7 -#define MAXPRIO 7 -#define NUMPRIO (MAXPRIO + 1) - -#define ALLPRIO -1 - - -#define PRIO2PREC(prio) \ - (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? ((prio^2)) : (prio)) - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/bcmeth.h b/drivers/net/wireless/bcmdhd/src/include/proto/bcmeth.h deleted file mode 100644 index 5207d30..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/bcmeth.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Broadcom Ethernettype protocol definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bcmeth.h 294352 2011-11-06 19:23:00Z $ - */ - - - -#ifndef _BCMETH_H_ -#define _BCMETH_H_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - - -#include <packed_section_start.h> - - - - - - - -#define BCMILCP_SUBTYPE_RATE 1 -#define BCMILCP_SUBTYPE_LINK 2 -#define BCMILCP_SUBTYPE_CSA 3 -#define BCMILCP_SUBTYPE_LARQ 4 -#define BCMILCP_SUBTYPE_VENDOR 5 -#define BCMILCP_SUBTYPE_FLH 17 - -#define BCMILCP_SUBTYPE_VENDOR_LONG 32769 -#define BCMILCP_SUBTYPE_CERT 32770 -#define BCMILCP_SUBTYPE_SES 32771 - - -#define BCMILCP_BCM_SUBTYPE_RESERVED 0 -#define BCMILCP_BCM_SUBTYPE_EVENT 1 -#define BCMILCP_BCM_SUBTYPE_SES 2 - - -#define BCMILCP_BCM_SUBTYPE_DPT 4 - -#define BCMILCP_BCM_SUBTYPEHDR_MINLENGTH 8 -#define BCMILCP_BCM_SUBTYPEHDR_VERSION 0 - - -typedef BWL_PRE_PACKED_STRUCT struct bcmeth_hdr -{ - uint16 subtype; - uint16 length; - uint8 version; - uint8 oui[3]; - - uint16 usr_subtype; -} BWL_POST_PACKED_STRUCT bcmeth_hdr_t; - - - -#include <packed_section_end.h> - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/bcmevent.h b/drivers/net/wireless/bcmdhd/src/include/proto/bcmevent.h deleted file mode 100644 index a9680a4..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/bcmevent.h +++ /dev/null @@ -1,311 +0,0 @@ -/* - * Broadcom Event protocol definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * Dependencies: proto/bcmeth.h - * - * $Id: bcmevent.h 294352 2011-11-06 19:23:00Z $ - * - */ - -#ifndef _BCMEVENT_H_ -#define _BCMEVENT_H_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - -#include <packed_section_start.h> - -#define BCM_EVENT_MSG_VERSION 2 -#define BCM_MSG_IFNAME_MAX 16 - - -#define WLC_EVENT_MSG_LINK 0x01 -#define WLC_EVENT_MSG_FLUSHTXQ 0x02 -#define WLC_EVENT_MSG_GROUP 0x04 -#define WLC_EVENT_MSG_UNKBSS 0x08 -#define WLC_EVENT_MSG_UNKIF 0x10 - -typedef BWL_PRE_PACKED_STRUCT struct -{ - uint16 version; - uint16 flags; - uint32 event_type; - uint32 status; - uint32 reason; - uint32 auth_type; - uint32 datalen; - struct ether_addr addr; - char ifname[BCM_MSG_IFNAME_MAX]; -} BWL_POST_PACKED_STRUCT wl_event_msg_v1_t; - - -typedef BWL_PRE_PACKED_STRUCT struct -{ - uint16 version; - uint16 flags; - uint32 event_type; - uint32 status; - uint32 reason; - uint32 auth_type; - uint32 datalen; - struct ether_addr addr; - char ifname[BCM_MSG_IFNAME_MAX]; - uint8 ifidx; - uint8 bsscfgidx; -} BWL_POST_PACKED_STRUCT wl_event_msg_t; - - -typedef BWL_PRE_PACKED_STRUCT struct bcm_event { - struct ether_header eth; - bcmeth_hdr_t bcm_hdr; - wl_event_msg_t event; -} BWL_POST_PACKED_STRUCT bcm_event_t; - -#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - sizeof(struct ether_header)) - - -#define WLC_E_SET_SSID 0 -#define WLC_E_JOIN 1 -#define WLC_E_START 2 -#define WLC_E_AUTH 3 -#define WLC_E_AUTH_IND 4 -#define WLC_E_DEAUTH 5 -#define WLC_E_DEAUTH_IND 6 -#define WLC_E_ASSOC 7 -#define WLC_E_ASSOC_IND 8 -#define WLC_E_REASSOC 9 -#define WLC_E_REASSOC_IND 10 -#define WLC_E_DISASSOC 11 -#define WLC_E_DISASSOC_IND 12 -#define WLC_E_QUIET_START 13 -#define WLC_E_QUIET_END 14 -#define WLC_E_BEACON_RX 15 -#define WLC_E_LINK 16 -#define WLC_E_MIC_ERROR 17 -#define WLC_E_NDIS_LINK 18 -#define WLC_E_ROAM 19 -#define WLC_E_TXFAIL 20 -#define WLC_E_PMKID_CACHE 21 -#define WLC_E_RETROGRADE_TSF 22 -#define WLC_E_PRUNE 23 -#define WLC_E_AUTOAUTH 24 -#define WLC_E_EAPOL_MSG 25 -#define WLC_E_SCAN_COMPLETE 26 -#define WLC_E_ADDTS_IND 27 -#define WLC_E_DELTS_IND 28 -#define WLC_E_BCNSENT_IND 29 -#define WLC_E_BCNRX_MSG 30 -#define WLC_E_BCNLOST_MSG 31 -#define WLC_E_ROAM_PREP 32 -#define WLC_E_PFN_NET_FOUND 33 -#define WLC_E_PFN_NET_LOST 34 -#define WLC_E_RESET_COMPLETE 35 -#define WLC_E_JOIN_START 36 -#define WLC_E_ROAM_START 37 -#define WLC_E_ASSOC_START 38 -#define WLC_E_IBSS_ASSOC 39 -#define WLC_E_RADIO 40 -#define WLC_E_PSM_WATCHDOG 41 -#define WLC_E_PROBREQ_MSG 44 -#define WLC_E_SCAN_CONFIRM_IND 45 -#define WLC_E_PSK_SUP 46 -#define WLC_E_COUNTRY_CODE_CHANGED 47 -#define WLC_E_EXCEEDED_MEDIUM_TIME 48 -#define WLC_E_ICV_ERROR 49 -#define WLC_E_UNICAST_DECODE_ERROR 50 -#define WLC_E_MULTICAST_DECODE_ERROR 51 -#define WLC_E_TRACE 52 -#ifdef WLBTAMP -#define WLC_E_BTA_HCI_EVENT 53 -#endif -#define WLC_E_IF 54 -#define WLC_E_P2P_DISC_LISTEN_COMPLETE 55 -#define WLC_E_RSSI 56 -#define WLC_E_PFN_SCAN_COMPLETE 57 -#define WLC_E_EXTLOG_MSG 58 -#define WLC_E_ACTION_FRAME 59 -#define WLC_E_ACTION_FRAME_COMPLETE 60 -#define WLC_E_PRE_ASSOC_IND 61 -#define WLC_E_PRE_REASSOC_IND 62 -#define WLC_E_CHANNEL_ADOPTED 63 -#define WLC_E_AP_STARTED 64 -#define WLC_E_DFS_AP_STOP 65 -#define WLC_E_DFS_AP_RESUME 66 -#define WLC_E_WAI_STA_EVENT 67 -#define WLC_E_WAI_MSG 68 -#define WLC_E_ESCAN_RESULT 69 -#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70 -#define WLC_E_PROBRESP_MSG 71 -#define WLC_E_P2P_PROBREQ_MSG 72 -#define WLC_E_DCS_REQUEST 73 - -#define WLC_E_FIFO_CREDIT_MAP 74 - -#define WLC_E_ACTION_FRAME_RX 75 -#define WLC_E_WAKE_EVENT 76 -#define WLC_E_RM_COMPLETE 77 -#define WLC_E_HTSFSYNC 78 -#define WLC_E_OVERLAY_REQ 79 -#define WLC_E_CSA_COMPLETE_IND 80 -#define WLC_E_EXCESS_PM_WAKE_EVENT 81 -#define WLC_E_PFN_SCAN_NONE 82 -#define WLC_E_PFN_SCAN_ALLGONE 83 -#define WLC_E_GTK_PLUMBED 84 -#define WLC_E_ASSOC_IND_NDIS 85 -#define WLC_E_REASSOC_IND_NDIS 86 -#define WLC_E_ASSOC_REQ_IE 87 -#define WLC_E_ASSOC_RESP_IE 88 -#define WLC_E_ASSOC_RECREATED 89 -#define WLC_E_ACTION_FRAME_RX_NDIS 90 -#define WLC_E_AUTH_REQ 91 -#define WLC_E_LAST 92 - - -typedef struct { - uint event; - const char *name; -} bcmevent_name_t; - -extern const bcmevent_name_t bcmevent_names[]; -extern const int bcmevent_names_size; - - -#define WLC_E_STATUS_SUCCESS 0 -#define WLC_E_STATUS_FAIL 1 -#define WLC_E_STATUS_TIMEOUT 2 -#define WLC_E_STATUS_NO_NETWORKS 3 -#define WLC_E_STATUS_ABORT 4 -#define WLC_E_STATUS_NO_ACK 5 -#define WLC_E_STATUS_UNSOLICITED 6 -#define WLC_E_STATUS_ATTEMPT 7 -#define WLC_E_STATUS_PARTIAL 8 -#define WLC_E_STATUS_NEWSCAN 9 -#define WLC_E_STATUS_NEWASSOC 10 -#define WLC_E_STATUS_11HQUIET 11 -#define WLC_E_STATUS_SUPPRESS 12 -#define WLC_E_STATUS_NOCHANS 13 -#define WLC_E_STATUS_CS_ABORT 15 -#define WLC_E_STATUS_ERROR 16 - - -#define WLC_E_REASON_INITIAL_ASSOC 0 -#define WLC_E_REASON_LOW_RSSI 1 -#define WLC_E_REASON_DEAUTH 2 -#define WLC_E_REASON_DISASSOC 3 -#define WLC_E_REASON_BCNS_LOST 4 -#define WLC_E_REASON_MINTXRATE 9 -#define WLC_E_REASON_TXFAIL 10 - - -#define WLC_E_REASON_FAST_ROAM_FAILED 5 -#define WLC_E_REASON_DIRECTED_ROAM 6 -#define WLC_E_REASON_TSPEC_REJECTED 7 -#define WLC_E_REASON_BETTER_AP 8 - -#define WLC_E_REASON_REQUESTED_ROAM 11 - - -#define WLC_E_PRUNE_ENCR_MISMATCH 1 -#define WLC_E_PRUNE_BCAST_BSSID 2 -#define WLC_E_PRUNE_MAC_DENY 3 -#define WLC_E_PRUNE_MAC_NA 4 -#define WLC_E_PRUNE_REG_PASSV 5 -#define WLC_E_PRUNE_SPCT_MGMT 6 -#define WLC_E_PRUNE_RADAR 7 -#define WLC_E_RSN_MISMATCH 8 -#define WLC_E_PRUNE_NO_COMMON_RATES 9 -#define WLC_E_PRUNE_BASIC_RATES 10 -#define WLC_E_PRUNE_CIPHER_NA 12 -#define WLC_E_PRUNE_KNOWN_STA 13 -#define WLC_E_PRUNE_WDS_PEER 15 -#define WLC_E_PRUNE_QBSS_LOAD 16 -#define WLC_E_PRUNE_HOME_AP 17 - - -#define WLC_E_SUP_OTHER 0 -#define WLC_E_SUP_DECRYPT_KEY_DATA 1 -#define WLC_E_SUP_BAD_UCAST_WEP128 2 -#define WLC_E_SUP_BAD_UCAST_WEP40 3 -#define WLC_E_SUP_UNSUP_KEY_LEN 4 -#define WLC_E_SUP_PW_KEY_CIPHER 5 -#define WLC_E_SUP_MSG3_TOO_MANY_IE 6 -#define WLC_E_SUP_MSG3_IE_MISMATCH 7 -#define WLC_E_SUP_NO_INSTALL_FLAG 8 -#define WLC_E_SUP_MSG3_NO_GTK 9 -#define WLC_E_SUP_GRP_KEY_CIPHER 10 -#define WLC_E_SUP_GRP_MSG1_NO_GTK 11 -#define WLC_E_SUP_GTK_DECRYPT_FAIL 12 -#define WLC_E_SUP_SEND_FAIL 13 -#define WLC_E_SUP_DEAUTH 14 -#define WLC_E_SUP_WPA_PSK_TMO 15 - -typedef BWL_PRE_PACKED_STRUCT struct wl_event_rx_frame_data { - uint16 version; - uint16 channel; - int32 rssi; - uint32 mactime; - uint32 rate; -} BWL_POST_PACKED_STRUCT wl_event_rx_frame_data_t; - -#define BCM_RX_FRAME_DATA_VERSION 1 - - -typedef struct wl_event_data_if { - uint8 ifidx; - uint8 opcode; - uint8 reserved; - uint8 bssidx; - uint8 role; -} wl_event_data_if_t; - - -#define WLC_E_IF_ADD 1 -#define WLC_E_IF_DEL 2 -#define WLC_E_IF_CHANGE 3 - - -#define WLC_E_IF_ROLE_STA 0 -#define WLC_E_IF_ROLE_AP 1 -#define WLC_E_IF_ROLE_WDS 2 -#define WLC_E_IF_ROLE_P2P_GO 3 -#define WLC_E_IF_ROLE_P2P_CLIENT 4 -#ifdef WLBTAMP -#define WLC_E_IF_ROLE_BTA_CREATOR 5 -#define WLC_E_IF_ROLE_BTA_ACCEPTOR 6 -#endif - - -#define WLC_E_LINK_BCN_LOSS 1 -#define WLC_E_LINK_DISASSOC 2 -#define WLC_E_LINK_ASSOC_REC 3 -#define WLC_E_LINK_BSSCFG_DIS 4 - - -#define WLC_E_OVL_DOWNLOAD 0 -#define WLC_E_OVL_UPDATE_IND 1 - - -#include <packed_section_end.h> - -#endif /* _BCMEVENT_H_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/bcmip.h b/drivers/net/wireless/bcmdhd/src/include/proto/bcmip.h deleted file mode 100644 index bdc902b..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/bcmip.h +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * Fundamental constants relating to IP Protocol - * - * $Id: bcmip.h 290206 2011-10-17 19:13:51Z $ - */ - -#ifndef _bcmip_h_ -#define _bcmip_h_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - - -#include <packed_section_start.h> - - - -#define IP_VER_OFFSET 0x0 -#define IP_VER_MASK 0xf0 -#define IP_VER_SHIFT 4 -#define IP_VER_4 4 -#define IP_VER_6 6 - -#define IP_VER(ip_body) \ - ((((uint8 *)(ip_body))[IP_VER_OFFSET] & IP_VER_MASK) >> IP_VER_SHIFT) - -#define IP_PROT_ICMP 0x1 -#define IP_PROT_IGMP 0x2 -#define IP_PROT_TCP 0x6 -#define IP_PROT_UDP 0x11 -#define IP_PROT_ICMP6 0x3a - - -#define IPV4_VER_HL_OFFSET 0 -#define IPV4_TOS_OFFSET 1 -#define IPV4_PKTLEN_OFFSET 2 -#define IPV4_PKTFLAG_OFFSET 6 -#define IPV4_PROT_OFFSET 9 -#define IPV4_CHKSUM_OFFSET 10 -#define IPV4_SRC_IP_OFFSET 12 -#define IPV4_DEST_IP_OFFSET 16 -#define IPV4_OPTIONS_OFFSET 20 - - -#define IPV4_VER_MASK 0xf0 -#define IPV4_VER_SHIFT 4 - -#define IPV4_HLEN_MASK 0x0f -#define IPV4_HLEN(ipv4_body) (4 * (((uint8 *)(ipv4_body))[IPV4_VER_HL_OFFSET] & IPV4_HLEN_MASK)) - -#define IPV4_ADDR_LEN 4 - -#define IPV4_ADDR_NULL(a) ((((uint8 *)(a))[0] | ((uint8 *)(a))[1] | \ - ((uint8 *)(a))[2] | ((uint8 *)(a))[3]) == 0) - -#define IPV4_ADDR_BCAST(a) ((((uint8 *)(a))[0] & ((uint8 *)(a))[1] & \ - ((uint8 *)(a))[2] & ((uint8 *)(a))[3]) == 0xff) - -#define IPV4_TOS_DSCP_MASK 0xfc -#define IPV4_TOS_DSCP_SHIFT 2 - -#define IPV4_TOS(ipv4_body) (((uint8 *)(ipv4_body))[IPV4_TOS_OFFSET]) - -#define IPV4_TOS_PREC_MASK 0xe0 -#define IPV4_TOS_PREC_SHIFT 5 - -#define IPV4_TOS_LOWDELAY 0x10 -#define IPV4_TOS_THROUGHPUT 0x8 -#define IPV4_TOS_RELIABILITY 0x4 - -#define IPV4_PROT(ipv4_body) (((uint8 *)(ipv4_body))[IPV4_PROT_OFFSET]) - -#define IPV4_FRAG_RESV 0x8000 -#define IPV4_FRAG_DONT 0x4000 -#define IPV4_FRAG_MORE 0x2000 -#define IPV4_FRAG_OFFSET_MASK 0x1fff - -#define IPV4_ADDR_STR_LEN 16 - - -BWL_PRE_PACKED_STRUCT struct ipv4_addr { - uint8 addr[IPV4_ADDR_LEN]; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct ipv4_hdr { - uint8 version_ihl; - uint8 tos; - uint16 tot_len; - uint16 id; - uint16 frag; - uint8 ttl; - uint8 prot; - uint16 hdr_chksum; - uint8 src_ip[IPV4_ADDR_LEN]; - uint8 dst_ip[IPV4_ADDR_LEN]; -} BWL_POST_PACKED_STRUCT; - - -#define IPV6_PAYLOAD_LEN_OFFSET 4 -#define IPV6_NEXT_HDR_OFFSET 6 -#define IPV6_HOP_LIMIT_OFFSET 7 -#define IPV6_SRC_IP_OFFSET 8 -#define IPV6_DEST_IP_OFFSET 24 - - -#define IPV6_TRAFFIC_CLASS(ipv6_body) \ - (((((uint8 *)(ipv6_body))[0] & 0x0f) << 4) | \ - ((((uint8 *)(ipv6_body))[1] & 0xf0) >> 4)) - -#define IPV6_FLOW_LABEL(ipv6_body) \ - (((((uint8 *)(ipv6_body))[1] & 0x0f) << 16) | \ - (((uint8 *)(ipv6_body))[2] << 8) | \ - (((uint8 *)(ipv6_body))[3])) - -#define IPV6_PAYLOAD_LEN(ipv6_body) \ - ((((uint8 *)(ipv6_body))[IPV6_PAYLOAD_LEN_OFFSET + 0] << 8) | \ - ((uint8 *)(ipv6_body))[IPV6_PAYLOAD_LEN_OFFSET + 1]) - -#define IPV6_NEXT_HDR(ipv6_body) \ - (((uint8 *)(ipv6_body))[IPV6_NEXT_HDR_OFFSET]) - -#define IPV6_PROT(ipv6_body) IPV6_NEXT_HDR(ipv6_body) - -#define IPV6_ADDR_LEN 16 - - -#define IP_TOS46(ip_body) \ - (IP_VER(ip_body) == IP_VER_4 ? IPV4_TOS(ip_body) : \ - IP_VER(ip_body) == IP_VER_6 ? IPV6_TRAFFIC_CLASS(ip_body) : 0) - - -#define IPV6_EXTHDR_HOP 0 -#define IPV6_EXTHDR_ROUTING 43 -#define IPV6_EXTHDR_FRAGMENT 44 -#define IPV6_EXTHDR_AUTH 51 -#define IPV6_EXTHDR_NONE 59 -#define IPV6_EXTHDR_DEST 60 - -#define IPV6_EXTHDR(prot) (((prot) == IPV6_EXTHDR_HOP) || \ - ((prot) == IPV6_EXTHDR_ROUTING) || \ - ((prot) == IPV6_EXTHDR_FRAGMENT) || \ - ((prot) == IPV6_EXTHDR_AUTH) || \ - ((prot) == IPV6_EXTHDR_NONE) || \ - ((prot) == IPV6_EXTHDR_DEST)) - -#define IPV6_MIN_HLEN 40 - -#define IPV6_EXTHDR_LEN(eh) ((((struct ipv6_exthdr *)(eh))->hdrlen + 1) << 3) - -BWL_PRE_PACKED_STRUCT struct ipv6_exthdr { - uint8 nexthdr; - uint8 hdrlen; -} BWL_POST_PACKED_STRUCT; - -BWL_PRE_PACKED_STRUCT struct ipv6_exthdr_frag { - uint8 nexthdr; - uint8 rsvd; - uint16 frag_off; - uint32 ident; -} BWL_POST_PACKED_STRUCT; - -static INLINE int32 -ipv6_exthdr_len(uint8 *h, uint8 *proto) -{ - uint16 len = 0, hlen; - struct ipv6_exthdr *eh = (struct ipv6_exthdr *)h; - - while (IPV6_EXTHDR(eh->nexthdr)) { - if (eh->nexthdr == IPV6_EXTHDR_NONE) - return -1; - else if (eh->nexthdr == IPV6_EXTHDR_FRAGMENT) - hlen = 8; - else if (eh->nexthdr == IPV6_EXTHDR_AUTH) - hlen = (eh->hdrlen + 2) << 2; - else - hlen = IPV6_EXTHDR_LEN(eh); - - len += hlen; - eh = (struct ipv6_exthdr *)(h + len); - } - - *proto = eh->nexthdr; - return len; -} - - -#include <packed_section_end.h> - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/bt_amp_hci.h b/drivers/net/wireless/bcmdhd/src/include/proto/bt_amp_hci.h deleted file mode 100644 index 49f3949..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/bt_amp_hci.h +++ /dev/null @@ -1,441 +0,0 @@ -/* - * BT-AMP (BlueTooth Alternate Mac and Phy) HCI (Host/Controller Interface) - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: bt_amp_hci.h 294267 2011-11-04 23:41:52Z $ -*/ - -#ifndef _bt_amp_hci_h -#define _bt_amp_hci_h - -/* This marks the start of a packed structure section. */ -#include <packed_section_start.h> - - -/* AMP HCI CMD packet format */ -typedef BWL_PRE_PACKED_STRUCT struct amp_hci_cmd { - uint16 opcode; - uint8 plen; - uint8 parms[1]; -} BWL_POST_PACKED_STRUCT amp_hci_cmd_t; - -#define HCI_CMD_PREAMBLE_SIZE OFFSETOF(amp_hci_cmd_t, parms) -#define HCI_CMD_DATA_SIZE 255 - -/* AMP HCI CMD opcode layout */ -#define HCI_CMD_OPCODE(ogf, ocf) ((((ogf) & 0x3F) << 10) | ((ocf) & 0x03FF)) -#define HCI_CMD_OGF(opcode) ((uint8)(((opcode) >> 10) & 0x3F)) -#define HCI_CMD_OCF(opcode) ((opcode) & 0x03FF) - -/* AMP HCI command opcodes */ -#define HCI_Read_Failed_Contact_Counter HCI_CMD_OPCODE(0x05, 0x0001) -#define HCI_Reset_Failed_Contact_Counter HCI_CMD_OPCODE(0x05, 0x0002) -#define HCI_Read_Link_Quality HCI_CMD_OPCODE(0x05, 0x0003) -#define HCI_Read_Local_AMP_Info HCI_CMD_OPCODE(0x05, 0x0009) -#define HCI_Read_Local_AMP_ASSOC HCI_CMD_OPCODE(0x05, 0x000A) -#define HCI_Write_Remote_AMP_ASSOC HCI_CMD_OPCODE(0x05, 0x000B) -#define HCI_Create_Physical_Link HCI_CMD_OPCODE(0x01, 0x0035) -#define HCI_Accept_Physical_Link_Request HCI_CMD_OPCODE(0x01, 0x0036) -#define HCI_Disconnect_Physical_Link HCI_CMD_OPCODE(0x01, 0x0037) -#define HCI_Create_Logical_Link HCI_CMD_OPCODE(0x01, 0x0038) -#define HCI_Accept_Logical_Link HCI_CMD_OPCODE(0x01, 0x0039) -#define HCI_Disconnect_Logical_Link HCI_CMD_OPCODE(0x01, 0x003A) -#define HCI_Logical_Link_Cancel HCI_CMD_OPCODE(0x01, 0x003B) -#define HCI_Flow_Spec_Modify HCI_CMD_OPCODE(0x01, 0x003C) -#define HCI_Write_Flow_Control_Mode HCI_CMD_OPCODE(0x01, 0x0067) -#define HCI_Read_Best_Effort_Flush_Timeout HCI_CMD_OPCODE(0x01, 0x0069) -#define HCI_Write_Best_Effort_Flush_Timeout HCI_CMD_OPCODE(0x01, 0x006A) -#define HCI_Short_Range_Mode HCI_CMD_OPCODE(0x01, 0x006B) -#define HCI_Reset HCI_CMD_OPCODE(0x03, 0x0003) -#define HCI_Read_Connection_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0015) -#define HCI_Write_Connection_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0016) -#define HCI_Read_Link_Supervision_Timeout HCI_CMD_OPCODE(0x03, 0x0036) -#define HCI_Write_Link_Supervision_Timeout HCI_CMD_OPCODE(0x03, 0x0037) -#define HCI_Enhanced_Flush HCI_CMD_OPCODE(0x03, 0x005F) -#define HCI_Read_Logical_Link_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0061) -#define HCI_Write_Logical_Link_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0062) -#define HCI_Set_Event_Mask_Page_2 HCI_CMD_OPCODE(0x03, 0x0063) -#define HCI_Read_Location_Data_Command HCI_CMD_OPCODE(0x03, 0x0064) -#define HCI_Write_Location_Data_Command HCI_CMD_OPCODE(0x03, 0x0065) -#define HCI_Read_Local_Version_Info HCI_CMD_OPCODE(0x04, 0x0001) -#define HCI_Read_Local_Supported_Commands HCI_CMD_OPCODE(0x04, 0x0002) -#define HCI_Read_Buffer_Size HCI_CMD_OPCODE(0x04, 0x0005) -#define HCI_Read_Data_Block_Size HCI_CMD_OPCODE(0x04, 0x000A) - -/* AMP HCI command parameters */ -typedef BWL_PRE_PACKED_STRUCT struct read_local_cmd_parms { - uint8 plh; - uint8 offset[2]; /* length so far */ - uint8 max_remote[2]; -} BWL_POST_PACKED_STRUCT read_local_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct write_remote_cmd_parms { - uint8 plh; - uint8 offset[2]; - uint8 len[2]; - uint8 frag[1]; -} BWL_POST_PACKED_STRUCT write_remote_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct phy_link_cmd_parms { - uint8 plh; - uint8 key_length; - uint8 key_type; - uint8 key[1]; -} BWL_POST_PACKED_STRUCT phy_link_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct dis_phy_link_cmd_parms { - uint8 plh; - uint8 reason; -} BWL_POST_PACKED_STRUCT dis_phy_link_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct log_link_cmd_parms { - uint8 plh; - uint8 txflow[16]; - uint8 rxflow[16]; -} BWL_POST_PACKED_STRUCT log_link_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct ext_flow_spec { - uint8 id; - uint8 service_type; - uint8 max_sdu[2]; - uint8 sdu_ia_time[4]; - uint8 access_latency[4]; - uint8 flush_timeout[4]; -} BWL_POST_PACKED_STRUCT ext_flow_spec_t; - -typedef BWL_PRE_PACKED_STRUCT struct log_link_cancel_cmd_parms { - uint8 plh; - uint8 tx_fs_ID; -} BWL_POST_PACKED_STRUCT log_link_cancel_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct flow_spec_mod_cmd_parms { - uint8 llh[2]; - uint8 txflow[16]; - uint8 rxflow[16]; -} BWL_POST_PACKED_STRUCT flow_spec_mod_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct plh_pad { - uint8 plh; - uint8 pad; -} BWL_POST_PACKED_STRUCT plh_pad_t; - -typedef BWL_PRE_PACKED_STRUCT union hci_handle { - uint16 bredr; - plh_pad_t amp; -} BWL_POST_PACKED_STRUCT hci_handle_t; - -typedef BWL_PRE_PACKED_STRUCT struct ls_to_cmd_parms { - hci_handle_t handle; - uint8 timeout[2]; -} BWL_POST_PACKED_STRUCT ls_to_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct befto_cmd_parms { - uint8 llh[2]; - uint8 befto[4]; -} BWL_POST_PACKED_STRUCT befto_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct srm_cmd_parms { - uint8 plh; - uint8 srm; -} BWL_POST_PACKED_STRUCT srm_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct ld_cmd_parms { - uint8 ld_aware; - uint8 ld[2]; - uint8 ld_opts; - uint8 l_opts; -} BWL_POST_PACKED_STRUCT ld_cmd_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct eflush_cmd_parms { - uint8 llh[2]; - uint8 packet_type; -} BWL_POST_PACKED_STRUCT eflush_cmd_parms_t; - -/* Generic AMP extended flow spec service types */ -#define EFS_SVCTYPE_NO_TRAFFIC 0 -#define EFS_SVCTYPE_BEST_EFFORT 1 -#define EFS_SVCTYPE_GUARANTEED 2 - -/* AMP HCI event packet format */ -typedef BWL_PRE_PACKED_STRUCT struct amp_hci_event { - uint8 ecode; - uint8 plen; - uint8 parms[1]; -} BWL_POST_PACKED_STRUCT amp_hci_event_t; - -#define HCI_EVT_PREAMBLE_SIZE OFFSETOF(amp_hci_event_t, parms) - -/* AMP HCI event codes */ -#define HCI_Command_Complete 0x0E -#define HCI_Command_Status 0x0F -#define HCI_Flush_Occurred 0x11 -#define HCI_Enhanced_Flush_Complete 0x39 -#define HCI_Physical_Link_Complete 0x40 -#define HCI_Channel_Select 0x41 -#define HCI_Disconnect_Physical_Link_Complete 0x42 -#define HCI_Logical_Link_Complete 0x45 -#define HCI_Disconnect_Logical_Link_Complete 0x46 -#define HCI_Flow_Spec_Modify_Complete 0x47 -#define HCI_Number_of_Completed_Data_Blocks 0x48 -#define HCI_Short_Range_Mode_Change_Complete 0x4C -#define HCI_Status_Change_Event 0x4D -#define HCI_Vendor_Specific 0xFF - -/* AMP HCI event mask bit positions */ -#define HCI_Physical_Link_Complete_Event_Mask 0x0001 -#define HCI_Channel_Select_Event_Mask 0x0002 -#define HCI_Disconnect_Physical_Link_Complete_Event_Mask 0x0004 -#define HCI_Logical_Link_Complete_Event_Mask 0x0020 -#define HCI_Disconnect_Logical_Link_Complete_Event_Mask 0x0040 -#define HCI_Flow_Spec_Modify_Complete_Event_Mask 0x0080 -#define HCI_Number_of_Completed_Data_Blocks_Event_Mask 0x0100 -#define HCI_Short_Range_Mode_Change_Complete_Event_Mask 0x1000 -#define HCI_Status_Change_Event_Mask 0x2000 -#define HCI_All_Event_Mask 0x31e7 -/* AMP HCI event parameters */ -typedef BWL_PRE_PACKED_STRUCT struct cmd_status_parms { - uint8 status; - uint8 cmdpkts; - uint16 opcode; -} BWL_POST_PACKED_STRUCT cmd_status_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct cmd_complete_parms { - uint8 cmdpkts; - uint16 opcode; - uint8 parms[1]; -} BWL_POST_PACKED_STRUCT cmd_complete_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct flush_occurred_evt_parms { - uint16 handle; -} BWL_POST_PACKED_STRUCT flush_occurred_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct write_remote_evt_parms { - uint8 status; - uint8 plh; -} BWL_POST_PACKED_STRUCT write_remote_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct read_local_evt_parms { - uint8 status; - uint8 plh; - uint16 len; - uint8 frag[1]; -} BWL_POST_PACKED_STRUCT read_local_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct read_local_info_evt_parms { - uint8 status; - uint8 AMP_status; - uint32 bandwidth; - uint32 gbandwidth; - uint32 latency; - uint32 PDU_size; - uint8 ctrl_type; - uint16 PAL_cap; - uint16 AMP_ASSOC_len; - uint32 max_flush_timeout; - uint32 be_flush_timeout; -} BWL_POST_PACKED_STRUCT read_local_info_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct log_link_evt_parms { - uint8 status; - uint16 llh; - uint8 plh; - uint8 tx_fs_ID; -} BWL_POST_PACKED_STRUCT log_link_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct disc_log_link_evt_parms { - uint8 status; - uint16 llh; - uint8 reason; -} BWL_POST_PACKED_STRUCT disc_log_link_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct log_link_cancel_evt_parms { - uint8 status; - uint8 plh; - uint8 tx_fs_ID; -} BWL_POST_PACKED_STRUCT log_link_cancel_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct flow_spec_mod_evt_parms { - uint8 status; - uint16 llh; -} BWL_POST_PACKED_STRUCT flow_spec_mod_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct phy_link_evt_parms { - uint8 status; - uint8 plh; -} BWL_POST_PACKED_STRUCT phy_link_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct dis_phy_link_evt_parms { - uint8 status; - uint8 plh; - uint8 reason; -} BWL_POST_PACKED_STRUCT dis_phy_link_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct read_ls_to_evt_parms { - uint8 status; - hci_handle_t handle; - uint16 timeout; -} BWL_POST_PACKED_STRUCT read_ls_to_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct read_lla_ca_to_evt_parms { - uint8 status; - uint16 timeout; -} BWL_POST_PACKED_STRUCT read_lla_ca_to_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct read_data_block_size_evt_parms { - uint8 status; - uint16 ACL_pkt_len; - uint16 data_block_len; - uint16 data_block_num; -} BWL_POST_PACKED_STRUCT read_data_block_size_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct data_blocks { - uint16 handle; - uint16 pkts; - uint16 blocks; -} BWL_POST_PACKED_STRUCT data_blocks_t; - -typedef BWL_PRE_PACKED_STRUCT struct num_completed_data_blocks_evt_parms { - uint16 num_blocks; - uint8 num_handles; - data_blocks_t completed[1]; -} BWL_POST_PACKED_STRUCT num_completed_data_blocks_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct befto_evt_parms { - uint8 status; - uint32 befto; -} BWL_POST_PACKED_STRUCT befto_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct srm_evt_parms { - uint8 status; - uint8 plh; - uint8 srm; -} BWL_POST_PACKED_STRUCT srm_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct contact_counter_evt_parms { - uint8 status; - uint8 llh[2]; - uint16 counter; -} BWL_POST_PACKED_STRUCT contact_counter_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct contact_counter_reset_evt_parms { - uint8 status; - uint8 llh[2]; -} BWL_POST_PACKED_STRUCT contact_counter_reset_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct read_linkq_evt_parms { - uint8 status; - hci_handle_t handle; - uint8 link_quality; -} BWL_POST_PACKED_STRUCT read_linkq_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct ld_evt_parms { - uint8 status; - uint8 ld_aware; - uint8 ld[2]; - uint8 ld_opts; - uint8 l_opts; -} BWL_POST_PACKED_STRUCT ld_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct eflush_complete_evt_parms { - uint16 handle; -} BWL_POST_PACKED_STRUCT eflush_complete_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct vendor_specific_evt_parms { - uint8 len; - uint8 parms[1]; -} BWL_POST_PACKED_STRUCT vendor_specific_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct local_version_info_evt_parms { - uint8 status; - uint8 hci_version; - uint16 hci_revision; - uint8 pal_version; - uint16 mfg_name; - uint16 pal_subversion; -} BWL_POST_PACKED_STRUCT local_version_info_evt_parms_t; - -#define MAX_SUPPORTED_CMD_BYTE 64 -typedef BWL_PRE_PACKED_STRUCT struct local_supported_cmd_evt_parms { - uint8 status; - uint8 cmd[MAX_SUPPORTED_CMD_BYTE]; -} BWL_POST_PACKED_STRUCT local_supported_cmd_evt_parms_t; - -typedef BWL_PRE_PACKED_STRUCT struct status_change_evt_parms { - uint8 status; - uint8 amp_status; -} BWL_POST_PACKED_STRUCT status_change_evt_parms_t; - -/* AMP HCI error codes */ -#define HCI_SUCCESS 0x00 -#define HCI_ERR_ILLEGAL_COMMAND 0x01 -#define HCI_ERR_NO_CONNECTION 0x02 -#define HCI_ERR_MEMORY_FULL 0x07 -#define HCI_ERR_CONNECTION_TIMEOUT 0x08 -#define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 -#define HCI_ERR_CONNECTION_EXISTS 0x0B -#define HCI_ERR_CONNECTION_DISALLOWED 0x0C -#define HCI_ERR_CONNECTION_ACCEPT_TIMEOUT 0x10 -#define HCI_ERR_UNSUPPORTED_VALUE 0x11 -#define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 -#define HCI_ERR_CONN_TERM_BY_LOCAL_HOST 0x16 -#define HCI_ERR_UNSPECIFIED 0x1F -#define HCI_ERR_UNIT_KEY_USED 0x26 -#define HCI_ERR_QOS_REJECTED 0x2D -#define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 -#define HCI_ERR_NO_SUITABLE_CHANNEL 0x39 -#define HCI_ERR_CHANNEL_MOVE 0xFF - -/* AMP HCI ACL Data packet format */ -typedef BWL_PRE_PACKED_STRUCT struct amp_hci_ACL_data { - uint16 handle; /* 12-bit connection handle + 2-bit PB and 2-bit BC flags */ - uint16 dlen; /* data total length */ - uint8 data[1]; -} BWL_POST_PACKED_STRUCT amp_hci_ACL_data_t; - -#define HCI_ACL_DATA_PREAMBLE_SIZE OFFSETOF(amp_hci_ACL_data_t, data) - -#define HCI_ACL_DATA_BC_FLAGS (0x0 << 14) -#define HCI_ACL_DATA_PB_FLAGS (0x3 << 12) - -#define HCI_ACL_DATA_HANDLE(handle) ((handle) & 0x0fff) -#define HCI_ACL_DATA_FLAGS(handle) ((handle) >> 12) - -/* AMP Activity Report packet formats */ -typedef BWL_PRE_PACKED_STRUCT struct amp_hci_activity_report { - uint8 ScheduleKnown; - uint8 NumReports; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT amp_hci_activity_report_t; - -typedef BWL_PRE_PACKED_STRUCT struct amp_hci_activity_report_triple { - uint32 StartTime; - uint32 Duration; - uint32 Periodicity; -} BWL_POST_PACKED_STRUCT amp_hci_activity_report_triple_t; - -#define HCI_AR_SCHEDULE_KNOWN 0x01 - - -/* This marks the end of a packed structure section. */ -#include <packed_section_end.h> - -#endif /* _bt_amp_hci_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/eapol.h b/drivers/net/wireless/bcmdhd/src/include/proto/eapol.h deleted file mode 100644 index f19dc55..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/eapol.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - * 802.1x EAPOL definitions - * - * See - * IEEE Std 802.1X-2001 - * IEEE 802.1X RADIUS Usage Guidelines - * - * Copyright (C) 2002 Broadcom Corporation - * - * $Id: eapol.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _eapol_h_ -#define _eapol_h_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - -/* This marks the start of a packed structure section. */ -#include <packed_section_start.h> - -#include <bcmcrypto/aeskeywrap.h> - -/* EAPOL for 802.3/Ethernet */ -typedef BWL_PRE_PACKED_STRUCT struct { - struct ether_header eth; /* 802.3/Ethernet header */ - unsigned char version; /* EAPOL protocol version */ - unsigned char type; /* EAPOL type */ - unsigned short length; /* Length of body */ - unsigned char body[1]; /* Body (optional) */ -} BWL_POST_PACKED_STRUCT eapol_header_t; - -#define EAPOL_HEADER_LEN 18 - -typedef struct { - unsigned char version; /* EAPOL protocol version */ - unsigned char type; /* EAPOL type */ - unsigned short length; /* Length of body */ -} eapol_hdr_t; - -#define EAPOL_HDR_LEN 4 - -/* EAPOL version */ -#define WPA2_EAPOL_VERSION 2 -#define WPA_EAPOL_VERSION 1 -#define LEAP_EAPOL_VERSION 1 -#define SES_EAPOL_VERSION 1 - -/* EAPOL types */ -#define EAP_PACKET 0 -#define EAPOL_START 1 -#define EAPOL_LOGOFF 2 -#define EAPOL_KEY 3 -#define EAPOL_ASF 4 - -/* EAPOL-Key types */ -#define EAPOL_RC4_KEY 1 -#define EAPOL_WPA2_KEY 2 /* 802.11i/WPA2 */ -#define EAPOL_WPA_KEY 254 /* WPA */ - -/* RC4 EAPOL-Key header field sizes */ -#define EAPOL_KEY_REPLAY_LEN 8 -#define EAPOL_KEY_IV_LEN 16 -#define EAPOL_KEY_SIG_LEN 16 - -/* RC4 EAPOL-Key */ -typedef BWL_PRE_PACKED_STRUCT struct { - unsigned char type; /* Key Descriptor Type */ - unsigned short length; /* Key Length (unaligned) */ - unsigned char replay[EAPOL_KEY_REPLAY_LEN]; /* Replay Counter */ - unsigned char iv[EAPOL_KEY_IV_LEN]; /* Key IV */ - unsigned char index; /* Key Flags & Index */ - unsigned char signature[EAPOL_KEY_SIG_LEN]; /* Key Signature */ - unsigned char key[1]; /* Key (optional) */ -} BWL_POST_PACKED_STRUCT eapol_key_header_t; - -#define EAPOL_KEY_HEADER_LEN 44 - -/* RC4 EAPOL-Key flags */ -#define EAPOL_KEY_FLAGS_MASK 0x80 -#define EAPOL_KEY_BROADCAST 0 -#define EAPOL_KEY_UNICAST 0x80 - -/* RC4 EAPOL-Key index */ -#define EAPOL_KEY_INDEX_MASK 0x7f - -/* WPA/802.11i/WPA2 EAPOL-Key header field sizes */ -#define EAPOL_WPA_KEY_REPLAY_LEN 8 -#define EAPOL_WPA_KEY_NONCE_LEN 32 -#define EAPOL_WPA_KEY_IV_LEN 16 -#define EAPOL_WPA_KEY_RSC_LEN 8 -#define EAPOL_WPA_KEY_ID_LEN 8 -#define EAPOL_WPA_KEY_MIC_LEN 16 -#define EAPOL_WPA_KEY_DATA_LEN (EAPOL_WPA_MAX_KEY_SIZE + AKW_BLOCK_LEN) -#define EAPOL_WPA_MAX_KEY_SIZE 32 - -/* WPA EAPOL-Key */ -typedef BWL_PRE_PACKED_STRUCT struct { - unsigned char type; /* Key Descriptor Type */ - unsigned short key_info; /* Key Information (unaligned) */ - unsigned short key_len; /* Key Length (unaligned) */ - unsigned char replay[EAPOL_WPA_KEY_REPLAY_LEN]; /* Replay Counter */ - unsigned char nonce[EAPOL_WPA_KEY_NONCE_LEN]; /* Nonce */ - unsigned char iv[EAPOL_WPA_KEY_IV_LEN]; /* Key IV */ - unsigned char rsc[EAPOL_WPA_KEY_RSC_LEN]; /* Key RSC */ - unsigned char id[EAPOL_WPA_KEY_ID_LEN]; /* WPA:Key ID, 802.11i/WPA2: Reserved */ - unsigned char mic[EAPOL_WPA_KEY_MIC_LEN]; /* Key MIC */ - unsigned short data_len; /* Key Data Length */ - unsigned char data[EAPOL_WPA_KEY_DATA_LEN]; /* Key data */ -} BWL_POST_PACKED_STRUCT eapol_wpa_key_header_t; - -#define EAPOL_WPA_KEY_LEN 95 - -/* WPA/802.11i/WPA2 KEY KEY_INFO bits */ -#define WPA_KEY_DESC_V1 0x01 -#define WPA_KEY_DESC_V2 0x02 -#define WPA_KEY_DESC_V3 0x03 -#define WPA_KEY_PAIRWISE 0x08 -#define WPA_KEY_INSTALL 0x40 -#define WPA_KEY_ACK 0x80 -#define WPA_KEY_MIC 0x100 -#define WPA_KEY_SECURE 0x200 -#define WPA_KEY_ERROR 0x400 -#define WPA_KEY_REQ 0x800 - -#define WPA_KEY_DESC_V2_OR_V3 WPA_KEY_DESC_V2 - -/* WPA-only KEY KEY_INFO bits */ -#define WPA_KEY_INDEX_0 0x00 -#define WPA_KEY_INDEX_1 0x10 -#define WPA_KEY_INDEX_2 0x20 -#define WPA_KEY_INDEX_3 0x30 -#define WPA_KEY_INDEX_MASK 0x30 -#define WPA_KEY_INDEX_SHIFT 0x04 - -/* 802.11i/WPA2-only KEY KEY_INFO bits */ -#define WPA_KEY_ENCRYPTED_DATA 0x1000 - -/* Key Data encapsulation */ -typedef BWL_PRE_PACKED_STRUCT struct { - uint8 type; - uint8 length; - uint8 oui[3]; - uint8 subtype; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT eapol_wpa2_encap_data_t; - -#define EAPOL_WPA2_ENCAP_DATA_HDR_LEN 6 - -#define WPA2_KEY_DATA_SUBTYPE_GTK 1 -#define WPA2_KEY_DATA_SUBTYPE_STAKEY 2 -#define WPA2_KEY_DATA_SUBTYPE_MAC 3 -#define WPA2_KEY_DATA_SUBTYPE_PMKID 4 -#define WPA2_KEY_DATA_SUBTYPE_IGTK 9 - -/* GTK encapsulation */ -typedef BWL_PRE_PACKED_STRUCT struct { - uint8 flags; - uint8 reserved; - uint8 gtk[EAPOL_WPA_MAX_KEY_SIZE]; -} BWL_POST_PACKED_STRUCT eapol_wpa2_key_gtk_encap_t; - -#define EAPOL_WPA2_KEY_GTK_ENCAP_HDR_LEN 2 - -#define WPA2_GTK_INDEX_MASK 0x03 -#define WPA2_GTK_INDEX_SHIFT 0x00 - -#define WPA2_GTK_TRANSMIT 0x04 - -/* IGTK encapsulation */ -typedef BWL_PRE_PACKED_STRUCT struct { - uint16 key_id; - uint8 ipn[6]; - uint8 key[EAPOL_WPA_MAX_KEY_SIZE]; -} BWL_POST_PACKED_STRUCT eapol_wpa2_key_igtk_encap_t; - -#define EAPOL_WPA2_KEY_IGTK_ENCAP_HDR_LEN 8 - -/* STAKey encapsulation */ -typedef BWL_PRE_PACKED_STRUCT struct { - uint8 reserved[2]; - uint8 mac[ETHER_ADDR_LEN]; - uint8 stakey[EAPOL_WPA_MAX_KEY_SIZE]; -} BWL_POST_PACKED_STRUCT eapol_wpa2_key_stakey_encap_t; - -#define WPA2_KEY_DATA_PAD 0xdd - - -/* This marks the end of a packed structure section. */ -#include <packed_section_end.h> - -#endif /* _eapol_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/ethernet.h b/drivers/net/wireless/bcmdhd/src/include/proto/ethernet.h deleted file mode 100644 index f9fc116..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/ethernet.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * From FreeBSD 2.2.7: Fundamental constants relating to ethernet. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: ethernet.h 300516 2011-12-04 17:39:44Z $ - */ - -#ifndef _NET_ETHERNET_H_ -#define _NET_ETHERNET_H_ - -#ifndef _TYPEDEFS_H_ -#include "typedefs.h" -#endif - - -#include <packed_section_start.h> - - - -#define ETHER_ADDR_LEN 6 - - -#define ETHER_TYPE_LEN 2 - - -#define ETHER_CRC_LEN 4 - - -#define ETHER_HDR_LEN (ETHER_ADDR_LEN * 2 + ETHER_TYPE_LEN) - - -#define ETHER_MIN_LEN 64 - - -#define ETHER_MIN_DATA 46 - - -#define ETHER_MAX_LEN 1518 - - -#define ETHER_MAX_DATA 1500 - - -#define ETHER_TYPE_MIN 0x0600 -#define ETHER_TYPE_IP 0x0800 -#define ETHER_TYPE_ARP 0x0806 -#define ETHER_TYPE_8021Q 0x8100 -#define ETHER_TYPE_IPV6 0x86dd -#define ETHER_TYPE_BRCM 0x886c -#define ETHER_TYPE_802_1X 0x888e -#define ETHER_TYPE_802_1X_PREAUTH 0x88c7 -#define ETHER_TYPE_WAI 0x88b4 -#define ETHER_TYPE_89_0D 0x890d - -#define ETHER_TYPE_IPV6 0x86dd - - -#define ETHER_BRCM_SUBTYPE_LEN 4 - - -#define ETHER_DEST_OFFSET (0 * ETHER_ADDR_LEN) -#define ETHER_SRC_OFFSET (1 * ETHER_ADDR_LEN) -#define ETHER_TYPE_OFFSET (2 * ETHER_ADDR_LEN) - - -#define ETHER_IS_VALID_LEN(foo) \ - ((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN) - -#define ETHER_FILL_MCAST_ADDR_FROM_IP(ea, mgrp_ip) { \ - ((uint8 *)ea)[0] = 0x01; \ - ((uint8 *)ea)[1] = 0x00; \ - ((uint8 *)ea)[2] = 0x5e; \ - ((uint8 *)ea)[3] = ((mgrp_ip) >> 16) & 0x7f; \ - ((uint8 *)ea)[4] = ((mgrp_ip) >> 8) & 0xff; \ - ((uint8 *)ea)[5] = ((mgrp_ip) >> 0) & 0xff; \ -} - -#ifndef __INCif_etherh - -BWL_PRE_PACKED_STRUCT struct ether_header { - uint8 ether_dhost[ETHER_ADDR_LEN]; - uint8 ether_shost[ETHER_ADDR_LEN]; - uint16 ether_type; -} BWL_POST_PACKED_STRUCT; - - -BWL_PRE_PACKED_STRUCT struct ether_addr { - uint8 octet[ETHER_ADDR_LEN]; -} BWL_POST_PACKED_STRUCT; -#endif - - -#define ETHER_SET_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] | 2)) -#define ETHER_IS_LOCALADDR(ea) (((uint8 *)(ea))[0] & 2) -#define ETHER_CLR_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] & 0xfd)) -#define ETHER_TOGGLE_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] ^ 2)) - - -#define ETHER_SET_UNICAST(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] & ~1)) - - -#define ETHER_ISMULTI(ea) (((const uint8 *)(ea))[0] & 1) - - - -#define ether_cmp(a, b) (!(((short*)(a))[0] == ((short*)(b))[0]) | \ - !(((short*)(a))[1] == ((short*)(b))[1]) | \ - !(((short*)(a))[2] == ((short*)(b))[2])) - - -#define ether_copy(s, d) { \ - ((short*)(d))[0] = ((const short*)(s))[0]; \ - ((short*)(d))[1] = ((const short*)(s))[1]; \ - ((short*)(d))[2] = ((const short*)(s))[2]; } - - -static const struct ether_addr ether_bcast = {{255, 255, 255, 255, 255, 255}}; -static const struct ether_addr ether_null = {{0, 0, 0, 0, 0, 0}}; - -#define ETHER_ISBCAST(ea) ((((uint8 *)(ea))[0] & \ - ((uint8 *)(ea))[1] & \ - ((uint8 *)(ea))[2] & \ - ((uint8 *)(ea))[3] & \ - ((uint8 *)(ea))[4] & \ - ((uint8 *)(ea))[5]) == 0xff) -#define ETHER_ISNULLADDR(ea) ((((uint8 *)(ea))[0] | \ - ((uint8 *)(ea))[1] | \ - ((uint8 *)(ea))[2] | \ - ((uint8 *)(ea))[3] | \ - ((uint8 *)(ea))[4] | \ - ((uint8 *)(ea))[5]) == 0) - -#define ETHER_MOVE_HDR(d, s) \ -do { \ - struct ether_header t; \ - t = *(struct ether_header *)(s); \ - *(struct ether_header *)(d) = t; \ -} while (0) - - -#include <packed_section_end.h> - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/p2p.h b/drivers/net/wireless/bcmdhd/src/include/proto/p2p.h deleted file mode 100644 index 0c974c7..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/p2p.h +++ /dev/null @@ -1,564 +0,0 @@ -/* - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * Fundamental types and constants relating to WFA P2P (aka WiFi Direct) - * - * $Id: p2p.h,v 9.17.2.4 2010-12-15 21:41:21 $ - */ - -#ifndef _P2P_H_ -#define _P2P_H_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif -#include <wlioctl.h> -#include <proto/802.11.h> - -/* This marks the start of a packed structure section. */ -#include <packed_section_start.h> - - -/* WiFi P2P OUI values */ -#define P2P_OUI WFA_OUI /* WiFi P2P OUI */ -#define P2P_VER WFA_OUI_TYPE_P2P /* P2P version: 9=WiFi P2P v1.0 */ - -#define P2P_IE_ID 0xdd /* P2P IE element ID */ - -/* WiFi P2P IE */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_ie { - uint8 id; /* IE ID: 0xDD */ - uint8 len; /* IE length */ - uint8 OUI[3]; /* WiFi P2P specific OUI: P2P_OUI */ - uint8 oui_type; /* Identifies P2P version: P2P_VER */ - uint8 subelts[1]; /* variable length subelements */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_ie wifi_p2p_ie_t; - -#define P2P_IE_FIXED_LEN 6 - -#define P2P_ATTR_ID_OFF 0 -#define P2P_ATTR_LEN_OFF 1 -#define P2P_ATTR_DATA_OFF 3 - -#define P2P_ATTR_ID_LEN 1 -#define P2P_ATTR_LEN_LEN 2 -#define P2P_ATTR_HDR_LEN 3 /* ID + 2-byte length field spec 1.02 */ - -/* P2P IE Subelement IDs from WiFi P2P Technical Spec 1.00 */ -#define P2P_SEID_STATUS 0 /* Status */ -#define P2P_SEID_MINOR_RC 1 /* Minor Reason Code */ -#define P2P_SEID_P2P_INFO 2 /* P2P Capability (capabilities info) */ -#define P2P_SEID_DEV_ID 3 /* P2P Device ID */ -#define P2P_SEID_INTENT 4 /* Group Owner Intent */ -#define P2P_SEID_CFG_TIMEOUT 5 /* Configuration Timeout */ -#define P2P_SEID_CHANNEL 6 /* Channel */ -#define P2P_SEID_GRP_BSSID 7 /* P2P Group BSSID */ -#define P2P_SEID_XT_TIMING 8 /* Extended Listen Timing */ -#define P2P_SEID_INTINTADDR 9 /* Intended P2P Interface Address */ -#define P2P_SEID_P2P_MGBTY 10 /* P2P Manageability */ -#define P2P_SEID_CHAN_LIST 11 /* Channel List */ -#define P2P_SEID_ABSENCE 12 /* Notice of Absence */ -#define P2P_SEID_DEV_INFO 13 /* Device Info */ -#define P2P_SEID_GROUP_INFO 14 /* Group Info */ -#define P2P_SEID_GROUP_ID 15 /* Group ID */ -#define P2P_SEID_P2P_IF 16 /* P2P Interface */ -#define P2P_SEID_OP_CHANNEL 17 -#define P2P_SEID_INVITE_FLAGS 18 -#define P2P_SEID_VNDR 221 /* Vendor-specific subelement */ - -#define P2P_SE_VS_ID_SERVICES 0x1b /* BRCM subel: L2 Services */ - - -/* WiFi P2P IE subelement: P2P Capability (capabilities info) */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_info_se_s { - uint8 eltId; /* SE ID: P2P_SEID_P2P_INFO */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 dev; /* Device Capability Bitmap */ - uint8 group; /* Group Capability Bitmap */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_info_se_s wifi_p2p_info_se_t; - -/* P2P Capability subelement's Device Capability Bitmap bit values */ -#define P2P_CAPSE_DEV_SERVICE_DIS 0x1 /* Service Discovery */ -#define P2P_CAPSE_DEV_CLIENT_DIS 0x2 /* Client Discoverability */ -#define P2P_CAPSE_DEV_CONCURRENT 0x4 /* Concurrent Operation */ -#define P2P_CAPSE_DEV_INFRA_MAN 0x8 /* P2P Infrastructure Managed */ -#define P2P_CAPSE_DEV_LIMIT 0x10 /* P2P Device Limit */ -#define P2P_CAPSE_INVITE_PROC 0x20 /* P2P Invitation Procedure */ - -/* P2P Capability subelement's Group Capability Bitmap bit values */ -#define P2P_CAPSE_GRP_OWNER 0x1 /* P2P Group Owner */ -#define P2P_CAPSE_PERSIST_GRP 0x2 /* Persistent P2P Group */ -#define P2P_CAPSE_GRP_LIMIT 0x4 /* P2P Group Limit */ -#define P2P_CAPSE_GRP_INTRA_BSS 0x8 /* Intra-BSS Distribution */ -#define P2P_CAPSE_GRP_X_CONNECT 0x10 /* Cross Connection */ -#define P2P_CAPSE_GRP_PERSISTENT 0x20 /* Persistent Reconnect */ -#define P2P_CAPSE_GRP_FORMATION 0x40 /* Group Formation */ - - -/* WiFi P2P IE subelement: Group Owner Intent */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_intent_se_s { - uint8 eltId; /* SE ID: P2P_SEID_INTENT */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 intent; /* Intent Value 0...15 (0=legacy 15=master only) */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_intent_se_s wifi_p2p_intent_se_t; - -/* WiFi P2P IE subelement: Configuration Timeout */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_cfg_tmo_se_s { - uint8 eltId; /* SE ID: P2P_SEID_CFG_TIMEOUT */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 go_tmo; /* GO config timeout in units of 10 ms */ - uint8 client_tmo; /* Client config timeout in units of 10 ms */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_cfg_tmo_se_s wifi_p2p_cfg_tmo_se_t; - - -BWL_PRE_PACKED_STRUCT struct wifi_p2p_listen_channel_se_s { - uint8 eltId; - uint8 len[2]; - uint8 country[3]; - uint8 op_class; - uint8 channel; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_listen_channel_se_s wifi_p2p_listen_channel_se_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_grp_bssid_se_s { - uint8 eltId; - uint8 len[2]; - uint8 mac[6]; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_grp_bssid_se_s wifi_p2p_grp_bssid_se_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_grp_id_se_s { - uint8 eltId; - uint8 len[2]; - uint8 mac[6]; - uint8 ssid[1]; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_grp_id_se_s wifi_p2p_grp_id_se_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_intf_se_s { - uint8 eltId; - uint8 len[2]; - uint8 mac[6]; - uint8 ifaddrs; - uint8 ifaddr[1][6]; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_intf_se_s wifi_p2p_intf_se_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_status_se_s { - uint8 eltId; /* SE ID: P2P_SEID_STATUS */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 status; /* Status Code: P2P_STATSE_* */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_status_se_s wifi_p2p_status_se_t; - -/* Status subelement Status Code definitions */ -#define P2P_STATSE_SUCCESS 0 - /* Success */ -#define P2P_STATSE_FAIL_INFO_CURR_UNAVAIL 1 - /* Failed, information currently unavailable */ -#define P2P_STATSE_PASSED_UP P2P_STATSE_FAIL_INFO_CURR_UNAVAIL - /* Old name for above in P2P spec 1.08 and older */ -#define P2P_STATSE_FAIL_INCOMPAT_PARAMS 2 - /* Failed, incompatible parameters */ -#define P2P_STATSE_FAIL_LIMIT_REACHED 3 - /* Failed, limit reached */ -#define P2P_STATSE_FAIL_INVALID_PARAMS 4 - /* Failed, invalid parameters */ -#define P2P_STATSE_FAIL_UNABLE_TO_ACCOM 5 - /* Failed, unable to accomodate request */ -#define P2P_STATSE_FAIL_PROTO_ERROR 6 - /* Failed, previous protocol error or disruptive behaviour */ -#define P2P_STATSE_FAIL_NO_COMMON_CHAN 7 - /* Failed, no common channels */ -#define P2P_STATSE_FAIL_UNKNOWN_GROUP 8 - /* Failed, unknown P2P Group */ -#define P2P_STATSE_FAIL_INTENT 9 - /* Failed, both peers indicated Intent 15 in GO Negotiation */ -#define P2P_STATSE_FAIL_INCOMPAT_PROVIS 10 - /* Failed, incompatible provisioning method */ -#define P2P_STATSE_FAIL_USER_REJECT 11 - /* Failed, rejected by user */ - -/* WiFi P2P IE attribute: Extended Listen Timing */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_ext_se_s { - uint8 eltId; /* ID: P2P_SEID_EXT_TIMING */ - uint8 len[2]; /* length not including eltId, len fields */ - uint8 avail[2]; /* availibility period */ - uint8 interval[2]; /* availibility interval */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_ext_se_s wifi_p2p_ext_se_t; - -#define P2P_EXT_MIN 10 /* minimum 10ms */ - -/* WiFi P2P IE subelement: Intended P2P Interface Address */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_intintad_se_s { - uint8 eltId; /* SE ID: P2P_SEID_INTINTADDR */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 mac[6]; /* intended P2P interface MAC address */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_intintad_se_s wifi_p2p_intintad_se_t; - -/* WiFi P2P IE subelement: Channel */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_channel_se_s { - uint8 eltId; /* SE ID: P2P_SEID_STATUS */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 band; /* Regulatory Class (band) */ - uint8 channel; /* Channel */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_channel_se_s wifi_p2p_channel_se_t; - - -/* Channel Entry structure within the Channel List SE */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_chanlist_entry_s { - uint8 band; /* Regulatory Class (band) */ - uint8 num_channels; /* # of channels in the channel list */ - uint8 channels[WL_NUMCHANNELS]; /* Channel List */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_chanlist_entry_s wifi_p2p_chanlist_entry_t; -#define WIFI_P2P_CHANLIST_SE_MAX_ENTRIES 2 - -/* WiFi P2P IE subelement: Channel List */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_chanlist_se_s { - uint8 eltId; /* SE ID: P2P_SEID_STATUS */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 country[3]; /* Country String */ - uint8 num_entries; /* # of channel entries */ - wifi_p2p_chanlist_entry_t entries[WIFI_P2P_CHANLIST_SE_MAX_ENTRIES]; - /* Channel Entry List */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_chanlist_se_s wifi_p2p_chanlist_se_t; - -/* WiFi P2P IE's Device Info subelement */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_pri_devtype_s { - uint16 cat_id; - uint8 OUI[3]; - uint8 oui_type; - uint16 sub_cat_id; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_pri_devtype_s wifi_p2p_pri_devtype_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_devinfo_se_s { - uint8 eltId; /* SE ID: P2P_SEID_DEVINFO */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 mac[6]; /* P2P Device MAC address */ - uint16 wps_cfg_meths; /* Config Methods: reg_prototlv.h WPS_CONFMET_* */ - uint8 pri_devtype[8]; /* Primary Device Type */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_devinfo_se_s wifi_p2p_devinfo_se_t; - -#define P2P_DEV_TYPE_LEN 8 - -/* WiFi P2P IE's Group Info subelement Client Info Descriptor */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_cid_fixed_s { - uint8 len; - uint8 devaddr[ETHER_ADDR_LEN]; /* P2P Device Address */ - uint8 ifaddr[ETHER_ADDR_LEN]; /* P2P Interface Address */ - uint8 devcap; /* Device Capability */ - uint8 cfg_meths[2]; /* Config Methods: reg_prototlv.h WPS_CONFMET_* */ - uint8 pridt[P2P_DEV_TYPE_LEN]; /* Primary Device Type */ - uint8 secdts; /* Number of Secondary Device Types */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_cid_fixed_s wifi_p2p_cid_fixed_t; - -/* WiFi P2P IE's Device ID subelement */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_devid_se_s { - uint8 eltId; - uint8 len[2]; - struct ether_addr addr; /* P2P Device MAC address */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_devid_se_s wifi_p2p_devid_se_t; - -/* WiFi P2P IE subelement: P2P Manageability */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_mgbt_se_s { - uint8 eltId; /* SE ID: P2P_SEID_P2P_MGBTY */ - uint8 len[2]; /* SE length not including eltId, len fields */ - uint8 mg_bitmap; /* manageability bitmap */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_mgbt_se_s wifi_p2p_mgbt_se_t; -/* mg_bitmap field bit values */ -#define P2P_MGBTSE_P2PDEVMGMT_FLAG 0x1 /* AP supports Managed P2P Device */ - -/* WiFi P2P IE subelement: Group Info */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_grpinfo_se_s { - uint8 eltId; /* SE ID: P2P_SEID_GROUP_INFO */ - uint8 len[2]; /* SE length not including eltId, len fields */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_grpinfo_se_s wifi_p2p_grpinfo_se_t; - - -BWL_PRE_PACKED_STRUCT struct wifi_p2p_op_channel_se_s { - uint8 eltId; - uint8 len[2]; - uint8 country[3]; - uint8 op_class; - uint8 channel; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_op_channel_se_s wifi_p2p_op_channel_se_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_invite_flags_se_s { - uint8 eltId; - uint8 len[2]; - uint8 flags; -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_invite_flags_se_s wifi_p2p_invite_flags_se_t; -BWL_PRE_PACKED_STRUCT struct wifi_p2p_action_frame { - uint8 category; /* P2P_AF_CATEGORY */ - uint8 OUI[3]; /* OUI - P2P_OUI */ - uint8 type; /* OUI Type - P2P_VER */ - uint8 subtype; /* OUI Subtype - P2P_AF_* */ - uint8 dialog_token; /* nonzero, identifies req/resp tranaction */ - uint8 elts[1]; /* Variable length information elements. Max size = - * ACTION_FRAME_SIZE - sizeof(this structure) - 1 - */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_action_frame wifi_p2p_action_frame_t; -#define P2P_AF_CATEGORY 0x7f - -#define P2P_AF_FIXED_LEN 7 - -/* WiFi P2P Action Frame OUI Subtypes */ -#define P2P_AF_NOTICE_OF_ABSENCE 0 /* Notice of Absence */ -#define P2P_AF_PRESENCE_REQ 1 /* P2P Presence Request */ -#define P2P_AF_PRESENCE_RSP 2 /* P2P Presence Response */ -#define P2P_AF_GO_DISC_REQ 3 /* GO Discoverability Request */ - - -/* WiFi P2P Public Action Frame */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_pub_act_frame { - uint8 category; /* P2P_PUB_AF_CATEGORY */ - uint8 action; /* P2P_PUB_AF_ACTION */ - uint8 oui[3]; /* P2P_OUI */ - uint8 oui_type; /* OUI type - P2P_VER */ - uint8 subtype; /* OUI subtype - P2P_TYPE_* */ - uint8 dialog_token; /* nonzero, identifies req/rsp transaction */ - uint8 elts[1]; /* Variable length information elements. Max size = - * ACTION_FRAME_SIZE - sizeof(this structure) - 1 - */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_pub_act_frame wifi_p2p_pub_act_frame_t; -#define P2P_PUB_AF_FIXED_LEN 8 -#define P2P_PUB_AF_CATEGORY 0x04 -#define P2P_PUB_AF_ACTION 0x09 - -/* WiFi P2P Public Action Frame OUI Subtypes */ -#define P2P_PAF_GON_REQ 0 /* Group Owner Negotiation Req */ -#define P2P_PAF_GON_RSP 1 /* Group Owner Negotiation Rsp */ -#define P2P_PAF_GON_CONF 2 /* Group Owner Negotiation Confirm */ -#define P2P_PAF_INVITE_REQ 3 /* P2P Invitation Request */ -#define P2P_PAF_INVITE_RSP 4 /* P2P Invitation Response */ -#define P2P_PAF_DEVDIS_REQ 5 /* Device Discoverability Request */ -#define P2P_PAF_DEVDIS_RSP 6 /* Device Discoverability Response */ -#define P2P_PAF_PROVDIS_REQ 7 /* Provision Discovery Request */ -#define P2P_PAF_PROVDIS_RSP 8 /* Provision Discovery Request */ - -/* TODO: Stop using these obsolete aliases for P2P_PAF_GON_* */ -#define P2P_TYPE_MNREQ P2P_PAF_GON_REQ -#define P2P_TYPE_MNRSP P2P_PAF_GON_RSP -#define P2P_TYPE_MNCONF P2P_PAF_GON_CONF - -/* WiFi P2P IE subelement: Notice of Absence */ -BWL_PRE_PACKED_STRUCT struct wifi_p2p_noa_desc { - uint8 cnt_type; /* Count/Type */ - uint32 duration; /* Duration */ - uint32 interval; /* Interval */ - uint32 start; /* Start Time */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_noa_desc wifi_p2p_noa_desc_t; - -BWL_PRE_PACKED_STRUCT struct wifi_p2p_noa_se { - uint8 eltId; /* Subelement ID */ - uint8 len[2]; /* Length */ - uint8 index; /* Index */ - uint8 ops_ctw_parms; /* CTWindow and OppPS Parameters */ - wifi_p2p_noa_desc_t desc[1]; /* Notice of Absence Descriptor(s) */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2p_noa_se wifi_p2p_noa_se_t; - -#define P2P_NOA_SE_FIXED_LEN 5 - -/* cnt_type field values */ -#define P2P_NOA_DESC_CNT_RESERVED 0 /* reserved and should not be used */ -#define P2P_NOA_DESC_CNT_REPEAT 255 /* continuous schedule */ -#define P2P_NOA_DESC_TYPE_PREFERRED 1 /* preferred values */ -#define P2P_NOA_DESC_TYPE_ACCEPTABLE 2 /* acceptable limits */ - -/* ctw_ops_parms field values */ -#define P2P_NOA_CTW_MASK 0x7f -#define P2P_NOA_OPS_MASK 0x80 -#define P2P_NOA_OPS_SHIFT 7 - -#define P2P_CTW_MIN 10 /* minimum 10TU */ - -/* - * P2P Service Discovery related - */ -#define P2PSD_ACTION_CATEGORY 0x04 - /* Public action frame */ -#define P2PSD_ACTION_ID_GAS_IREQ 0x0a - /* Action value for GAS Initial Request AF */ -#define P2PSD_ACTION_ID_GAS_IRESP 0x0b - /* Action value for GAS Initial Response AF */ -#define P2PSD_ACTION_ID_GAS_CREQ 0x0c - /* Action value for GAS Comback Request AF */ -#define P2PSD_ACTION_ID_GAS_CRESP 0x0d - /* Action value for GAS Comback Response AF */ -#define P2PSD_AD_EID 0x6c - /* Advertisement Protocol IE ID */ -#define P2PSD_ADP_TUPLE_QLMT_PAMEBI 0x00 - /* Query Response Length Limit 7 bits plus PAME-BI 1 bit */ -#define P2PSD_ADP_PROTO_ID 0x00 - /* Advertisement Protocol ID. Always 0 for P2P SD */ -#define P2PSD_GAS_OUI P2P_OUI - /* WFA OUI */ -#define P2PSD_GAS_OUI_SUBTYPE P2P_VER - /* OUI Subtype for GAS IE */ -#define P2PSD_GAS_NQP_INFOID 0xDDDD - /* NQP Query Info ID: 56797 */ -#define P2PSD_GAS_COMEBACKDEALY 0x00 - /* Not used in the Native GAS protocol */ - -/* Service Protocol Type */ -typedef enum p2psd_svc_protype { - SVC_RPOTYPE_ALL = 0, - SVC_RPOTYPE_BONJOUR = 1, - SVC_RPOTYPE_UPNP = 2, - SVC_RPOTYPE_WSD = 3, - SVC_RPOTYPE_VENDOR = 255 -} p2psd_svc_protype_t; - -/* Service Discovery response status code */ -typedef enum { - P2PSD_RESP_STATUS_SUCCESS = 0, - P2PSD_RESP_STATUS_PROTYPE_NA = 1, - P2PSD_RESP_STATUS_DATA_NA = 2, - P2PSD_RESP_STATUS_BAD_REQUEST = 3 -} p2psd_resp_status_t; - -/* Advertisement Protocol IE tuple field */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_adp_tpl { - uint8 llm_pamebi; /* Query Response Length Limit bit 0-6, set to 0 plus - * Pre-Associated Message Exchange BSSID Independent bit 7, set to 0 - */ - uint8 adp_id; /* Advertisement Protocol ID: 0 for NQP Native Query Protocol */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_adp_tpl wifi_p2psd_adp_tpl_t; - -/* Advertisement Protocol IE */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_adp_ie { - uint8 id; /* IE ID: 0x6c - 108 */ - uint8 len; /* IE length */ - wifi_p2psd_adp_tpl_t adp_tpl; /* Advertisement Protocol Tuple field. Only one - * tuple is defined for P2P Service Discovery - */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_adp_ie wifi_p2psd_adp_ie_t; - -/* NQP Vendor-specific Content */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_nqp_query_vsc { - uint8 oui_subtype; /* OUI Subtype: 0x09 */ - uint16 svc_updi; /* Service Update Indicator */ - uint8 svc_tlvs[1]; /* wifi_p2psd_qreq_tlv_t type for service request, - * wifi_p2psd_qresp_tlv_t type for service response - */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_nqp_query_vsc wifi_p2psd_nqp_query_vsc_t; - -/* Service Request TLV */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qreq_tlv { - uint16 len; /* Length: 5 plus size of Query Data */ - uint8 svc_prot; /* Service Protocol Type */ - uint8 svc_tscid; /* Service Transaction ID */ - uint8 query_data[1]; /* Query Data, passed in from above Layer 2 */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_qreq_tlv wifi_p2psd_qreq_tlv_t; - -/* Query Request Frame, defined in generic format, instead of NQP specific */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qreq_frame { - uint16 info_id; /* Info ID: 0xDDDD */ - uint16 len; /* Length of service request TLV, 5 plus the size of request data */ - uint8 oui[3]; /* WFA OUI: 0x0050F2 */ - uint8 qreq_vsc[1]; /* Vendor-specific Content: wifi_p2psd_nqp_query_vsc_t type for NQP */ - -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_qreq_frame wifi_p2psd_qreq_frame_t; - -/* GAS Initial Request AF body, "elts" in wifi_p2p_pub_act_frame */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_ireq_frame { - wifi_p2psd_adp_ie_t adp_ie; /* Advertisement Protocol IE */ - uint16 qreq_len; /* Query Request Length */ - uint8 qreq_frm[1]; /* Query Request Frame wifi_p2psd_qreq_frame_t */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_gas_ireq_frame wifi_p2psd_gas_ireq_frame_t; - -/* Service Response TLV */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qresp_tlv { - uint16 len; /* Length: 5 plus size of Query Data */ - uint8 svc_prot; /* Service Protocol Type */ - uint8 svc_tscid; /* Service Transaction ID */ - uint8 status; /* Value defined in Table 57 of P2P spec. */ - uint8 query_data[1]; /* Response Data, passed in from above Layer 2 */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_qresp_tlv wifi_p2psd_qresp_tlv_t; - -/* Query Response Frame, defined in generic format, instead of NQP specific */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qresp_frame { - uint16 info_id; /* Info ID: 0xDDDD */ - uint16 len; /* Lenth of service response TLV, 6 plus the size of resp data */ - uint8 oui[3]; /* WFA OUI: 0x0050F2 */ - uint8 qresp_vsc[1]; /* Vendor-specific Content: wifi_p2psd_qresp_tlv_t type for NQP */ - -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_qresp_frame wifi_p2psd_qresp_frame_t; - -/* GAS Initial Response AF body, "elts" in wifi_p2p_pub_act_frame */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_iresp_frame { - uint16 status; /* Value defined in Table 7-23 of IEEE P802.11u */ - uint16 cb_delay; /* GAS Comeback Delay */ - wifi_p2psd_adp_ie_t adp_ie; /* Advertisement Protocol IE */ - uint16 qresp_len; /* Query Response Length */ - uint8 qresp_frm[1]; /* Query Response Frame wifi_p2psd_qresp_frame_t */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_gas_iresp_frame wifi_p2psd_gas_iresp_frame_t; - -/* GAS Comeback Response AF body, "elts" in wifi_p2p_pub_act_frame */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_cresp_frame { - uint16 status; /* Value defined in Table 7-23 of IEEE P802.11u */ - uint8 fragment_id; /* Fragmentation ID */ - uint16 cb_delay; /* GAS Comeback Delay */ - wifi_p2psd_adp_ie_t adp_ie; /* Advertisement Protocol IE */ - uint16 qresp_len; /* Query Response Length */ - uint8 qresp_frm[1]; /* Query Response Frame wifi_p2psd_qresp_frame_t */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_gas_cresp_frame wifi_p2psd_gas_cresp_frame_t; - -/* Wi-Fi GAS Public Action Frame */ -BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_pub_act_frame { - uint8 category; /* 0x04 Public Action Frame */ - uint8 action; /* 0x6c Advertisement Protocol */ - uint8 dialog_token; /* nonzero, identifies req/rsp transaction */ - uint8 query_data[1]; /* Query Data. wifi_p2psd_gas_ireq_frame_t - * or wifi_p2psd_gas_iresp_frame_t format - */ -} BWL_POST_PACKED_STRUCT; -typedef struct wifi_p2psd_gas_pub_act_frame wifi_p2psd_gas_pub_act_frame_t; - -/* This marks the end of a packed structure section. */ -#include <packed_section_end.h> - -#endif /* _P2P_H_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/sdspi.h b/drivers/net/wireless/bcmdhd/src/include/proto/sdspi.h deleted file mode 100644 index 94a2d3c..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/sdspi.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * SD-SPI Protocol Standard - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sdspi.h 241182 2011-02-17 21:50:03Z $ - */ -#ifndef _SD_SPI_H -#define _SD_SPI_H - -#define SPI_START_M BITFIELD_MASK(1) /* Bit [31] - Start Bit */ -#define SPI_START_S 31 -#define SPI_DIR_M BITFIELD_MASK(1) /* Bit [30] - Direction */ -#define SPI_DIR_S 30 -#define SPI_CMD_INDEX_M BITFIELD_MASK(6) /* Bits [29:24] - Command number */ -#define SPI_CMD_INDEX_S 24 -#define SPI_RW_M BITFIELD_MASK(1) /* Bit [23] - Read=0, Write=1 */ -#define SPI_RW_S 23 -#define SPI_FUNC_M BITFIELD_MASK(3) /* Bits [22:20] - Function Number */ -#define SPI_FUNC_S 20 -#define SPI_RAW_M BITFIELD_MASK(1) /* Bit [19] - Read After Wr */ -#define SPI_RAW_S 19 -#define SPI_STUFF_M BITFIELD_MASK(1) /* Bit [18] - Stuff bit */ -#define SPI_STUFF_S 18 -#define SPI_BLKMODE_M BITFIELD_MASK(1) /* Bit [19] - Blockmode 1=blk */ -#define SPI_BLKMODE_S 19 -#define SPI_OPCODE_M BITFIELD_MASK(1) /* Bit [18] - OP Code */ -#define SPI_OPCODE_S 18 -#define SPI_ADDR_M BITFIELD_MASK(17) /* Bits [17:1] - Address */ -#define SPI_ADDR_S 1 -#define SPI_STUFF0_M BITFIELD_MASK(1) /* Bit [0] - Stuff bit */ -#define SPI_STUFF0_S 0 - -#define SPI_RSP_START_M BITFIELD_MASK(1) /* Bit [7] - Start Bit (always 0) */ -#define SPI_RSP_START_S 7 -#define SPI_RSP_PARAM_ERR_M BITFIELD_MASK(1) /* Bit [6] - Parameter Error */ -#define SPI_RSP_PARAM_ERR_S 6 -#define SPI_RSP_RFU5_M BITFIELD_MASK(1) /* Bit [5] - RFU (Always 0) */ -#define SPI_RSP_RFU5_S 5 -#define SPI_RSP_FUNC_ERR_M BITFIELD_MASK(1) /* Bit [4] - Function number error */ -#define SPI_RSP_FUNC_ERR_S 4 -#define SPI_RSP_CRC_ERR_M BITFIELD_MASK(1) /* Bit [3] - COM CRC Error */ -#define SPI_RSP_CRC_ERR_S 3 -#define SPI_RSP_ILL_CMD_M BITFIELD_MASK(1) /* Bit [2] - Illegal Command error */ -#define SPI_RSP_ILL_CMD_S 2 -#define SPI_RSP_RFU1_M BITFIELD_MASK(1) /* Bit [1] - RFU (Always 0) */ -#define SPI_RSP_RFU1_S 1 -#define SPI_RSP_IDLE_M BITFIELD_MASK(1) /* Bit [0] - In idle state */ -#define SPI_RSP_IDLE_S 0 - -/* SD-SPI Protocol Definitions */ -#define SDSPI_COMMAND_LEN 6 /* Number of bytes in an SD command */ -#define SDSPI_START_BLOCK 0xFE /* SD Start Block Token */ -#define SDSPI_IDLE_PAD 0xFF /* SD-SPI idle value for MOSI */ -#define SDSPI_START_BIT_MASK 0x80 - -#endif /* _SD_SPI_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/vlan.h b/drivers/net/wireless/bcmdhd/src/include/proto/vlan.h deleted file mode 100644 index 168be85..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/vlan.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * 802.1Q VLAN protocol definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: vlan.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _vlan_h_ -#define _vlan_h_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - - -#include <packed_section_start.h> - -#define VLAN_VID_MASK 0xfff -#define VLAN_CFI_SHIFT 12 -#define VLAN_PRI_SHIFT 13 - -#define VLAN_PRI_MASK 7 - -#define VLAN_TAG_LEN 4 -#define VLAN_TAG_OFFSET (2 * ETHER_ADDR_LEN) - -#define VLAN_TPID 0x8100 - -struct ethervlan_header { - uint8 ether_dhost[ETHER_ADDR_LEN]; - uint8 ether_shost[ETHER_ADDR_LEN]; - uint16 vlan_type; - uint16 vlan_tag; - uint16 ether_type; -}; - -#define ETHERVLAN_HDR_LEN (ETHER_HDR_LEN + VLAN_TAG_LEN) - - - -#include <packed_section_end.h> - -#define ETHERVLAN_MOVE_HDR(d, s) \ -do { \ - struct ethervlan_header t; \ - t = *(struct ethervlan_header *)(s); \ - *(struct ethervlan_header *)(d) = t; \ -} while (0) - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/wpa.h b/drivers/net/wireless/bcmdhd/src/include/proto/wpa.h deleted file mode 100644 index b8a10e0..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/wpa.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Fundamental types and constants relating to WPA - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: wpa.h 261155 2011-05-23 23:51:32Z $ - */ - -#ifndef _proto_wpa_h_ -#define _proto_wpa_h_ - -#include <typedefs.h> -#include <proto/ethernet.h> - - - -#include <packed_section_start.h> - -#include <dhd_sec_feature.h> - - -#define DOT11_RC_INVALID_WPA_IE 13 -#define DOT11_RC_MIC_FAILURE 14 -#define DOT11_RC_4WH_TIMEOUT 15 -#define DOT11_RC_GTK_UPDATE_TIMEOUT 16 -#define DOT11_RC_WPA_IE_MISMATCH 17 -#define DOT11_RC_INVALID_MC_CIPHER 18 -#define DOT11_RC_INVALID_UC_CIPHER 19 -#define DOT11_RC_INVALID_AKMP 20 -#define DOT11_RC_BAD_WPA_VERSION 21 -#define DOT11_RC_INVALID_WPA_CAP 22 -#define DOT11_RC_8021X_AUTH_FAIL 23 - -#define WPA2_PMKID_LEN 16 - - -typedef BWL_PRE_PACKED_STRUCT struct -{ - uint8 tag; - uint8 length; - uint8 oui[3]; - uint8 oui_type; - BWL_PRE_PACKED_STRUCT struct { - uint8 low; - uint8 high; - } BWL_POST_PACKED_STRUCT version; -} BWL_POST_PACKED_STRUCT wpa_ie_fixed_t; -#define WPA_IE_OUITYPE_LEN 4 -#define WPA_IE_FIXED_LEN 8 -#define WPA_IE_TAG_FIXED_LEN 6 - -typedef BWL_PRE_PACKED_STRUCT struct { - uint8 tag; - uint8 length; - BWL_PRE_PACKED_STRUCT struct { - uint8 low; - uint8 high; - } BWL_POST_PACKED_STRUCT version; -} BWL_POST_PACKED_STRUCT wpa_rsn_ie_fixed_t; -#define WPA_RSN_IE_FIXED_LEN 4 -#define WPA_RSN_IE_TAG_FIXED_LEN 2 -typedef uint8 wpa_pmkid_t[WPA2_PMKID_LEN]; - - -typedef BWL_PRE_PACKED_STRUCT struct -{ - uint8 oui[3]; - uint8 type; -} BWL_POST_PACKED_STRUCT wpa_suite_t, wpa_suite_mcast_t; -#define WPA_SUITE_LEN 4 - - -typedef BWL_PRE_PACKED_STRUCT struct -{ - BWL_PRE_PACKED_STRUCT struct { - uint8 low; - uint8 high; - } BWL_POST_PACKED_STRUCT count; - wpa_suite_t list[1]; -} BWL_POST_PACKED_STRUCT wpa_suite_ucast_t, wpa_suite_auth_key_mgmt_t; -#define WPA_IE_SUITE_COUNT_LEN 2 -typedef BWL_PRE_PACKED_STRUCT struct -{ - BWL_PRE_PACKED_STRUCT struct { - uint8 low; - uint8 high; - } BWL_POST_PACKED_STRUCT count; - wpa_pmkid_t list[1]; -} BWL_POST_PACKED_STRUCT wpa_pmkid_list_t; - - -#define WPA_CIPHER_NONE 0 -#define WPA_CIPHER_WEP_40 1 -#define WPA_CIPHER_TKIP 2 -#define WPA_CIPHER_AES_OCB 3 -#define WPA_CIPHER_AES_CCM 4 -#define WPA_CIPHER_WEP_104 5 -#define WPA_CIPHER_BIP 6 -#define WPA_CIPHER_TPK 7 - - -#ifdef BCMWAPI_WAI -#define WAPI_CIPHER_NONE WPA_CIPHER_NONE -#define WAPI_CIPHER_SMS4 11 - -#define WAPI_CSE_WPI_SMS4 1 -#endif /* BCMWAPI_WAI */ - -#define IS_WPA_CIPHER(cipher) ((cipher) == WPA_CIPHER_NONE || \ - (cipher) == WPA_CIPHER_WEP_40 || \ - (cipher) == WPA_CIPHER_WEP_104 || \ - (cipher) == WPA_CIPHER_TKIP || \ - (cipher) == WPA_CIPHER_AES_OCB || \ - (cipher) == WPA_CIPHER_AES_CCM || \ - (cipher) == WPA_CIPHER_TPK) - -#ifdef BCMWAPI_WAI -#define IS_WAPI_CIPHER(cipher) ((cipher) == WAPI_CIPHER_NONE || \ - (cipher) == WAPI_CSE_WPI_SMS4) - -/* convert WAPI_CSE_WPI_XXX to WAPI_CIPHER_XXX */ -#define WAPI_CSE_WPI_2_CIPHER(cse) ((cse) == WAPI_CSE_WPI_SMS4 ? \ - WAPI_CIPHER_SMS4 : WAPI_CIPHER_NONE) - -#define WAPI_CIPHER_2_CSE_WPI(cipher) ((cipher) == WAPI_CIPHER_SMS4 ? \ - WAPI_CSE_WPI_SMS4 : WAPI_CIPHER_NONE) -#endif /* BCMWAPI_WAI */ - -/* WPA TKIP countermeasures parameters */ -#define WPA_TKIP_CM_DETECT 60 /* multiple MIC failure window (seconds) */ -#define WPA_TKIP_CM_BLOCK 60 /* countermeasures active window (seconds) */ - - -#define RSN_CAP_LEN 2 - - -#define RSN_CAP_PREAUTH 0x0001 -#define RSN_CAP_NOPAIRWISE 0x0002 -#define RSN_CAP_PTK_REPLAY_CNTR_MASK 0x000C -#define RSN_CAP_PTK_REPLAY_CNTR_SHIFT 2 -#define RSN_CAP_GTK_REPLAY_CNTR_MASK 0x0030 -#define RSN_CAP_GTK_REPLAY_CNTR_SHIFT 4 -#define RSN_CAP_1_REPLAY_CNTR 0 -#define RSN_CAP_2_REPLAY_CNTRS 1 -#define RSN_CAP_4_REPLAY_CNTRS 2 -#define RSN_CAP_16_REPLAY_CNTRS 3 -#ifdef MFP -#define RSN_CAP_MFPR 0x0040 -#define RSN_CAP_MFPC 0x0080 -#endif - - -#define WPA_CAP_4_REPLAY_CNTRS RSN_CAP_4_REPLAY_CNTRS -#define WPA_CAP_16_REPLAY_CNTRS RSN_CAP_16_REPLAY_CNTRS -#define WPA_CAP_REPLAY_CNTR_SHIFT RSN_CAP_PTK_REPLAY_CNTR_SHIFT -#define WPA_CAP_REPLAY_CNTR_MASK RSN_CAP_PTK_REPLAY_CNTR_MASK - - -#define WPA_CAP_PEER_KEY_ENABLE (0x1 << 1) - - -#define WPA_CAP_LEN RSN_CAP_LEN -#define WPA_PMKID_CNT_LEN 2 - -#define WPA_CAP_WPA2_PREAUTH RSN_CAP_PREAUTH - -#define WPA2_PMKID_COUNT_LEN 2 - -#ifdef BCMWAPI_WAI -#define WAPI_CAP_PREAUTH RSN_CAP_PREAUTH - -/* Other WAI definition */ -#define WAPI_WAI_REQUEST 0x00F1 -#define WAPI_UNICAST_REKEY 0x00F2 -#define WAPI_STA_AGING 0x00F3 -#define WAPI_MUTIL_REKEY 0x00F4 -#define WAPI_STA_STATS 0x00F5 - -#define WAPI_USK_REKEY_COUNT 0x4000000 /* 0xA00000 */ -#define WAPI_MSK_REKEY_COUNT 0x4000000 /* 0xA00000 */ -#endif /* BCMWAPI_WAI */ - -/* This marks the end of a packed structure section. */ -#include <packed_section_end.h> - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/proto/wps.h b/drivers/net/wireless/bcmdhd/src/include/proto/wps.h deleted file mode 100644 index 9d98a37..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/proto/wps.h +++ /dev/null @@ -1,379 +0,0 @@ -/* - * WPS IE definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id$ - */ - -#ifndef _WPS_ -#define _WPS_ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Data Element Definitions */ -#define WPS_ID_AP_CHANNEL 0x1001 -#define WPS_ID_ASSOC_STATE 0x1002 -#define WPS_ID_AUTH_TYPE 0x1003 -#define WPS_ID_AUTH_TYPE_FLAGS 0x1004 -#define WPS_ID_AUTHENTICATOR 0x1005 -#define WPS_ID_CONFIG_METHODS 0x1008 -#define WPS_ID_CONFIG_ERROR 0x1009 -#define WPS_ID_CONF_URL4 0x100A -#define WPS_ID_CONF_URL6 0x100B -#define WPS_ID_CONN_TYPE 0x100C -#define WPS_ID_CONN_TYPE_FLAGS 0x100D -#define WPS_ID_CREDENTIAL 0x100E -#define WPS_ID_DEVICE_NAME 0x1011 -#define WPS_ID_DEVICE_PWD_ID 0x1012 -#define WPS_ID_E_HASH1 0x1014 -#define WPS_ID_E_HASH2 0x1015 -#define WPS_ID_E_SNONCE1 0x1016 -#define WPS_ID_E_SNONCE2 0x1017 -#define WPS_ID_ENCR_SETTINGS 0x1018 -#define WPS_ID_ENCR_TYPE 0x100F -#define WPS_ID_ENCR_TYPE_FLAGS 0x1010 -#define WPS_ID_ENROLLEE_NONCE 0x101A -#define WPS_ID_FEATURE_ID 0x101B -#define WPS_ID_IDENTITY 0x101C -#define WPS_ID_IDENTITY_PROOF 0x101D -#define WPS_ID_KEY_WRAP_AUTH 0x101E -#define WPS_ID_KEY_IDENTIFIER 0x101F -#define WPS_ID_MAC_ADDR 0x1020 -#define WPS_ID_MANUFACTURER 0x1021 -#define WPS_ID_MSG_TYPE 0x1022 -#define WPS_ID_MODEL_NAME 0x1023 -#define WPS_ID_MODEL_NUMBER 0x1024 -#define WPS_ID_NW_INDEX 0x1026 -#define WPS_ID_NW_KEY 0x1027 -#define WPS_ID_NW_KEY_INDEX 0x1028 -#define WPS_ID_NEW_DEVICE_NAME 0x1029 -#define WPS_ID_NEW_PWD 0x102A -#define WPS_ID_OOB_DEV_PWD 0x102C -#define WPS_ID_OS_VERSION 0x102D -#define WPS_ID_POWER_LEVEL 0x102F -#define WPS_ID_PSK_CURRENT 0x1030 -#define WPS_ID_PSK_MAX 0x1031 -#define WPS_ID_PUBLIC_KEY 0x1032 -#define WPS_ID_RADIO_ENABLED 0x1033 -#define WPS_ID_REBOOT 0x1034 -#define WPS_ID_REGISTRAR_CURRENT 0x1035 -#define WPS_ID_REGISTRAR_ESTBLSHD 0x1036 -#define WPS_ID_REGISTRAR_LIST 0x1037 -#define WPS_ID_REGISTRAR_MAX 0x1038 -#define WPS_ID_REGISTRAR_NONCE 0x1039 -#define WPS_ID_REQ_TYPE 0x103A -#define WPS_ID_RESP_TYPE 0x103B -#define WPS_ID_RF_BAND 0x103C -#define WPS_ID_R_HASH1 0x103D -#define WPS_ID_R_HASH2 0x103E -#define WPS_ID_R_SNONCE1 0x103F -#define WPS_ID_R_SNONCE2 0x1040 -#define WPS_ID_SEL_REGISTRAR 0x1041 -#define WPS_ID_SERIAL_NUM 0x1042 -#define WPS_ID_SC_STATE 0x1044 -#define WPS_ID_SSID 0x1045 -#define WPS_ID_TOT_NETWORKS 0x1046 -#define WPS_ID_UUID_E 0x1047 -#define WPS_ID_UUID_R 0x1048 -#define WPS_ID_VENDOR_EXT 0x1049 -#define WPS_ID_VERSION 0x104A -#define WPS_ID_X509_CERT_REQ 0x104B -#define WPS_ID_X509_CERT 0x104C -#define WPS_ID_EAP_IDENTITY 0x104D -#define WPS_ID_MSG_COUNTER 0x104E -#define WPS_ID_PUBKEY_HASH 0x104F -#define WPS_ID_REKEY_KEY 0x1050 -#define WPS_ID_KEY_LIFETIME 0x1051 -#define WPS_ID_PERM_CFG_METHODS 0x1052 -#define WPS_ID_SEL_REG_CFG_METHODS 0x1053 -#define WPS_ID_PRIM_DEV_TYPE 0x1054 -#define WPS_ID_SEC_DEV_TYPE_LIST 0x1055 -#define WPS_ID_PORTABLE_DEVICE 0x1056 -#define WPS_ID_AP_SETUP_LOCKED 0x1057 -#define WPS_ID_APP_LIST 0x1058 -#define WPS_ID_EAP_TYPE 0x1059 -#define WPS_ID_INIT_VECTOR 0x1060 -#define WPS_ID_KEY_PROVIDED_AUTO 0x1061 -#define WPS_ID_8021X_ENABLED 0x1062 -#define WPS_ID_WEP_TRANSMIT_KEY 0x1064 -#define WPS_ID_REQ_DEV_TYPE 0x106A - -/* WSC 2.0, WFA Vendor Extension Subelements */ -#define WFA_VENDOR_EXT_ID "\x00\x37\x2A" -#define WPS_WFA_SUBID_VERSION2 0x00 -#define WPS_WFA_SUBID_AUTHORIZED_MACS 0x01 -#define WPS_WFA_SUBID_NW_KEY_SHAREABLE 0x02 -#define WPS_WFA_SUBID_REQ_TO_ENROLL 0x03 -#define WPS_WFA_SUBID_SETTINGS_DELAY_TIME 0x04 - - -/* WCN-NET Windows Rally Vertical Pairing Vendor Extensions */ -#define MS_VENDOR_EXT_ID "\x00\x01\x37" -#define WPS_MS_ID_VPI 0x1001 /* Vertical Pairing Identifier TLV */ -#define WPS_MS_ID_TRANSPORT_UUID 0x1002 /* Transport UUID TLV */ - -/* Vertical Pairing Identifier TLV Definitions */ -#define WPS_MS_VPI_TRANSPORT_NONE 0x00 /* None */ -#define WPS_MS_VPI_TRANSPORT_DPWS 0x01 /* Devices Profile for Web Services */ -#define WPS_MS_VPI_TRANSPORT_UPNP 0x02 /* uPnP */ -#define WPS_MS_VPI_TRANSPORT_SDNWS 0x03 /* Secure Devices Profile for Web Services */ -#define WPS_MS_VPI_NO_PROFILE_REQ 0x00 /* Wi-Fi profile not requested. - * Not supported in Windows 7 - */ -#define WPS_MS_VPI_PROFILE_REQ 0x01 /* Wi-Fi profile requested. */ - -/* sizes of the fixed size elements */ -#define WPS_ID_AP_CHANNEL_S 2 -#define WPS_ID_ASSOC_STATE_S 2 -#define WPS_ID_AUTH_TYPE_S 2 -#define WPS_ID_AUTH_TYPE_FLAGS_S 2 -#define WPS_ID_AUTHENTICATOR_S 8 -#define WPS_ID_CONFIG_METHODS_S 2 -#define WPS_ID_CONFIG_ERROR_S 2 -#define WPS_ID_CONN_TYPE_S 1 -#define WPS_ID_CONN_TYPE_FLAGS_S 1 -#define WPS_ID_DEVICE_PWD_ID_S 2 -#define WPS_ID_ENCR_TYPE_S 2 -#define WPS_ID_ENCR_TYPE_FLAGS_S 2 -#define WPS_ID_FEATURE_ID_S 4 -#define WPS_ID_MAC_ADDR_S 6 -#define WPS_ID_MSG_TYPE_S 1 -#define WPS_ID_SC_STATE_S 1 -#define WPS_ID_RF_BAND_S 1 -#define WPS_ID_OS_VERSION_S 4 -#define WPS_ID_VERSION_S 1 -#define WPS_ID_SEL_REGISTRAR_S 1 -#define WPS_ID_SEL_REG_CFG_METHODS_S 2 -#define WPS_ID_REQ_TYPE_S 1 -#define WPS_ID_RESP_TYPE_S 1 -#define WPS_ID_AP_SETUP_LOCKED_S 1 - -/* WSC 2.0, WFA Vendor Extension Subelements */ -#define WPS_WFA_SUBID_VERSION2_S 1 -#define WPS_WFA_SUBID_NW_KEY_SHAREABLE_S 1 -#define WPS_WFA_SUBID_REQ_TO_ENROLL_S 1 -#define WPS_WFA_SUBID_SETTINGS_DELAY_TIME_S 1 - -/* Association states */ -#define WPS_ASSOC_NOT_ASSOCIATED 0 -#define WPS_ASSOC_CONN_SUCCESS 1 -#define WPS_ASSOC_CONFIG_FAIL 2 -#define WPS_ASSOC_ASSOC_FAIL 3 -#define WPS_ASSOC_IP_FAIL 4 - -/* Authentication types */ -#define WPS_AUTHTYPE_OPEN 0x0001 -#define WPS_AUTHTYPE_WPAPSK 0x0002 /* Deprecated in WSC 2.0 */ -#define WPS_AUTHTYPE_SHARED 0x0004 /* Deprecated in WSC 2.0 */ -#define WPS_AUTHTYPE_WPA 0x0008 /* Deprecated in WSC 2.0 */ -#define WPS_AUTHTYPE_WPA2 0x0010 -#define WPS_AUTHTYPE_WPA2PSK 0x0020 - -/* Config methods */ -#define WPS_CONFMET_USBA 0x0001 /* Deprecated in WSC 2.0 */ -#define WPS_CONFMET_ETHERNET 0x0002 /* Deprecated in WSC 2.0 */ -#define WPS_CONFMET_LABEL 0x0004 -#define WPS_CONFMET_DISPLAY 0x0008 -#define WPS_CONFMET_EXT_NFC_TOK 0x0010 -#define WPS_CONFMET_INT_NFC_TOK 0x0020 -#define WPS_CONFMET_NFC_INTF 0x0040 -#define WPS_CONFMET_PBC 0x0080 -#define WPS_CONFMET_KEYPAD 0x0100 -/* WSC 2.0 */ -#define WPS_CONFMET_VIRT_PBC 0x0280 -#define WPS_CONFMET_PHY_PBC 0x0480 -#define WPS_CONFMET_VIRT_DISPLAY 0x2008 -#define WPS_CONFMET_PHY_DISPLAY 0x4008 - -/* WPS error messages */ -#define WPS_ERROR_NO_ERROR 0 -#define WPS_ERROR_OOB_INT_READ_ERR 1 -#define WPS_ERROR_DECRYPT_CRC_FAIL 2 -#define WPS_ERROR_CHAN24_NOT_SUPP 3 -#define WPS_ERROR_CHAN50_NOT_SUPP 4 -#define WPS_ERROR_SIGNAL_WEAK 5 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_NW_AUTH_FAIL 6 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_NW_ASSOC_FAIL 7 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_NO_DHCP_RESP 8 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_FAILED_DHCP_CONF 9 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_IP_ADDR_CONFLICT 10 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_FAIL_CONN_REGISTRAR 11 -#define WPS_ERROR_MULTI_PBC_DETECTED 12 -#define WPS_ERROR_ROGUE_SUSPECTED 13 -#define WPS_ERROR_DEVICE_BUSY 14 -#define WPS_ERROR_SETUP_LOCKED 15 -#define WPS_ERROR_MSG_TIMEOUT 16 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_REG_SESSION_TIMEOUT 17 /* Deprecated in WSC 2.0 */ -#define WPS_ERROR_DEV_PWD_AUTH_FAIL 18 - -/* Connection types */ -#define WPS_CONNTYPE_ESS 0x01 -#define WPS_CONNTYPE_IBSS 0x02 - -/* Device password ID */ -#define WPS_DEVICEPWDID_DEFAULT 0x0000 -#define WPS_DEVICEPWDID_USER_SPEC 0x0001 -#define WPS_DEVICEPWDID_MACHINE_SPEC 0x0002 -#define WPS_DEVICEPWDID_REKEY 0x0003 -#define WPS_DEVICEPWDID_PUSH_BTN 0x0004 -#define WPS_DEVICEPWDID_REG_SPEC 0x0005 - -/* Encryption type */ -#define WPS_ENCRTYPE_NONE 0x0001 -#define WPS_ENCRTYPE_WEP 0x0002 /* Deprecated in WSC 2.0 */ -#define WPS_ENCRTYPE_TKIP 0x0004 /* Deprecated in version 2.0. TKIP can only - * be advertised on the AP when Mixed Mode - * is enabled (Encryption Type is 0x000c). - */ -#define WPS_ENCRTYPE_AES 0x0008 - - -/* WPS Message Types */ -#define WPS_ID_BEACON 0x01 -#define WPS_ID_PROBE_REQ 0x02 -#define WPS_ID_PROBE_RESP 0x03 -#define WPS_ID_MESSAGE_M1 0x04 -#define WPS_ID_MESSAGE_M2 0x05 -#define WPS_ID_MESSAGE_M2D 0x06 -#define WPS_ID_MESSAGE_M3 0x07 -#define WPS_ID_MESSAGE_M4 0x08 -#define WPS_ID_MESSAGE_M5 0x09 -#define WPS_ID_MESSAGE_M6 0x0A -#define WPS_ID_MESSAGE_M7 0x0B -#define WPS_ID_MESSAGE_M8 0x0C -#define WPS_ID_MESSAGE_ACK 0x0D -#define WPS_ID_MESSAGE_NACK 0x0E -#define WPS_ID_MESSAGE_DONE 0x0F - -/* WSP private ID for local use */ -#define WPS_PRIVATE_ID_IDENTITY (WPS_ID_MESSAGE_DONE + 1) -#define WPS_PRIVATE_ID_WPS_START (WPS_ID_MESSAGE_DONE + 2) -#define WPS_PRIVATE_ID_FAILURE (WPS_ID_MESSAGE_DONE + 3) -#define WPS_PRIVATE_ID_FRAG (WPS_ID_MESSAGE_DONE + 4) -#define WPS_PRIVATE_ID_FRAG_ACK (WPS_ID_MESSAGE_DONE + 5) -#define WPS_PRIVATE_ID_EAPOL_START (WPS_ID_MESSAGE_DONE + 6) - - -/* Device Type categories for primary and secondary device types */ -#define WPS_DEVICE_TYPE_CAT_COMPUTER 1 -#define WPS_DEVICE_TYPE_CAT_INPUT_DEVICE 2 -#define WPS_DEVICE_TYPE_CAT_PRINTER 3 -#define WPS_DEVICE_TYPE_CAT_CAMERA 4 -#define WPS_DEVICE_TYPE_CAT_STORAGE 5 -#define WPS_DEVICE_TYPE_CAT_NW_INFRA 6 -#define WPS_DEVICE_TYPE_CAT_DISPLAYS 7 -#define WPS_DEVICE_TYPE_CAT_MM_DEVICES 8 -#define WPS_DEVICE_TYPE_CAT_GAME_DEVICES 9 -#define WPS_DEVICE_TYPE_CAT_TELEPHONE 10 -#define WPS_DEVICE_TYPE_CAT_AUDIO_DEVICES 11 /* WSC 2.0 */ - -/* Device Type sub categories for primary and secondary device types */ -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_PC 1 -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_SERVER 2 -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_MEDIA_CTR 3 -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_UM_PC 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_NOTEBOOK 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_DESKTOP 6 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_MID 7 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_COMP_NETBOOK 8 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_Keyboard 1 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_MOUSE 2 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_JOYSTICK 3 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_TRACKBALL 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_GAM_CTRL 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_REMOTE 6 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_TOUCHSCREEN 7 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_BIO_READER 8 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_INP_BAR_READER 9 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_PRINTER 1 -#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_SCANNER 2 -#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_FAX 3 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_COPIER 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_ALLINONE 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_CAM_DGTL_STILL 1 -#define WPS_DEVICE_TYPE_SUB_CAT_CAM_VIDEO_CAM 2 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_CAM_WEB_CAM 3 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_CAM_SECU_CAM 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_STOR_NAS 1 -#define WPS_DEVICE_TYPE_SUB_CAT_NW_AP 1 -#define WPS_DEVICE_TYPE_SUB_CAT_NW_ROUTER 2 -#define WPS_DEVICE_TYPE_SUB_CAT_NW_SWITCH 3 -#define WPS_DEVICE_TYPE_SUB_CAT_NW_GATEWAY 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_NW_BRIDGE 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_DISP_TV 1 -#define WPS_DEVICE_TYPE_SUB_CAT_DISP_PIC_FRAME 2 -#define WPS_DEVICE_TYPE_SUB_CAT_DISP_PROJECTOR 3 -#define WPS_DEVICE_TYPE_SUB_CAT_DISP_MONITOR 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_MM_DAR 1 -#define WPS_DEVICE_TYPE_SUB_CAT_MM_PVR 2 -#define WPS_DEVICE_TYPE_SUB_CAT_MM_MCX 3 -#define WPS_DEVICE_TYPE_SUB_CAT_MM_STB 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_MM_MS_ME 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_MM_PVP 6 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_GAM_XBOX 1 -#define WPS_DEVICE_TYPE_SUB_CAT_GAM_XBOX_360 2 -#define WPS_DEVICE_TYPE_SUB_CAT_GAM_PS 3 -#define WPS_DEVICE_TYPE_SUB_CAT_GAM_GC 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_GAM_PGD 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_WM 1 -#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_PSM 2 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_PDM 3 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_SSM 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_SDM 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_TUNER 1 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_SPEAKERS 2 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_PMP 3 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_HEADSET 4 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_HPHONE 5 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_MPHONE 6 /* WSC 2.0 */ -#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_HTS 7 /* WSC 2.0 */ - - -/* Device request/response type */ -#define WPS_MSGTYPE_ENROLLEE_INFO_ONLY 0x00 -#define WPS_MSGTYPE_ENROLLEE_OPEN_8021X 0x01 -#define WPS_MSGTYPE_REGISTRAR 0x02 -#define WPS_MSGTYPE_AP_WLAN_MGR 0x03 - -/* RF Band */ -#define WPS_RFBAND_24GHZ 0x01 -#define WPS_RFBAND_50GHZ 0x02 - -/* Simple Config state */ -#define WPS_SCSTATE_UNCONFIGURED 0x01 -#define WPS_SCSTATE_CONFIGURED 0x02 -#define WPS_SCSTATE_OFF 11 - -/* WPS Vendor extension key */ -#define WPS_OUI_HEADER_LEN 2 -#define WPS_OUI_HEADER_SIZE 4 -#define WPS_OUI_FIXED_HEADER_OFF 16 -#define WPS_WFA_SUBID_V2_OFF 3 -#define WPS_WFA_V2_OFF 5 - -#ifdef __cplusplus -} -#endif - -#endif /* _WPS_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/sbchipc.h b/drivers/net/wireless/bcmdhd/src/include/sbchipc.h deleted file mode 100644 index 03039a6..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbchipc.h +++ /dev/null @@ -1,2205 +0,0 @@ -/* - * SiliconBackplane Chipcommon core hardware definitions. - * - * The chipcommon core provides chip identification, SB control, - * JTAG, 0/1/2 UARTs, clock frequency control, a watchdog interrupt timer, - * GPIO interface, extbus, and support for serial and parallel flashes. - * - * $Id: sbchipc.h 307724 2012-01-12 10:41:05Z $ - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - */ - -#ifndef _SBCHIPC_H -#define _SBCHIPC_H - -#ifndef _LANGUAGE_ASSEMBLY - - -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -typedef struct eci_prerev35 { - uint32 eci_output; - uint32 eci_control; - uint32 eci_inputlo; - uint32 eci_inputmi; - uint32 eci_inputhi; - uint32 eci_inputintpolaritylo; - uint32 eci_inputintpolaritymi; - uint32 eci_inputintpolarityhi; - uint32 eci_intmasklo; - uint32 eci_intmaskmi; - uint32 eci_intmaskhi; - uint32 eci_eventlo; - uint32 eci_eventmi; - uint32 eci_eventhi; - uint32 eci_eventmasklo; - uint32 eci_eventmaskmi; - uint32 eci_eventmaskhi; - uint32 PAD[3]; -} eci_prerev35_t; - -typedef struct eci_rev35 { - uint32 eci_outputlo; - uint32 eci_outputhi; - uint32 eci_controllo; - uint32 eci_controlhi; - uint32 eci_inputlo; - uint32 eci_inputhi; - uint32 eci_inputintpolaritylo; - uint32 eci_inputintpolarityhi; - uint32 eci_intmasklo; - uint32 eci_intmaskhi; - uint32 eci_eventlo; - uint32 eci_eventhi; - uint32 eci_eventmasklo; - uint32 eci_eventmaskhi; - uint32 eci_auxtx; - uint32 eci_auxrx; - uint32 eci_datatag; - uint32 eci_uartescvalue; - uint32 eci_autobaudctr; - uint32 eci_uartfifolevel; -} eci_rev35_t; - -typedef struct flash_config { - uint32 PAD[19]; - - uint32 flashstrconfig; -} flash_config_t; - -typedef volatile struct { - uint32 chipid; - uint32 capabilities; - uint32 corecontrol; - uint32 bist; - - - uint32 otpstatus; - uint32 otpcontrol; - uint32 otpprog; - uint32 otplayout; - - - uint32 intstatus; - uint32 intmask; - - - uint32 chipcontrol; - uint32 chipstatus; - - - uint32 jtagcmd; - uint32 jtagir; - uint32 jtagdr; - uint32 jtagctrl; - - - uint32 flashcontrol; - uint32 flashaddress; - uint32 flashdata; - uint32 otplayoutextension; - - - uint32 broadcastaddress; - uint32 broadcastdata; - - - uint32 gpiopullup; - uint32 gpiopulldown; - uint32 gpioin; - uint32 gpioout; - uint32 gpioouten; - uint32 gpiocontrol; - uint32 gpiointpolarity; - uint32 gpiointmask; - - - uint32 gpioevent; - uint32 gpioeventintmask; - - - uint32 watchdog; - - - uint32 gpioeventintpolarity; - - - uint32 gpiotimerval; - uint32 gpiotimeroutmask; - - - uint32 clockcontrol_n; - uint32 clockcontrol_sb; - uint32 clockcontrol_pci; - uint32 clockcontrol_m2; - uint32 clockcontrol_m3; - uint32 clkdiv; - uint32 gpiodebugsel; - uint32 capabilities_ext; - - - uint32 pll_on_delay; - uint32 fref_sel_delay; - uint32 slow_clk_ctl; - uint32 PAD; - - - uint32 system_clk_ctl; - uint32 clkstatestretch; - uint32 PAD[2]; - - - uint32 bp_addrlow; - uint32 bp_addrhigh; - uint32 bp_data; - uint32 PAD; - uint32 bp_indaccess; - - uint32 gsioctrl; - uint32 gsioaddress; - uint32 gsiodata; - - - uint32 clkdiv2; - uint32 PAD; - - uint32 fabid; - - - uint32 eromptr; - - - uint32 pcmcia_config; - uint32 pcmcia_memwait; - uint32 pcmcia_attrwait; - uint32 pcmcia_iowait; - uint32 ide_config; - uint32 ide_memwait; - uint32 ide_attrwait; - uint32 ide_iowait; - uint32 prog_config; - uint32 prog_waitcount; - uint32 flash_config; - uint32 flash_waitcount; - uint32 SECI_config; - uint32 SECI_status; - uint32 SECI_statusmask; - uint32 SECI_rxnibchanged; - - uint32 PAD[20]; - - - uint32 sromcontrol; - uint32 sromaddress; - uint32 sromdata; - uint32 PAD[1]; - - uint32 nflashctrl; - uint32 nflashconf; - uint32 nflashcoladdr; - uint32 nflashrowaddr; - uint32 nflashdata; - uint32 nflashwaitcnt0; - uint32 PAD[2]; - - uint32 seci_uart_data; - uint32 seci_uart_bauddiv; - uint32 seci_uart_fcr; - uint32 seci_uart_lcr; - uint32 seci_uart_mcr; - uint32 seci_uart_lsr; - uint32 seci_uart_msr; - uint32 seci_uart_baudadj; - - uint32 clk_ctl_st; - uint32 hw_war; - uint32 PAD[70]; - - - uint8 uart0data; - uint8 uart0imr; - uint8 uart0fcr; - uint8 uart0lcr; - uint8 uart0mcr; - uint8 uart0lsr; - uint8 uart0msr; - uint8 uart0scratch; - uint8 PAD[248]; - - uint8 uart1data; - uint8 uart1imr; - uint8 uart1fcr; - uint8 uart1lcr; - uint8 uart1mcr; - uint8 uart1lsr; - uint8 uart1msr; - uint8 uart1scratch; - uint32 PAD[126]; - - - - uint32 pmucontrol; - uint32 pmucapabilities; - uint32 pmustatus; - uint32 res_state; - uint32 res_pending; - uint32 pmutimer; - uint32 min_res_mask; - uint32 max_res_mask; - uint32 res_table_sel; - uint32 res_dep_mask; - uint32 res_updn_timer; - uint32 res_timer; - uint32 clkstretch; - uint32 pmuwatchdog; - uint32 gpiosel; - uint32 gpioenable; - uint32 res_req_timer_sel; - uint32 res_req_timer; - uint32 res_req_mask; - uint32 PAD; - uint32 chipcontrol_addr; - uint32 chipcontrol_data; - uint32 regcontrol_addr; - uint32 regcontrol_data; - uint32 pllcontrol_addr; - uint32 pllcontrol_data; - uint32 pmustrapopt; - uint32 pmu_xtalfreq; - uint32 retention_ctl; - uint32 PAD[3]; - uint32 retention_grpidx; - uint32 retention_grpctl; - uint32 PAD[94]; - uint16 sromotp[512]; - - uint32 nand_revision; - uint32 nand_cmd_start; - uint32 nand_cmd_addr_x; - uint32 nand_cmd_addr; - uint32 nand_cmd_end_addr; - uint32 nand_cs_nand_select; - uint32 nand_cs_nand_xor; - uint32 PAD; - uint32 nand_spare_rd0; - uint32 nand_spare_rd4; - uint32 nand_spare_rd8; - uint32 nand_spare_rd12; - uint32 nand_spare_wr0; - uint32 nand_spare_wr4; - uint32 nand_spare_wr8; - uint32 nand_spare_wr12; - uint32 nand_acc_control; - uint32 PAD; - uint32 nand_config; - uint32 PAD; - uint32 nand_timing_1; - uint32 nand_timing_2; - uint32 nand_semaphore; - uint32 PAD; - uint32 nand_devid; - uint32 nand_devid_x; - uint32 nand_block_lock_status; - uint32 nand_intfc_status; - uint32 nand_ecc_corr_addr_x; - uint32 nand_ecc_corr_addr; - uint32 nand_ecc_unc_addr_x; - uint32 nand_ecc_unc_addr; - uint32 nand_read_error_count; - uint32 nand_corr_stat_threshold; - uint32 PAD[2]; - uint32 nand_read_addr_x; - uint32 nand_read_addr; - uint32 nand_page_program_addr_x; - uint32 nand_page_program_addr; - uint32 nand_copy_back_addr_x; - uint32 nand_copy_back_addr; - uint32 nand_block_erase_addr_x; - uint32 nand_block_erase_addr; - uint32 nand_inv_read_addr_x; - uint32 nand_inv_read_addr; - uint32 PAD[2]; - uint32 nand_blk_wr_protect; - uint32 PAD[3]; - uint32 nand_acc_control_cs1; - uint32 nand_config_cs1; - uint32 nand_timing_1_cs1; - uint32 nand_timing_2_cs1; - uint32 PAD[20]; - uint32 nand_spare_rd16; - uint32 nand_spare_rd20; - uint32 nand_spare_rd24; - uint32 nand_spare_rd28; - uint32 nand_cache_addr; - uint32 nand_cache_data; - uint32 nand_ctrl_config; - uint32 nand_ctrl_status; -} chipcregs_t; - -#endif - - -#define CC_CHIPID 0 -#define CC_CAPABILITIES 4 -#define CC_CHIPST 0x2c -#define CC_EROMPTR 0xfc - -#define CC_OTPST 0x10 -#define CC_JTAGCMD 0x30 -#define CC_JTAGIR 0x34 -#define CC_JTAGDR 0x38 -#define CC_JTAGCTRL 0x3c -#define CC_GPIOPU 0x58 -#define CC_GPIOPD 0x5c -#define CC_GPIOIN 0x60 -#define CC_GPIOOUT 0x64 -#define CC_GPIOOUTEN 0x68 -#define CC_GPIOCTRL 0x6c -#define CC_GPIOPOL 0x70 -#define CC_GPIOINTM 0x74 -#define CC_WATCHDOG 0x80 -#define CC_CLKC_N 0x90 -#define CC_CLKC_M0 0x94 -#define CC_CLKC_M1 0x98 -#define CC_CLKC_M2 0x9c -#define CC_CLKC_M3 0xa0 -#define CC_CLKDIV 0xa4 -#define CC_SYS_CLK_CTL 0xc0 -#define CC_CLK_CTL_ST SI_CLK_CTL_ST -#define PMU_CTL 0x600 -#define PMU_CAP 0x604 -#define PMU_ST 0x608 -#define PMU_RES_STATE 0x60c -#define PMU_TIMER 0x614 -#define PMU_MIN_RES_MASK 0x618 -#define PMU_MAX_RES_MASK 0x61c -#define CC_CHIPCTL_ADDR 0x650 -#define CC_CHIPCTL_DATA 0x654 -#define PMU_REG_CONTROL_ADDR 0x658 -#define PMU_REG_CONTROL_DATA 0x65C -#define PMU_PLL_CONTROL_ADDR 0x660 -#define PMU_PLL_CONTROL_DATA 0x664 -#define CC_SROM_OTP 0x800 - -#ifdef NFLASH_SUPPORT - -#define CC_NAND_REVISION 0xC00 -#define CC_NAND_CMD_START 0xC04 -#define CC_NAND_CMD_ADDR 0xC0C -#define CC_NAND_SPARE_RD_0 0xC20 -#define CC_NAND_SPARE_RD_4 0xC24 -#define CC_NAND_SPARE_RD_8 0xC28 -#define CC_NAND_SPARE_RD_C 0xC2C -#define CC_NAND_CONFIG 0xC48 -#define CC_NAND_DEVID 0xC60 -#define CC_NAND_DEVID_EXT 0xC64 -#define CC_NAND_INTFC_STATUS 0xC6C -#endif - - -#define CID_ID_MASK 0x0000ffff -#define CID_REV_MASK 0x000f0000 -#define CID_REV_SHIFT 16 -#define CID_PKG_MASK 0x00f00000 -#define CID_PKG_SHIFT 20 -#define CID_CC_MASK 0x0f000000 -#define CID_CC_SHIFT 24 -#define CID_TYPE_MASK 0xf0000000 -#define CID_TYPE_SHIFT 28 - - -#define CC_CAP_UARTS_MASK 0x00000003 -#define CC_CAP_MIPSEB 0x00000004 -#define CC_CAP_UCLKSEL 0x00000018 -#define CC_CAP_UINTCLK 0x00000008 -#define CC_CAP_UARTGPIO 0x00000020 -#define CC_CAP_EXTBUS_MASK 0x000000c0 -#define CC_CAP_EXTBUS_NONE 0x00000000 -#define CC_CAP_EXTBUS_FULL 0x00000040 -#define CC_CAP_EXTBUS_PROG 0x00000080 -#define CC_CAP_FLASH_MASK 0x00000700 -#define CC_CAP_PLL_MASK 0x00038000 -#define CC_CAP_PWR_CTL 0x00040000 -#define CC_CAP_OTPSIZE 0x00380000 -#define CC_CAP_OTPSIZE_SHIFT 19 -#define CC_CAP_OTPSIZE_BASE 5 -#define CC_CAP_JTAGP 0x00400000 -#define CC_CAP_ROM 0x00800000 -#define CC_CAP_BKPLN64 0x08000000 -#define CC_CAP_PMU 0x10000000 -#define CC_CAP_ECI 0x20000000 -#define CC_CAP_SROM 0x40000000 -#define CC_CAP_NFLASH 0x80000000 - -#define CC_CAP2_SECI 0x00000001 -#define CC_CAP2_GSIO 0x00000002 - - -#define CC_CAP_EXT_SECI_PRESENT 0x00000001 - - -#define PLL_NONE 0x00000000 -#define PLL_TYPE1 0x00010000 -#define PLL_TYPE2 0x00020000 -#define PLL_TYPE3 0x00030000 -#define PLL_TYPE4 0x00008000 -#define PLL_TYPE5 0x00018000 -#define PLL_TYPE6 0x00028000 -#define PLL_TYPE7 0x00038000 - - -#define ILP_CLOCK 32000 - - -#define ALP_CLOCK 20000000 - - -#define HT_CLOCK 80000000 - - -#define CC_UARTCLKO 0x00000001 -#define CC_SE 0x00000002 -#define CC_ASYNCGPIO 0x00000004 -#define CC_UARTCLKEN 0x00000008 - - -#define CHIPCTRL_4321A0_DEFAULT 0x3a4 -#define CHIPCTRL_4321A1_DEFAULT 0x0a4 -#define CHIPCTRL_4321_PLL_DOWN 0x800000 - - -#define OTPS_OL_MASK 0x000000ff -#define OTPS_OL_MFG 0x00000001 -#define OTPS_OL_OR1 0x00000002 -#define OTPS_OL_OR2 0x00000004 -#define OTPS_OL_GU 0x00000008 -#define OTPS_GUP_MASK 0x00000f00 -#define OTPS_GUP_SHIFT 8 -#define OTPS_GUP_HW 0x00000100 -#define OTPS_GUP_SW 0x00000200 -#define OTPS_GUP_CI 0x00000400 -#define OTPS_GUP_FUSE 0x00000800 -#define OTPS_READY 0x00001000 -#define OTPS_RV(x) (1 << (16 + (x))) -#define OTPS_RV_MASK 0x0fff0000 -#define OTPS_PROGOK 0x40000000 - - -#define OTPC_PROGSEL 0x00000001 -#define OTPC_PCOUNT_MASK 0x0000000e -#define OTPC_PCOUNT_SHIFT 1 -#define OTPC_VSEL_MASK 0x000000f0 -#define OTPC_VSEL_SHIFT 4 -#define OTPC_TMM_MASK 0x00000700 -#define OTPC_TMM_SHIFT 8 -#define OTPC_ODM 0x00000800 -#define OTPC_PROGEN 0x80000000 - - -#define OTPP_COL_MASK 0x000000ff -#define OTPP_COL_SHIFT 0 -#define OTPP_ROW_MASK 0x0000ff00 -#define OTPP_ROW_SHIFT 8 -#define OTPP_OC_MASK 0x0f000000 -#define OTPP_OC_SHIFT 24 -#define OTPP_READERR 0x10000000 -#define OTPP_VALUE_MASK 0x20000000 -#define OTPP_VALUE_SHIFT 29 -#define OTPP_START_BUSY 0x80000000 -#define OTPP_READ 0x40000000 - - -#define OTPL_HWRGN_OFF_MASK 0x00000FFF -#define OTPL_HWRGN_OFF_SHIFT 0 -#define OTPL_WRAP_REVID_MASK 0x00F80000 -#define OTPL_WRAP_REVID_SHIFT 19 -#define OTPL_WRAP_TYPE_MASK 0x00070000 -#define OTPL_WRAP_TYPE_SHIFT 16 -#define OTPL_WRAP_TYPE_65NM 0 -#define OTPL_WRAP_TYPE_40NM 1 - - -#define OTP_CISFORMAT_NEW 0x80000000 - - -#define OTPPOC_READ 0 -#define OTPPOC_BIT_PROG 1 -#define OTPPOC_VERIFY 3 -#define OTPPOC_INIT 4 -#define OTPPOC_SET 5 -#define OTPPOC_RESET 6 -#define OTPPOC_OCST 7 -#define OTPPOC_ROW_LOCK 8 -#define OTPPOC_PRESCN_TEST 9 - - -#define OTPPOC_READ_40NM 0 -#define OTPPOC_PROG_ENABLE_40NM 1 -#define OTPPOC_PROG_DISABLE_40NM 2 -#define OTPPOC_VERIFY_40NM 3 -#define OTPPOC_WORD_VERIFY_1_40NM 4 -#define OTPPOC_ROW_LOCK_40NM 5 -#define OTPPOC_STBY_40NM 6 -#define OTPPOC_WAKEUP_40NM 7 -#define OTPPOC_WORD_VERIFY_0_40NM 8 -#define OTPPOC_PRESCN_TEST_40NM 9 -#define OTPPOC_BIT_PROG_40NM 10 -#define OTPPOC_WORDPROG_40NM 11 -#define OTPPOC_BURNIN_40NM 12 -#define OTPPOC_AUTORELOAD_40NM 13 -#define OTPPOC_OVST_READ_40NM 14 -#define OTPPOC_OVST_PROG_40NM 15 - - -#define OTPLAYOUTEXT_FUSE_MASK 0x3FF - - - -#define JTAGM_CREV_OLD 10 -#define JTAGM_CREV_IRP 22 -#define JTAGM_CREV_RTI 28 - - -#define JCMD_START 0x80000000 -#define JCMD_BUSY 0x80000000 -#define JCMD_STATE_MASK 0x60000000 -#define JCMD_STATE_TLR 0x00000000 -#define JCMD_STATE_PIR 0x20000000 -#define JCMD_STATE_PDR 0x40000000 -#define JCMD_STATE_RTI 0x60000000 -#define JCMD0_ACC_MASK 0x0000f000 -#define JCMD0_ACC_IRDR 0x00000000 -#define JCMD0_ACC_DR 0x00001000 -#define JCMD0_ACC_IR 0x00002000 -#define JCMD0_ACC_RESET 0x00003000 -#define JCMD0_ACC_IRPDR 0x00004000 -#define JCMD0_ACC_PDR 0x00005000 -#define JCMD0_IRW_MASK 0x00000f00 -#define JCMD_ACC_MASK 0x000f0000 -#define JCMD_ACC_IRDR 0x00000000 -#define JCMD_ACC_DR 0x00010000 -#define JCMD_ACC_IR 0x00020000 -#define JCMD_ACC_RESET 0x00030000 -#define JCMD_ACC_IRPDR 0x00040000 -#define JCMD_ACC_PDR 0x00050000 -#define JCMD_ACC_PIR 0x00060000 -#define JCMD_ACC_IRDR_I 0x00070000 -#define JCMD_ACC_DR_I 0x00080000 -#define JCMD_IRW_MASK 0x00001f00 -#define JCMD_IRW_SHIFT 8 -#define JCMD_DRW_MASK 0x0000003f - - -#define JCTRL_FORCE_CLK 4 -#define JCTRL_EXT_EN 2 -#define JCTRL_EN 1 - - -#define CLKD_SFLASH 0x0f000000 -#define CLKD_SFLASH_SHIFT 24 -#define CLKD_OTP 0x000f0000 -#define CLKD_OTP_SHIFT 16 -#define CLKD_JTAG 0x00000f00 -#define CLKD_JTAG_SHIFT 8 -#define CLKD_UART 0x000000ff - -#define CLKD2_SROM 0x00000003 - - -#define CI_GPIO 0x00000001 -#define CI_EI 0x00000002 -#define CI_TEMP 0x00000004 -#define CI_SIRQ 0x00000008 -#define CI_ECI 0x00000010 -#define CI_PMU 0x00000020 -#define CI_UART 0x00000040 -#define CI_WDRESET 0x80000000 - - -#define SCC_SS_MASK 0x00000007 -#define SCC_SS_LPO 0x00000000 -#define SCC_SS_XTAL 0x00000001 -#define SCC_SS_PCI 0x00000002 -#define SCC_LF 0x00000200 -#define SCC_LP 0x00000400 -#define SCC_FS 0x00000800 -#define SCC_IP 0x00001000 -#define SCC_XC 0x00002000 -#define SCC_XP 0x00004000 -#define SCC_CD_MASK 0xffff0000 -#define SCC_CD_SHIFT 16 - - -#define SYCC_IE 0x00000001 -#define SYCC_AE 0x00000002 -#define SYCC_FP 0x00000004 -#define SYCC_AR 0x00000008 -#define SYCC_HR 0x00000010 -#define SYCC_CD_MASK 0xffff0000 -#define SYCC_CD_SHIFT 16 - - -#define BPIA_BYTEEN 0x0000000f -#define BPIA_SZ1 0x00000001 -#define BPIA_SZ2 0x00000003 -#define BPIA_SZ4 0x00000007 -#define BPIA_SZ8 0x0000000f -#define BPIA_WRITE 0x00000100 -#define BPIA_START 0x00000200 -#define BPIA_BUSY 0x00000200 -#define BPIA_ERROR 0x00000400 - - -#define CF_EN 0x00000001 -#define CF_EM_MASK 0x0000000e -#define CF_EM_SHIFT 1 -#define CF_EM_FLASH 0 -#define CF_EM_SYNC 2 -#define CF_EM_PCMCIA 4 -#define CF_DS 0x00000010 -#define CF_BS 0x00000020 -#define CF_CD_MASK 0x000000c0 -#define CF_CD_SHIFT 6 -#define CF_CD_DIV2 0x00000000 -#define CF_CD_DIV3 0x00000040 -#define CF_CD_DIV4 0x00000080 -#define CF_CE 0x00000100 -#define CF_SB 0x00000200 - - -#define PM_W0_MASK 0x0000003f -#define PM_W1_MASK 0x00001f00 -#define PM_W1_SHIFT 8 -#define PM_W2_MASK 0x001f0000 -#define PM_W2_SHIFT 16 -#define PM_W3_MASK 0x1f000000 -#define PM_W3_SHIFT 24 - - -#define PA_W0_MASK 0x0000003f -#define PA_W1_MASK 0x00001f00 -#define PA_W1_SHIFT 8 -#define PA_W2_MASK 0x001f0000 -#define PA_W2_SHIFT 16 -#define PA_W3_MASK 0x1f000000 -#define PA_W3_SHIFT 24 - - -#define PI_W0_MASK 0x0000003f -#define PI_W1_MASK 0x00001f00 -#define PI_W1_SHIFT 8 -#define PI_W2_MASK 0x001f0000 -#define PI_W2_SHIFT 16 -#define PI_W3_MASK 0x1f000000 -#define PI_W3_SHIFT 24 - - -#define PW_W0_MASK 0x0000001f -#define PW_W1_MASK 0x00001f00 -#define PW_W1_SHIFT 8 -#define PW_W2_MASK 0x001f0000 -#define PW_W2_SHIFT 16 -#define PW_W3_MASK 0x1f000000 -#define PW_W3_SHIFT 24 - -#define PW_W0 0x0000000c -#define PW_W1 0x00000a00 -#define PW_W2 0x00020000 -#define PW_W3 0x01000000 - - -#define FW_W0_MASK 0x0000003f -#define FW_W1_MASK 0x00001f00 -#define FW_W1_SHIFT 8 -#define FW_W2_MASK 0x001f0000 -#define FW_W2_SHIFT 16 -#define FW_W3_MASK 0x1f000000 -#define FW_W3_SHIFT 24 - - -#define SRC_START 0x80000000 -#define SRC_BUSY 0x80000000 -#define SRC_OPCODE 0x60000000 -#define SRC_OP_READ 0x00000000 -#define SRC_OP_WRITE 0x20000000 -#define SRC_OP_WRDIS 0x40000000 -#define SRC_OP_WREN 0x60000000 -#define SRC_OTPSEL 0x00000010 -#define SRC_LOCK 0x00000008 -#define SRC_SIZE_MASK 0x00000006 -#define SRC_SIZE_1K 0x00000000 -#define SRC_SIZE_4K 0x00000002 -#define SRC_SIZE_16K 0x00000004 -#define SRC_SIZE_SHIFT 1 -#define SRC_PRESENT 0x00000001 - - -#define PCTL_ILP_DIV_MASK 0xffff0000 -#define PCTL_ILP_DIV_SHIFT 16 -#define PCTL_PLL_PLLCTL_UPD 0x00000400 -#define PCTL_NOILP_ON_WAIT 0x00000200 -#define PCTL_HT_REQ_EN 0x00000100 -#define PCTL_ALP_REQ_EN 0x00000080 -#define PCTL_XTALFREQ_MASK 0x0000007c -#define PCTL_XTALFREQ_SHIFT 2 -#define PCTL_ILP_DIV_EN 0x00000002 -#define PCTL_LPO_SEL 0x00000001 - - -#define CSTRETCH_HT 0xffff0000 -#define CSTRETCH_ALP 0x0000ffff - - -#define GPIO_ONTIME_SHIFT 16 - - -#define CN_N1_MASK 0x3f -#define CN_N2_MASK 0x3f00 -#define CN_N2_SHIFT 8 -#define CN_PLLC_MASK 0xf0000 -#define CN_PLLC_SHIFT 16 - - -#define CC_M1_MASK 0x3f -#define CC_M2_MASK 0x3f00 -#define CC_M2_SHIFT 8 -#define CC_M3_MASK 0x3f0000 -#define CC_M3_SHIFT 16 -#define CC_MC_MASK 0x1f000000 -#define CC_MC_SHIFT 24 - - -#define CC_F6_2 0x02 -#define CC_F6_3 0x03 -#define CC_F6_4 0x05 -#define CC_F6_5 0x09 -#define CC_F6_6 0x11 -#define CC_F6_7 0x21 - -#define CC_F5_BIAS 5 - -#define CC_MC_BYPASS 0x08 -#define CC_MC_M1 0x04 -#define CC_MC_M1M2 0x02 -#define CC_MC_M1M2M3 0x01 -#define CC_MC_M1M3 0x11 - - -#define CC_T2_BIAS 2 -#define CC_T2M2_BIAS 3 - -#define CC_T2MC_M1BYP 1 -#define CC_T2MC_M2BYP 2 -#define CC_T2MC_M3BYP 4 - - -#define CC_T6_MMASK 1 -#define CC_T6_M0 120000000 -#define CC_T6_M1 100000000 -#define SB2MIPS_T6(sb) (2 * (sb)) - - -#define CC_CLOCK_BASE1 24000000 -#define CC_CLOCK_BASE2 12500000 - - -#define CLKC_5350_N 0x0311 -#define CLKC_5350_M 0x04020009 - - -#define FLASH_NONE 0x000 -#define SFLASH_ST 0x100 -#define SFLASH_AT 0x200 -#define NFLASH 0x300 -#define PFLASH 0x700 - - -#define CC_CFG_EN 0x0001 -#define CC_CFG_EM_MASK 0x000e -#define CC_CFG_EM_ASYNC 0x0000 -#define CC_CFG_EM_SYNC 0x0002 -#define CC_CFG_EM_PCMCIA 0x0004 -#define CC_CFG_EM_IDE 0x0006 -#define CC_CFG_DS 0x0010 -#define CC_CFG_CD_MASK 0x00e0 -#define CC_CFG_CE 0x0100 -#define CC_CFG_SB 0x0200 -#define CC_CFG_IS 0x0400 - - -#define CC_EB_BASE 0x1a000000 -#define CC_EB_PCMCIA_MEM 0x1a000000 -#define CC_EB_PCMCIA_IO 0x1a200000 -#define CC_EB_PCMCIA_CFG 0x1a400000 -#define CC_EB_IDE 0x1a800000 -#define CC_EB_PCMCIA1_MEM 0x1a800000 -#define CC_EB_PCMCIA1_IO 0x1aa00000 -#define CC_EB_PCMCIA1_CFG 0x1ac00000 -#define CC_EB_PROGIF 0x1b000000 - - - -#define SFLASH_OPCODE 0x000000ff -#define SFLASH_ACTION 0x00000700 -#define SFLASH_CS_ACTIVE 0x00001000 -#define SFLASH_START 0x80000000 -#define SFLASH_BUSY SFLASH_START - - -#define SFLASH_ACT_OPONLY 0x0000 -#define SFLASH_ACT_OP1D 0x0100 -#define SFLASH_ACT_OP3A 0x0200 -#define SFLASH_ACT_OP3A1D 0x0300 -#define SFLASH_ACT_OP3A4D 0x0400 -#define SFLASH_ACT_OP3A4X4D 0x0500 -#define SFLASH_ACT_OP3A1X4D 0x0700 - - -#define SFLASH_ST_WREN 0x0006 -#define SFLASH_ST_WRDIS 0x0004 -#define SFLASH_ST_RDSR 0x0105 -#define SFLASH_ST_WRSR 0x0101 -#define SFLASH_ST_READ 0x0303 -#define SFLASH_ST_PP 0x0302 -#define SFLASH_ST_SE 0x02d8 -#define SFLASH_ST_BE 0x00c7 -#define SFLASH_ST_DP 0x00b9 -#define SFLASH_ST_RES 0x03ab -#define SFLASH_ST_CSA 0x1000 -#define SFLASH_ST_SSE 0x0220 - -#define SFLASH_MXIC_RDID 0x0390 -#define SFLASH_MXIC_MFID 0xc2 - - -#define SFLASH_ST_WIP 0x01 -#define SFLASH_ST_WEL 0x02 -#define SFLASH_ST_BP_MASK 0x1c -#define SFLASH_ST_BP_SHIFT 2 -#define SFLASH_ST_SRWD 0x80 - - -#define SFLASH_AT_READ 0x07e8 -#define SFLASH_AT_PAGE_READ 0x07d2 -#define SFLASH_AT_BUF1_READ -#define SFLASH_AT_BUF2_READ -#define SFLASH_AT_STATUS 0x01d7 -#define SFLASH_AT_BUF1_WRITE 0x0384 -#define SFLASH_AT_BUF2_WRITE 0x0387 -#define SFLASH_AT_BUF1_ERASE_PROGRAM 0x0283 -#define SFLASH_AT_BUF2_ERASE_PROGRAM 0x0286 -#define SFLASH_AT_BUF1_PROGRAM 0x0288 -#define SFLASH_AT_BUF2_PROGRAM 0x0289 -#define SFLASH_AT_PAGE_ERASE 0x0281 -#define SFLASH_AT_BLOCK_ERASE 0x0250 -#define SFLASH_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 -#define SFLASH_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 -#define SFLASH_AT_BUF1_LOAD 0x0253 -#define SFLASH_AT_BUF2_LOAD 0x0255 -#define SFLASH_AT_BUF1_COMPARE 0x0260 -#define SFLASH_AT_BUF2_COMPARE 0x0261 -#define SFLASH_AT_BUF1_REPROGRAM 0x0258 -#define SFLASH_AT_BUF2_REPROGRAM 0x0259 - - -#define SFLASH_AT_READY 0x80 -#define SFLASH_AT_MISMATCH 0x40 -#define SFLASH_AT_ID_MASK 0x38 -#define SFLASH_AT_ID_SHIFT 3 - - -#define GSIO_START 0x80000000 -#define GSIO_BUSY GSIO_START - - - -#define UART_RX 0 -#define UART_TX 0 -#define UART_DLL 0 -#define UART_IER 1 -#define UART_DLM 1 -#define UART_IIR 2 -#define UART_FCR 2 -#define UART_LCR 3 -#define UART_MCR 4 -#define UART_LSR 5 -#define UART_MSR 6 -#define UART_SCR 7 -#define UART_LCR_DLAB 0x80 -#define UART_LCR_WLEN8 0x03 -#define UART_MCR_OUT2 0x08 -#define UART_MCR_LOOP 0x10 -#define UART_LSR_RX_FIFO 0x80 -#define UART_LSR_TDHR 0x40 -#define UART_LSR_THRE 0x20 -#define UART_LSR_BREAK 0x10 -#define UART_LSR_FRAMING 0x08 -#define UART_LSR_PARITY 0x04 -#define UART_LSR_OVERRUN 0x02 -#define UART_LSR_RXRDY 0x01 -#define UART_FCR_FIFO_ENABLE 1 - - -#define UART_IIR_FIFO_MASK 0xc0 -#define UART_IIR_INT_MASK 0xf -#define UART_IIR_MDM_CHG 0x0 -#define UART_IIR_NOINT 0x1 -#define UART_IIR_THRE 0x2 -#define UART_IIR_RCVD_DATA 0x4 -#define UART_IIR_RCVR_STATUS 0x6 -#define UART_IIR_CHAR_TIME 0xc - - -#define UART_IER_EDSSI 8 -#define UART_IER_ELSI 4 -#define UART_IER_ETBEI 2 -#define UART_IER_ERBFI 1 - - -#define PST_EXTLPOAVAIL 0x0100 -#define PST_WDRESET 0x0080 -#define PST_INTPEND 0x0040 -#define PST_SBCLKST 0x0030 -#define PST_SBCLKST_ILP 0x0010 -#define PST_SBCLKST_ALP 0x0020 -#define PST_SBCLKST_HT 0x0030 -#define PST_ALPAVAIL 0x0008 -#define PST_HTAVAIL 0x0004 -#define PST_RESINIT 0x0003 - - -#define PCAP_REV_MASK 0x000000ff -#define PCAP_RC_MASK 0x00001f00 -#define PCAP_RC_SHIFT 8 -#define PCAP_TC_MASK 0x0001e000 -#define PCAP_TC_SHIFT 13 -#define PCAP_PC_MASK 0x001e0000 -#define PCAP_PC_SHIFT 17 -#define PCAP_VC_MASK 0x01e00000 -#define PCAP_VC_SHIFT 21 -#define PCAP_CC_MASK 0x1e000000 -#define PCAP_CC_SHIFT 25 -#define PCAP5_PC_MASK 0x003e0000 -#define PCAP5_PC_SHIFT 17 -#define PCAP5_VC_MASK 0x07c00000 -#define PCAP5_VC_SHIFT 22 -#define PCAP5_CC_MASK 0xf8000000 -#define PCAP5_CC_SHIFT 27 - - - -#define PRRT_TIME_MASK 0x03ff -#define PRRT_INTEN 0x0400 -#define PRRT_REQ_ACTIVE 0x0800 -#define PRRT_ALP_REQ 0x1000 -#define PRRT_HT_REQ 0x2000 -#define PRRT_HQ_REQ 0x4000 - - -#define PMURES_BIT(bit) (1 << (bit)) - - -#define PMURES_MAX_RESNUM 30 - - -#define PMU_CHIPCTL0 0 - - -#define PMU_CC1_CLKREQ_TYPE_SHIFT 19 -#define PMU_CC1_CLKREQ_TYPE_MASK (1 << PMU_CC1_CLKREQ_TYPE_SHIFT) - -#define CLKREQ_TYPE_CONFIG_OPENDRAIN 0 -#define CLKREQ_TYPE_CONFIG_PUSHPULL 1 - - -#define PMU_CHIPCTL1 1 -#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 - -#define PMU_CC1_IF_TYPE_MASK 0x00000030 -#define PMU_CC1_IF_TYPE_RMII 0x00000000 -#define PMU_CC1_IF_TYPE_MII 0x00000010 -#define PMU_CC1_IF_TYPE_RGMII 0x00000020 - -#define PMU_CC1_SW_TYPE_MASK 0x000000c0 -#define PMU_CC1_SW_TYPE_EPHY 0x00000000 -#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 -#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 -#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 - - -#define PMU_CHIPCTL2 2 - - -#define PMU_CHIPCTL3 3 - -#define PMU_CC3_ENABLE_SDIO_WAKEUP_SHIFT 19 -#define PMU_CC3_ENABLE_RF_SHIFT 22 -#define PMU_CC3_RF_DISABLE_IVALUE_SHIFT 23 - - - - - -#define PMU0_PLL0_PLLCTL0 0 -#define PMU0_PLL0_PC0_PDIV_MASK 1 -#define PMU0_PLL0_PC0_PDIV_FREQ 25000 -#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 -#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 -#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 - - -#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 -#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 -#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 -#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 -#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 -#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 -#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 -#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 - - -#define PMU0_PLL0_PLLCTL1 1 -#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 -#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 -#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 -#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 -#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 - - -#define PMU0_PLL0_PLLCTL2 2 -#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf -#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 - - - -#define PMU1_PLL0_PLLCTL0 0 -#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 -#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 -#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 -#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 - - -#define PMU1_PLL0_PLLCTL1 1 -#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff -#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 -#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 -#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 -#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 -#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 -#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 -#define PMU1_PLL0_PC1_M4DIV_BY_9 9 -#define PMU1_PLL0_PC1_M4DIV_BY_18 0x12 -#define PMU1_PLL0_PC1_M4DIV_BY_36 0x24 - -#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 -#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) -#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) - - -#define PMU1_PLL0_PLLCTL2 2 -#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff -#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 -#define PMU1_PLL0_PC2_M5DIV_BY_12 0xc -#define PMU1_PLL0_PC2_M5DIV_BY_18 0x12 -#define PMU1_PLL0_PC2_M5DIV_BY_36 0x24 -#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 -#define PMU1_PLL0_PC2_M6DIV_BY_18 0x12 -#define PMU1_PLL0_PC2_M6DIV_BY_36 0x24 -#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 -#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 -#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 -#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 - - -#define PMU1_PLL0_PLLCTL3 3 -#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 - - -#define PMU1_PLL0_PLLCTL4 4 - - -#define PMU1_PLL0_PLLCTL5 5 -#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 -#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 - - -#define PMU2_PHY_PLL_PLLCTL 4 -#define PMU2_SI_PLL_PLLCTL 10 - - - - -#define PMU2_PLL_PLLCTL0 0 -#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 -#define PMU2_PLL_PC0_P1DIV_SHIFT 20 -#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 -#define PMU2_PLL_PC0_P2DIV_SHIFT 24 - - -#define PMU2_PLL_PLLCTL1 1 -#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff -#define PMU2_PLL_PC1_M1DIV_SHIFT 0 -#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC1_M2DIV_SHIFT 8 -#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 -#define PMU2_PLL_PC1_M3DIV_SHIFT 16 -#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 -#define PMU2_PLL_PC1_M4DIV_SHIFT 24 - - -#define PMU2_PLL_PLLCTL2 2 -#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff -#define PMU2_PLL_PC2_M5DIV_SHIFT 0 -#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC2_M6DIV_SHIFT 8 -#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 -#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 - - -#define PMU2_PLL_PLLCTL3 3 -#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 - - -#define PMU2_PLL_PLLCTL4 4 - - -#define PMU2_PLL_PLLCTL5 5 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 - - -#define PMU5_PLL_P1P2_OFF 0 -#define PMU5_PLL_P1_MASK 0x0f000000 -#define PMU5_PLL_P1_SHIFT 24 -#define PMU5_PLL_P2_MASK 0x00f00000 -#define PMU5_PLL_P2_SHIFT 20 -#define PMU5_PLL_M14_OFF 1 -#define PMU5_PLL_MDIV_MASK 0x000000ff -#define PMU5_PLL_MDIV_WIDTH 8 -#define PMU5_PLL_NM5_OFF 2 -#define PMU5_PLL_NDIV_MASK 0xfff00000 -#define PMU5_PLL_NDIV_SHIFT 20 -#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 -#define PMU5_PLL_NDIV_MODE_SHIFT 17 -#define PMU5_PLL_FMAB_OFF 3 -#define PMU5_PLL_MRAT_MASK 0xf0000000 -#define PMU5_PLL_MRAT_SHIFT 28 -#define PMU5_PLL_ABRAT_MASK 0x08000000 -#define PMU5_PLL_ABRAT_SHIFT 27 -#define PMU5_PLL_FDIV_MASK 0x07ffffff -#define PMU5_PLL_PLLCTL_OFF 4 -#define PMU5_PLL_PCHI_OFF 5 -#define PMU5_PLL_PCHI_MASK 0x0000003f - - -#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF -#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 -#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 - - -#define PMU5_MAINPLL_CPU 1 -#define PMU5_MAINPLL_MEM 2 -#define PMU5_MAINPLL_SI 3 - - -#define PMU4706_MAINPLL_PLL0 0 -#define PMU6_4706_PROCPLL_OFF 4 -#define PMU6_4706_PROC_P2DIV_MASK 0x000f0000 -#define PMU6_4706_PROC_P2DIV_SHIFT 16 -#define PMU6_4706_PROC_P1DIV_MASK 0x0000f000 -#define PMU6_4706_PROC_P1DIV_SHIFT 12 -#define PMU6_4706_PROC_NDIV_INT_MASK 0x00000ff8 -#define PMU6_4706_PROC_NDIV_INT_SHIFT 3 -#define PMU6_4706_PROC_NDIV_MODE_MASK 0x00000007 -#define PMU6_4706_PROC_NDIV_MODE_SHIFT 0 - -#define PMU7_PLL_PLLCTL7 7 -#define PMU7_PLL_CTL7_M4DIV_MASK 0xff000000 -#define PMU7_PLL_CTL7_M4DIV_SHIFT 24 -#define PMU7_PLL_CTL7_M4DIV_BY_6 6 -#define PMU7_PLL_CTL7_M4DIV_BY_12 0xc -#define PMU7_PLL_CTL7_M4DIV_BY_24 0x18 -#define PMU7_PLL_PLLCTL8 8 -#define PMU7_PLL_CTL8_M5DIV_MASK 0x000000ff -#define PMU7_PLL_CTL8_M5DIV_SHIFT 0 -#define PMU7_PLL_CTL8_M5DIV_BY_8 8 -#define PMU7_PLL_CTL8_M5DIV_BY_12 0xc -#define PMU7_PLL_CTL8_M5DIV_BY_24 0x18 -#define PMU7_PLL_CTL8_M6DIV_MASK 0x0000ff00 -#define PMU7_PLL_CTL8_M6DIV_SHIFT 8 -#define PMU7_PLL_CTL8_M6DIV_BY_12 0xc -#define PMU7_PLL_CTL8_M6DIV_BY_24 0x18 -#define PMU7_PLL_PLLCTL11 11 -#define PMU7_PLL_PLLCTL11_MASK 0xffffff00 -#define PMU7_PLL_PLLCTL11_VAL 0x22222200 - - -#define PMU15_PLL_PLLCTL0 0 -#define PMU15_PLL_PC0_CLKSEL_MASK 0x00000003 -#define PMU15_PLL_PC0_CLKSEL_SHIFT 0 -#define PMU15_PLL_PC0_FREQTGT_MASK 0x003FFFFC -#define PMU15_PLL_PC0_FREQTGT_SHIFT 2 -#define PMU15_PLL_PC0_PRESCALE_MASK 0x00C00000 -#define PMU15_PLL_PC0_PRESCALE_SHIFT 22 -#define PMU15_PLL_PC0_KPCTRL_MASK 0x07000000 -#define PMU15_PLL_PC0_KPCTRL_SHIFT 24 -#define PMU15_PLL_PC0_FCNTCTRL_MASK 0x38000000 -#define PMU15_PLL_PC0_FCNTCTRL_SHIFT 27 -#define PMU15_PLL_PC0_FDCMODE_MASK 0x40000000 -#define PMU15_PLL_PC0_FDCMODE_SHIFT 30 -#define PMU15_PLL_PC0_CTRLBIAS_MASK 0x80000000 -#define PMU15_PLL_PC0_CTRLBIAS_SHIFT 31 - -#define PMU15_PLL_PLLCTL1 1 -#define PMU15_PLL_PC1_BIAS_CTLM_MASK 0x00000060 -#define PMU15_PLL_PC1_BIAS_CTLM_SHIFT 5 -#define PMU15_PLL_PC1_BIAS_CTLM_RST_MASK 0x00000040 -#define PMU15_PLL_PC1_BIAS_CTLM_RST_SHIFT 6 -#define PMU15_PLL_PC1_BIAS_SS_DIVR_MASK 0x0001FF80 -#define PMU15_PLL_PC1_BIAS_SS_DIVR_SHIFT 7 -#define PMU15_PLL_PC1_BIAS_SS_RSTVAL_MASK 0x03FE0000 -#define PMU15_PLL_PC1_BIAS_SS_RSTVAL_SHIFT 17 -#define PMU15_PLL_PC1_BIAS_INTG_BW_MASK 0x0C000000 -#define PMU15_PLL_PC1_BIAS_INTG_BW_SHIFT 26 -#define PMU15_PLL_PC1_BIAS_INTG_BYP_MASK 0x10000000 -#define PMU15_PLL_PC1_BIAS_INTG_BYP_SHIFT 28 -#define PMU15_PLL_PC1_OPENLP_EN_MASK 0x40000000 -#define PMU15_PLL_PC1_OPENLP_EN_SHIFT 30 - -#define PMU15_PLL_PLLCTL2 2 -#define PMU15_PLL_PC2_CTEN_MASK 0x00000001 -#define PMU15_PLL_PC2_CTEN_SHIFT 0 - -#define PMU15_PLL_PLLCTL3 3 -#define PMU15_PLL_PC3_DITHER_EN_MASK 0x00000001 -#define PMU15_PLL_PC3_DITHER_EN_SHIFT 0 -#define PMU15_PLL_PC3_DCOCTLSP_MASK 0xFE000000 -#define PMU15_PLL_PC3_DCOCTLSP_SHIFT 25 -#define PMU15_PLL_PC3_DCOCTLSP_DIV2EN_MASK 0x01 -#define PMU15_PLL_PC3_DCOCTLSP_DIV2EN_SHIFT 0 -#define PMU15_PLL_PC3_DCOCTLSP_CH0EN_MASK 0x02 -#define PMU15_PLL_PC3_DCOCTLSP_CH0EN_SHIFT 1 -#define PMU15_PLL_PC3_DCOCTLSP_CH1EN_MASK 0x04 -#define PMU15_PLL_PC3_DCOCTLSP_CH1EN_SHIFT 2 -#define PMU15_PLL_PC3_DCOCTLSP_CH0SEL_MASK 0x18 -#define PMU15_PLL_PC3_DCOCTLSP_CH0SEL_SHIFT 3 -#define PMU15_PLL_PC3_DCOCTLSP_CH1SEL_MASK 0x60 -#define PMU15_PLL_PC3_DCOCTLSP_CH1SEL_SHIFT 5 -#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV1 0 -#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV2 1 -#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV3 2 -#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV5 3 - -#define PMU15_PLL_PLLCTL4 4 -#define PMU15_PLL_PC4_FLLCLK1_DIV_MASK 0x00000007 -#define PMU15_PLL_PC4_FLLCLK1_DIV_SHIFT 0 -#define PMU15_PLL_PC4_FLLCLK2_DIV_MASK 0x00000038 -#define PMU15_PLL_PC4_FLLCLK2_DIV_SHIFT 3 -#define PMU15_PLL_PC4_FLLCLK3_DIV_MASK 0x000001C0 -#define PMU15_PLL_PC4_FLLCLK3_DIV_SHIFT 6 -#define PMU15_PLL_PC4_DBGMODE_MASK 0x00000E00 -#define PMU15_PLL_PC4_DBGMODE_SHIFT 9 -#define PMU15_PLL_PC4_FLL480_CTLSP_LK_MASK 0x00001000 -#define PMU15_PLL_PC4_FLL480_CTLSP_LK_SHIFT 12 -#define PMU15_PLL_PC4_FLL480_CTLSP_MASK 0x000FE000 -#define PMU15_PLL_PC4_FLL480_CTLSP_SHIFT 13 -#define PMU15_PLL_PC4_DINPOL_MASK 0x00100000 -#define PMU15_PLL_PC4_DINPOL_SHIFT 20 -#define PMU15_PLL_PC4_CLKOUT_PD_MASK 0x00200000 -#define PMU15_PLL_PC4_CLKOUT_PD_SHIFT 21 -#define PMU15_PLL_PC4_CLKDIV2_PD_MASK 0x00400000 -#define PMU15_PLL_PC4_CLKDIV2_PD_SHIFT 22 -#define PMU15_PLL_PC4_CLKDIV4_PD_MASK 0x00800000 -#define PMU15_PLL_PC4_CLKDIV4_PD_SHIFT 23 -#define PMU15_PLL_PC4_CLKDIV8_PD_MASK 0x01000000 -#define PMU15_PLL_PC4_CLKDIV8_PD_SHIFT 24 -#define PMU15_PLL_PC4_CLKDIV16_PD_MASK 0x02000000 -#define PMU15_PLL_PC4_CLKDIV16_PD_SHIFT 25 -#define PMU15_PLL_PC4_TEST_EN_MASK 0x04000000 -#define PMU15_PLL_PC4_TEST_EN_SHIFT 26 - -#define PMU15_PLL_PLLCTL5 5 -#define PMU15_PLL_PC5_FREQTGT_MASK 0x000FFFFF -#define PMU15_PLL_PC5_FREQTGT_SHIFT 0 -#define PMU15_PLL_PC5_DCOCTLSP_MASK 0x07F00000 -#define PMU15_PLL_PC5_DCOCTLSP_SHIFT 20 -#define PMU15_PLL_PC5_PRESCALE_MASK 0x18000000 -#define PMU15_PLL_PC5_PRESCALE_SHIFT 27 - -#define PMU15_PLL_PLLCTL6 6 -#define PMU15_PLL_PC6_FREQTGT_MASK 0x000FFFFF -#define PMU15_PLL_PC6_FREQTGT_SHIFT 0 -#define PMU15_PLL_PC6_DCOCTLSP_MASK 0x07F00000 -#define PMU15_PLL_PC6_DCOCTLSP_SHIFT 20 -#define PMU15_PLL_PC6_PRESCALE_MASK 0x18000000 -#define PMU15_PLL_PC6_PRESCALE_SHIFT 27 - -#define PMU15_FREQTGT_480_DEFAULT 0x19AB1 -#define PMU15_FREQTGT_492_DEFAULT 0x1A4F5 -#define PMU15_ARM_96MHZ 96000000 -#define PMU15_ARM_98MHZ 98400000 -#define PMU15_ARM_97MHZ 97000000 - - -#define PMU17_PLLCTL2_NDIVTYPE_MASK 0x00000070 -#define PMU17_PLLCTL2_NDIVTYPE_SHIFT 4 - -#define PMU17_PLLCTL2_NDIV_MODE_INT 0 -#define PMU17_PLLCTL2_NDIV_MODE_INT1B8 1 -#define PMU17_PLLCTL2_NDIV_MODE_MASH111 2 -#define PMU17_PLLCTL2_NDIV_MODE_MASH111B8 3 - -#define PMU17_PLLCTL0_BBPLL_PWRDWN 0 -#define PMU17_PLLCTL0_BBPLL_DRST 3 -#define PMU17_PLLCTL0_BBPLL_DISBL_CLK 8 - - -#define PMU4716_MAINPLL_PLL0 12 - - -#define PMU5356_MAINPLL_PLL0 0 -#define PMU5357_MAINPLL_PLL0 0 - - -#define RES4716_PROC_PLL_ON 0x00000040 -#define RES4716_PROC_HT_AVAIL 0x00000080 - - -#define CCTRL_471X_I2S_PINS_ENABLE 0x0080 - - - -#define CCTRL_5357_I2S_PINS_ENABLE 0x00040000 -#define CCTRL_5357_I2CSPI_PINS_ENABLE 0x00080000 - - -#define RES5354_EXT_SWITCHER_PWM 0 -#define RES5354_BB_SWITCHER_PWM 1 -#define RES5354_BB_SWITCHER_BURST 2 -#define RES5354_BB_EXT_SWITCHER_BURST 3 -#define RES5354_ILP_REQUEST 4 -#define RES5354_RADIO_SWITCHER_PWM 5 -#define RES5354_RADIO_SWITCHER_BURST 6 -#define RES5354_ROM_SWITCH 7 -#define RES5354_PA_REF_LDO 8 -#define RES5354_RADIO_LDO 9 -#define RES5354_AFE_LDO 10 -#define RES5354_PLL_LDO 11 -#define RES5354_BG_FILTBYP 12 -#define RES5354_TX_FILTBYP 13 -#define RES5354_RX_FILTBYP 14 -#define RES5354_XTAL_PU 15 -#define RES5354_XTAL_EN 16 -#define RES5354_BB_PLL_FILTBYP 17 -#define RES5354_RF_PLL_FILTBYP 18 -#define RES5354_BB_PLL_PU 19 - - -#define CCTRL5357_EXTPA (1<<14) -#define CCTRL5357_ANT_MUX_2o3 (1<<15) -#define CCTRL5357_NFLASH (1<<16) - - -#define RES4328_EXT_SWITCHER_PWM 0 -#define RES4328_BB_SWITCHER_PWM 1 -#define RES4328_BB_SWITCHER_BURST 2 -#define RES4328_BB_EXT_SWITCHER_BURST 3 -#define RES4328_ILP_REQUEST 4 -#define RES4328_RADIO_SWITCHER_PWM 5 -#define RES4328_RADIO_SWITCHER_BURST 6 -#define RES4328_ROM_SWITCH 7 -#define RES4328_PA_REF_LDO 8 -#define RES4328_RADIO_LDO 9 -#define RES4328_AFE_LDO 10 -#define RES4328_PLL_LDO 11 -#define RES4328_BG_FILTBYP 12 -#define RES4328_TX_FILTBYP 13 -#define RES4328_RX_FILTBYP 14 -#define RES4328_XTAL_PU 15 -#define RES4328_XTAL_EN 16 -#define RES4328_BB_PLL_FILTBYP 17 -#define RES4328_RF_PLL_FILTBYP 18 -#define RES4328_BB_PLL_PU 19 - - -#define RES4325_BUCK_BOOST_BURST 0 -#define RES4325_CBUCK_BURST 1 -#define RES4325_CBUCK_PWM 2 -#define RES4325_CLDO_CBUCK_BURST 3 -#define RES4325_CLDO_CBUCK_PWM 4 -#define RES4325_BUCK_BOOST_PWM 5 -#define RES4325_ILP_REQUEST 6 -#define RES4325_ABUCK_BURST 7 -#define RES4325_ABUCK_PWM 8 -#define RES4325_LNLDO1_PU 9 -#define RES4325_OTP_PU 10 -#define RES4325_LNLDO3_PU 11 -#define RES4325_LNLDO4_PU 12 -#define RES4325_XTAL_PU 13 -#define RES4325_ALP_AVAIL 14 -#define RES4325_RX_PWRSW_PU 15 -#define RES4325_TX_PWRSW_PU 16 -#define RES4325_RFPLL_PWRSW_PU 17 -#define RES4325_LOGEN_PWRSW_PU 18 -#define RES4325_AFE_PWRSW_PU 19 -#define RES4325_BBPLL_PWRSW_PU 20 -#define RES4325_HT_AVAIL 21 - - -#define RES4325B0_CBUCK_LPOM 1 -#define RES4325B0_CBUCK_BURST 2 -#define RES4325B0_CBUCK_PWM 3 -#define RES4325B0_CLDO_PU 4 - - -#define RES4325C1_LNLDO2_PU 12 - - -#define CST4325_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4325_DEFCIS_SEL 0 -#define CST4325_SPROM_SEL 1 -#define CST4325_OTP_SEL 2 -#define CST4325_OTP_PWRDN 3 -#define CST4325_SDIO_USB_MODE_MASK 0x00000004 -#define CST4325_SDIO_USB_MODE_SHIFT 2 -#define CST4325_RCAL_VALID_MASK 0x00000008 -#define CST4325_RCAL_VALID_SHIFT 3 -#define CST4325_RCAL_VALUE_MASK 0x000001f0 -#define CST4325_RCAL_VALUE_SHIFT 4 -#define CST4325_PMUTOP_2B_MASK 0x00000200 -#define CST4325_PMUTOP_2B_SHIFT 9 - -#define RES4329_RESERVED0 0 -#define RES4329_CBUCK_LPOM 1 -#define RES4329_CBUCK_BURST 2 -#define RES4329_CBUCK_PWM 3 -#define RES4329_CLDO_PU 4 -#define RES4329_PALDO_PU 5 -#define RES4329_ILP_REQUEST 6 -#define RES4329_RESERVED7 7 -#define RES4329_RESERVED8 8 -#define RES4329_LNLDO1_PU 9 -#define RES4329_OTP_PU 10 -#define RES4329_RESERVED11 11 -#define RES4329_LNLDO2_PU 12 -#define RES4329_XTAL_PU 13 -#define RES4329_ALP_AVAIL 14 -#define RES4329_RX_PWRSW_PU 15 -#define RES4329_TX_PWRSW_PU 16 -#define RES4329_RFPLL_PWRSW_PU 17 -#define RES4329_LOGEN_PWRSW_PU 18 -#define RES4329_AFE_PWRSW_PU 19 -#define RES4329_BBPLL_PWRSW_PU 20 -#define RES4329_HT_AVAIL 21 - -#define CST4329_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4329_DEFCIS_SEL 0 -#define CST4329_SPROM_SEL 1 -#define CST4329_OTP_SEL 2 -#define CST4329_OTP_PWRDN 3 -#define CST4329_SPI_SDIO_MODE_MASK 0x00000004 -#define CST4329_SPI_SDIO_MODE_SHIFT 2 - - -#define CST4312_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4312_DEFCIS_SEL 0 -#define CST4312_SPROM_SEL 1 -#define CST4312_OTP_SEL 2 -#define CST4312_OTP_BAD 3 - - -#define RES4312_SWITCHER_BURST 0 -#define RES4312_SWITCHER_PWM 1 -#define RES4312_PA_REF_LDO 2 -#define RES4312_CORE_LDO_BURST 3 -#define RES4312_CORE_LDO_PWM 4 -#define RES4312_RADIO_LDO 5 -#define RES4312_ILP_REQUEST 6 -#define RES4312_BG_FILTBYP 7 -#define RES4312_TX_FILTBYP 8 -#define RES4312_RX_FILTBYP 9 -#define RES4312_XTAL_PU 10 -#define RES4312_ALP_AVAIL 11 -#define RES4312_BB_PLL_FILTBYP 12 -#define RES4312_RF_PLL_FILTBYP 13 -#define RES4312_HT_AVAIL 14 - - -#define RES4322_RF_LDO 0 -#define RES4322_ILP_REQUEST 1 -#define RES4322_XTAL_PU 2 -#define RES4322_ALP_AVAIL 3 -#define RES4322_SI_PLL_ON 4 -#define RES4322_HT_SI_AVAIL 5 -#define RES4322_PHY_PLL_ON 6 -#define RES4322_HT_PHY_AVAIL 7 -#define RES4322_OTP_PU 8 - - -#define CST4322_XTAL_FREQ_20_40MHZ 0x00000020 -#define CST4322_SPROM_OTP_SEL_MASK 0x000000c0 -#define CST4322_SPROM_OTP_SEL_SHIFT 6 -#define CST4322_NO_SPROM_OTP 0 -#define CST4322_SPROM_PRESENT 1 -#define CST4322_OTP_PRESENT 2 -#define CST4322_PCI_OR_USB 0x00000100 -#define CST4322_BOOT_MASK 0x00000600 -#define CST4322_BOOT_SHIFT 9 -#define CST4322_BOOT_FROM_SRAM 0 -#define CST4322_BOOT_FROM_ROM 1 -#define CST4322_BOOT_FROM_FLASH 2 -#define CST4322_BOOT_FROM_INVALID 3 -#define CST4322_ILP_DIV_EN 0x00000800 -#define CST4322_FLASH_TYPE_MASK 0x00001000 -#define CST4322_FLASH_TYPE_SHIFT 12 -#define CST4322_FLASH_TYPE_SHIFT_ST 0 -#define CST4322_FLASH_TYPE_SHIFT_ATMEL 1 -#define CST4322_ARM_TAP_SEL 0x00002000 -#define CST4322_RES_INIT_MODE_MASK 0x0000c000 -#define CST4322_RES_INIT_MODE_SHIFT 14 -#define CST4322_RES_INIT_MODE_ILPAVAIL 0 -#define CST4322_RES_INIT_MODE_ILPREQ 1 -#define CST4322_RES_INIT_MODE_ALPAVAIL 2 -#define CST4322_RES_INIT_MODE_HTAVAIL 3 -#define CST4322_PCIPLLCLK_GATING 0x00010000 -#define CST4322_CLK_SWITCH_PCI_TO_ALP 0x00020000 -#define CST4322_PCI_CARDBUS_MODE 0x00040000 - - -#define CCTRL43224_GPIO_TOGGLE 0x8000 -#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 -#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 - - -#define RES43236_REGULATOR 0 -#define RES43236_ILP_REQUEST 1 -#define RES43236_XTAL_PU 2 -#define RES43236_ALP_AVAIL 3 -#define RES43236_SI_PLL_ON 4 -#define RES43236_HT_SI_AVAIL 5 - - -#define CCTRL43236_BT_COEXIST (1<<0) -#define CCTRL43236_SECI (1<<1) -#define CCTRL43236_EXT_LNA (1<<2) -#define CCTRL43236_ANT_MUX_2o3 (1<<3) -#define CCTRL43236_GSIO (1<<4) - - -#define CST43236_SFLASH_MASK 0x00000040 -#define CST43236_OTP_SEL_MASK 0x00000080 -#define CST43236_OTP_SEL_SHIFT 7 -#define CST43236_HSIC_MASK 0x00000100 -#define CST43236_BP_CLK 0x00000200 -#define CST43236_BOOT_MASK 0x00001800 -#define CST43236_BOOT_SHIFT 11 -#define CST43236_BOOT_FROM_SRAM 0 -#define CST43236_BOOT_FROM_ROM 1 -#define CST43236_BOOT_FROM_FLASH 2 -#define CST43236_BOOT_FROM_INVALID 3 - - -#define RES43237_REGULATOR 0 -#define RES43237_ILP_REQUEST 1 -#define RES43237_XTAL_PU 2 -#define RES43237_ALP_AVAIL 3 -#define RES43237_SI_PLL_ON 4 -#define RES43237_HT_SI_AVAIL 5 - - -#define CCTRL43237_BT_COEXIST (1<<0) -#define CCTRL43237_SECI (1<<1) -#define CCTRL43237_EXT_LNA (1<<2) -#define CCTRL43237_ANT_MUX_2o3 (1<<3) -#define CCTRL43237_GSIO (1<<4) - - -#define CST43237_SFLASH_MASK 0x00000040 -#define CST43237_OTP_SEL_MASK 0x00000080 -#define CST43237_OTP_SEL_SHIFT 7 -#define CST43237_HSIC_MASK 0x00000100 -#define CST43237_BP_CLK 0x00000200 -#define CST43237_BOOT_MASK 0x00001800 -#define CST43237_BOOT_SHIFT 11 -#define CST43237_BOOT_FROM_SRAM 0 -#define CST43237_BOOT_FROM_ROM 1 -#define CST43237_BOOT_FROM_FLASH 2 -#define CST43237_BOOT_FROM_INVALID 3 - - -#define RES43239_OTP_PU 9 -#define RES43239_MACPHY_CLKAVAIL 23 -#define RES43239_HT_AVAIL 24 - - -#define CST43239_SPROM_MASK 0x00000002 -#define CST43239_SFLASH_MASK 0x00000004 -#define CST43239_RES_INIT_MODE_SHIFT 7 -#define CST43239_RES_INIT_MODE_MASK 0x000001f0 -#define CST43239_CHIPMODE_SDIOD(cs) ((cs) & (1 << 15)) -#define CST43239_CHIPMODE_USB20D(cs) (~(cs) & (1 << 15)) -#define CST43239_CHIPMODE_SDIO(cs) (((cs) & (1 << 0)) == 0) -#define CST43239_CHIPMODE_GSPI(cs) (((cs) & (1 << 0)) == (1 << 0)) - - -#define RES4324_OTP_PU 10 -#define RES4324_HT_AVAIL 29 -#define RES4324_MACPHY_CLKAVAIL 30 - - -#define CST4324_SPROM_MASK 0x00000080 -#define CST4324_SFLASH_MASK 0x00400000 -#define CST4324_RES_INIT_MODE_SHIFT 10 -#define CST4324_RES_INIT_MODE_MASK 0x00000c00 -#define CST4324_CHIPMODE_MASK 0x7 -#define CST4324_CHIPMODE_SDIOD(cs) ((~(cs)) & (1 << 2)) -#define CST4324_CHIPMODE_USB20D(cs) (((cs) & CST4324_CHIPMODE_MASK) == 0x6) - - -#define RES4331_REGULATOR 0 -#define RES4331_ILP_REQUEST 1 -#define RES4331_XTAL_PU 2 -#define RES4331_ALP_AVAIL 3 -#define RES4331_SI_PLL_ON 4 -#define RES4331_HT_SI_AVAIL 5 - - -#define CCTRL4331_BT_COEXIST (1<<0) -#define CCTRL4331_SECI (1<<1) -#define CCTRL4331_EXT_LNA_G (1<<2) -#define CCTRL4331_SPROM_GPIO13_15 (1<<3) -#define CCTRL4331_EXTPA_EN (1<<4) -#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) -#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) -#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) -#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) -#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) -#define CCTRL4331_PCIE_AUXCLKEN (1<<10) -#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) -#define CCTRL4331_EXTPA_EN2 (1<<12) -#define CCTRL4331_EXT_LNA_A (1<<13) -#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) -#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) -#define CCTRL4331_EXTPA_ANA_EN (1<<24) - - -#define CST4331_XTAL_FREQ 0x00000001 -#define CST4331_SPROM_OTP_SEL_MASK 0x00000006 -#define CST4331_SPROM_OTP_SEL_SHIFT 1 -#define CST4331_SPROM_PRESENT 0x00000002 -#define CST4331_OTP_PRESENT 0x00000004 -#define CST4331_LDO_RF 0x00000008 -#define CST4331_LDO_PAR 0x00000010 - - -#define RES4315_CBUCK_LPOM 1 -#define RES4315_CBUCK_BURST 2 -#define RES4315_CBUCK_PWM 3 -#define RES4315_CLDO_PU 4 -#define RES4315_PALDO_PU 5 -#define RES4315_ILP_REQUEST 6 -#define RES4315_LNLDO1_PU 9 -#define RES4315_OTP_PU 10 -#define RES4315_LNLDO2_PU 12 -#define RES4315_XTAL_PU 13 -#define RES4315_ALP_AVAIL 14 -#define RES4315_RX_PWRSW_PU 15 -#define RES4315_TX_PWRSW_PU 16 -#define RES4315_RFPLL_PWRSW_PU 17 -#define RES4315_LOGEN_PWRSW_PU 18 -#define RES4315_AFE_PWRSW_PU 19 -#define RES4315_BBPLL_PWRSW_PU 20 -#define RES4315_HT_AVAIL 21 - - -#define CST4315_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4315_DEFCIS_SEL 0x00000000 -#define CST4315_SPROM_SEL 0x00000001 -#define CST4315_OTP_SEL 0x00000002 -#define CST4315_OTP_PWRDN 0x00000003 -#define CST4315_SDIO_MODE 0x00000004 -#define CST4315_RCAL_VALID 0x00000008 -#define CST4315_RCAL_VALUE_MASK 0x000001f0 -#define CST4315_RCAL_VALUE_SHIFT 4 -#define CST4315_PALDO_EXTPNP 0x00000200 -#define CST4315_CBUCK_MODE_MASK 0x00000c00 -#define CST4315_CBUCK_MODE_BURST 0x00000400 -#define CST4315_CBUCK_MODE_LPBURST 0x00000c00 - - -#define RES4319_CBUCK_LPOM 1 -#define RES4319_CBUCK_BURST 2 -#define RES4319_CBUCK_PWM 3 -#define RES4319_CLDO_PU 4 -#define RES4319_PALDO_PU 5 -#define RES4319_ILP_REQUEST 6 -#define RES4319_LNLDO1_PU 9 -#define RES4319_OTP_PU 10 -#define RES4319_LNLDO2_PU 12 -#define RES4319_XTAL_PU 13 -#define RES4319_ALP_AVAIL 14 -#define RES4319_RX_PWRSW_PU 15 -#define RES4319_TX_PWRSW_PU 16 -#define RES4319_RFPLL_PWRSW_PU 17 -#define RES4319_LOGEN_PWRSW_PU 18 -#define RES4319_AFE_PWRSW_PU 19 -#define RES4319_BBPLL_PWRSW_PU 20 -#define RES4319_HT_AVAIL 21 - - -#define CST4319_SPI_CPULESSUSB 0x00000001 -#define CST4319_SPI_CLK_POL 0x00000002 -#define CST4319_SPI_CLK_PH 0x00000008 -#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 -#define CST4319_SPROM_OTP_SEL_SHIFT 6 -#define CST4319_DEFCIS_SEL 0x00000000 -#define CST4319_SPROM_SEL 0x00000040 -#define CST4319_OTP_SEL 0x00000080 -#define CST4319_OTP_PWRDN 0x000000c0 -#define CST4319_SDIO_USB_MODE 0x00000100 -#define CST4319_REMAP_SEL_MASK 0x00000600 -#define CST4319_ILPDIV_EN 0x00000800 -#define CST4319_XTAL_PD_POL 0x00001000 -#define CST4319_LPO_SEL 0x00002000 -#define CST4319_RES_INIT_MODE 0x0000c000 -#define CST4319_PALDO_EXTPNP 0x00010000 -#define CST4319_CBUCK_MODE_MASK 0x00060000 -#define CST4319_CBUCK_MODE_BURST 0x00020000 -#define CST4319_CBUCK_MODE_LPBURST 0x00060000 -#define CST4319_RCAL_VALID 0x01000000 -#define CST4319_RCAL_VALUE_MASK 0x3e000000 -#define CST4319_RCAL_VALUE_SHIFT 25 - -#define PMU1_PLL0_CHIPCTL0 0 -#define PMU1_PLL0_CHIPCTL1 1 -#define PMU1_PLL0_CHIPCTL2 2 -#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 -#define CCTL_4319USB_XTAL_SEL_SHIFT 19 -#define CCTL_4319USB_48MHZ_PLL_SEL 1 -#define CCTL_4319USB_24MHZ_PLL_SEL 2 - - -#define RES4336_CBUCK_LPOM 0 -#define RES4336_CBUCK_BURST 1 -#define RES4336_CBUCK_LP_PWM 2 -#define RES4336_CBUCK_PWM 3 -#define RES4336_CLDO_PU 4 -#define RES4336_DIS_INT_RESET_PD 5 -#define RES4336_ILP_REQUEST 6 -#define RES4336_LNLDO_PU 7 -#define RES4336_LDO3P3_PU 8 -#define RES4336_OTP_PU 9 -#define RES4336_XTAL_PU 10 -#define RES4336_ALP_AVAIL 11 -#define RES4336_RADIO_PU 12 -#define RES4336_BG_PU 13 -#define RES4336_VREG1p4_PU_PU 14 -#define RES4336_AFE_PWRSW_PU 15 -#define RES4336_RX_PWRSW_PU 16 -#define RES4336_TX_PWRSW_PU 17 -#define RES4336_BB_PWRSW_PU 18 -#define RES4336_SYNTH_PWRSW_PU 19 -#define RES4336_MISC_PWRSW_PU 20 -#define RES4336_LOGEN_PWRSW_PU 21 -#define RES4336_BBPLL_PWRSW_PU 22 -#define RES4336_MACPHY_CLKAVAIL 23 -#define RES4336_HT_AVAIL 24 -#define RES4336_RSVD 25 - - -#define CST4336_SPI_MODE_MASK 0x00000001 -#define CST4336_SPROM_PRESENT 0x00000002 -#define CST4336_OTP_PRESENT 0x00000004 -#define CST4336_ARMREMAP_0 0x00000008 -#define CST4336_ILPDIV_EN_MASK 0x00000010 -#define CST4336_ILPDIV_EN_SHIFT 4 -#define CST4336_XTAL_PD_POL_MASK 0x00000020 -#define CST4336_XTAL_PD_POL_SHIFT 5 -#define CST4336_LPO_SEL_MASK 0x00000040 -#define CST4336_LPO_SEL_SHIFT 6 -#define CST4336_RES_INIT_MODE_MASK 0x00000180 -#define CST4336_RES_INIT_MODE_SHIFT 7 -#define CST4336_CBUCK_MODE_MASK 0x00000600 -#define CST4336_CBUCK_MODE_SHIFT 9 - - -#define PCTL_4336_SERIAL_ENAB (1 << 24) - - -#define RES4330_CBUCK_LPOM 0 -#define RES4330_CBUCK_BURST 1 -#define RES4330_CBUCK_LP_PWM 2 -#define RES4330_CBUCK_PWM 3 -#define RES4330_CLDO_PU 4 -#define RES4330_DIS_INT_RESET_PD 5 -#define RES4330_ILP_REQUEST 6 -#define RES4330_LNLDO_PU 7 -#define RES4330_LDO3P3_PU 8 -#define RES4330_OTP_PU 9 -#define RES4330_XTAL_PU 10 -#define RES4330_ALP_AVAIL 11 -#define RES4330_RADIO_PU 12 -#define RES4330_BG_PU 13 -#define RES4330_VREG1p4_PU_PU 14 -#define RES4330_AFE_PWRSW_PU 15 -#define RES4330_RX_PWRSW_PU 16 -#define RES4330_TX_PWRSW_PU 17 -#define RES4330_BB_PWRSW_PU 18 -#define RES4330_SYNTH_PWRSW_PU 19 -#define RES4330_MISC_PWRSW_PU 20 -#define RES4330_LOGEN_PWRSW_PU 21 -#define RES4330_BBPLL_PWRSW_PU 22 -#define RES4330_MACPHY_CLKAVAIL 23 -#define RES4330_HT_AVAIL 24 -#define RES4330_5gRX_PWRSW_PU 25 -#define RES4330_5gTX_PWRSW_PU 26 -#define RES4330_5g_LOGEN_PWRSW_PU 27 - - -#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) -#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) -#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) -#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) -#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) -#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) -#define CST4330_OTP_PRESENT 0x00000010 -#define CST4330_LPO_AUTODET_EN 0x00000020 -#define CST4330_ARMREMAP_0 0x00000040 -#define CST4330_SPROM_PRESENT 0x00000080 -#define CST4330_ILPDIV_EN 0x00000100 -#define CST4330_LPO_SEL 0x00000200 -#define CST4330_RES_INIT_MODE_SHIFT 10 -#define CST4330_RES_INIT_MODE_MASK 0x00000c00 -#define CST4330_CBUCK_MODE_SHIFT 12 -#define CST4330_CBUCK_MODE_MASK 0x00003000 -#define CST4330_CBUCK_POWER_OK 0x00004000 -#define CST4330_BB_PLL_LOCKED 0x00008000 -#define SOCDEVRAM_BP_ADDR 0x1E000000 -#define SOCDEVRAM_ARM_ADDR 0x00800000 - - -#define PCTL_4330_SERIAL_ENAB (1 << 24) - - -#define CCTRL_4330_GPIO_SEL 0x00000001 -#define CCTRL_4330_ERCX_SEL 0x00000002 -#define CCTRL_4330_SDIO_HOST_WAKE 0x00000004 -#define CCTRL_4330_JTAG_DISABLE 0x00000008 - - -#define RES4334_LPLDO_PU 0 -#define RES4334_RESET_PULLDN_DIS 1 -#define RES4334_PMU_BG_PU 2 -#define RES4334_HSIC_LDO_PU 3 -#define RES4334_CBUCK_LPOM_PU 4 -#define RES4334_CBUCK_PFM_PU 5 -#define RES4334_CLDO_PU 6 -#define RES4334_LPLDO2_LVM 7 -#define RES4334_LNLDO_PU 8 -#define RES4334_LDO3P3_PU 9 -#define RES4334_OTP_PU 10 -#define RES4334_XTAL_PU 11 -#define RES4334_WL_PWRSW_PU 12 -#define RES4334_LQ_AVAIL 13 -#define RES4334_LOGIC_RET 14 -#define RES4334_MEM_SLEEP 15 -#define RES4334_MACPHY_RET 16 -#define RES4334_WL_CORE_READY 17 -#define RES4334_ILP_REQ 18 -#define RES4334_ALP_AVAIL 19 -#define RES4334_MISC_PWRSW_PU 20 -#define RES4334_SYNTH_PWRSW_PU 21 -#define RES4334_RX_PWRSW_PU 22 -#define RES4334_RADIO_PU 23 -#define RES4334_WL_PMU_PU 24 -#define RES4334_VCO_LDO_PU 25 -#define RES4334_AFE_LDO_PU 26 -#define RES4334_RX_LDO_PU 27 -#define RES4334_TX_LDO_PU 28 -#define RES4334_HT_AVAIL 29 -#define RES4334_MACPHY_CLK_AVAIL 30 - - -#define CST4334_CHIPMODE_MASK 7 -#define CST4334_SDIO_MODE 0x00000000 -#define CST4334_SPI_MODE 0x00000004 -#define CST4334_HSIC_MODE 0x00000006 -#define CST4334_BLUSB_MODE 0x00000007 -#define CST4334_CHIPMODE_HSIC(cs) (((cs) & CST4334_CHIPMODE_MASK) == CST4334_HSIC_MODE) -#define CST4334_OTP_PRESENT 0x00000010 -#define CST4334_LPO_AUTODET_EN 0x00000020 -#define CST4334_ARMREMAP_0 0x00000040 -#define CST4334_SPROM_PRESENT 0x00000080 -#define CST4334_ILPDIV_EN_MASK 0x00000100 -#define CST4334_ILPDIV_EN_SHIFT 8 -#define CST4334_LPO_SEL_MASK 0x00000200 -#define CST4334_LPO_SEL_SHIFT 9 -#define CST4334_RES_INIT_MODE_MASK 0x00000C00 -#define CST4334_RES_INIT_MODE_SHIFT 10 - - -#define PCTL_4334_GPIO3_ENAB (1 << 3) - - -#define CCTRL4334_HSIC_LDO_PU (1 << 23) - - -#define CCTRL1_4324_GPIO_SEL (1 << 0) -#define CCTRL1_4324_SDIO_HOST_WAKE (1 << 2) - -#define RES4313_BB_PU_RSRC 0 -#define RES4313_ILP_REQ_RSRC 1 -#define RES4313_XTAL_PU_RSRC 2 -#define RES4313_ALP_AVAIL_RSRC 3 -#define RES4313_RADIO_PU_RSRC 4 -#define RES4313_BG_PU_RSRC 5 -#define RES4313_VREG1P4_PU_RSRC 6 -#define RES4313_AFE_PWRSW_RSRC 7 -#define RES4313_RX_PWRSW_RSRC 8 -#define RES4313_TX_PWRSW_RSRC 9 -#define RES4313_BB_PWRSW_RSRC 10 -#define RES4313_SYNTH_PWRSW_RSRC 11 -#define RES4313_MISC_PWRSW_RSRC 12 -#define RES4313_BB_PLL_PWRSW_RSRC 13 -#define RES4313_HT_AVAIL_RSRC 14 -#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 - - -#define CST4313_SPROM_PRESENT 1 -#define CST4313_OTP_PRESENT 2 -#define CST4313_SPROM_OTP_SEL_MASK 0x00000002 -#define CST4313_SPROM_OTP_SEL_SHIFT 0 - - -#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 - - -#define RES4314_LPLDO_PU 0 -#define RES4314_PMU_SLEEP_DIS 1 -#define RES4314_PMU_BG_PU 2 -#define RES4314_CBUCK_LPOM_PU 3 -#define RES4314_CBUCK_PFM_PU 4 -#define RES4314_CLDO_PU 5 -#define RES4314_LPLDO2_LVM 6 -#define RES4314_WL_PMU_PU 7 -#define RES4314_LNLDO_PU 8 -#define RES4314_LDO3P3_PU 9 -#define RES4314_OTP_PU 10 -#define RES4314_XTAL_PU 11 -#define RES4314_WL_PWRSW_PU 12 -#define RES4314_LQ_AVAIL 13 -#define RES4314_LOGIC_RET 14 -#define RES4314_MEM_SLEEP 15 -#define RES4314_MACPHY_RET 16 -#define RES4314_WL_CORE_READY 17 -#define RES4314_ILP_REQ 18 -#define RES4314_ALP_AVAIL 19 -#define RES4314_MISC_PWRSW_PU 20 -#define RES4314_SYNTH_PWRSW_PU 21 -#define RES4314_RX_PWRSW_PU 22 -#define RES4314_RADIO_PU 23 -#define RES4314_VCO_LDO_PU 24 -#define RES4314_AFE_LDO_PU 25 -#define RES4314_RX_LDO_PU 26 -#define RES4314_TX_LDO_PU 27 -#define RES4314_HT_AVAIL 28 -#define RES4314_MACPHY_CLK_AVAIL 29 - - -#define CST4314_OTP_ENABLED 0x00200000 - - -#define RES43228_NOT_USED 0 -#define RES43228_ILP_REQUEST 1 -#define RES43228_XTAL_PU 2 -#define RES43228_ALP_AVAIL 3 -#define RES43228_PLL_EN 4 -#define RES43228_HT_PHY_AVAIL 5 - - -#define CST43228_ILP_DIV_EN 0x1 -#define CST43228_OTP_PRESENT 0x2 -#define CST43228_SERDES_REFCLK_PADSEL 0x4 -#define CST43228_SDIO_MODE 0x8 -#define CST43228_SDIO_OTP_PRESENT 0x10 -#define CST43228_SDIO_RESET 0x20 - - -#define CST4706_PKG_OPTION (1<<0) -#define CST4706_SFLASH_PRESENT (1<<1) -#define CST4706_SFLASH_TYPE (1<<2) -#define CST4706_MIPS_BENDIAN (1<<3) -#define CST4706_PCIE1_DISABLE (1<<5) - - -#define FLSTRCF4706_MASK 0x000000ff -#define FLSTRCF4706_SF1 0x00000001 -#define FLSTRCF4706_PF1 0x00000002 -#define FLSTRCF4706_SF1_TYPE 0x00000004 -#define FLSTRCF4706_NF1 0x00000008 -#define FLSTRCF4706_1ST_MADDR_SEG_MASK 0x000000f0 -#define FLSTRCF4706_1ST_MADDR_SEG_4MB 0x00000010 -#define FLSTRCF4706_1ST_MADDR_SEG_8MB 0x00000020 -#define FLSTRCF4706_1ST_MADDR_SEG_16MB 0x00000030 -#define FLSTRCF4706_1ST_MADDR_SEG_32MB 0x00000040 -#define FLSTRCF4706_1ST_MADDR_SEG_64MB 0x00000050 -#define FLSTRCF4706_1ST_MADDR_SEG_128MB 0x00000060 -#define FLSTRCF4706_1ST_MADDR_SEG_256MB 0x00000070 - - -#define CCTRL4360_SECI_MODE (1 << 2) -#define CCTRL4360_BTSWCTRL_MODE (1 << 3) -#define CCTRL4360_EXTRA_FEMCTRL_MODE (1 << 8) -#define CCTRL4360_BT_LGCY_MODE (1 << 9) -#define CCTRL4360_CORE2FEMCTRL4_ON (1 << 21) - - -#define RES4360_REGULATOR 0 -#define RES4360_ILP_AVAIL 1 -#define RES4360_ILP_REQ 2 -#define RES4360_XTAL_PU 3 -#define RES4360_ALP_AVAIL 4 -#define RES4360_BBPLLPWRSW_PU 5 -#define RES4360_HT_AVAIL 6 -#define RES4360_OTP_PU 7 -#define RES4360_USBLDO_PU 8 -#define RES4360_USBPLL_PWRSW_PU 9 -#define RES4360_LQ_AVAIL 10 - -#define CST4360_XTAL_40MZ 0x00000001 -#define CST4360_SFLASH 0x00000002 -#define CST4360_SPROM_PRESENT 0x00000004 -#define CST4360_SFLASH_TYPE 0x00000004 -#define CST4360_OTP_ENABLED 0x00000008 -#define CST4360_REMAP_ROM 0x00000010 -#define CST4360_RSRC_INIT_MODE_MASK 0x00000060 -#define CST4360_RSRC_INIT_MODE_SHIFT 5 -#define CST4360_ILP_DIVEN 0x00000080 -#define CST4360_MODE_USB 0x00000100 -#define CST4360_SPROM_SIZE_MASK 0x00000600 -#define CST4360_SPROM_SIZE_SHIFT 9 -#define CST4360_BBPLL_LOCK 0x00000800 -#define CST4360_AVBBPLL_LOCK 0x00001000 -#define CST4360_USBBBPLL_LOCK 0x00002000 - -#define CCTRL_4360_UART_SEL 0x2 - - -#define CHIP_HOSTIF_USB(sih) (si_chip_hostif(sih) & CST4360_MODE_USB) - - -#define PMU_MAX_TRANSITION_DLY 15000 - - -#define PMURES_UP_TRANSITION 2 - - - -#define SECI_MODE_UART 0x0 -#define SECI_MODE_SECI 0x1 -#define SECI_MODE_LEGACY_3WIRE_BT 0x2 -#define SECI_MODE_LEGACY_3WIRE_WLAN 0x3 -#define SECI_MODE_HALF_SECI 0x4 - -#define SECI_RESET (1 << 0) -#define SECI_RESET_BAR_UART (1 << 1) -#define SECI_ENAB_SECI_ECI (1 << 2) -#define SECI_ENAB_SECIOUT_DIS (1 << 3) -#define SECI_MODE_MASK 0x7 -#define SECI_MODE_SHIFT 4 -#define SECI_UPD_SECI (1 << 7) - -#define SECI_SIGNOFF_0 0xDB -#define SECI_SIGNOFF_1 0 - - -#define CLKCTL_STS_SECI_CLK_REQ (1 << 8) -#define CLKCTL_STS_SECI_CLK_AVAIL (1 << 24) - -#define SECI_UART_MSR_CTS_STATE (1 << 0) -#define SECI_UART_MSR_RTS_STATE (1 << 1) -#define SECI_UART_SECI_IN_STATE (1 << 2) -#define SECI_UART_SECI_IN2_STATE (1 << 3) - - -#define SECI_UART_LCR_STOP_BITS (1 << 0) -#define SECI_UART_LCR_PARITY_EN (1 << 1) -#define SECI_UART_LCR_PARITY (1 << 2) -#define SECI_UART_LCR_RX_EN (1 << 3) -#define SECI_UART_LCR_LBRK_CTRL (1 << 4) -#define SECI_UART_LCR_TXO_EN (1 << 5) -#define SECI_UART_LCR_RTSO_EN (1 << 6) -#define SECI_UART_LCR_SLIPMODE_EN (1 << 7) -#define SECI_UART_LCR_RXCRC_CHK (1 << 8) -#define SECI_UART_LCR_TXCRC_INV (1 << 9) -#define SECI_UART_LCR_TXCRC_LSBF (1 << 10) -#define SECI_UART_LCR_TXCRC_EN (1 << 11) - -#define SECI_UART_MCR_TX_EN (1 << 0) -#define SECI_UART_MCR_PRTS (1 << 1) -#define SECI_UART_MCR_SWFLCTRL_EN (1 << 2) -#define SECI_UART_MCR_HIGHRATE_EN (1 << 3) -#define SECI_UART_MCR_LOOPBK_EN (1 << 4) -#define SECI_UART_MCR_AUTO_RTS (1 << 5) -#define SECI_UART_MCR_AUTO_TX_DIS (1 << 6) -#define SECI_UART_MCR_BAUD_ADJ_EN (1 << 7) -#define SECI_UART_MCR_XONOFF_RPT (1 << 9) - - - - -#define ECI_BW_20 0x0 -#define ECI_BW_25 0x1 -#define ECI_BW_30 0x2 -#define ECI_BW_35 0x3 -#define ECI_BW_40 0x4 -#define ECI_BW_45 0x5 -#define ECI_BW_50 0x6 -#define ECI_BW_ALL 0x7 - - -#define WLAN_NUM_ANT1 TXANT_0 -#define WLAN_NUM_ANT2 TXANT_1 - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/sbconfig.h b/drivers/net/wireless/bcmdhd/src/include/sbconfig.h deleted file mode 100644 index 96038c3..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbconfig.h +++ /dev/null @@ -1,275 +0,0 @@ -/* - * Broadcom SiliconBackplane hardware register definitions. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sbconfig.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _SBCONFIG_H -#define _SBCONFIG_H - - -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - - -#define SB_BUS_SIZE 0x10000 -#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE) -#define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) - - -#define SBCONFIGOFF 0xf00 -#define SBCONFIGSIZE 256 - -#define SBIPSFLAG 0x08 -#define SBTPSFLAG 0x18 -#define SBTMERRLOGA 0x48 -#define SBTMERRLOG 0x50 -#define SBADMATCH3 0x60 -#define SBADMATCH2 0x68 -#define SBADMATCH1 0x70 -#define SBIMSTATE 0x90 -#define SBINTVEC 0x94 -#define SBTMSTATELOW 0x98 -#define SBTMSTATEHIGH 0x9c -#define SBBWA0 0xa0 -#define SBIMCONFIGLOW 0xa8 -#define SBIMCONFIGHIGH 0xac -#define SBADMATCH0 0xb0 -#define SBTMCONFIGLOW 0xb8 -#define SBTMCONFIGHIGH 0xbc -#define SBBCONFIG 0xc0 -#define SBBSTATE 0xc8 -#define SBACTCNFG 0xd8 -#define SBFLAGST 0xe8 -#define SBIDLOW 0xf8 -#define SBIDHIGH 0xfc - - - -#define SBIMERRLOGA 0xea8 -#define SBIMERRLOG 0xeb0 -#define SBTMPORTCONNID0 0xed8 -#define SBTMPORTLOCK0 0xef8 - -#ifndef _LANGUAGE_ASSEMBLY - -typedef volatile struct _sbconfig { - uint32 PAD[2]; - uint32 sbipsflag; - uint32 PAD[3]; - uint32 sbtpsflag; - uint32 PAD[11]; - uint32 sbtmerrloga; - uint32 PAD; - uint32 sbtmerrlog; - uint32 PAD[3]; - uint32 sbadmatch3; - uint32 PAD; - uint32 sbadmatch2; - uint32 PAD; - uint32 sbadmatch1; - uint32 PAD[7]; - uint32 sbimstate; - uint32 sbintvec; - uint32 sbtmstatelow; - uint32 sbtmstatehigh; - uint32 sbbwa0; - uint32 PAD; - uint32 sbimconfiglow; - uint32 sbimconfighigh; - uint32 sbadmatch0; - uint32 PAD; - uint32 sbtmconfiglow; - uint32 sbtmconfighigh; - uint32 sbbconfig; - uint32 PAD; - uint32 sbbstate; - uint32 PAD[3]; - uint32 sbactcnfg; - uint32 PAD[3]; - uint32 sbflagst; - uint32 PAD[3]; - uint32 sbidlow; - uint32 sbidhigh; -} sbconfig_t; - -#endif - - -#define SBIPS_INT1_MASK 0x3f -#define SBIPS_INT1_SHIFT 0 -#define SBIPS_INT2_MASK 0x3f00 -#define SBIPS_INT2_SHIFT 8 -#define SBIPS_INT3_MASK 0x3f0000 -#define SBIPS_INT3_SHIFT 16 -#define SBIPS_INT4_MASK 0x3f000000 -#define SBIPS_INT4_SHIFT 24 - - -#define SBTPS_NUM0_MASK 0x3f -#define SBTPS_F0EN0 0x40 - - -#define SBTMEL_CM 0x00000007 -#define SBTMEL_CI 0x0000ff00 -#define SBTMEL_EC 0x0f000000 -#define SBTMEL_ME 0x80000000 - - -#define SBIM_PC 0xf -#define SBIM_AP_MASK 0x30 -#define SBIM_AP_BOTH 0x00 -#define SBIM_AP_TS 0x10 -#define SBIM_AP_TK 0x20 -#define SBIM_AP_RSV 0x30 -#define SBIM_IBE 0x20000 -#define SBIM_TO 0x40000 -#define SBIM_BY 0x01800000 -#define SBIM_RJ 0x02000000 - - -#define SBTML_RESET 0x0001 -#define SBTML_REJ_MASK 0x0006 -#define SBTML_REJ 0x0002 -#define SBTML_TMPREJ 0x0004 - -#define SBTML_SICF_SHIFT 16 - - -#define SBTMH_SERR 0x0001 -#define SBTMH_INT 0x0002 -#define SBTMH_BUSY 0x0004 -#define SBTMH_TO 0x0020 - -#define SBTMH_SISF_SHIFT 16 - - -#define SBBWA_TAB0_MASK 0xffff -#define SBBWA_TAB1_MASK 0xffff -#define SBBWA_TAB1_SHIFT 16 - - -#define SBIMCL_STO_MASK 0x7 -#define SBIMCL_RTO_MASK 0x70 -#define SBIMCL_RTO_SHIFT 4 -#define SBIMCL_CID_MASK 0xff0000 -#define SBIMCL_CID_SHIFT 16 - - -#define SBIMCH_IEM_MASK 0xc -#define SBIMCH_TEM_MASK 0x30 -#define SBIMCH_TEM_SHIFT 4 -#define SBIMCH_BEM_MASK 0xc0 -#define SBIMCH_BEM_SHIFT 6 - - -#define SBAM_TYPE_MASK 0x3 -#define SBAM_AD64 0x4 -#define SBAM_ADINT0_MASK 0xf8 -#define SBAM_ADINT0_SHIFT 3 -#define SBAM_ADINT1_MASK 0x1f8 -#define SBAM_ADINT1_SHIFT 3 -#define SBAM_ADINT2_MASK 0x1f8 -#define SBAM_ADINT2_SHIFT 3 -#define SBAM_ADEN 0x400 -#define SBAM_ADNEG 0x800 -#define SBAM_BASE0_MASK 0xffffff00 -#define SBAM_BASE0_SHIFT 8 -#define SBAM_BASE1_MASK 0xfffff000 -#define SBAM_BASE1_SHIFT 12 -#define SBAM_BASE2_MASK 0xffff0000 -#define SBAM_BASE2_SHIFT 16 - - -#define SBTMCL_CD_MASK 0xff -#define SBTMCL_CO_MASK 0xf800 -#define SBTMCL_CO_SHIFT 11 -#define SBTMCL_IF_MASK 0xfc0000 -#define SBTMCL_IF_SHIFT 18 -#define SBTMCL_IM_MASK 0x3000000 -#define SBTMCL_IM_SHIFT 24 - - -#define SBTMCH_BM_MASK 0x3 -#define SBTMCH_RM_MASK 0x3 -#define SBTMCH_RM_SHIFT 2 -#define SBTMCH_SM_MASK 0x30 -#define SBTMCH_SM_SHIFT 4 -#define SBTMCH_EM_MASK 0x300 -#define SBTMCH_EM_SHIFT 8 -#define SBTMCH_IM_MASK 0xc00 -#define SBTMCH_IM_SHIFT 10 - - -#define SBBC_LAT_MASK 0x3 -#define SBBC_MAX0_MASK 0xf0000 -#define SBBC_MAX0_SHIFT 16 -#define SBBC_MAX1_MASK 0xf00000 -#define SBBC_MAX1_SHIFT 20 - - -#define SBBS_SRD 0x1 -#define SBBS_HRD 0x2 - - -#define SBIDL_CS_MASK 0x3 -#define SBIDL_AR_MASK 0x38 -#define SBIDL_AR_SHIFT 3 -#define SBIDL_SYNCH 0x40 -#define SBIDL_INIT 0x80 -#define SBIDL_MINLAT_MASK 0xf00 -#define SBIDL_MINLAT_SHIFT 8 -#define SBIDL_MAXLAT 0xf000 -#define SBIDL_MAXLAT_SHIFT 12 -#define SBIDL_FIRST 0x10000 -#define SBIDL_CW_MASK 0xc0000 -#define SBIDL_CW_SHIFT 18 -#define SBIDL_TP_MASK 0xf00000 -#define SBIDL_TP_SHIFT 20 -#define SBIDL_IP_MASK 0xf000000 -#define SBIDL_IP_SHIFT 24 -#define SBIDL_RV_MASK 0xf0000000 -#define SBIDL_RV_SHIFT 28 -#define SBIDL_RV_2_2 0x00000000 -#define SBIDL_RV_2_3 0x10000000 - - -#define SBIDH_RC_MASK 0x000f -#define SBIDH_RCE_MASK 0x7000 -#define SBIDH_RCE_SHIFT 8 -#define SBCOREREV(sbidh) \ - ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK)) -#define SBIDH_CC_MASK 0x8ff0 -#define SBIDH_CC_SHIFT 4 -#define SBIDH_VC_MASK 0xffff0000 -#define SBIDH_VC_SHIFT 16 - -#define SB_COMMIT 0xfd8 - - -#define SB_VEND_BCM 0x4243 - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/sbhnddma.h b/drivers/net/wireless/bcmdhd/src/include/sbhnddma.h deleted file mode 100644 index 81e94df..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbhnddma.h +++ /dev/null @@ -1,370 +0,0 @@ -/* - * Generic Broadcom Home Networking Division (HND) DMA engine HW interface - * This supports the following chips: BCM42xx, 44xx, 47xx . - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sbhnddma.h 305346 2011-12-28 04:27:46Z $ - */ - -#ifndef _sbhnddma_h_ -#define _sbhnddma_h_ - - - - - - - -typedef volatile struct { - uint32 control; - uint32 addr; - uint32 ptr; - uint32 status; -} dma32regs_t; - -typedef volatile struct { - dma32regs_t xmt; - dma32regs_t rcv; -} dma32regp_t; - -typedef volatile struct { - uint32 fifoaddr; - uint32 fifodatalow; - uint32 fifodatahigh; - uint32 pad; -} dma32diag_t; - - -typedef volatile struct { - uint32 ctrl; - uint32 addr; -} dma32dd_t; - - -#define D32RINGALIGN_BITS 12 -#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS) -#define D32RINGALIGN (1 << D32RINGALIGN_BITS) - -#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t)) - - -#define XC_XE ((uint32)1 << 0) -#define XC_SE ((uint32)1 << 1) -#define XC_LE ((uint32)1 << 2) -#define XC_FL ((uint32)1 << 4) -#define XC_MR_MASK 0x000000C0 -#define XC_MR_SHIFT 6 -#define XC_PD ((uint32)1 << 11) -#define XC_AE ((uint32)3 << 16) -#define XC_AE_SHIFT 16 -#define XC_BL_MASK 0x001C0000 -#define XC_BL_SHIFT 18 -#define XC_PC_MASK 0x00E00000 -#define XC_PC_SHIFT 21 -#define XC_PT_MASK 0x03000000 -#define XC_PT_SHIFT 24 - - -#define DMA_MR_1 0 -#define DMA_MR_2 1 - - - -#define DMA_BL_16 0 -#define DMA_BL_32 1 -#define DMA_BL_64 2 -#define DMA_BL_128 3 -#define DMA_BL_256 4 -#define DMA_BL_512 5 -#define DMA_BL_1024 6 - - -#define DMA_PC_0 0 -#define DMA_PC_4 1 -#define DMA_PC_8 2 -#define DMA_PC_16 3 - - - -#define DMA_PT_1 0 -#define DMA_PT_2 1 -#define DMA_PT_4 2 -#define DMA_PT_8 3 - - -#define XP_LD_MASK 0xfff - - -#define XS_CD_MASK 0x0fff -#define XS_XS_MASK 0xf000 -#define XS_XS_SHIFT 12 -#define XS_XS_DISABLED 0x0000 -#define XS_XS_ACTIVE 0x1000 -#define XS_XS_IDLE 0x2000 -#define XS_XS_STOPPED 0x3000 -#define XS_XS_SUSP 0x4000 -#define XS_XE_MASK 0xf0000 -#define XS_XE_SHIFT 16 -#define XS_XE_NOERR 0x00000 -#define XS_XE_DPE 0x10000 -#define XS_XE_DFU 0x20000 -#define XS_XE_BEBR 0x30000 -#define XS_XE_BEDA 0x40000 -#define XS_AD_MASK 0xfff00000 -#define XS_AD_SHIFT 20 - - -#define RC_RE ((uint32)1 << 0) -#define RC_RO_MASK 0xfe -#define RC_RO_SHIFT 1 -#define RC_FM ((uint32)1 << 8) -#define RC_SH ((uint32)1 << 9) -#define RC_OC ((uint32)1 << 10) -#define RC_PD ((uint32)1 << 11) -#define RC_AE ((uint32)3 << 16) -#define RC_AE_SHIFT 16 -#define RC_BL_MASK 0x001C0000 -#define RC_BL_SHIFT 18 -#define RC_PC_MASK 0x00E00000 -#define RC_PC_SHIFT 21 -#define RC_PT_MASK 0x03000000 -#define RC_PT_SHIFT 24 - - -#define RP_LD_MASK 0xfff - - -#define RS_CD_MASK 0x0fff -#define RS_RS_MASK 0xf000 -#define RS_RS_SHIFT 12 -#define RS_RS_DISABLED 0x0000 -#define RS_RS_ACTIVE 0x1000 -#define RS_RS_IDLE 0x2000 -#define RS_RS_STOPPED 0x3000 -#define RS_RE_MASK 0xf0000 -#define RS_RE_SHIFT 16 -#define RS_RE_NOERR 0x00000 -#define RS_RE_DPE 0x10000 -#define RS_RE_DFO 0x20000 -#define RS_RE_BEBW 0x30000 -#define RS_RE_BEDA 0x40000 -#define RS_AD_MASK 0xfff00000 -#define RS_AD_SHIFT 20 - - -#define FA_OFF_MASK 0xffff -#define FA_SEL_MASK 0xf0000 -#define FA_SEL_SHIFT 16 -#define FA_SEL_XDD 0x00000 -#define FA_SEL_XDP 0x10000 -#define FA_SEL_RDD 0x40000 -#define FA_SEL_RDP 0x50000 -#define FA_SEL_XFD 0x80000 -#define FA_SEL_XFP 0x90000 -#define FA_SEL_RFD 0xc0000 -#define FA_SEL_RFP 0xd0000 -#define FA_SEL_RSD 0xe0000 -#define FA_SEL_RSP 0xf0000 - - -#define CTRL_BC_MASK 0x00001fff -#define CTRL_AE ((uint32)3 << 16) -#define CTRL_AE_SHIFT 16 -#define CTRL_PARITY ((uint32)3 << 18) -#define CTRL_EOT ((uint32)1 << 28) -#define CTRL_IOC ((uint32)1 << 29) -#define CTRL_EOF ((uint32)1 << 30) -#define CTRL_SOF ((uint32)1 << 31) - - -#define CTRL_CORE_MASK 0x0ff00000 - - - - -typedef volatile struct { - uint32 control; - uint32 ptr; - uint32 addrlow; - uint32 addrhigh; - uint32 status0; - uint32 status1; -} dma64regs_t; - -typedef volatile struct { - dma64regs_t tx; - dma64regs_t rx; -} dma64regp_t; - -typedef volatile struct { - uint32 fifoaddr; - uint32 fifodatalow; - uint32 fifodatahigh; - uint32 pad; -} dma64diag_t; - - -typedef volatile struct { - uint32 ctrl1; - uint32 ctrl2; - uint32 addrlow; - uint32 addrhigh; -} dma64dd_t; - - -#define D64RINGALIGN_BITS 13 -#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) -#define D64RINGALIGN (1 << D64RINGALIGN_BITS) - -#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) - - -#define D64_XC_XE 0x00000001 -#define D64_XC_SE 0x00000002 -#define D64_XC_LE 0x00000004 -#define D64_XC_FL 0x00000010 -#define D64_XC_MR_MASK 0x000000C0 -#define D64_XC_MR_SHIFT 6 -#define D64_XC_PD 0x00000800 -#define D64_XC_AE 0x00030000 -#define D64_XC_AE_SHIFT 16 -#define D64_XC_BL_MASK 0x001C0000 -#define D64_XC_BL_SHIFT 18 -#define D64_XC_PC_MASK 0x00E00000 -#define D64_XC_PC_SHIFT 21 -#define D64_XC_PT_MASK 0x03000000 -#define D64_XC_PT_SHIFT 24 - - -#define D64_XP_LD_MASK 0x00001fff - - -#define D64_XS0_CD_MASK 0x00001fff -#define D64_XS0_XS_MASK 0xf0000000 -#define D64_XS0_XS_SHIFT 28 -#define D64_XS0_XS_DISABLED 0x00000000 -#define D64_XS0_XS_ACTIVE 0x10000000 -#define D64_XS0_XS_IDLE 0x20000000 -#define D64_XS0_XS_STOPPED 0x30000000 -#define D64_XS0_XS_SUSP 0x40000000 - -#define D64_XS1_AD_MASK 0x00001fff -#define D64_XS1_XE_MASK 0xf0000000 -#define D64_XS1_XE_SHIFT 28 -#define D64_XS1_XE_NOERR 0x00000000 -#define D64_XS1_XE_DPE 0x10000000 -#define D64_XS1_XE_DFU 0x20000000 -#define D64_XS1_XE_DTE 0x30000000 -#define D64_XS1_XE_DESRE 0x40000000 -#define D64_XS1_XE_COREE 0x50000000 - - -#define D64_RC_RE 0x00000001 -#define D64_RC_RO_MASK 0x000000fe -#define D64_RC_RO_SHIFT 1 -#define D64_RC_FM 0x00000100 -#define D64_RC_SH 0x00000200 -#define D64_RC_OC 0x00000400 -#define D64_RC_PD 0x00000800 -#define D64_RC_AE 0x00030000 -#define D64_RC_AE_SHIFT 16 -#define D64_RC_BL_MASK 0x001C0000 -#define D64_RC_BL_SHIFT 18 -#define D64_RC_PC_MASK 0x00E00000 -#define D64_RC_PC_SHIFT 21 -#define D64_RC_PT_MASK 0x03000000 -#define D64_RC_PT_SHIFT 24 - - -#define DMA_CTRL_PEN (1 << 0) -#define DMA_CTRL_ROC (1 << 1) -#define DMA_CTRL_RXMULTI (1 << 2) -#define DMA_CTRL_UNFRAMED (1 << 3) -#define DMA_CTRL_USB_BOUNDRY4KB_WAR (1 << 4) -#define DMA_CTRL_DMA_AVOIDANCE_WAR (1 << 5) - - -#define D64_RP_LD_MASK 0x00001fff - - -#define D64_RS0_CD_MASK 0x00001fff -#define D64_RS0_RS_MASK 0xf0000000 -#define D64_RS0_RS_SHIFT 28 -#define D64_RS0_RS_DISABLED 0x00000000 -#define D64_RS0_RS_ACTIVE 0x10000000 -#define D64_RS0_RS_IDLE 0x20000000 -#define D64_RS0_RS_STOPPED 0x30000000 -#define D64_RS0_RS_SUSP 0x40000000 - -#define D64_RS1_AD_MASK 0x0001ffff -#define D64_RS1_RE_MASK 0xf0000000 -#define D64_RS1_RE_SHIFT 28 -#define D64_RS1_RE_NOERR 0x00000000 -#define D64_RS1_RE_DPO 0x10000000 -#define D64_RS1_RE_DFU 0x20000000 -#define D64_RS1_RE_DTE 0x30000000 -#define D64_RS1_RE_DESRE 0x40000000 -#define D64_RS1_RE_COREE 0x50000000 - - -#define D64_FA_OFF_MASK 0xffff -#define D64_FA_SEL_MASK 0xf0000 -#define D64_FA_SEL_SHIFT 16 -#define D64_FA_SEL_XDD 0x00000 -#define D64_FA_SEL_XDP 0x10000 -#define D64_FA_SEL_RDD 0x40000 -#define D64_FA_SEL_RDP 0x50000 -#define D64_FA_SEL_XFD 0x80000 -#define D64_FA_SEL_XFP 0x90000 -#define D64_FA_SEL_RFD 0xc0000 -#define D64_FA_SEL_RFP 0xd0000 -#define D64_FA_SEL_RSD 0xe0000 -#define D64_FA_SEL_RSP 0xf0000 - - -#define D64_CTRL_COREFLAGS 0x0ff00000 -#define D64_CTRL1_EOT ((uint32)1 << 28) -#define D64_CTRL1_IOC ((uint32)1 << 29) -#define D64_CTRL1_EOF ((uint32)1 << 30) -#define D64_CTRL1_SOF ((uint32)1 << 31) - - -#define D64_CTRL2_BC_MASK 0x00007fff -#define D64_CTRL2_AE 0x00030000 -#define D64_CTRL2_AE_SHIFT 16 -#define D64_CTRL2_PARITY 0x00040000 - - -#define D64_CTRL_CORE_MASK 0x0ff00000 - -#define D64_RX_FRM_STS_LEN 0x0000ffff -#define D64_RX_FRM_STS_OVFL 0x00800000 -#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 -#define D64_RX_FRM_STS_DATATYPE 0xf0000000 - - -typedef volatile struct { - uint16 len; - uint16 flags; -} dma_rxh_t; - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/sbpcmcia.h b/drivers/net/wireless/bcmdhd/src/include/sbpcmcia.h deleted file mode 100644 index 35d7b65..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbpcmcia.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sbpcmcia.h 307736 2012-01-12 10:57:05Z $ - */ - -#ifndef _SBPCMCIA_H -#define _SBPCMCIA_H - - - - -#define PCMCIA_FCR (0x700 / 2) - -#define FCR0_OFF 0 -#define FCR1_OFF (0x40 / 2) -#define FCR2_OFF (0x80 / 2) -#define FCR3_OFF (0xc0 / 2) - -#define PCMCIA_FCR0 (0x700 / 2) -#define PCMCIA_FCR1 (0x740 / 2) -#define PCMCIA_FCR2 (0x780 / 2) -#define PCMCIA_FCR3 (0x7c0 / 2) - - - -#define PCMCIA_COR 0 - -#define COR_RST 0x80 -#define COR_LEV 0x40 -#define COR_IRQEN 0x04 -#define COR_BLREN 0x01 -#define COR_FUNEN 0x01 - - -#define PCICIA_FCSR (2 / 2) -#define PCICIA_PRR (4 / 2) -#define PCICIA_SCR (6 / 2) -#define PCICIA_ESR (8 / 2) - - -#define PCM_MEMOFF 0x0000 -#define F0_MEMOFF 0x1000 -#define F1_MEMOFF 0x2000 -#define F2_MEMOFF 0x3000 -#define F3_MEMOFF 0x4000 - - -#define MEM_ADDR0 (0x728 / 2) -#define MEM_ADDR1 (0x72a / 2) -#define MEM_ADDR2 (0x72c / 2) - - -#define PCMCIA_ADDR0 (0x072e / 2) -#define PCMCIA_ADDR1 (0x0730 / 2) -#define PCMCIA_ADDR2 (0x0732 / 2) - -#define MEM_SEG (0x0734 / 2) -#define SROM_CS (0x0736 / 2) -#define SROM_DATAL (0x0738 / 2) -#define SROM_DATAH (0x073a / 2) -#define SROM_ADDRL (0x073c / 2) -#define SROM_ADDRH (0x073e / 2) -#define SROM_INFO2 (0x0772 / 2) -#define SROM_INFO (0x07be / 2) - - -#define SROM_IDLE 0 -#define SROM_WRITE 1 -#define SROM_READ 2 -#define SROM_WEN 4 -#define SROM_WDS 7 -#define SROM_DONE 8 - - -#define SRI_SZ_MASK 0x03 -#define SRI_BLANK 0x04 -#define SRI_OTP 0x80 - - - -#define SBTML_INT_ACK 0x40000 -#define SBTML_INT_EN 0x20000 - - -#define SBTMH_INT_STATUS 0x40000 - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/sbsdio.h b/drivers/net/wireless/bcmdhd/src/include/sbsdio.h deleted file mode 100644 index 334c44e..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbsdio.h +++ /dev/null @@ -1,187 +0,0 @@ -/* - * SDIO device core hardware definitions. - * sdio is a portion of the pcmcia core in core rev 3 - rev 8 - * - * SDIO core support 1bit, 4 bit SDIO mode as well as SPI mode. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sbsdio.h 303863 2011-12-20 07:14:09Z $ - */ - -#ifndef _SBSDIO_H -#define _SBSDIO_H - -#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */ - -/* function 1 miscellaneous registers */ -#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */ -#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */ -#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */ -#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */ -#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */ -#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */ -#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */ -#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */ -#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */ -#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */ - -/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */ -#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */ -#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */ -#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */ -#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */ -#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */ -#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */ -#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */ -#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */ -#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */ -#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */ -#define SBSDIO_FUNC1_MESBUSYCTRL 0x1001D /* MesBusyCtl at 0x1001D (rev 11) */ - -#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */ -#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */ - -/* Sdio Core Rev 12 */ -#define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E -#define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK 0x1 -#define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT 0 -#define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK 0x2 -#define SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT 1 -#define SBSDIO_FUNC1_SLEEPCSR 0x1001F -#define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK 0x1 -#define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT 0 -#define SBSDIO_FUNC1_SLEEPCSR_KSO_EN 1 -#define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK 0x2 -#define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT 1 - -/* SBSDIO_SPROM_CS */ -#define SBSDIO_SPROM_IDLE 0 -#define SBSDIO_SPROM_WRITE 1 -#define SBSDIO_SPROM_READ 2 -#define SBSDIO_SPROM_WEN 4 -#define SBSDIO_SPROM_WDS 7 -#define SBSDIO_SPROM_DONE 8 - -/* SBSDIO_SPROM_INFO */ -#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */ -#define SROM_BLANK 0x04 /* depreciated in corerev 6 */ -#define SROM_OTP 0x80 /* OTP present */ - -/* SBSDIO_CHIP_CTRL */ -#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu, - * 1: power on oscillator - * (for 4318 only) - */ -/* SBSDIO_WATERMARK */ -#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device - * to wait before sending data to host - */ - -/* SBSDIO_MESBUSYCTRL */ -/* When RX FIFO has less entries than this & MBE is set - * => busy signal is asserted between data blocks. -*/ -#define SBSDIO_MESBUSYCTRL_MASK 0x7f - -/* SBSDIO_DEVICE_CTL */ -#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when - * receiving CMD53 - */ -#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is - * synchronous to the sdio clock - */ -#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host - * except the chipActive (rev 8) - */ -#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put - * external pads in tri-state; requires - * sdio bus power cycle to clear (rev 9) - */ -#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */ -#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */ -#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */ -#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */ - - -/* SBSDIO_FUNC1_CHIPCLKCSR */ -#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */ -#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */ -#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */ -#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */ -#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */ -#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */ -#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */ -#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */ -/* In rev8, actual avail bits followed original docs */ -#define SBSDIO_Rev8_HT_AVAIL 0x40 -#define SBSDIO_Rev8_ALP_AVAIL 0x80 -#define SBSDIO_CSR_MASK 0x1F - -#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL) -#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) -#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) -#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) -#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \ - (alponly ? 1 : SBSDIO_HTAV(regval))) - -/* SBSDIO_FUNC1_SDIOPULLUP */ -#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */ -#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */ -#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */ -#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */ -#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */ - -/* function 1 OCP space */ -#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */ -#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000 -#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */ - -/* some duplication with sbsdpcmdev.h here */ -/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */ -#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */ -#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */ -#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */ -#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */ - -/* direct(mapped) cis space */ -#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */ -#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */ -#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */ - -#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */ - -#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple, - * link bytes - */ - -/* indirect cis access (in sprom) */ -#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from - * 8th byte - */ - -#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one - * data comamnd - */ - -#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */ - -#endif /* _SBSDIO_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/sbsdpcmdev.h b/drivers/net/wireless/bcmdhd/src/include/sbsdpcmdev.h deleted file mode 100644 index 3bc071a..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbsdpcmdev.h +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Broadcom SiliconBackplane SDIO/PCMCIA hardware-specific - * device core support - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sbsdpcmdev.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _sbsdpcmdev_h_ -#define _sbsdpcmdev_h_ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - - -typedef volatile struct { - dma64regs_t xmt; /* dma tx */ - uint32 PAD[2]; - dma64regs_t rcv; /* dma rx */ - uint32 PAD[2]; -} dma64p_t; - -/* dma64 sdiod corerev >= 1 */ -typedef volatile struct { - dma64p_t dma64regs[2]; - dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */ - uint32 PAD[92]; -} sdiodma64_t; - -/* dma32 sdiod corerev == 0 */ -typedef volatile struct { - dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */ - uint32 PAD[108]; -} sdiodma32_t; - -/* dma32 regs for pcmcia core */ -typedef volatile struct { - dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */ - uint32 PAD[116]; -} pcmdma32_t; - -/* core registers */ -typedef volatile struct { - uint32 corecontrol; /* CoreControl, 0x000, rev8 */ - uint32 corestatus; /* CoreStatus, 0x004, rev8 */ - uint32 PAD[1]; - uint32 biststatus; /* BistStatus, 0x00c, rev8 */ - - /* PCMCIA access */ - uint16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */ - uint16 PAD[1]; - uint16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */ - uint16 PAD[1]; - uint16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */ - uint16 PAD[1]; - uint16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */ - uint16 PAD[1]; - - /* interrupt */ - uint32 intstatus; /* IntStatus, 0x020, rev8 */ - uint32 hostintmask; /* IntHostMask, 0x024, rev8 */ - uint32 intmask; /* IntSbMask, 0x028, rev8 */ - uint32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */ - uint32 sbintmask; /* SBIntMask, 0x030, rev8 */ - uint32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */ - uint32 PAD[2]; - uint32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */ - uint32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */ - uint32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */ - uint32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */ - - /* synchronized access to registers in SDIO clock domain */ - uint32 sdioaccess; /* SdioAccess, 0x050, rev8 */ - uint32 PAD[3]; - - /* PCMCIA frame control */ - uint8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */ - uint8 PAD[3]; - uint8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */ - uint8 PAD[155]; - - /* interrupt batching control */ - uint32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */ - uint32 PAD[3]; - - /* counters */ - uint32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */ - uint32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */ - uint32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */ - uint32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */ - uint32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */ - uint32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */ - uint32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */ - uint32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */ - uint32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */ - uint32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */ - uint32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */ - uint32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */ - uint32 PAD[40]; - uint32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ - uint32 PAD[7]; - - /* DMA engines */ - volatile union { - pcmdma32_t pcm32; - sdiodma32_t sdiod32; - sdiodma64_t sdiod64; - } dma; - - /* SDIO/PCMCIA CIS region */ - char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ - - /* PCMCIA function control registers */ - char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */ - uint16 PAD[55]; - - /* PCMCIA backplane access */ - uint16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */ - uint16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */ - uint16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */ - uint16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */ - uint16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */ - uint16 backplanedata0; /* BackplaneData0, 0x778, rev6 */ - uint16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */ - uint16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */ - uint16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */ - uint16 PAD[31]; - - /* sprom "size" & "blank" info */ - uint16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */ - uint32 PAD[464]; - - /* Sonics SiliconBackplane registers */ - sbconfig_t sbconfig; /* SbConfig Regs, 0xf00-0xfff, rev8 */ -} sdpcmd_regs_t; - -/* corecontrol */ -#define CC_CISRDY (1 << 0) /* CIS Ready */ -#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */ -#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ -#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */ -#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */ -#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */ - -/* corestatus */ -#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ -#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ -#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ - -#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ -#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ -#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ -#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ - -/* intstatus */ -#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ -#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ -#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ -#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ -#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ -#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ -#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ -#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ -#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ -#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ -#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ -#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ -#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ -#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ -#define I_PC (1 << 10) /* descriptor error */ -#define I_PD (1 << 11) /* data error */ -#define I_DE (1 << 12) /* Descriptor protocol Error */ -#define I_RU (1 << 13) /* Receive descriptor Underflow */ -#define I_RO (1 << 14) /* Receive fifo Overflow */ -#define I_XU (1 << 15) /* Transmit fifo Underflow */ -#define I_RI (1 << 16) /* Receive Interrupt */ -#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ -#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ -#define I_XI (1 << 24) /* Transmit Interrupt */ -#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ -#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ -#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ -#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ -#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */ -#define I_SRESET (1 << 30) /* CCCR RES interrupt */ -#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ -#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */ -#define I_DMA (I_RI | I_XI | I_ERRORS) - -/* sbintstatus */ -#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ -#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ -#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ - -/* sdioaccess */ -#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ -#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ -#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ -#define SDA_WRITE 0x01000000 /* Write bit */ -#define SDA_READ 0x00000000 /* Write bit cleared for Read */ -#define SDA_BUSY 0x80000000 /* Busy bit */ - -/* sdioaccess-accessible register address spaces */ -#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */ -#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */ -#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */ -#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */ - -/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ -#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ -#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ -#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ -#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ -#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ -#define SDA_SBADDRMID 0x00b /* SbAddrMid */ -#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ -#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ -#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ -#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ -#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ -#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ -#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ -#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ - -/* SDA_F2WATERMARK */ -#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ - -/* SDA_SBADDRLOW */ -#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ - -/* SDA_SBADDRMID */ -#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ - -/* SDA_SBADDRHIGH */ -#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ - -/* SDA_FRAMECTRL */ -#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ -#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */ -#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */ - -/* pcmciaframectrl */ -#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ - -/* intrcvlazy */ -#define IRL_TO_MASK 0x00ffffff /* timeout */ -#define IRL_FC_MASK 0xff000000 /* frame count */ -#define IRL_FC_SHIFT 24 /* frame count */ - -/* rx header */ -typedef volatile struct { - uint16 len; - uint16 flags; -} sdpcmd_rxh_t; - -/* rx header flags */ -#define RXF_CRC 0x0001 /* CRC error detected */ -#define RXF_WOOS 0x0002 /* write frame out of sync */ -#define RXF_WF_TERM 0x0004 /* write frame terminated */ -#define RXF_ABORT 0x0008 /* write frame aborted */ -#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */ - -/* HW frame tag */ -#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */ - -#endif /* _sbsdpcmdev_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/sbsocram.h b/drivers/net/wireless/bcmdhd/src/include/sbsocram.h deleted file mode 100644 index 5a03d4b..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sbsocram.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - * BCM47XX Sonics SiliconBackplane embedded ram core - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sbsocram.h 271781 2011-07-13 20:00:06Z $ - */ - -#ifndef _SBSOCRAM_H -#define _SBSOCRAM_H - -#ifndef _LANGUAGE_ASSEMBLY - - -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - - -typedef volatile struct sbsocramregs { - uint32 coreinfo; - uint32 bwalloc; - uint32 extracoreinfo; - uint32 biststat; - uint32 bankidx; - uint32 standbyctrl; - - uint32 errlogstatus; - uint32 errlogaddr; - - uint32 cambankidx; - uint32 cambankstandbyctrl; - uint32 cambankpatchctrl; - uint32 cambankpatchtblbaseaddr; - uint32 cambankcmdreg; - uint32 cambankdatareg; - uint32 cambankmaskreg; - uint32 PAD[1]; - uint32 bankinfo; - uint32 PAD[15]; - uint32 extmemconfig; - uint32 extmemparitycsr; - uint32 extmemparityerrdata; - uint32 extmemparityerrcnt; - uint32 extmemwrctrlandsize; - uint32 PAD[84]; - uint32 workaround; - uint32 pwrctl; - uint32 PAD[133]; - uint32 sr_control; - uint32 sr_status; - uint32 sr_address; - uint32 sr_data; -} sbsocramregs_t; - -#endif - - -#define SR_COREINFO 0x00 -#define SR_BWALLOC 0x04 -#define SR_BISTSTAT 0x0c -#define SR_BANKINDEX 0x10 -#define SR_BANKSTBYCTL 0x14 -#define SR_PWRCTL 0x1e8 - - -#define SRCI_PT_MASK 0x00070000 -#define SRCI_PT_SHIFT 16 - -#define SRCI_PT_OCP_OCP 0 -#define SRCI_PT_AXI_OCP 1 -#define SRCI_PT_ARM7AHB_OCP 2 -#define SRCI_PT_CM3AHB_OCP 3 -#define SRCI_PT_AXI_AXI 4 -#define SRCI_PT_AHB_AXI 5 - -#define SRCI_LSS_MASK 0x00f00000 -#define SRCI_LSS_SHIFT 20 -#define SRCI_LRS_MASK 0x0f000000 -#define SRCI_LRS_SHIFT 24 - - -#define SRCI_MS0_MASK 0xf -#define SR_MS0_BASE 16 - - -#define SRCI_ROMNB_MASK 0xf000 -#define SRCI_ROMNB_SHIFT 12 -#define SRCI_ROMBSZ_MASK 0xf00 -#define SRCI_ROMBSZ_SHIFT 8 -#define SRCI_SRNB_MASK 0xf0 -#define SRCI_SRNB_SHIFT 4 -#define SRCI_SRBSZ_MASK 0xf -#define SRCI_SRBSZ_SHIFT 0 - -#define SR_BSZ_BASE 14 - - -#define SRSC_SBYOVR_MASK 0x80000000 -#define SRSC_SBYOVR_SHIFT 31 -#define SRSC_SBYOVRVAL_MASK 0x60000000 -#define SRSC_SBYOVRVAL_SHIFT 29 -#define SRSC_SBYEN_MASK 0x01000000 -#define SRSC_SBYEN_SHIFT 24 - - -#define SRPC_PMU_STBYDIS_MASK 0x00000010 -#define SRPC_PMU_STBYDIS_SHIFT 4 -#define SRPC_STBYOVRVAL_MASK 0x00000008 -#define SRPC_STBYOVRVAL_SHIFT 3 -#define SRPC_STBYOVR_MASK 0x00000007 -#define SRPC_STBYOVR_SHIFT 0 - - -#define SRECC_NUM_BANKS_MASK 0x000000F0 -#define SRECC_NUM_BANKS_SHIFT 4 -#define SRECC_BANKSIZE_MASK 0x0000000F -#define SRECC_BANKSIZE_SHIFT 0 - -#define SRECC_BANKSIZE(value) (1 << (value)) - - -#define SRCBPC_PATCHENABLE 0x80000000 - -#define SRP_ADDRESS 0x0001FFFC -#define SRP_VALID 0x8000 - - -#define SRCMD_WRITE 0x00020000 -#define SRCMD_READ 0x00010000 -#define SRCMD_DONE 0x80000000 - -#define SRCMD_DONE_DLY 1000 - - -#define SOCRAM_BANKINFO_SZMASK 0x7f -#define SOCRAM_BANKIDX_ROM_MASK 0x100 - -#define SOCRAM_BANKIDX_MEMTYPE_SHIFT 8 - -#define SOCRAM_MEMTYPE_RAM 0 -#define SOCRAM_MEMTYPE_R0M 1 -#define SOCRAM_MEMTYPE_DEVRAM 2 - -#define SOCRAM_BANKINFO_REG 0x40 -#define SOCRAM_BANKIDX_REG 0x10 -#define SOCRAM_BANKINFO_STDBY_MASK 0x400 -#define SOCRAM_BANKINFO_STDBY_TIMER 0x800 - - -#define SOCRAM_BANKINFO_DEVRAMSEL_SHIFT 13 -#define SOCRAM_BANKINFO_DEVRAMSEL_MASK 0x2000 -#define SOCRAM_BANKINFO_DEVRAMPRO_SHIFT 14 -#define SOCRAM_BANKINFO_DEVRAMPRO_MASK 0x4000 -#define SOCRAM_BANKINFO_SLPSUPP_SHIFT 15 -#define SOCRAM_BANKINFO_SLPSUPP_MASK 0x8000 -#define SOCRAM_BANKINFO_RETNTRAM_SHIFT 16 -#define SOCRAM_BANKINFO_RETNTRAM_MASK 0x00010000 -#define SOCRAM_BANKINFO_PDASZ_SHIFT 17 -#define SOCRAM_BANKINFO_PDASZ_MASK 0x003E0000 -#define SOCRAM_BANKINFO_DEVRAMREMAP_SHIFT 24 -#define SOCRAM_BANKINFO_DEVRAMREMAP_MASK 0x01000000 - - -#define SOCRAM_DEVRAMBANK_MASK 0xF000 -#define SOCRAM_DEVRAMBANK_SHIFT 12 - - -#define SOCRAM_BANKINFO_SZBASE 8192 -#define SOCRAM_BANKSIZE_SHIFT 13 - - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/sdio.h b/drivers/net/wireless/bcmdhd/src/include/sdio.h deleted file mode 100644 index aafd1ea..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sdio.h +++ /dev/null @@ -1,617 +0,0 @@ -/* - * SDIO spec header file - * Protocol and standard (common) device definitions - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sdio.h 288543 2011-10-07 12:15:31Z $ - */ - -#ifndef _SDIO_H -#define _SDIO_H - - -/* CCCR structure for function 0 */ -typedef volatile struct { - uint8 cccr_sdio_rev; /* RO, cccr and sdio revision */ - uint8 sd_rev; /* RO, sd spec revision */ - uint8 io_en; /* I/O enable */ - uint8 io_rdy; /* I/O ready reg */ - uint8 intr_ctl; /* Master and per function interrupt enable control */ - uint8 intr_status; /* RO, interrupt pending status */ - uint8 io_abort; /* read/write abort or reset all functions */ - uint8 bus_inter; /* bus interface control */ - uint8 capability; /* RO, card capability */ - - uint8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */ - uint8 cis_base_mid; - uint8 cis_base_high; /* 0xB RO, common CIS base address, MSB */ - - /* suspend/resume registers */ - uint8 bus_suspend; /* 0xC */ - uint8 func_select; /* 0xD */ - uint8 exec_flag; /* 0xE */ - uint8 ready_flag; /* 0xF */ - - uint8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */ - - uint8 power_control; /* 0x12 (SDIO version 1.10) */ - - uint8 speed_control; /* 0x13 */ -} sdio_regs_t; - -/* SDIO Device CCCR offsets */ -#define SDIOD_CCCR_REV 0x00 -#define SDIOD_CCCR_SDREV 0x01 -#define SDIOD_CCCR_IOEN 0x02 -#define SDIOD_CCCR_IORDY 0x03 -#define SDIOD_CCCR_INTEN 0x04 -#define SDIOD_CCCR_INTPEND 0x05 -#define SDIOD_CCCR_IOABORT 0x06 -#define SDIOD_CCCR_BICTRL 0x07 -#define SDIOD_CCCR_CAPABLITIES 0x08 -#define SDIOD_CCCR_CISPTR_0 0x09 -#define SDIOD_CCCR_CISPTR_1 0x0A -#define SDIOD_CCCR_CISPTR_2 0x0B -#define SDIOD_CCCR_BUSSUSP 0x0C -#define SDIOD_CCCR_FUNCSEL 0x0D -#define SDIOD_CCCR_EXECFLAGS 0x0E -#define SDIOD_CCCR_RDYFLAGS 0x0F -#define SDIOD_CCCR_BLKSIZE_0 0x10 -#define SDIOD_CCCR_BLKSIZE_1 0x11 -#define SDIOD_CCCR_POWER_CONTROL 0x12 -#define SDIOD_CCCR_SPEED_CONTROL 0x13 -#define SDIOD_CCCR_UHSI_SUPPORT 0x14 -#define SDIOD_CCCR_DRIVER_STRENGTH 0x15 -#define SDIOD_CCCR_INTR_EXTN 0x16 - -/* Broadcom extensions (corerev >= 1) */ -#define SDIOD_CCCR_BRCM_CARDCAP 0xf0 -#define SDIOD_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02 -#define SDIOD_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04 -#define SDIOD_CCCR_BRCM_CARDCAP_CMD_NODEC 0x08 -#define SDIOD_CCCR_BRCM_CARDCTL 0xf1 -#define SDIOD_CCCR_BRCM_SEPINT 0xf2 - -/* cccr_sdio_rev */ -#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */ -#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */ - -/* sd_rev */ -#define SD_REV_PHY_MASK 0x0f /* SD format version number */ - -/* io_en */ -#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */ -#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */ - -/* io_rdys */ -#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */ -#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */ - -/* intr_ctl */ -#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */ -#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */ -#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */ - -/* intr_status */ -#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */ -#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */ - -/* io_abort */ -#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */ -#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */ - -/* bus_inter */ -#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */ -#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */ -#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */ -#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */ -#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */ -#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */ - -/* capability */ -#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */ -#define SDIO_CAP_LSC 0x40 /* low speed card */ -#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_SBS 0x08 /* support suspend/resume */ -#define SDIO_CAP_SRW 0x04 /* support read wait */ -#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */ -#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */ - -/* power_control */ -#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */ -#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */ - -/* speed_control (control device entry into high-speed clocking mode) */ -#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */ -#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */ - -/* for setting bus speed in card: 0x13h */ -#define SDIO_BUS_SPEED_UHSISEL_M BITFIELD_MASK(3) -#define SDIO_BUS_SPEED_UHSISEL_S 1 - -/* for getting bus speed cap in card: 0x14h */ -#define SDIO_BUS_SPEED_UHSICAP_M BITFIELD_MASK(3) -#define SDIO_BUS_SPEED_UHSICAP_S 0 - -/* for getting driver type CAP in card: 0x15h */ -#define SDIO_BUS_DRVR_TYPE_CAP_M BITFIELD_MASK(3) -#define SDIO_BUS_DRVR_TYPE_CAP_S 0 - -/* for setting driver type selection in card: 0x15h */ -#define SDIO_BUS_DRVR_TYPE_SEL_M BITFIELD_MASK(2) -#define SDIO_BUS_DRVR_TYPE_SEL_S 4 - -/* for getting async int support in card: 0x16h */ -#define SDIO_BUS_ASYNCINT_CAP_M BITFIELD_MASK(1) -#define SDIO_BUS_ASYNCINT_CAP_S 0 - -/* for setting async int selection in card: 0x16h */ -#define SDIO_BUS_ASYNCINT_SEL_M BITFIELD_MASK(1) -#define SDIO_BUS_ASYNCINT_SEL_S 1 - -/* brcm sepint */ -#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */ -#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */ -#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */ - -/* FBR structure for function 1-7, FBR addresses and register offsets */ -typedef volatile struct { - uint8 devctr; /* device interface, CSA control */ - uint8 ext_dev; /* extended standard I/O device type code */ - uint8 pwr_sel; /* power selection support */ - uint8 PAD[6]; /* reserved */ - - uint8 cis_low; /* CIS LSB */ - uint8 cis_mid; - uint8 cis_high; /* CIS MSB */ - uint8 csa_low; /* code storage area, LSB */ - uint8 csa_mid; - uint8 csa_high; /* code storage area, MSB */ - uint8 csa_dat_win; /* data access window to function */ - - uint8 fnx_blk_size[2]; /* block size, little endian */ -} sdio_fbr_t; - -/* Maximum number of I/O funcs */ -#define SDIOD_MAX_FUNCS 8 -#define SDIOD_MAX_IOFUNCS 7 - -/* SDIO Device FBR Start Address */ -#define SDIOD_FBR_STARTADDR 0x100 - -/* SDIO Device FBR Size */ -#define SDIOD_FBR_SIZE 0x100 - -/* Macro to calculate FBR register base */ -#define SDIOD_FBR_BASE(n) ((n) * 0x100) - -/* Function register offsets */ -#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */ -#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */ -#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */ - -/* SDIO Function CIS ptr offset */ -#define SDIOD_FBR_CISPTR_0 0x09 -#define SDIOD_FBR_CISPTR_1 0x0A -#define SDIOD_FBR_CISPTR_2 0x0B - -/* Code Storage Area pointer */ -#define SDIOD_FBR_CSA_ADDR_0 0x0C -#define SDIOD_FBR_CSA_ADDR_1 0x0D -#define SDIOD_FBR_CSA_ADDR_2 0x0E -#define SDIOD_FBR_CSA_DATA 0x0F - -/* SDIO Function I/O Block Size */ -#define SDIOD_FBR_BLKSIZE_0 0x10 -#define SDIOD_FBR_BLKSIZE_1 0x11 - -/* devctr */ -#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */ -#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */ -#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */ -/* interface codes */ -#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */ -#define SDIOD_DIC_UART 1 -#define SDIOD_DIC_BLUETOOTH_A 2 -#define SDIOD_DIC_BLUETOOTH_B 3 -#define SDIOD_DIC_GPS 4 -#define SDIOD_DIC_CAMERA 5 -#define SDIOD_DIC_PHS 6 -#define SDIOD_DIC_WLAN 7 -#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */ - -/* pwr_sel */ -#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */ -#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */ - -/* misc defines */ -#define SDIO_FUNC_0 0 -#define SDIO_FUNC_1 1 -#define SDIO_FUNC_2 2 -#define SDIO_FUNC_3 3 -#define SDIO_FUNC_4 4 -#define SDIO_FUNC_5 5 -#define SDIO_FUNC_6 6 -#define SDIO_FUNC_7 7 - -#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */ -#define SD_CARD_TYPE_IO 1 /* IO only card */ -#define SD_CARD_TYPE_MEMORY 2 /* memory only card */ -#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */ - -#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */ -#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */ - -/* Card registers: status bit position */ -#define CARDREG_STATUS_BIT_OUTOFRANGE 31 -#define CARDREG_STATUS_BIT_COMCRCERROR 23 -#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22 -#define CARDREG_STATUS_BIT_ERROR 19 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9 -#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4 - - - -#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */ -#define SD_CMD_SEND_OPCOND 1 -#define SD_CMD_MMC_SET_RCA 3 -#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */ -#define SD_CMD_SELECT_DESELECT_CARD 7 -#define SD_CMD_SEND_CSD 9 -#define SD_CMD_SEND_CID 10 -#define SD_CMD_STOP_TRANSMISSION 12 -#define SD_CMD_SEND_STATUS 13 -#define SD_CMD_GO_INACTIVE_STATE 15 -#define SD_CMD_SET_BLOCKLEN 16 -#define SD_CMD_READ_SINGLE_BLOCK 17 -#define SD_CMD_READ_MULTIPLE_BLOCK 18 -#define SD_CMD_WRITE_BLOCK 24 -#define SD_CMD_WRITE_MULTIPLE_BLOCK 25 -#define SD_CMD_PROGRAM_CSD 27 -#define SD_CMD_SET_WRITE_PROT 28 -#define SD_CMD_CLR_WRITE_PROT 29 -#define SD_CMD_SEND_WRITE_PROT 30 -#define SD_CMD_ERASE_WR_BLK_START 32 -#define SD_CMD_ERASE_WR_BLK_END 33 -#define SD_CMD_ERASE 38 -#define SD_CMD_LOCK_UNLOCK 42 -#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */ -#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */ -#define SD_CMD_APP_CMD 55 -#define SD_CMD_GEN_CMD 56 -#define SD_CMD_READ_OCR 58 -#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */ -#define SD_ACMD_SD_STATUS 13 -#define SD_ACMD_SEND_NUM_WR_BLOCKS 22 -#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23 -#define SD_ACMD_SD_SEND_OP_COND 41 -#define SD_ACMD_SET_CLR_CARD_DETECT 42 -#define SD_ACMD_SEND_SCR 51 - -/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */ -#define SD_IO_OP_READ 0 /* Read_Write: Read */ -#define SD_IO_OP_WRITE 1 /* Read_Write: Write */ -#define SD_IO_RW_NORMAL 0 /* no RAW */ -#define SD_IO_RW_RAW 1 /* RAW */ -#define SD_IO_BYTE_MODE 0 /* Byte Mode */ -#define SD_IO_BLOCK_MODE 1 /* BlockMode */ -#define SD_IO_FIXED_ADDRESS 0 /* fix Address */ -#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */ - -/* build SD_CMD_IO_RW_DIRECT Argument */ -#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \ - (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF)) - -/* build SD_CMD_IO_RW_EXTENDED Argument */ -#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \ - (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF)) - -/* SDIO response parameters */ -#define SD_RSP_NO_NONE 0 -#define SD_RSP_NO_1 1 -#define SD_RSP_NO_2 2 -#define SD_RSP_NO_3 3 -#define SD_RSP_NO_4 4 -#define SD_RSP_NO_5 5 -#define SD_RSP_NO_6 6 - - /* Modified R6 response (to CMD3) */ -#define SD_RSP_MR6_COM_CRC_ERROR 0x8000 -#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000 -#define SD_RSP_MR6_ERROR 0x2000 - - /* Modified R1 in R4 Response (to CMD5) */ -#define SD_RSP_MR1_SBIT 0x80 -#define SD_RSP_MR1_PARAMETER_ERROR 0x40 -#define SD_RSP_MR1_RFU5 0x20 -#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10 -#define SD_RSP_MR1_COM_CRC_ERROR 0x08 -#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04 -#define SD_RSP_MR1_RFU1 0x02 -#define SD_RSP_MR1_IDLE_STATE 0x01 - - /* R5 response (to CMD52 and CMD53) */ -#define SD_RSP_R5_COM_CRC_ERROR 0x80 -#define SD_RSP_R5_ILLEGAL_COMMAND 0x40 -#define SD_RSP_R5_IO_CURRENTSTATE1 0x20 -#define SD_RSP_R5_IO_CURRENTSTATE0 0x10 -#define SD_RSP_R5_ERROR 0x08 -#define SD_RSP_R5_RFU 0x04 -#define SD_RSP_R5_FUNC_NUM_ERROR 0x02 -#define SD_RSP_R5_OUT_OF_RANGE 0x01 - -#define SD_RSP_R5_ERRBITS 0xCB - - -/* ------------------------------------------------ - * SDIO Commands and responses - * - * I/O only commands are: - * CMD0, CMD3, CMD5, CMD7, CMD14, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -/* SDIO Commands */ -#define SDIOH_CMD_0 0 -#define SDIOH_CMD_3 3 -#define SDIOH_CMD_5 5 -#define SDIOH_CMD_7 7 -#define SDIOH_CMD_11 11 -#define SDIOH_CMD_14 14 -#define SDIOH_CMD_15 15 -#define SDIOH_CMD_19 19 -#define SDIOH_CMD_52 52 -#define SDIOH_CMD_53 53 -#define SDIOH_CMD_59 59 - -/* SDIO Command Responses */ -#define SDIOH_RSP_NONE 0 -#define SDIOH_RSP_R1 1 -#define SDIOH_RSP_R2 2 -#define SDIOH_RSP_R3 3 -#define SDIOH_RSP_R4 4 -#define SDIOH_RSP_R5 5 -#define SDIOH_RSP_R6 6 - -/* - * SDIO Response Error flags - */ -#define SDIOH_RSP5_ERROR_FLAGS 0xCB - -/* ------------------------------------------------ - * SDIO Command structures. I/O only commands are: - * - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -#define CMD5_OCR_M BITFIELD_MASK(24) -#define CMD5_OCR_S 0 - -#define CMD5_S18R_M BITFIELD_MASK(1) -#define CMD5_S18R_S 24 - -#define CMD7_RCA_M BITFIELD_MASK(16) -#define CMD7_RCA_S 16 - -#define CMD14_RCA_M BITFIELD_MASK(16) -#define CMD14_RCA_S 16 -#define CMD14_SLEEP_M BITFIELD_MASK(1) -#define CMD14_SLEEP_S 15 - -#define CMD_15_RCA_M BITFIELD_MASK(16) -#define CMD_15_RCA_S 16 - -#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52 - */ -#define CMD52_DATA_S 0 -#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD52_REG_ADDR_S 9 -#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */ -#define CMD52_RAW_S 27 -#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD52_FUNCTION_S 28 -#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD52_RW_FLAG_S 31 - - -#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */ -#define CMD53_BYTE_BLK_CNT_S 0 -#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD53_REG_ADDR_S 9 -#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */ -#define CMD53_OP_CODE_S 26 -#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */ -#define CMD53_BLK_MODE_S 27 -#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD53_FUNCTION_S 28 -#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD53_RW_FLAG_S 31 - -/* ------------------------------------------------------ - * SDIO Command Response structures for SD1 and SD4 modes - * ----------------------------------------------------- - */ -#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */ -#define RSP4_IO_OCR_S 0 - -#define RSP4_S18A_M BITFIELD_MASK(1) /* Bits [23:0] - Card's OCR Bits [23:0] */ -#define RSP4_S18A_S 24 - -#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */ -#define RSP4_STUFF_S 24 -#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */ -#define RSP4_MEM_PRESENT_S 27 -#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */ -#define RSP4_NUM_FUNCS_S 28 -#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */ -#define RSP4_CARD_READY_S 31 - -#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0] - */ -#define RSP6_STATUS_S 0 -#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */ -#define RSP6_IO_RCA_S 16 - -#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */ -#define RSP1_AKE_SEQ_ERROR_S 3 -#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP1_APP_CMD_S 5 -#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */ -#define RSP1_READY_FOR_DATA_S 8 -#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card - * when Cmd was received - */ -#define RSP1_CURR_STATE_S 9 -#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */ -#define RSP1_EARSE_RESET_S 13 -#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */ -#define RSP1_CARD_ECC_DISABLE_S 14 -#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */ -#define RSP1_WP_ERASE_SKIP_S 15 -#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits - * of CSD - */ -#define RSP1_CID_CSD_OVERW_S 16 -#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */ -#define RSP1_ERROR_S 19 -#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */ -#define RSP1_CC_ERROR_S 20 -#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed - * to correct data - */ -#define RSP1_CARD_ECC_FAILED_S 21 -#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */ -#define RSP1_ILLEGAL_CMD_S 22 -#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed - */ -#define RSP1_COM_CRC_ERROR_S 23 -#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */ -#define RSP1_LOCK_UNLOCK_FAIL_S 24 -#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */ -#define RSP1_CARD_LOCKED_S 25 -#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program - * write-protected blocks - */ -#define RSP1_WP_VIOLATION_S 26 -#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */ -#define RSP1_ERASE_PARAM_S 27 -#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */ -#define RSP1_ERASE_SEQ_ERR_S 28 -#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */ -#define RSP1_BLK_LEN_ERR_S 29 -#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */ -#define RSP1_ADDR_ERR_S 30 -#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */ -#define RSP1_OUT_OF_RANGE_S 31 - - -#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */ -#define RSP5_DATA_S 0 -#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */ -#define RSP5_FLAGS_S 8 -#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */ -#define RSP5_STUFF_S 16 - -/* ---------------------------------------------- - * SDIO Command Response structures for SPI mode - * ---------------------------------------------- - */ -#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */ -#define SPIRSP4_IO_OCR_S 0 -#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */ -#define SPIRSP4_STUFF_S 16 -#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */ -#define SPIRSP4_MEM_PRESENT_S 19 -#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */ -#define SPIRSP4_NUM_FUNCS_S 20 -#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */ -#define SPIRSP4_CARD_READY_S 23 -#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */ -#define SPIRSP4_IDLE_STATE_S 24 -#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP4_ILLEGAL_CMD_S 26 -#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP4_COM_CRC_ERROR_S 27 -#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP4_FUNC_NUM_ERROR_S 28 -#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP4_PARAM_ERROR_S 30 -#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP4_START_BIT_S 31 - -#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */ -#define SPIRSP5_DATA_S 16 -#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */ -#define SPIRSP5_IDLE_STATE_S 24 -#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP5_ILLEGAL_CMD_S 26 -#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP5_COM_CRC_ERROR_S 27 -#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP5_FUNC_NUM_ERROR_S 28 -#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP5_PARAM_ERROR_S 30 -#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP5_START_BIT_S 31 - -/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */ -#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error - */ -#define RSP6STAT_AKE_SEQ_ERROR_S 3 -#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP6STAT_APP_CMD_S 5 -#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data - * (buff empty) - */ -#define RSP6STAT_READY_FOR_DATA_S 8 -#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at - * Cmd reception - */ -#define RSP6STAT_CURR_STATE_S 9 -#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19 - */ -#define RSP6STAT_ERROR_S 13 -#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for - * card state Bit 22 - */ -#define RSP6STAT_ILLEGAL_CMD_S 14 -#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command - * failed Bit 23 - */ -#define RSP6STAT_COM_CRC_ERROR_S 15 - -#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ -#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE - -/* command issue options */ -#define CMD_OPTION_DEFAULT 0 -#define CMD_OPTION_TUNING 1 -#endif /* _SDIO_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/sdioh.h b/drivers/net/wireless/bcmdhd/src/include/sdioh.h deleted file mode 100644 index a4bb275..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sdioh.h +++ /dev/null @@ -1,441 +0,0 @@ -/* - * SDIO Host Controller Spec header file - * Register map and definitions for the Standard Host Controller - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sdioh.h 299859 2011-12-01 03:53:27Z $ - */ - -#ifndef _SDIOH_H -#define _SDIOH_H - -#define SD_SysAddr 0x000 -#define SD_BlockSize 0x004 -#define SD_BlockCount 0x006 -#define SD_Arg0 0x008 -#define SD_Arg1 0x00A -#define SD_TransferMode 0x00C -#define SD_Command 0x00E -#define SD_Response0 0x010 -#define SD_Response1 0x012 -#define SD_Response2 0x014 -#define SD_Response3 0x016 -#define SD_Response4 0x018 -#define SD_Response5 0x01A -#define SD_Response6 0x01C -#define SD_Response7 0x01E -#define SD_BufferDataPort0 0x020 -#define SD_BufferDataPort1 0x022 -#define SD_PresentState 0x024 -#define SD_HostCntrl 0x028 -#define SD_PwrCntrl 0x029 -#define SD_BlockGapCntrl 0x02A -#define SD_WakeupCntrl 0x02B -#define SD_ClockCntrl 0x02C -#define SD_TimeoutCntrl 0x02E -#define SD_SoftwareReset 0x02F -#define SD_IntrStatus 0x030 -#define SD_ErrorIntrStatus 0x032 -#define SD_IntrStatusEnable 0x034 -#define SD_ErrorIntrStatusEnable 0x036 -#define SD_IntrSignalEnable 0x038 -#define SD_ErrorIntrSignalEnable 0x03A -#define SD_CMD12ErrorStatus 0x03C -#define SD_Capabilities 0x040 -#define SD_Capabilities3 0x044 -#define SD_MaxCurCap 0x048 -#define SD_MaxCurCap_Reserved 0x04C -#define SD_ADMA_ErrStatus 0x054 -#define SD_ADMA_SysAddr 0x58 -#define SD_SlotInterruptStatus 0x0FC -#define SD_HostControllerVersion 0x0FE -#define SD_GPIO_Reg 0x100 -#define SD_GPIO_OE 0x104 -#define SD_GPIO_Enable 0x108 - -/* SD specific registers in PCI config space */ -#define SD_SlotInfo 0x40 - -/* HC 3.0 specific registers and offsets */ -#define SD3_HostCntrl2 0x03E -/* preset regsstart and count */ -#define SD3_PresetValStart 0x060 -#define SD3_PresetValCount 8 -/* preset-indiv regs */ -#define SD3_PresetVal_init 0x060 -#define SD3_PresetVal_default 0x062 -#define SD3_PresetVal_HS 0x064 -#define SD3_PresetVal_SDR12 0x066 -#define SD3_PresetVal_SDR25 0x068 -#define SD3_PresetVal_SDR50 0x06a -#define SD3_PresetVal_SDR104 0x06c -#define SD3_PresetVal_DDR50 0x06e - -/* preset value indices */ -#define SD3_PRESETVAL_INITIAL_IX 0 -#define SD3_PRESETVAL_DESPEED_IX 1 -#define SD3_PRESETVAL_HISPEED_IX 2 -#define SD3_PRESETVAL_SDR12_IX 3 -#define SD3_PRESETVAL_SDR25_IX 4 -#define SD3_PRESETVAL_SDR50_IX 5 -#define SD3_PRESETVAL_SDR104_IX 6 -#define SD3_PRESETVAL_DDR50_IX 7 - -/* SD_Capabilities reg (0x040) */ -#define CAP_TO_CLKFREQ_M BITFIELD_MASK(6) -#define CAP_TO_CLKFREQ_S 0 -#define CAP_TO_CLKUNIT_M BITFIELD_MASK(1) -#define CAP_TO_CLKUNIT_S 7 -/* Note: for sdio-2.0 case, this mask has to be 6 bits, but msb 2 - bits are reserved. going ahead with 8 bits, as it is req for 3.0 -*/ -#define CAP_BASECLK_M BITFIELD_MASK(8) -#define CAP_BASECLK_S 8 -#define CAP_MAXBLOCK_M BITFIELD_MASK(2) -#define CAP_MAXBLOCK_S 16 -#define CAP_ADMA2_M BITFIELD_MASK(1) -#define CAP_ADMA2_S 19 -#define CAP_ADMA1_M BITFIELD_MASK(1) -#define CAP_ADMA1_S 20 -#define CAP_HIGHSPEED_M BITFIELD_MASK(1) -#define CAP_HIGHSPEED_S 21 -#define CAP_DMA_M BITFIELD_MASK(1) -#define CAP_DMA_S 22 -#define CAP_SUSPEND_M BITFIELD_MASK(1) -#define CAP_SUSPEND_S 23 -#define CAP_VOLT_3_3_M BITFIELD_MASK(1) -#define CAP_VOLT_3_3_S 24 -#define CAP_VOLT_3_0_M BITFIELD_MASK(1) -#define CAP_VOLT_3_0_S 25 -#define CAP_VOLT_1_8_M BITFIELD_MASK(1) -#define CAP_VOLT_1_8_S 26 -#define CAP_64BIT_HOST_M BITFIELD_MASK(1) -#define CAP_64BIT_HOST_S 28 - -#define SDIO_OCR_READ_FAIL (2) - - -#define CAP_ASYNCINT_SUP_M BITFIELD_MASK(1) -#define CAP_ASYNCINT_SUP_S 29 - -#define CAP_SLOTTYPE_M BITFIELD_MASK(2) -#define CAP_SLOTTYPE_S 30 - -#define CAP3_MSBits_OFFSET (32) -/* note: following are caps MSB32 bits. - So the bits start from 0, instead of 32. that is why - CAP3_MSBits_OFFSET is subtracted. -*/ -#define CAP3_SDR50_SUP_M BITFIELD_MASK(1) -#define CAP3_SDR50_SUP_S (32 - CAP3_MSBits_OFFSET) - -#define CAP3_SDR104_SUP_M BITFIELD_MASK(1) -#define CAP3_SDR104_SUP_S (33 - CAP3_MSBits_OFFSET) - -#define CAP3_DDR50_SUP_M BITFIELD_MASK(1) -#define CAP3_DDR50_SUP_S (34 - CAP3_MSBits_OFFSET) - -/* for knowing the clk caps in a single read */ -#define CAP3_30CLKCAP_M BITFIELD_MASK(3) -#define CAP3_30CLKCAP_S (32 - CAP3_MSBits_OFFSET) - -#define CAP3_DRIVTYPE_A_M BITFIELD_MASK(1) -#define CAP3_DRIVTYPE_A_S (36 - CAP3_MSBits_OFFSET) - -#define CAP3_DRIVTYPE_C_M BITFIELD_MASK(1) -#define CAP3_DRIVTYPE_C_S (37 - CAP3_MSBits_OFFSET) - -#define CAP3_DRIVTYPE_D_M BITFIELD_MASK(1) -#define CAP3_DRIVTYPE_D_S (38 - CAP3_MSBits_OFFSET) - -#define CAP3_RETUNING_TC_M BITFIELD_MASK(4) -#define CAP3_RETUNING_TC_S (40 - CAP3_MSBits_OFFSET) - -#define CAP3_TUNING_SDR50_M BITFIELD_MASK(1) -#define CAP3_TUNING_SDR50_S (45 - CAP3_MSBits_OFFSET) - -#define CAP3_RETUNING_MODES_M BITFIELD_MASK(2) -#define CAP3_RETUNING_MODES_S (46 - CAP3_MSBits_OFFSET) - -#define CAP3_CLK_MULT_M BITFIELD_MASK(8) -#define CAP3_CLK_MULT_S (48 - CAP3_MSBits_OFFSET) - -#define PRESET_DRIVR_SELECT_M BITFIELD_MASK(2) -#define PRESET_DRIVR_SELECT_S 14 - -#define PRESET_CLK_DIV_M BITFIELD_MASK(10) -#define PRESET_CLK_DIV_S 0 - -/* SD_MaxCurCap reg (0x048) */ -#define CAP_CURR_3_3_M BITFIELD_MASK(8) -#define CAP_CURR_3_3_S 0 -#define CAP_CURR_3_0_M BITFIELD_MASK(8) -#define CAP_CURR_3_0_S 8 -#define CAP_CURR_1_8_M BITFIELD_MASK(8) -#define CAP_CURR_1_8_S 16 - -/* SD_SysAddr: Offset 0x0000, Size 4 bytes */ - -/* SD_BlockSize: Offset 0x004, Size 2 bytes */ -#define BLKSZ_BLKSZ_M BITFIELD_MASK(12) -#define BLKSZ_BLKSZ_S 0 -#define BLKSZ_BNDRY_M BITFIELD_MASK(3) -#define BLKSZ_BNDRY_S 12 - -/* SD_BlockCount: Offset 0x006, size 2 bytes */ - -/* SD_Arg0: Offset 0x008, size = 4 bytes */ -/* SD_TransferMode Offset 0x00C, size = 2 bytes */ -#define XFER_DMA_ENABLE_M BITFIELD_MASK(1) -#define XFER_DMA_ENABLE_S 0 -#define XFER_BLK_COUNT_EN_M BITFIELD_MASK(1) -#define XFER_BLK_COUNT_EN_S 1 -#define XFER_CMD_12_EN_M BITFIELD_MASK(1) -#define XFER_CMD_12_EN_S 2 -#define XFER_DATA_DIRECTION_M BITFIELD_MASK(1) -#define XFER_DATA_DIRECTION_S 4 -#define XFER_MULTI_BLOCK_M BITFIELD_MASK(1) -#define XFER_MULTI_BLOCK_S 5 - -/* SD_Command: Offset 0x00E, size = 2 bytes */ -/* resp_type field */ -#define RESP_TYPE_NONE 0 -#define RESP_TYPE_136 1 -#define RESP_TYPE_48 2 -#define RESP_TYPE_48_BUSY 3 -/* type field */ -#define CMD_TYPE_NORMAL 0 -#define CMD_TYPE_SUSPEND 1 -#define CMD_TYPE_RESUME 2 -#define CMD_TYPE_ABORT 3 - -#define CMD_RESP_TYPE_M BITFIELD_MASK(2) /* Bits [0-1] - Response type */ -#define CMD_RESP_TYPE_S 0 -#define CMD_CRC_EN_M BITFIELD_MASK(1) /* Bit 3 - CRC enable */ -#define CMD_CRC_EN_S 3 -#define CMD_INDEX_EN_M BITFIELD_MASK(1) /* Bit 4 - Enable index checking */ -#define CMD_INDEX_EN_S 4 -#define CMD_DATA_EN_M BITFIELD_MASK(1) /* Bit 5 - Using DAT line */ -#define CMD_DATA_EN_S 5 -#define CMD_TYPE_M BITFIELD_MASK(2) /* Bit [6-7] - Normal, abort, resume, etc - */ -#define CMD_TYPE_S 6 -#define CMD_INDEX_M BITFIELD_MASK(6) /* Bits [8-13] - Command number */ -#define CMD_INDEX_S 8 - -/* SD_BufferDataPort0 : Offset 0x020, size = 2 or 4 bytes */ -/* SD_BufferDataPort1 : Offset 0x022, size = 2 bytes */ -/* SD_PresentState : Offset 0x024, size = 4 bytes */ -#define PRES_CMD_INHIBIT_M BITFIELD_MASK(1) /* Bit 0 May use CMD */ -#define PRES_CMD_INHIBIT_S 0 -#define PRES_DAT_INHIBIT_M BITFIELD_MASK(1) /* Bit 1 May use DAT */ -#define PRES_DAT_INHIBIT_S 1 -#define PRES_DAT_BUSY_M BITFIELD_MASK(1) /* Bit 2 DAT is busy */ -#define PRES_DAT_BUSY_S 2 -#define PRES_PRESENT_RSVD_M BITFIELD_MASK(5) /* Bit [3-7] rsvd */ -#define PRES_PRESENT_RSVD_S 3 -#define PRES_WRITE_ACTIVE_M BITFIELD_MASK(1) /* Bit 8 Write is active */ -#define PRES_WRITE_ACTIVE_S 8 -#define PRES_READ_ACTIVE_M BITFIELD_MASK(1) /* Bit 9 Read is active */ -#define PRES_READ_ACTIVE_S 9 -#define PRES_WRITE_DATA_RDY_M BITFIELD_MASK(1) /* Bit 10 Write buf is avail */ -#define PRES_WRITE_DATA_RDY_S 10 -#define PRES_READ_DATA_RDY_M BITFIELD_MASK(1) /* Bit 11 Read buf data avail */ -#define PRES_READ_DATA_RDY_S 11 -#define PRES_CARD_PRESENT_M BITFIELD_MASK(1) /* Bit 16 Card present - debounced */ -#define PRES_CARD_PRESENT_S 16 -#define PRES_CARD_STABLE_M BITFIELD_MASK(1) /* Bit 17 Debugging */ -#define PRES_CARD_STABLE_S 17 -#define PRES_CARD_PRESENT_RAW_M BITFIELD_MASK(1) /* Bit 18 Not debounced */ -#define PRES_CARD_PRESENT_RAW_S 18 -#define PRES_WRITE_ENABLED_M BITFIELD_MASK(1) /* Bit 19 Write protected? */ -#define PRES_WRITE_ENABLED_S 19 -#define PRES_DAT_SIGNAL_M BITFIELD_MASK(4) /* Bit [20-23] Debugging */ -#define PRES_DAT_SIGNAL_S 20 -#define PRES_CMD_SIGNAL_M BITFIELD_MASK(1) /* Bit 24 Debugging */ -#define PRES_CMD_SIGNAL_S 24 - -/* SD_HostCntrl: Offset 0x028, size = 1 bytes */ -#define HOST_LED_M BITFIELD_MASK(1) /* Bit 0 LED On/Off */ -#define HOST_LED_S 0 -#define HOST_DATA_WIDTH_M BITFIELD_MASK(1) /* Bit 1 4 bit enable */ -#define HOST_DATA_WIDTH_S 1 -#define HOST_HI_SPEED_EN_M BITFIELD_MASK(1) /* Bit 2 High speed vs low speed */ -#define HOST_DMA_SEL_S 3 -#define HOST_DMA_SEL_M BITFIELD_MASK(2) /* Bit 4:3 DMA Select */ -#define HOST_HI_SPEED_EN_S 2 - -/* Host Control2: */ -#define HOSTCtrl2_PRESVAL_EN_M BITFIELD_MASK(1) /* 1 bit */ -#define HOSTCtrl2_PRESVAL_EN_S 15 /* bit# */ - -#define HOSTCtrl2_ASYINT_EN_M BITFIELD_MASK(1) /* 1 bit */ -#define HOSTCtrl2_ASYINT_EN_S 14 /* bit# */ - -#define HOSTCtrl2_SAMPCLK_SEL_M BITFIELD_MASK(1) /* 1 bit */ -#define HOSTCtrl2_SAMPCLK_SEL_S 7 /* bit# */ - -#define HOSTCtrl2_EXEC_TUNING_M BITFIELD_MASK(1) /* 1 bit */ -#define HOSTCtrl2_EXEC_TUNING_S 6 /* bit# */ - -#define HOSTCtrl2_DRIVSTRENGTH_SEL_M BITFIELD_MASK(2) /* 2 bit */ -#define HOSTCtrl2_DRIVSTRENGTH_SEL_S 4 /* bit# */ - -#define HOSTCtrl2_1_8SIG_EN_M BITFIELD_MASK(1) /* 1 bit */ -#define HOSTCtrl2_1_8SIG_EN_S 3 /* bit# */ - -#define HOSTCtrl2_UHSMODE_SEL_M BITFIELD_MASK(3) /* 3 bit */ -#define HOSTCtrl2_UHSMODE_SEL_S 0 /* bit# */ - -#define HOST_CONTR_VER_2 (1) -#define HOST_CONTR_VER_3 (2) - -/* misc defines */ -#define SD1_MODE 0x1 /* SD Host Cntrlr Spec */ -#define SD4_MODE 0x2 /* SD Host Cntrlr Spec */ - -/* SD_PwrCntrl: Offset 0x029, size = 1 bytes */ -#define PWR_BUS_EN_M BITFIELD_MASK(1) /* Bit 0 Power the bus */ -#define PWR_BUS_EN_S 0 -#define PWR_VOLTS_M BITFIELD_MASK(3) /* Bit [1-3] Voltage Select */ -#define PWR_VOLTS_S 1 - -/* SD_SoftwareReset: Offset 0x02F, size = 1 byte */ -#define SW_RESET_ALL_M BITFIELD_MASK(1) /* Bit 0 Reset All */ -#define SW_RESET_ALL_S 0 -#define SW_RESET_CMD_M BITFIELD_MASK(1) /* Bit 1 CMD Line Reset */ -#define SW_RESET_CMD_S 1 -#define SW_RESET_DAT_M BITFIELD_MASK(1) /* Bit 2 DAT Line Reset */ -#define SW_RESET_DAT_S 2 - -/* SD_IntrStatus: Offset 0x030, size = 2 bytes */ -/* Defs also serve SD_IntrStatusEnable and SD_IntrSignalEnable */ -#define INTSTAT_CMD_COMPLETE_M BITFIELD_MASK(1) /* Bit 0 */ -#define INTSTAT_CMD_COMPLETE_S 0 -#define INTSTAT_XFER_COMPLETE_M BITFIELD_MASK(1) -#define INTSTAT_XFER_COMPLETE_S 1 -#define INTSTAT_BLOCK_GAP_EVENT_M BITFIELD_MASK(1) -#define INTSTAT_BLOCK_GAP_EVENT_S 2 -#define INTSTAT_DMA_INT_M BITFIELD_MASK(1) -#define INTSTAT_DMA_INT_S 3 -#define INTSTAT_BUF_WRITE_READY_M BITFIELD_MASK(1) -#define INTSTAT_BUF_WRITE_READY_S 4 -#define INTSTAT_BUF_READ_READY_M BITFIELD_MASK(1) -#define INTSTAT_BUF_READ_READY_S 5 -#define INTSTAT_CARD_INSERTION_M BITFIELD_MASK(1) -#define INTSTAT_CARD_INSERTION_S 6 -#define INTSTAT_CARD_REMOVAL_M BITFIELD_MASK(1) -#define INTSTAT_CARD_REMOVAL_S 7 -#define INTSTAT_CARD_INT_M BITFIELD_MASK(1) -#define INTSTAT_CARD_INT_S 8 -#define INTSTAT_RETUNING_INT_M BITFIELD_MASK(1) /* Bit 12 */ -#define INTSTAT_RETUNING_INT_S 12 -#define INTSTAT_ERROR_INT_M BITFIELD_MASK(1) /* Bit 15 */ -#define INTSTAT_ERROR_INT_S 15 - -/* SD_ErrorIntrStatus: Offset 0x032, size = 2 bytes */ -/* Defs also serve SD_ErrorIntrStatusEnable and SD_ErrorIntrSignalEnable */ -#define ERRINT_CMD_TIMEOUT_M BITFIELD_MASK(1) -#define ERRINT_CMD_TIMEOUT_S 0 -#define ERRINT_CMD_CRC_M BITFIELD_MASK(1) -#define ERRINT_CMD_CRC_S 1 -#define ERRINT_CMD_ENDBIT_M BITFIELD_MASK(1) -#define ERRINT_CMD_ENDBIT_S 2 -#define ERRINT_CMD_INDEX_M BITFIELD_MASK(1) -#define ERRINT_CMD_INDEX_S 3 -#define ERRINT_DATA_TIMEOUT_M BITFIELD_MASK(1) -#define ERRINT_DATA_TIMEOUT_S 4 -#define ERRINT_DATA_CRC_M BITFIELD_MASK(1) -#define ERRINT_DATA_CRC_S 5 -#define ERRINT_DATA_ENDBIT_M BITFIELD_MASK(1) -#define ERRINT_DATA_ENDBIT_S 6 -#define ERRINT_CURRENT_LIMIT_M BITFIELD_MASK(1) -#define ERRINT_CURRENT_LIMIT_S 7 -#define ERRINT_AUTO_CMD12_M BITFIELD_MASK(1) -#define ERRINT_AUTO_CMD12_S 8 -#define ERRINT_VENDOR_M BITFIELD_MASK(4) -#define ERRINT_VENDOR_S 12 -#define ERRINT_ADMA_M BITFIELD_MASK(1) -#define ERRINT_ADMA_S 9 - -/* Also provide definitions in "normal" form to allow combined masks */ -#define ERRINT_CMD_TIMEOUT_BIT 0x0001 -#define ERRINT_CMD_CRC_BIT 0x0002 -#define ERRINT_CMD_ENDBIT_BIT 0x0004 -#define ERRINT_CMD_INDEX_BIT 0x0008 -#define ERRINT_DATA_TIMEOUT_BIT 0x0010 -#define ERRINT_DATA_CRC_BIT 0x0020 -#define ERRINT_DATA_ENDBIT_BIT 0x0040 -#define ERRINT_CURRENT_LIMIT_BIT 0x0080 -#define ERRINT_AUTO_CMD12_BIT 0x0100 -#define ERRINT_ADMA_BIT 0x0200 - -/* Masks to select CMD vs. DATA errors */ -#define ERRINT_CMD_ERRS (ERRINT_CMD_TIMEOUT_BIT | ERRINT_CMD_CRC_BIT |\ - ERRINT_CMD_ENDBIT_BIT | ERRINT_CMD_INDEX_BIT) -#define ERRINT_DATA_ERRS (ERRINT_DATA_TIMEOUT_BIT | ERRINT_DATA_CRC_BIT |\ - ERRINT_DATA_ENDBIT_BIT | ERRINT_ADMA_BIT) -#define ERRINT_TRANSFER_ERRS (ERRINT_CMD_ERRS | ERRINT_DATA_ERRS) - -/* SD_WakeupCntr_BlockGapCntrl : Offset 0x02A , size = bytes */ -/* SD_ClockCntrl : Offset 0x02C , size = bytes */ -/* SD_SoftwareReset_TimeoutCntrl : Offset 0x02E , size = bytes */ -/* SD_IntrStatus : Offset 0x030 , size = bytes */ -/* SD_ErrorIntrStatus : Offset 0x032 , size = bytes */ -/* SD_IntrStatusEnable : Offset 0x034 , size = bytes */ -/* SD_ErrorIntrStatusEnable : Offset 0x036 , size = bytes */ -/* SD_IntrSignalEnable : Offset 0x038 , size = bytes */ -/* SD_ErrorIntrSignalEnable : Offset 0x03A , size = bytes */ -/* SD_CMD12ErrorStatus : Offset 0x03C , size = bytes */ -/* SD_Capabilities : Offset 0x040 , size = bytes */ -/* SD_MaxCurCap : Offset 0x048 , size = bytes */ -/* SD_MaxCurCap_Reserved: Offset 0x04C , size = bytes */ -/* SD_SlotInterruptStatus: Offset 0x0FC , size = bytes */ -/* SD_HostControllerVersion : Offset 0x0FE , size = bytes */ - -/* SDIO Host Control Register DMA Mode Definitions */ -#define SDIOH_SDMA_MODE 0 -#define SDIOH_ADMA1_MODE 1 -#define SDIOH_ADMA2_MODE 2 -#define SDIOH_ADMA2_64_MODE 3 - -#define ADMA2_ATTRIBUTE_VALID (1 << 0) /* ADMA Descriptor line valid */ -#define ADMA2_ATTRIBUTE_END (1 << 1) /* End of Descriptor */ -#define ADMA2_ATTRIBUTE_INT (1 << 2) /* Interrupt when line is done */ -#define ADMA2_ATTRIBUTE_ACT_NOP (0 << 4) /* Skip current line, go to next. */ -#define ADMA2_ATTRIBUTE_ACT_RSV (1 << 4) /* Same as NOP */ -#define ADMA1_ATTRIBUTE_ACT_SET (1 << 4) /* ADMA1 Only - set transfer length */ -#define ADMA2_ATTRIBUTE_ACT_TRAN (2 << 4) /* Transfer Data of one descriptor line. */ -#define ADMA2_ATTRIBUTE_ACT_LINK (3 << 4) /* Link Descriptor */ - -/* ADMA2 Descriptor Table Entry for 32-bit Address */ -typedef struct adma2_dscr_32b { - uint32 len_attr; - uint32 phys_addr; -} adma2_dscr_32b_t; - -/* ADMA1 Descriptor Table Entry */ -typedef struct adma1_dscr { - uint32 phys_addr_attr; -} adma1_dscr_t; - -#endif /* _SDIOH_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/sdiovar.h b/drivers/net/wireless/bcmdhd/src/include/sdiovar.h deleted file mode 100644 index a00b41e..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/sdiovar.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Structure used by apps whose drivers access SDIO drivers. - * Pulled out separately so dhdu and wlu can both use it. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: sdiovar.h 241182 2011-02-17 21:50:03Z $ - */ - -#ifndef _sdiovar_h_ -#define _sdiovar_h_ - -#include <typedefs.h> - -/* require default structure packing */ -#define BWL_DEFAULT_PACKING -#include <packed_section_start.h> - -typedef struct sdreg { - int func; - int offset; - int value; -} sdreg_t; - -/* Common msglevel constants */ -#define SDH_ERROR_VAL 0x0001 /* Error */ -#define SDH_TRACE_VAL 0x0002 /* Trace */ -#define SDH_INFO_VAL 0x0004 /* Info */ -#define SDH_DEBUG_VAL 0x0008 /* Debug */ -#define SDH_DATA_VAL 0x0010 /* Data */ -#define SDH_CTRL_VAL 0x0020 /* Control Regs */ -#define SDH_LOG_VAL 0x0040 /* Enable bcmlog */ -#define SDH_DMA_VAL 0x0080 /* DMA */ - -#define NUM_PREV_TRANSACTIONS 16 - - -#include <packed_section_end.h> - -#endif /* _sdiovar_h_ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/siutils.h b/drivers/net/wireless/bcmdhd/src/include/siutils.h deleted file mode 100644 index 85915c3..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/siutils.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - * Misc utility routines for accessing the SOC Interconnects - * of Broadcom HNBU chips. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: siutils.h 300516 2011-12-04 17:39:44Z $ - */ - -#ifndef _siutils_h_ -#define _siutils_h_ - - -struct si_pub { - uint socitype; - - uint bustype; - uint buscoretype; - uint buscorerev; - uint buscoreidx; - int ccrev; - uint32 cccaps; - uint32 cccaps_ext; - int pmurev; - uint32 pmucaps; - uint boardtype; - uint boardrev; - uint boardvendor; - uint boardflags; - uint boardflags2; - uint chip; - uint chiprev; - uint chippkg; - uint32 chipst; - bool issim; - uint socirev; - bool pci_pr32414; - -}; - - -typedef const struct si_pub si_t; - - - -#define SI_OSH NULL - -#define BADIDX (SI_MAXCORES + 1) - - -#define XTAL 0x1 -#define PLL 0x2 - - -#define CLK_FAST 0 -#define CLK_DYNAMIC 2 - - -#define GPIO_DRV_PRIORITY 0 -#define GPIO_APP_PRIORITY 1 -#define GPIO_HI_PRIORITY 2 - - -#define GPIO_PULLUP 0 -#define GPIO_PULLDN 1 - - -#define GPIO_REGEVT 0 -#define GPIO_REGEVT_INTMSK 1 -#define GPIO_REGEVT_INTPOL 2 - - -#define SI_DEVPATH_BUFSZ 16 - - -#define SI_DOATTACH 1 -#define SI_PCIDOWN 2 -#define SI_PCIUP 3 - -#define ISSIM_ENAB(sih) 0 - - -#if defined(BCMPMUCTL) -#define PMUCTL_ENAB(sih) (BCMPMUCTL) -#else -#define PMUCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PMU) -#endif - - -#if defined(BCMPMUCTL) && BCMPMUCTL -#define CCCTL_ENAB(sih) (0) -#define CCPLL_ENAB(sih) (0) -#else -#define CCCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PWR_CTL) -#define CCPLL_ENAB(sih) ((sih)->cccaps & CC_CAP_PLL_MASK) -#endif - -typedef void (*gpio_handler_t)(uint32 stat, void *arg); - -#define CC_BTCOEX_EN_MASK 0x01 - -#define GPIO_CTRL_EPA_EN_MASK 0x40 - -#define GPIO_CTRL_5_6_EN_MASK 0x60 -#define GPIO_CTRL_7_6_EN_MASK 0xC0 -#define GPIO_OUT_7_EN_MASK 0x80 - - - -extern si_t *si_attach(uint pcidev, osl_t *osh, void *regs, uint bustype, - void *sdh, char **vars, uint *varsz); -extern si_t *si_kattach(osl_t *osh); -extern void si_detach(si_t *sih); -extern bool si_pci_war16165(si_t *sih); - -extern uint si_corelist(si_t *sih, uint coreid[]); -extern uint si_coreid(si_t *sih); -extern uint si_flag(si_t *sih); -extern uint si_intflag(si_t *sih); -extern uint si_coreidx(si_t *sih); -extern uint si_coreunit(si_t *sih); -extern uint si_corevendor(si_t *sih); -extern uint si_corerev(si_t *sih); -extern void *si_osh(si_t *sih); -extern void si_setosh(si_t *sih, osl_t *osh); -extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val); -extern void *si_coreregs(si_t *sih); -extern uint si_wrapperreg(si_t *sih, uint32 offset, uint32 mask, uint32 val); -extern uint32 si_core_cflags(si_t *sih, uint32 mask, uint32 val); -extern void si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val); -extern uint32 si_core_sflags(si_t *sih, uint32 mask, uint32 val); -extern bool si_iscoreup(si_t *sih); -extern uint si_findcoreidx(si_t *sih, uint coreid, uint coreunit); -extern void *si_setcoreidx(si_t *sih, uint coreidx); -extern void *si_setcore(si_t *sih, uint coreid, uint coreunit); -extern void *si_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val); -extern void si_restore_core(si_t *sih, uint coreid, uint intr_val); -extern int si_numaddrspaces(si_t *sih); -extern uint32 si_addrspace(si_t *sih, uint asidx); -extern uint32 si_addrspacesize(si_t *sih, uint asidx); -extern void si_coreaddrspaceX(si_t *sih, uint asidx, uint32 *addr, uint32 *size); -extern int si_corebist(si_t *sih); -extern void si_core_reset(si_t *sih, uint32 bits, uint32 resetbits); -extern void si_core_disable(si_t *sih, uint32 bits); -extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m); -extern bool si_read_pmu_autopll(si_t *sih); -extern uint32 si_clock(si_t *sih); -extern uint32 si_alp_clock(si_t *sih); -extern uint32 si_ilp_clock(si_t *sih); -extern void si_pci_setup(si_t *sih, uint coremask); -extern void si_pcmcia_init(si_t *sih); -extern void si_setint(si_t *sih, int siflag); -extern bool si_backplane64(si_t *sih); -extern void si_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, - void *intrsenabled_fn, void *intr_arg); -extern void si_deregister_intr_callback(si_t *sih); -extern void si_clkctl_init(si_t *sih); -extern uint16 si_clkctl_fast_pwrup_delay(si_t *sih); -extern bool si_clkctl_cc(si_t *sih, uint mode); -extern int si_clkctl_xtal(si_t *sih, uint what, bool on); -extern uint32 si_gpiotimerval(si_t *sih, uint32 mask, uint32 val); -extern void si_btcgpiowar(si_t *sih); -extern bool si_deviceremoved(si_t *sih); -extern uint32 si_socram_size(si_t *sih); -extern uint32 si_socdevram_size(si_t *sih); -extern uint32 si_socram_srmem_size(si_t *sih); -extern void si_socdevram(si_t *sih, bool set, uint8 *ennable, uint8 *protect, uint8 *remap); -extern bool si_socdevram_pkg(si_t *sih); -extern bool si_socdevram_remap_isenb(si_t *sih); -extern uint32 si_socdevram_remap_size(si_t *sih); - -extern void si_watchdog(si_t *sih, uint ticks); -extern void si_watchdog_ms(si_t *sih, uint32 ms); -extern void *si_gpiosetcore(si_t *sih); -extern uint32 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val, uint8 priority); -extern uint32 si_gpioouten(si_t *sih, uint32 mask, uint32 val, uint8 priority); -extern uint32 si_gpioout(si_t *sih, uint32 mask, uint32 val, uint8 priority); -extern uint32 si_gpioin(si_t *sih); -extern uint32 si_gpiointpolarity(si_t *sih, uint32 mask, uint32 val, uint8 priority); -extern uint32 si_gpiointmask(si_t *sih, uint32 mask, uint32 val, uint8 priority); -extern uint32 si_gpioled(si_t *sih, uint32 mask, uint32 val); -extern uint32 si_gpioreserve(si_t *sih, uint32 gpio_num, uint8 priority); -extern uint32 si_gpiorelease(si_t *sih, uint32 gpio_num, uint8 priority); -extern uint32 si_gpiopull(si_t *sih, bool updown, uint32 mask, uint32 val); -extern uint32 si_gpioevent(si_t *sih, uint regtype, uint32 mask, uint32 val); -extern uint32 si_gpio_int_enable(si_t *sih, bool enable); - - -extern void *si_gpio_handler_register(si_t *sih, uint32 e, bool lev, gpio_handler_t cb, void *arg); -extern void si_gpio_handler_unregister(si_t *sih, void* gpioh); -extern void si_gpio_handler_process(si_t *sih); - - -extern bool si_pci_pmecap(si_t *sih); -struct osl_info; -extern bool si_pci_fastpmecap(struct osl_info *osh); -extern bool si_pci_pmestat(si_t *sih); -extern void si_pci_pmeclr(si_t *sih); -extern void si_pci_pmeen(si_t *sih); -extern void si_pci_pmestatclr(si_t *sih); -extern uint si_pcie_readreg(void *sih, uint addrtype, uint offset); - -extern void si_sdio_init(si_t *sih); - -extern uint16 si_d11_devid(si_t *sih); -extern int si_corepciid(si_t *sih, uint func, uint16 *pcivendor, uint16 *pcidevice, - uint8 *pciclass, uint8 *pcisubclass, uint8 *pciprogif, uint8 *pciheader); - -#define si_eci(sih) 0 -static INLINE void * si_eci_init(si_t *sih) {return NULL;} -#define si_eci_notify_bt(sih, type, val) (0) -#define si_seci(sih) 0 -#define si_seci_upd(sih, a) do {} while (0) -static INLINE void * si_seci_init(si_t *sih, uint8 use_seci) {return NULL;} -#define si_seci_down(sih) do {} while (0) - - -extern bool si_is_otp_disabled(si_t *sih); -extern bool si_is_otp_powered(si_t *sih); -extern void si_otp_power(si_t *sih, bool on); - - -extern bool si_is_sprom_available(si_t *sih); -extern bool si_is_sprom_enabled(si_t *sih); -extern void si_sprom_enable(si_t *sih, bool enable); - - -extern int si_cis_source(si_t *sih); -#define CIS_DEFAULT 0 -#define CIS_SROM 1 -#define CIS_OTP 2 - - -#define DEFAULT_FAB 0x0 -#define CSM_FAB7 0x1 -#define TSMC_FAB12 0x2 -#define SMIC_FAB4 0x3 -extern int si_otp_fabid(si_t *sih, uint16 *fabid, bool rw); -extern uint16 si_fabid(si_t *sih); - - -extern int si_devpath(si_t *sih, char *path, int size); - -extern char *si_getdevpathvar(si_t *sih, const char *name); -extern int si_getdevpathintvar(si_t *sih, const char *name); -extern char *si_coded_devpathvar(si_t *sih, char *varname, int var_len, const char *name); - - -extern uint8 si_pcieclkreq(si_t *sih, uint32 mask, uint32 val); -extern uint32 si_pcielcreg(si_t *sih, uint32 mask, uint32 val); -extern void si_war42780_clkreq(si_t *sih, bool clkreq); -extern void si_pci_down(si_t *sih); -extern void si_pci_up(si_t *sih); -extern void si_pci_sleep(si_t *sih); -extern void si_pcie_war_ovr_update(si_t *sih, uint8 aspm); -extern void si_pcie_power_save_enable(si_t *sih, bool enable); -extern void si_pcie_extendL1timer(si_t *sih, bool extend); -extern int si_pci_fixcfg(si_t *sih); -extern void si_chippkg_set(si_t *sih, uint); - -extern void si_chipcontrl_btshd0_4331(si_t *sih, bool on); -extern void si_chipcontrl_restore(si_t *sih, uint32 val); -extern uint32 si_chipcontrl_read(si_t *sih); -extern void si_chipcontrl_epa4331(si_t *sih, bool on); -extern void si_chipcontrl_epa4331_wowl(si_t *sih, bool enter_wowl); -extern void si_chipcontrl_srom4360(si_t *sih, bool on); - -extern void si_epa_4313war(si_t *sih); -extern void si_btc_enable_chipcontrol(si_t *sih); - -extern void si_btcombo_p250_4313_war(si_t *sih); -extern void si_btcombo_43228_war(si_t *sih); -extern void si_clk_pmu_htavail_set(si_t *sih, bool set_clear); -extern uint si_pll_reset(si_t *sih); - - -extern bool si_taclear(si_t *sih, bool details); - - - -extern uint32 si_pciereg(si_t *sih, uint32 offset, uint32 mask, uint32 val, uint type); -extern uint32 si_pcieserdesreg(si_t *sih, uint32 mdioslave, uint32 offset, uint32 mask, uint32 val); -extern void si_pcie_set_request_size(si_t *sih, uint16 size); -extern uint16 si_pcie_get_request_size(si_t *sih); -extern uint16 si_pcie_get_ssid(si_t *sih); -extern uint32 si_pcie_get_bar0(si_t *sih); -extern int si_pcie_configspace_cache(si_t *sih); -extern int si_pcie_configspace_restore(si_t *sih); -extern int si_pcie_configspace_get(si_t *sih, uint8 *buf, uint size); - -char *si_getnvramflvar(si_t *sih, const char *name); - - -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/trxhdr.h b/drivers/net/wireless/bcmdhd/src/include/trxhdr.h deleted file mode 100644 index 7afb4dc..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/trxhdr.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * TRX image file header format. - * - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: trxhdr.h 260898 2011-05-20 23:11:12Z $ - */ - -#ifndef _TRX_HDR_H -#define _TRX_HDR_H - -#include <typedefs.h> - -#define TRX_MAGIC 0x30524448 /* "HDR0" */ -#define TRX_VERSION 1 /* Version 1 */ -#define TRX_MAX_LEN 0x3B0000 /* Max length */ -#define TRX_NO_HEADER 1 /* Do not write TRX header */ -#define TRX_GZ_FILES 0x2 /* Contains up to TRX_MAX_OFFSET individual gzip files */ -#define TRX_EMBED_UCODE 0x8 /* Trx contains embedded ucode image */ -#define TRX_ROMSIM_IMAGE 0x10 /* Trx contains ROM simulation image */ -#define TRX_UNCOMP_IMAGE 0x20 /* Trx contains uncompressed rtecdc.bin image */ -#define TRX_MAX_OFFSET 3 /* Max number of individual files */ - -struct trx_header { - uint32 magic; /* "HDR0" */ - uint32 len; /* Length of file including header */ - uint32 crc32; /* 32-bit CRC from flag_version to end of file */ - uint32 flag_version; /* 0:15 flags, 16:31 version */ - uint32 offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */ -}; - -/* Compatibility */ -typedef struct trx_header TRXHDR, *PTRXHDR; - -#endif /* _TRX_HDR_H */ diff --git a/drivers/net/wireless/bcmdhd/src/include/typedefs.h b/drivers/net/wireless/bcmdhd/src/include/typedefs.h deleted file mode 100644 index 546651b..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/typedefs.h +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Copyright (C) 1999-2011, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * $Id: typedefs.h 286783 2011-09-29 06:18:57Z $ - */ - -#ifndef _TYPEDEFS_H_ -#define _TYPEDEFS_H_ - -#ifdef SITE_TYPEDEFS - - - -#include "site_typedefs.h" - -#else - - - -#ifdef __cplusplus - -#define TYPEDEF_BOOL -#ifndef FALSE -#define FALSE false -#endif -#ifndef TRUE -#define TRUE true -#endif - -#else - - -#endif - -#if defined(__x86_64__) -#define TYPEDEF_UINTPTR -typedef unsigned long long int uintptr; -#endif - - - - - -#if defined(_NEED_SIZE_T_) -typedef long unsigned int size_t; -#endif - - - - -#if defined(__sparc__) -#define TYPEDEF_ULONG -#endif - - - -#if !defined(LINUX_HYBRID) || defined(LINUX_PORT) -#define TYPEDEF_UINT -#ifndef TARGETENV_android -#define TYPEDEF_USHORT -#define TYPEDEF_ULONG -#endif -#ifdef __KERNEL__ -#include <linux/version.h> -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)) -#define TYPEDEF_BOOL -#endif - -#if (LINUX_VERSION_CODE == KERNEL_VERSION(2, 6, 18)) -#include <linux/compiler.h> -#ifdef noinline_for_stack -#define TYPEDEF_BOOL -#endif -#endif -#endif -#endif - - - - - -#if defined(__GNUC__) && defined(__STRICT_ANSI__) -#define TYPEDEF_INT64 -#define TYPEDEF_UINT64 -#endif - - -#if defined(__ICL) - -#define TYPEDEF_INT64 - -#if defined(__STDC__) -#define TYPEDEF_UINT64 -#endif - -#endif - -#if !defined(__DJGPP__) - - -#if defined(__KERNEL__) - - -#if !defined(LINUX_HYBRID) || defined(LINUX_PORT) -#include <linux/types.h> -#endif - -#else - - -#include <sys/types.h> - -#endif - -#endif - - - - -#define USE_TYPEDEF_DEFAULTS - -#endif - - - - -#ifdef USE_TYPEDEF_DEFAULTS -#undef USE_TYPEDEF_DEFAULTS - -#ifndef TYPEDEF_BOOL -typedef unsigned char bool; -#endif - - - -#ifndef TYPEDEF_UCHAR -typedef unsigned char uchar; -#endif - -#ifndef TYPEDEF_USHORT -typedef unsigned short ushort; -#endif - -#ifndef TYPEDEF_UINT -typedef unsigned int uint; -#endif - -#ifndef TYPEDEF_ULONG -typedef unsigned long ulong; -#endif - - - -#ifndef TYPEDEF_UINT8 -typedef unsigned char uint8; -#endif - -#ifndef TYPEDEF_UINT16 -typedef unsigned short uint16; -#endif - -#ifndef TYPEDEF_UINT32 -typedef unsigned int uint32; -#endif - -#ifndef TYPEDEF_UINT64 -typedef unsigned long long uint64; -#endif - -#ifndef TYPEDEF_UINTPTR -typedef unsigned int uintptr; -#endif - -#ifndef TYPEDEF_INT8 -typedef signed char int8; -#endif - -#ifndef TYPEDEF_INT16 -typedef signed short int16; -#endif - -#ifndef TYPEDEF_INT32 -typedef signed int int32; -#endif - -#ifndef TYPEDEF_INT64 -typedef signed long long int64; -#endif - - - -#ifndef TYPEDEF_FLOAT32 -typedef float float32; -#endif - -#ifndef TYPEDEF_FLOAT64 -typedef double float64; -#endif - - - -#ifndef TYPEDEF_FLOAT_T - -#if defined(FLOAT32) -typedef float32 float_t; -#else -typedef float64 float_t; -#endif - -#endif - - - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef NULL -#define NULL 0 -#endif - -#ifndef OFF -#define OFF 0 -#endif - -#ifndef ON -#define ON 1 -#endif - -#define AUTO (-1) - - - -#ifndef PTRSZ -#define PTRSZ sizeof(char*) -#endif - - - -#if defined(__GNUC__) || defined(__lint) - #define BWL_COMPILER_GNU -#elif defined(__CC_ARM) && __CC_ARM - #define BWL_COMPILER_ARMCC -#else - #error "Unknown compiler!" -#endif - - -#ifndef INLINE - #if defined(BWL_COMPILER_MICROSOFT) - #define INLINE __inline - #elif defined(BWL_COMPILER_GNU) - #define INLINE __inline__ - #elif defined(BWL_COMPILER_ARMCC) - #define INLINE __inline - #else - #define INLINE - #endif -#endif - -#undef TYPEDEF_BOOL -#undef TYPEDEF_UCHAR -#undef TYPEDEF_USHORT -#undef TYPEDEF_UINT -#undef TYPEDEF_ULONG -#undef TYPEDEF_UINT8 -#undef TYPEDEF_UINT16 -#undef TYPEDEF_UINT32 -#undef TYPEDEF_UINT64 -#undef TYPEDEF_UINTPTR -#undef TYPEDEF_INT8 -#undef TYPEDEF_INT16 -#undef TYPEDEF_INT32 -#undef TYPEDEF_INT64 -#undef TYPEDEF_FLOAT32 -#undef TYPEDEF_FLOAT64 -#undef TYPEDEF_FLOAT_T - -#endif - - -#define UNUSED_PARAMETER(x) (void)(x) - - -#define DISCARD_QUAL(ptr, type) ((type *)(uintptr)(ptr)) - - -#include <bcmdefs.h> -#endif diff --git a/drivers/net/wireless/bcmdhd/src/include/wlfc_proto.h b/drivers/net/wireless/bcmdhd/src/include/wlfc_proto.h deleted file mode 100644 index 22e08f6..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/wlfc_proto.h +++ /dev/null @@ -1,216 +0,0 @@ -/* -* Copyright (C) 1999-2011, Broadcom Corporation -* -* Unless you and Broadcom execute a separate written software license -* agreement governing use of this software, this software is licensed to you -* under the terms of the GNU General Public License version 2 (the "GPL"), -* available at http://www.broadcom.com/licenses/GPLv2.php, with the -* following added to such license: -* -* As a special exception, the copyright holders of this software give you -* permission to link this software with independent modules, and to copy and -* distribute the resulting executable under terms of your choice, provided that -* you also meet, for each linked independent module, the terms and conditions of -* the license of that module. An independent module is a module which is not -* derived from this software. The special exception does not apply to any -* modifications of the software. -* -* Notwithstanding the above, under no circumstances may you combine this -* software in any way with any other Broadcom software provided under a license -* other than the GPL, without Broadcom's express prior written consent. -* $Id: wlfc_proto.h 303826 2011-12-20 06:02:09Z $ -* -*/ -#ifndef __wlfc_proto_definitions_h__ -#define __wlfc_proto_definitions_h__ - - /* Use TLV to convey WLFC information. - --------------------------------------------------------------------------- - | Type | Len | value | Description - --------------------------------------------------------------------------- - | 1 | 1 | (handle) | MAC OPEN - --------------------------------------------------------------------------- - | 2 | 1 | (handle) | MAC CLOSE - --------------------------------------------------------------------------- - | 3 | 2 | (count, handle, prec_bmp)| Set the credit depth for a MAC dstn - --------------------------------------------------------------------------- - | 4 | 4 | see pkttag comments | TXSTATUS - --------------------------------------------------------------------------- - | 5 | 4 | see pkttag comments | PKKTTAG [host->firmware] - --------------------------------------------------------------------------- - | 6 | 8 | (handle, ifid, MAC) | MAC ADD - --------------------------------------------------------------------------- - | 7 | 8 | (handle, ifid, MAC) | MAC DEL - --------------------------------------------------------------------------- - | 8 | 1 | (rssi) | RSSI - RSSI value for the packet. - --------------------------------------------------------------------------- - | 9 | 1 | (interface ID) | Interface OPEN - --------------------------------------------------------------------------- - | 10 | 1 | (interface ID) | Interface CLOSE - --------------------------------------------------------------------------- - | 11 | 8 | fifo credit returns map | FIFO credits back to the host - | | | | - | | | | -------------------------------------- - | | | | | ac0 | ac1 | ac2 | ac3 | bcmc | atim | - | | | | -------------------------------------- - | | | | - --------------------------------------------------------------------------- - | 12 | 2 | MAC handle, | Host provides a bitmap of pending - | | | AC[0-3] traffic bitmap | unicast traffic for MAC-handle dstn. - | | | | [host->firmware] - --------------------------------------------------------------------------- - | 13 | 3 | (count, handle, prec_bmp)| One time request for packet to a specific - | | | | MAC destination. - --------------------------------------------------------------------------- - | 255 | N/A | N/A | FILLER - This is a special type - | | | | that has no length or value. - | | | | Typically used for padding. - --------------------------------------------------------------------------- - */ - -#define WLFC_CTL_TYPE_MAC_OPEN 1 -#define WLFC_CTL_TYPE_MAC_CLOSE 2 -#define WLFC_CTL_TYPE_MAC_REQUEST_CREDIT 3 -#define WLFC_CTL_TYPE_TXSTATUS 4 -#define WLFC_CTL_TYPE_PKTTAG 5 - -#define WLFC_CTL_TYPE_MACDESC_ADD 6 -#define WLFC_CTL_TYPE_MACDESC_DEL 7 -#define WLFC_CTL_TYPE_RSSI 8 - -#define WLFC_CTL_TYPE_INTERFACE_OPEN 9 -#define WLFC_CTL_TYPE_INTERFACE_CLOSE 10 - -#define WLFC_CTL_TYPE_FIFO_CREDITBACK 11 - -#define WLFC_CTL_TYPE_PENDING_TRAFFIC_BMP 12 -#define WLFC_CTL_TYPE_MAC_REQUEST_PACKET 13 -#define WLFC_CTL_TYPE_HOST_REORDER_RXPKTS 14 - -#define WLFC_CTL_TYPE_FILLER 255 - -#define WLFC_CTL_VALUE_LEN_MACDESC 8 /* handle, interface, MAC */ - -#define WLFC_CTL_VALUE_LEN_MAC 1 /* MAC-handle */ -#define WLFC_CTL_VALUE_LEN_RSSI 1 - -#define WLFC_CTL_VALUE_LEN_INTERFACE 1 -#define WLFC_CTL_VALUE_LEN_PENDING_TRAFFIC_BMP 2 - -#define WLFC_CTL_VALUE_LEN_TXSTATUS 4 -#define WLFC_CTL_VALUE_LEN_PKTTAG 4 - -/* enough space to host all 4 ACs, bc/mc and atim fifo credit */ -#define WLFC_CTL_VALUE_LEN_FIFO_CREDITBACK 6 - -#define WLFC_CTL_VALUE_LEN_REQUEST_CREDIT 3 /* credit, MAC-handle, prec_bitmap */ -#define WLFC_CTL_VALUE_LEN_REQUEST_PACKET 3 /* credit, MAC-handle, prec_bitmap */ - - - -#define WLFC_PKTID_GEN_MASK 0x80000000 -#define WLFC_PKTID_GEN_SHIFT 31 - -#define WLFC_PKTID_GEN(x) (((x) & WLFC_PKTID_GEN_MASK) >> WLFC_PKTID_GEN_SHIFT) -#define WLFC_PKTID_SETGEN(x, gen) (x) = ((x) & ~WLFC_PKTID_GEN_MASK) | \ - (((gen) << WLFC_PKTID_GEN_SHIFT) & WLFC_PKTID_GEN_MASK) - -#define WLFC_PKTFLAG_PKTFROMHOST 0x01 -#define WLFC_PKTFLAG_PKT_REQUESTED 0x02 - -#define WL_TXSTATUS_FLAGS_MASK 0xf /* allow 4 bits only */ -#define WL_TXSTATUS_FLAGS_SHIFT 27 - -#define WL_TXSTATUS_SET_FLAGS(x, flags) ((x) = \ - ((x) & ~(WL_TXSTATUS_FLAGS_MASK << WL_TXSTATUS_FLAGS_SHIFT)) | \ - (((flags) & WL_TXSTATUS_FLAGS_MASK) << WL_TXSTATUS_FLAGS_SHIFT)) -#define WL_TXSTATUS_GET_FLAGS(x) (((x) >> WL_TXSTATUS_FLAGS_SHIFT) & \ - WL_TXSTATUS_FLAGS_MASK) - -#define WL_TXSTATUS_FIFO_MASK 0x7 /* allow 3 bits for FIFO ID */ -#define WL_TXSTATUS_FIFO_SHIFT 24 - -#define WL_TXSTATUS_SET_FIFO(x, flags) ((x) = \ - ((x) & ~(WL_TXSTATUS_FIFO_MASK << WL_TXSTATUS_FIFO_SHIFT)) | \ - (((flags) & WL_TXSTATUS_FIFO_MASK) << WL_TXSTATUS_FIFO_SHIFT)) -#define WL_TXSTATUS_GET_FIFO(x) (((x) >> WL_TXSTATUS_FIFO_SHIFT) & WL_TXSTATUS_FIFO_MASK) - -#define WL_TXSTATUS_PKTID_MASK 0xffffff /* allow 24 bits */ -#define WL_TXSTATUS_SET_PKTID(x, num) ((x) = \ - ((x) & ~WL_TXSTATUS_PKTID_MASK) | (num)) -#define WL_TXSTATUS_GET_PKTID(x) ((x) & WL_TXSTATUS_PKTID_MASK) - -/* 32 STA should be enough??, 6 bits; Must be power of 2 */ -#define WLFC_MAC_DESC_TABLE_SIZE 32 -#define WLFC_MAX_IFNUM 16 -#define WLFC_MAC_DESC_ID_INVALID 0xff - -/* b[7:5] -reuse guard, b[4:0] -value */ -#define WLFC_MAC_DESC_GET_LOOKUP_INDEX(x) ((x) & 0x1f) - -#define WLFC_PKTFLAG_SET_PKTREQUESTED(x) (x) |= \ - (WLFC_PKTFLAG_PKT_REQUESTED << WL_TXSTATUS_FLAGS_SHIFT) - -#define WLFC_PKTFLAG_CLR_PKTREQUESTED(x) (x) &= \ - ~(WLFC_PKTFLAG_PKT_REQUESTED << WL_TXSTATUS_FLAGS_SHIFT) - -#define WL_TXSTATUS_GENERATION_MASK 1 -#define WL_TXSTATUS_GENERATION_SHIFT 31 - -#define WLFC_PKTFLAG_SET_GENERATION(x, gen) ((x) = \ - ((x) & ~(WL_TXSTATUS_GENERATION_MASK << WL_TXSTATUS_GENERATION_SHIFT)) | \ - (((gen) & WL_TXSTATUS_GENERATION_MASK) << WL_TXSTATUS_GENERATION_SHIFT)) - -#define WLFC_PKTFLAG_GENERATION(x) (((x) >> WL_TXSTATUS_GENERATION_SHIFT) & \ - WL_TXSTATUS_GENERATION_MASK) - -#define WLFC_MAX_PENDING_DATALEN 120 - -/* host is free to discard the packet */ -#define WLFC_CTL_PKTFLAG_DISCARD 0 -/* D11 suppressed a packet */ -#define WLFC_CTL_PKTFLAG_D11SUPPRESS 1 -/* WL firmware suppressed a packet because MAC is - already in PSMode (short time window) -*/ -#define WLFC_CTL_PKTFLAG_WLSUPPRESS 2 -/* Firmware tossed this packet */ -#define WLFC_CTL_PKTFLAG_TOSSED_BYWLC 3 - -#define WLFC_D11_STATUS_INTERPRET(txs) \ - (((txs)->status.suppr_ind != 0) ? WLFC_CTL_PKTFLAG_D11SUPPRESS : WLFC_CTL_PKTFLAG_DISCARD) - -#ifdef PROP_TXSTATUS_DEBUG -#define WLFC_DBGMESG(x) printf x -/* wlfc-breadcrumb */ -#define WLFC_BREADCRUMB(x) do {if ((x) == NULL) \ - {printf("WLFC: %s():%d:caller:%p\n", \ - __FUNCTION__, __LINE__, __builtin_return_address(0));}} while (0) -#define WLFC_PRINTMAC(banner, ea) do {printf("%s MAC: [%02x:%02x:%02x:%02x:%02x:%02x]\n", \ - banner, ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]); } while (0) -#define WLFC_WHEREIS(s) printf("WLFC: at %s():%d, %s\n", __FUNCTION__, __LINE__, (s)) -#else -#define WLFC_DBGMESG(x) -#define WLFC_BREADCRUMB(x) -#define WLFC_PRINTMAC(banner, ea) -#define WLFC_WHEREIS(s) -#endif - -/* AMPDU host reorder packet flags */ -#define WLHOST_REORDERDATA_MAXFLOWS 256 -#define WLHOST_REORDERDATA_LEN 10 -#define WLHOST_REORDERDATA_TOTLEN (WLHOST_REORDERDATA_LEN + 1 + 1) /* +tag +len */ - -#define WLHOST_REORDERDATA_FLOWID_OFFSET 0 -#define WLHOST_REORDERDATA_MAXIDX_OFFSET 2 -#define WLHOST_REORDERDATA_FLAGS_OFFSET 4 -#define WLHOST_REORDERDATA_CURIDX_OFFSET 6 -#define WLHOST_REORDERDATA_EXPIDX_OFFSET 8 - -#define WLHOST_REORDERDATA_DEL_FLOW 0x01 -#define WLHOST_REORDERDATA_FLUSH_ALL 0x02 -#define WLHOST_REORDERDATA_CURIDX_VALID 0x04 -#define WLHOST_REORDERDATA_EXPIDX_VALID 0x08 -#define WLHOST_REORDERDATA_NEW_HOLE 0x10 - -#endif /* __wlfc_proto_definitions_h__ */ diff --git a/drivers/net/wireless/bcmdhd/src/include/wlioctl.h b/drivers/net/wireless/bcmdhd/src/include/wlioctl.h deleted file mode 100644 index d6bdb8f..0000000 --- a/drivers/net/wireless/bcmdhd/src/include/wlioctl.h +++ /dev/null @@ -1,4844 +0,0 @@ -/* - * Custom OID/ioctl definitions for - * Broadcom 802.11abg Networking Device Driver - * - * Definitions subject to change without notice. - * - * Copyright (C) 1999-2012, Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2 (the "GPL"), - * available at http://www.broadcom.com/licenses/GPLv2.php, with the - * following added to such license: - * - * As a special exception, the copyright holders of this software give you - * permission to link this software with independent modules, and to copy and - * distribute the resulting executable under terms of your choice, provided that - * you also meet, for each linked independent module, the terms and conditions of - * the license of that module. An independent module is a module which is not - * derived from this software. The special exception does not apply to any - * modifications of the software. - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a license - * other than the GPL, without Broadcom's express prior written consent. - * - * $Id: wlioctl.h 310294 2012-01-24 06:17:47Z $ - */ - -#ifndef _wlioctl_h_ -#define _wlioctl_h_ - -#include <typedefs.h> -#include <proto/ethernet.h> -#include <proto/bcmeth.h> -#include <proto/bcmevent.h> -#include <proto/802.11.h> -#include <bcmwifi_channels.h> - -#include <bcm_mpool_pub.h> -#include <bcmcdc.h> - -#ifndef INTF_NAME_SIZ -#define INTF_NAME_SIZ 16 -#endif - -/* Used to send ioctls over the transport pipe */ -typedef struct remote_ioctl { - cdc_ioctl_t msg; - uint data_len; - char intf_name[INTF_NAME_SIZ]; -} rem_ioctl_t; -#define REMOTE_SIZE sizeof(rem_ioctl_t) - -#define ACTION_FRAME_SIZE 1800 - -typedef struct wl_action_frame { - struct ether_addr da; - uint16 len; - uint32 packetId; - uint8 data[ACTION_FRAME_SIZE]; -} wl_action_frame_t; - -#define WL_WIFI_ACTION_FRAME_SIZE sizeof(struct wl_action_frame) - -typedef struct ssid_info -{ - uint8 ssid_len; /* the length of SSID */ - uint8 ssid[32]; /* SSID string */ -} ssid_info_t; - -typedef struct wl_af_params { - uint32 channel; - int32 dwell_time; - struct ether_addr BSSID; - wl_action_frame_t action_frame; -} wl_af_params_t; - -#define WL_WIFI_AF_PARAMS_SIZE sizeof(struct wl_af_params) - -#define MFP_TEST_FLAG_NORMAL 0 -#define MFP_TEST_FLAG_ANY_KEY 1 -typedef struct wl_sa_query { - uint32 flag; - uint8 action; - uint16 id; - struct ether_addr da; -} wl_sa_query_t; - - -/* require default structure packing */ -#define BWL_DEFAULT_PACKING -#include <packed_section_start.h> - - -#ifndef LINUX_POSTMOGRIFY_REMOVAL -/* Legacy structure to help keep backward compatible wl tool and tray app */ - -#define LEGACY_WL_BSS_INFO_VERSION 107 /* older version of wl_bss_info struct */ - -typedef struct wl_bss_info_107 { - uint32 version; /* version field */ - uint32 length; /* byte length of data in this record, - * starting at version and including IEs - */ - struct ether_addr BSSID; - uint16 beacon_period; /* units are Kusec */ - uint16 capability; /* Capability information */ - uint8 SSID_len; - uint8 SSID[32]; - struct { - uint count; /* # rates in this set */ - uint8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ - } rateset; /* supported rates */ - uint8 channel; /* Channel no. */ - uint16 atim_window; /* units are Kusec */ - uint8 dtim_period; /* DTIM period */ - int16 RSSI; /* receive signal strength (in dBm) */ - int8 phy_noise; /* noise (in dBm) */ - uint32 ie_length; /* byte length of Information Elements */ - /* variable length Information Elements */ -} wl_bss_info_107_t; -#endif /* LINUX_POSTMOGRIFY_REMOVAL */ - -/* - * Per-BSS information structure. - */ - -#define LEGACY2_WL_BSS_INFO_VERSION 108 /* old version of wl_bss_info struct */ - -/* BSS info structure - * Applications MUST CHECK ie_offset field and length field to access IEs and - * next bss_info structure in a vector (in wl_scan_results_t) - */ -typedef struct wl_bss_info_108 { - uint32 version; /* version field */ - uint32 length; /* byte length of data in this record, - * starting at version and including IEs - */ - struct ether_addr BSSID; - uint16 beacon_period; /* units are Kusec */ - uint16 capability; /* Capability information */ - uint8 SSID_len; - uint8 SSID[32]; - struct { - uint count; /* # rates in this set */ - uint8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ - } rateset; /* supported rates */ - chanspec_t chanspec; /* chanspec for bss */ - uint16 atim_window; /* units are Kusec */ - uint8 dtim_period; /* DTIM period */ - int16 RSSI; /* receive signal strength (in dBm) */ - int8 phy_noise; /* noise (in dBm) */ - - uint8 n_cap; /* BSS is 802.11N Capable */ - uint32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ - uint8 ctl_ch; /* 802.11N BSS control channel number */ - uint32 reserved32[1]; /* Reserved for expansion of BSS properties */ - uint8 flags; /* flags */ - uint8 reserved[3]; /* Reserved for expansion of BSS properties */ - uint8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ - - uint16 ie_offset; /* offset at which IEs start, from beginning */ - uint32 ie_length; /* byte length of Information Elements */ - /* Add new fields here */ - /* variable length Information Elements */ -} wl_bss_info_108_t; - -#define WL_BSS_INFO_VERSION 109 /* current version of wl_bss_info struct */ - -/* BSS info structure - * Applications MUST CHECK ie_offset field and length field to access IEs and - * next bss_info structure in a vector (in wl_scan_results_t) - */ -typedef struct wl_bss_info { - uint32 version; /* version field */ - uint32 length; /* byte length of data in this record, - * starting at version and including IEs - */ - struct ether_addr BSSID; - uint16 beacon_period; /* units are Kusec */ - uint16 capability; /* Capability information */ - uint8 SSID_len; - uint8 SSID[32]; - struct { - uint count; /* # rates in this set */ - uint8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ - } rateset; /* supported rates */ - chanspec_t chanspec; /* chanspec for bss */ - uint16 atim_window; /* units are Kusec */ - uint8 dtim_period; /* DTIM period */ - int16 RSSI; /* receive signal strength (in dBm) */ - int8 phy_noise; /* noise (in dBm) */ - - uint8 n_cap; /* BSS is 802.11N Capable */ - uint32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ - uint8 ctl_ch; /* 802.11N BSS control channel number */ - uint8 padding1[3]; /* explicit struct alignment padding */ - uint16 vht_rxmcsmap; /* VHT rx mcs map */ - uint16 vht_txmcsmap; /* VHT tx mcs map */ - uint8 flags; /* flags */ - uint8 vht_cap; /* BSS is vht capable */ - uint8 reserved[2]; /* Reserved for expansion of BSS properties */ - uint8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ - - uint16 ie_offset; /* offset at which IEs start, from beginning */ - uint32 ie_length; /* byte length of Information Elements */ - int16 SNR; /* average SNR of during frame reception */ - /* Add new fields here */ - /* variable length Information Elements */ -} wl_bss_info_t; - -typedef struct wl_bsscfg { - uint32 wsec; - uint32 WPA_auth; - uint32 wsec_index; - uint32 associated; - uint32 BSS; - uint32 phytest_on; - struct ether_addr prev_BSSID; - struct ether_addr BSSID; - uint32 targetbss_wpa2_flags; - uint32 assoc_type; - uint32 assoc_state; -} wl_bsscfg_t; - -typedef struct wl_bss_config { - uint32 atim_window; - uint32 beacon_period; - uint32 chanspec; -} wl_bss_config_t; - -#define DLOAD_HANDLER_VER 1 /* Downloader version */ -#define DLOAD_FLAG_VER_MASK 0xf000 /* Downloader version mask */ -#define DLOAD_FLAG_VER_SHIFT 12 /* Downloader version shift */ - -#define DL_CRC_NOT_INUSE 0x0001 - -/* generic download types & flags */ -enum { - DL_TYPE_UCODE = 1, - DL_TYPE_CLM = 2 -}; - -/* ucode type values */ -enum { - UCODE_FW, - INIT_VALS, - BS_INIT_VALS -}; - -struct wl_dload_data { - uint16 flag; - uint16 dload_type; - uint32 len; - uint32 crc; - uint8 data[1]; -}; -typedef struct wl_dload_data wl_dload_data_t; - -struct wl_ucode_info { - uint32 ucode_type; - uint32 num_chunks; - uint32 chunk_len; - uint32 chunk_num; - uint8 data_chunk[1]; -}; -typedef struct wl_ucode_info wl_ucode_info_t; - -struct wl_clm_dload_info { - uint32 ds_id; - uint32 clm_total_len; - uint32 num_chunks; - uint32 chunk_len; - uint32 chunk_offset; - uint8 data_chunk[1]; -}; -typedef struct wl_clm_dload_info wl_clm_dload_info_t; - -typedef struct wlc_ssid { - uint32 SSID_len; - uchar SSID[32]; -} wlc_ssid_t; - -#define MAX_PREFERRED_AP_NUM 5 -typedef struct wlc_fastssidinfo { - uint32 SSID_channel[MAX_PREFERRED_AP_NUM]; - wlc_ssid_t SSID_info[MAX_PREFERRED_AP_NUM]; -} wlc_fastssidinfo_t; - -typedef BWL_PRE_PACKED_STRUCT struct wnm_url { - uint8 len; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT wnm_url_t; - -#ifndef LINUX_POSTMOGRIFY_REMOVAL -typedef struct chan_scandata { - uint8 txpower; - uint8 pad; - chanspec_t channel; /* Channel num, bw, ctrl_sb and band */ - uint32 channel_mintime; - uint32 channel_maxtime; -} chan_scandata_t; - -typedef enum wl_scan_type { - EXTDSCAN_FOREGROUND_SCAN, - EXTDSCAN_BACKGROUND_SCAN, - EXTDSCAN_FORCEDBACKGROUND_SCAN -} wl_scan_type_t; - -#define WLC_EXTDSCAN_MAX_SSID 5 - -#define WL_BSS_FLAGS_FROM_BEACON 0x01 /* bss_info derived from beacon */ -#define WL_BSS_FLAGS_FROM_CACHE 0x02 /* bss_info collected from cache */ -#define WL_BSS_FLAGS_RSSI_ONCHANNEL 0x04 /* rssi info was received on channel (vs offchannel) */ - -typedef struct wl_extdscan_params { - int8 nprobes; /* 0, passive, otherwise active */ - int8 split_scan; /* split scan */ - int8 band; /* band */ - int8 pad; - wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /* ssid list */ - uint32 tx_rate; /* in 500ksec units */ - wl_scan_type_t scan_type; /* enum */ - int32 channel_num; - chan_scandata_t channel_list[1]; /* list of chandata structs */ -} wl_extdscan_params_t; - -#define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) -#endif /* LINUX_POSTMOGRIFY_REMOVAL */ - -#define WL_BSSTYPE_INFRA 1 -#define WL_BSSTYPE_INDEP 0 -#define WL_BSSTYPE_ANY 2 - -/* Bitmask for scan_type */ -#define WL_SCANFLAGS_PASSIVE 0x01 /* force passive scan */ -#define WL_SCANFLAGS_RESERVED 0x02 /* Reserved */ -#define WL_SCANFLAGS_PROHIBITED 0x04 /* allow scanning prohibited channels */ - -#define WL_SCAN_PARAMS_SSID_MAX 10 - -typedef struct wl_scan_params { - wlc_ssid_t ssid; /* default: {0, ""} */ - struct ether_addr bssid; /* default: bcast */ - int8 bss_type; /* default: any, - * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT - */ - uint8 scan_type; /* flags, 0 use default */ - int32 nprobes; /* -1 use default, number of probes per channel */ - int32 active_time; /* -1 use default, dwell time per channel for - * active scanning - */ - int32 passive_time; /* -1 use default, dwell time per channel - * for passive scanning - */ - int32 home_time; /* -1 use default, dwell time for the home channel - * between channel scans - */ - int32 channel_num; /* count of channels and ssids that follow - * - * low half is count of channels in channel_list, 0 - * means default (use all available channels) - * - * high half is entries in wlc_ssid_t array that - * follows channel_list, aligned for int32 (4 bytes) - * meaning an odd channel count implies a 2-byte pad - * between end of channel_list and first ssid - * - * if ssid count is zero, single ssid in the fixed - * parameter portion is assumed, otherwise ssid in - * the fixed portion is ignored - */ - uint16 channel_list[1]; /* list of chanspecs */ -} wl_scan_params_t; - -/* size of wl_scan_params not including variable length array */ -#define WL_SCAN_PARAMS_FIXED_SIZE 64 - -/* masks for channel and ssid count */ -#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff -#define WL_SCAN_PARAMS_NSSID_SHIFT 16 - -#define WL_SCAN_ACTION_START 1 -#define WL_SCAN_ACTION_CONTINUE 2 -#define WL_SCAN_ACTION_ABORT 3 - -#define ISCAN_REQ_VERSION 1 - -/* incremental scan struct */ -typedef struct wl_iscan_params { - uint32 version; - uint16 action; - uint16 scan_duration; - wl_scan_params_t params; -} wl_iscan_params_t; - -/* 3 fields + size of wl_scan_params, not including variable length array */ -#define WL_ISCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) - -typedef struct wl_scan_results { - uint32 buflen; - uint32 version; - uint32 count; - wl_bss_info_t bss_info[1]; -} wl_scan_results_t; - -/* size of wl_scan_results not including variable length array */ -#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) - -/* wl_iscan_results status values */ -#define WL_SCAN_RESULTS_SUCCESS 0 -#define WL_SCAN_RESULTS_PARTIAL 1 -#define WL_SCAN_RESULTS_PENDING 2 -#define WL_SCAN_RESULTS_ABORTED 3 -#define WL_SCAN_RESULTS_NO_MEM 4 - -/* Used in EXT_STA */ -#define DNGL_RXCTXT_SIZE 45 - -#if defined(SIMPLE_ISCAN) -#define ISCAN_RETRY_CNT 5 -#define ISCAN_STATE_IDLE 0 -#define ISCAN_STATE_SCANING 1 -#define ISCAN_STATE_PENDING 2 - -/* the buf lengh can be WLC_IOCTL_MAXLEN (8K) to reduce iteration */ -#define WLC_IW_ISCAN_MAXLEN 2048 -typedef struct iscan_buf { - struct iscan_buf * next; - char iscan_buf[WLC_IW_ISCAN_MAXLEN]; -} iscan_buf_t; -#endif /* SIMPLE_ISCAN */ - -#define ESCAN_REQ_VERSION 1 - -typedef struct wl_escan_params { - uint32 version; - uint16 action; - uint16 sync_id; - wl_scan_params_t params; -} wl_escan_params_t; - -#define WL_ESCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_escan_params_t, params) + sizeof(wlc_ssid_t)) - -typedef struct wl_escan_result { - uint32 buflen; - uint32 version; - uint16 sync_id; - uint16 bss_count; - wl_bss_info_t bss_info[1]; -} wl_escan_result_t; - -#define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) - -/* incremental scan results struct */ -typedef struct wl_iscan_results { - uint32 status; - wl_scan_results_t results; -} wl_iscan_results_t; - -/* size of wl_iscan_results not including variable length array */ -#define WL_ISCAN_RESULTS_FIXED_SIZE \ - (WL_SCAN_RESULTS_FIXED_SIZE + OFFSETOF(wl_iscan_results_t, results)) - -typedef struct wl_probe_params { - wlc_ssid_t ssid; - struct ether_addr bssid; - struct ether_addr mac; -} wl_probe_params_t; - -#define WL_NUMRATES 16 /* max # of rates in a rateset */ -typedef struct wl_rateset { - uint32 count; /* # rates in this set */ - uint8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ -} wl_rateset_t; - -typedef struct wl_rateset_args { - uint32 count; /* # rates in this set */ - uint8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ - uint8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ -} wl_rateset_args_t; - -/* uint32 list */ -typedef struct wl_uint32_list { - /* in - # of elements, out - # of entries */ - uint32 count; - /* variable length uint32 list */ - uint32 element[1]; -} wl_uint32_list_t; - -/* used for association with a specific BSSID and chanspec list */ -typedef struct wl_assoc_params { - struct ether_addr bssid; /* 00:00:00:00:00:00: broadcast scan */ - int32 chanspec_num; /* 0: all available channels, - * otherwise count of chanspecs in chanspec_list - */ - chanspec_t chanspec_list[1]; /* list of chanspecs */ -} wl_assoc_params_t; -#define WL_ASSOC_PARAMS_FIXED_SIZE OFFSETOF(wl_assoc_params_t, chanspec_list) - -/* used for reassociation/roam to a specific BSSID and channel */ -typedef wl_assoc_params_t wl_reassoc_params_t; -#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE - -/* used for association to a specific BSSID and channel */ -typedef wl_assoc_params_t wl_join_assoc_params_t; -#define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE - -/* used for join with or without a specific bssid and channel list */ -typedef struct wl_join_params { - wlc_ssid_t ssid; - wl_assoc_params_t params; /* optional field, but it must include the fixed portion - * of the wl_assoc_params_t struct when it does present. - */ -} wl_join_params_t; -#define WL_JOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_join_params_t, params) + \ - WL_ASSOC_PARAMS_FIXED_SIZE) -/* scan params for extended join */ -typedef struct wl_join_scan_params { - uint8 scan_type; /* 0 use default, active or passive scan */ - int32 nprobes; /* -1 use default, number of probes per channel */ - int32 active_time; /* -1 use default, dwell time per channel for - * active scanning - */ - int32 passive_time; /* -1 use default, dwell time per channel - * for passive scanning - */ - int32 home_time; /* -1 use default, dwell time for the home channel - * between channel scans - */ -} wl_join_scan_params_t; - -/* extended join params */ -typedef struct wl_extjoin_params { - wlc_ssid_t ssid; /* {0, ""}: wildcard scan */ - wl_join_scan_params_t scan; - wl_join_assoc_params_t assoc; /* optional field, but it must include the fixed portion - * of the wl_join_assoc_params_t struct when it does - * present. - */ -} wl_extjoin_params_t; -#define WL_EXTJOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_extjoin_params_t, assoc) + \ - WL_JOIN_ASSOC_PARAMS_FIXED_SIZE) - -#ifndef D11AC_IOTYPES - -/* defines used by the nrate iovar */ -#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ -#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ -#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ -#define NRATE_STF_SHIFT 8 /* stf mode shift */ -#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ -#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ -#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ -#define NRATE_SGI_SHIFT 23 /* sgi mode */ -#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ -#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ - -#define NRATE_STF_SISO 0 /* stf mode SISO */ -#define NRATE_STF_CDD 1 /* stf mode CDD */ -#define NRATE_STF_STBC 2 /* stf mode STBC */ -#define NRATE_STF_SDM 3 /* stf mode SDM */ - -#else /* D11AC_IOTYPES */ - -/* WL_RSPEC defines for rate information */ -#define WL_RSPEC_RATE_MASK 0x000000FF /* rate or HT MCS value */ -#define WL_RSPEC_VHT_MCS_MASK 0x0000000F /* VHT MCS value */ -#define WL_RSPEC_VHT_NSS_MASK 0x000000F0 /* VHT Nss value */ -#define WL_RSPEC_VHT_NSS_SHIFT 4 /* VHT Nss value shift */ -#define WL_RSPEC_TXEXP_MASK 0x00000300 -#define WL_RSPEC_TXEXP_SHIFT 8 -#define WL_RSPEC_BW_MASK 0x00070000 /* bandwidth mask */ -#define WL_RSPEC_BW_SHIFT 16 /* bandwidth shift */ -#define WL_RSPEC_STBC 0x00100000 /* STBC encoding, Nsts = 2 x Nss */ -#define WL_RSPEC_LDPC 0x00400000 /* bit indicates adv coding in use */ -#define WL_RSPEC_SGI 0x00800000 /* Short GI mode */ -#define WL_RSPEC_ENCODING_MASK 0x03000000 /* Encoding of Rate/MCS field */ -#define WL_RSPEC_OVERRIDE_RATE 0x40000000 /* bit indicate to override mcs only */ -#define WL_RSPEC_OVERRIDE_MODE 0x80000000 /* bit indicates override both rate & mode */ - -/* WL_RSPEC_ENCODING field defs */ -#define WL_RSPEC_ENCODE_RATE 0x00000000 /* Legacy rate is stored in RSPEC_RATE_MASK */ -#define WL_RSPEC_ENCODE_HT 0x01000000 /* HT MCS is stored in RSPEC_RATE_MASK */ -#define WL_RSPEC_ENCODE_VHT 0x02000000 /* VHT MCS and Nss is stored in RSPEC_RATE_MASK */ - -/* WL_RSPEC_BW field defs */ -#define WL_RSPEC_BW_UNSPECIFIED 0 -#define WL_RSPEC_BW_20MHZ 0x00010000 -#define WL_RSPEC_BW_40MHZ 0x00020000 -#define WL_RSPEC_BW_80MHZ 0x00030000 -#define WL_RSPEC_BW_160MHZ 0x00040000 - -/* Legacy defines for the nrate iovar */ -#define OLD_NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ -#define OLD_NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ -#define OLD_NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ -#define OLD_NRATE_STF_SHIFT 8 /* stf mode shift */ -#define OLD_NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ -#define OLD_NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ -#define OLD_NRATE_SGI 0x00800000 /* sgi mode */ -#define OLD_NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ - -#define OLD_NRATE_STF_SISO 0 /* stf mode SISO */ -#define OLD_NRATE_STF_CDD 1 /* stf mode CDD */ -#define OLD_NRATE_STF_STBC 2 /* stf mode STBC */ -#define OLD_NRATE_STF_SDM 3 /* stf mode SDM */ - -#endif /* D11AC_IOTYPES */ - -#define ANTENNA_NUM_1 1 /* total number of antennas to be used */ -#define ANTENNA_NUM_2 2 -#define ANTENNA_NUM_3 3 -#define ANTENNA_NUM_4 4 - -#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ -#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ -#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ -#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ -#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ -#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ -#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ - -#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ - -typedef struct { - uint8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ - uint8 num_antcfg; /* number of available antenna configurations */ -} wlc_antselcfg_t; - -#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ - -#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */ -#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */ - -#define IBSS_MED 15 /* Mediom in-bss congestion percentage */ -#define IBSS_HI 25 /* Hi in-bss congestion percentage */ -#define OBSS_MED 12 -#define OBSS_HI 25 -#define INTERFER_MED 5 -#define INTERFER_HI 10 - -#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */ -#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */ -#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */ -#define CCA_FLAGS_PREFER_1_6_11 0x10 -#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */ - -#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */ -#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */ -#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */ -#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */ -#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */ - -typedef struct { - uint32 duration; /* millisecs spent sampling this channel */ - uint32 congest_ibss; /* millisecs in our bss (presumably this traffic will */ - /* move if cur bss moves channels) */ - uint32 congest_obss; /* traffic not in our bss */ - uint32 interference; /* millisecs detecting a non 802.11 interferer. */ - uint32 timestamp; /* second timestamp */ -} cca_congest_t; - -typedef struct { - chanspec_t chanspec; /* Which channel? */ - uint8 num_secs; /* How many secs worth of data */ - cca_congest_t secs[1]; /* Data */ -} cca_congest_channel_req_t; - -/* interference source detection and identification mode */ -#define ITFR_MODE_DISABLE 0 /* disable feature */ -#define ITFR_MODE_MANUAL_ENABLE 1 /* enable manual detection */ -#define ITFR_MODE_AUTO_ENABLE 2 /* enable auto detection */ - -/* interference sources */ -enum interference_source { - ITFR_NONE = 0, /* interference */ - ITFR_PHONE, /* wireless phone */ - ITFR_VIDEO_CAMERA, /* wireless video camera */ - ITFR_MICROWAVE_OVEN, /* microwave oven */ - ITFR_BABY_MONITOR, /* wireless baby monitor */ - ITFR_BLUETOOTH, /* bluetooth */ - ITFR_VIDEO_CAMERA_OR_BABY_MONITOR, /* wireless camera or baby monitor */ - ITFR_BLUETOOTH_OR_BABY_MONITOR, /* bluetooth or baby monitor */ - ITFR_VIDEO_CAMERA_OR_PHONE, /* video camera or phone */ - ITFR_UNIDENTIFIED /* interference from unidentified source */ -}; - -/* structure for interference source report */ -typedef struct { - uint32 flags; /* flags. bit definitions below */ - uint32 source; /* last detected interference source */ - uint32 timestamp; /* second timestamp on interferenced flag change */ -} interference_source_rep_t; - -/* bit definitions for flags in interference source report */ -#define ITFR_INTERFERENCED 1 /* interference detected */ -#define ITFR_HOME_CHANNEL 2 /* home channel has interference */ -#define ITFR_NOISY_ENVIRONMENT 4 /* noisy environemnt so feature stopped */ - -#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ - -typedef struct wl_country { - char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in - * the Country IE - */ - int32 rev; /* revision specifier for ccode - * on set, -1 indicates unspecified. - * on get, rev >= 0 - */ - char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code. - * variable length, but fixed size in - * struct allows simple allocation for - * expected country strings <= 3 chars. - */ -} wl_country_t; - -typedef struct wl_channels_in_country { - uint32 buflen; - uint32 band; - char country_abbrev[WLC_CNTRY_BUF_SZ]; - uint32 count; - uint32 channel[1]; -} wl_channels_in_country_t; - -typedef struct wl_country_list { - uint32 buflen; - uint32 band_set; - uint32 band; - uint32 count; - char country_abbrev[1]; -} wl_country_list_t; - -#define WL_NUM_RPI_BINS 8 -#define WL_RM_TYPE_BASIC 1 -#define WL_RM_TYPE_CCA 2 -#define WL_RM_TYPE_RPI 3 - -#define WL_RM_FLAG_PARALLEL (1<<0) - -#define WL_RM_FLAG_LATE (1<<1) -#define WL_RM_FLAG_INCAPABLE (1<<2) -#define WL_RM_FLAG_REFUSED (1<<3) - -typedef struct wl_rm_req_elt { - int8 type; - int8 flags; - chanspec_t chanspec; - uint32 token; /* token for this measurement */ - uint32 tsf_h; /* TSF high 32-bits of Measurement start time */ - uint32 tsf_l; /* TSF low 32-bits */ - uint32 dur; /* TUs */ -} wl_rm_req_elt_t; - -typedef struct wl_rm_req { - uint32 token; /* overall measurement set token */ - uint32 count; /* number of measurement requests */ - void *cb; /* completion callback function: may be NULL */ - void *cb_arg; /* arg to completion callback function */ - wl_rm_req_elt_t req[1]; /* variable length block of requests */ -} wl_rm_req_t; -#define WL_RM_REQ_FIXED_LEN OFFSETOF(wl_rm_req_t, req) - -typedef struct wl_rm_rep_elt { - int8 type; - int8 flags; - chanspec_t chanspec; - uint32 token; /* token for this measurement */ - uint32 tsf_h; /* TSF high 32-bits of Measurement start time */ - uint32 tsf_l; /* TSF low 32-bits */ - uint32 dur; /* TUs */ - uint32 len; /* byte length of data block */ - uint8 data[1]; /* variable length data block */ -} wl_rm_rep_elt_t; -#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */ - -#define WL_RPI_REP_BIN_NUM 8 -typedef struct wl_rm_rpi_rep { - uint8 rpi[WL_RPI_REP_BIN_NUM]; - int8 rpi_max[WL_RPI_REP_BIN_NUM]; -} wl_rm_rpi_rep_t; - -typedef struct wl_rm_rep { - uint32 token; /* overall measurement set token */ - uint32 len; /* length of measurement report block */ - wl_rm_rep_elt_t rep[1]; /* variable length block of reports */ -} wl_rm_rep_t; -#define WL_RM_REP_FIXED_LEN 8 - - -typedef enum sup_auth_status { - /* Basic supplicant authentication states */ - WLC_SUP_DISCONNECTED = 0, - WLC_SUP_CONNECTING, - WLC_SUP_IDREQUIRED, - WLC_SUP_AUTHENTICATING, - WLC_SUP_AUTHENTICATED, - WLC_SUP_KEYXCHANGE, - WLC_SUP_KEYED, - WLC_SUP_TIMEOUT, - WLC_SUP_LAST_BASIC_STATE, - - /* Extended supplicant authentication states */ - /* Waiting to receive handshake msg M1 */ - WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, - /* Preparing to send handshake msg M2 */ - WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, - /* Waiting to receive handshake msg M3 */ - WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, - WLC_SUP_KEYXCHANGE_PREP_M4, /* Preparing to send handshake msg M4 */ - WLC_SUP_KEYXCHANGE_WAIT_G1, /* Waiting to receive handshake msg G1 */ - WLC_SUP_KEYXCHANGE_PREP_G2 /* Preparing to send handshake msg G2 */ -} sup_auth_status_t; - -/* Enumerate crypto algorithms */ -#define CRYPTO_ALGO_OFF 0 -#define CRYPTO_ALGO_WEP1 1 -#define CRYPTO_ALGO_TKIP 2 -#define CRYPTO_ALGO_WEP128 3 -#define CRYPTO_ALGO_AES_CCM 4 -#define CRYPTO_ALGO_AES_OCB_MSDU 5 -#define CRYPTO_ALGO_AES_OCB_MPDU 6 -#define CRYPTO_ALGO_NALG 7 -#ifdef BCMWAPI_WPI -#define CRYPTO_ALGO_SMS4 11 -#endif /* BCMWAPI_WPI */ -#define CRYPTO_ALGO_PMK 12 /* for 802.1x supp to set PMK before 4-way */ - -#define WSEC_GEN_MIC_ERROR 0x0001 -#define WSEC_GEN_REPLAY 0x0002 -#define WSEC_GEN_ICV_ERROR 0x0004 -#define WSEC_GEN_MFP_ACT_ERROR 0x0008 -#define WSEC_GEN_MFP_DISASSOC_ERROR 0x0010 -#define WSEC_GEN_MFP_DEAUTH_ERROR 0x0020 - -#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */ -#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ -#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */ -#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */ -#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */ - -typedef struct wl_wsec_key { - uint32 index; /* key index */ - uint32 len; /* key length */ - uint8 data[DOT11_MAX_KEY_SIZE]; /* key data */ - uint32 pad_1[18]; - uint32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ - uint32 flags; /* misc flags */ - uint32 pad_2[2]; - int pad_3; - int iv_initialized; /* has IV been initialized already? */ - int pad_4; - /* Rx IV */ - struct { - uint32 hi; /* upper 32 bits of IV */ - uint16 lo; /* lower 16 bits of IV */ - } rxiv; - uint32 pad_5[2]; - struct ether_addr ea; /* per station */ -} wl_wsec_key_t; - -#define WSEC_MIN_PSK_LEN 8 -#define WSEC_MAX_PSK_LEN 64 - -/* Flag for key material needing passhash'ing */ -#define WSEC_PASSPHRASE (1<<0) - -/* receptacle for WLC_SET_WSEC_PMK parameter */ -typedef struct { - ushort key_len; /* octets in key material */ - ushort flags; /* key handling qualification */ - uint8 key[WSEC_MAX_PSK_LEN]; /* PMK material */ -} wsec_pmk_t; - -/* wireless security bitvec */ -#define WEP_ENABLED 0x0001 -#define TKIP_ENABLED 0x0002 -#define AES_ENABLED 0x0004 -#define WSEC_SWFLAG 0x0008 -#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ -#ifdef BCMWAPI_WPI -#define SMS4_ENABLED 0x0100 -#endif /* BCMWAPI_WPI */ - -/* wsec macros for operating on the above definitions */ -#define WSEC_WEP_ENABLED(wsec) ((wsec) & WEP_ENABLED) -#define WSEC_TKIP_ENABLED(wsec) ((wsec) & TKIP_ENABLED) -#define WSEC_AES_ENABLED(wsec) ((wsec) & AES_ENABLED) - -#ifdef BCMWAPI_WPI -#define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED | SMS4_ENABLED)) -#else /* BCMWAPI_WPI */ -#define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED)) -#endif /* BCMWAPI_WPI */ -#define WSEC_SES_OW_ENABLED(wsec) ((wsec) & SES_OW_ENABLED) -#ifdef BCMWAPI_WAI -#define WSEC_SMS4_ENABLED(wsec) ((wsec) & SMS4_ENABLED) -#endif /* BCMWAPI_WAI */ - -#ifdef MFP -#define MFP_CAPABLE 0x0200 -#define MFP_REQUIRED 0x0400 -#define MFP_SHA256 0x0800 /* a special configuration for STA for WIFI test tool */ -#endif /* MFP */ - -#ifdef MFP -#define MFP_CAPABLE 0x0200 -#define MFP_REQUIRED 0x0400 -#define MFP_SHA256 0x0800 /* a special configuration for STA for WIFI test tool */ -#endif /* MFP */ -/* WPA authentication mode bitvec */ -#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ -#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ -#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ -#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ - -#if defined(BCMCCX) || defined(BCMEXTCCX) -#define WPA_AUTH_CCKM 0x0008 /* CCKM */ -#define WPA2_AUTH_CCKM 0x0010 /* CCKM2 */ -#endif /* BCMCCX || BCMEXTCCX */ - -/* #define WPA_AUTH_8021X 0x0020 */ /* 802.1x, reserved */ -#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ -#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ -#define BRCM_AUTH_PSK 0x0100 /* BRCM specific PSK */ -#define BRCM_AUTH_DPT 0x0200 /* DPT PSK without group keys */ -#if defined(BCMWAPI_WAI) || defined(BCMWAPI_WPI) -#define WPA_AUTH_WAPI 0x0400 -#define WAPI_AUTH_NONE WPA_AUTH_NONE /* none (IBSS) */ -#define WAPI_AUTH_UNSPECIFIED 0x0400 /* over AS */ -#define WAPI_AUTH_PSK 0x0800 /* Pre-shared key */ -#endif /* BCMWAPI_WAI || BCMWAPI_WPI */ -#define WPA2_AUTH_MFP 0x1000 /* MFP (11w) in contrast to CCX */ -#define WPA2_AUTH_TPK 0x2000 /* TDLS Peer Key */ -#define WPA2_AUTH_FT 0x4000 /* Fast Transition. */ -#define WPA_AUTH_PFN_ANY 0xffffffff /* for PFN, match only ssid */ - -/* pmkid */ -#define MAXPMKID 16 - -typedef struct _pmkid { - struct ether_addr BSSID; - uint8 PMKID[WPA2_PMKID_LEN]; -} pmkid_t; - -typedef struct _pmkid_list { - uint32 npmkid; - pmkid_t pmkid[1]; -} pmkid_list_t; - -typedef struct _pmkid_cand { - struct ether_addr BSSID; - uint8 preauth; -} pmkid_cand_t; - -typedef struct _pmkid_cand_list { - uint32 npmkid_cand; - pmkid_cand_t pmkid_cand[1]; -} pmkid_cand_list_t; - -typedef struct wl_assoc_info { - uint32 req_len; - uint32 resp_len; - uint32 flags; - struct dot11_assoc_req req; - struct ether_addr reassoc_bssid; /* used in reassoc's */ - struct dot11_assoc_resp resp; -} wl_assoc_info_t; - -/* flags */ -#define WLC_ASSOC_REQ_IS_REASSOC 0x01 /* assoc req was actually a reassoc */ - -#ifndef LINUX_POSTMOGRIFY_REMOVAL -typedef struct wl_led_info { - uint32 index; /* led index */ - uint32 behavior; - uint8 activehi; -} wl_led_info_t; - - -/* srom read/write struct passed through ioctl */ -typedef struct { - uint byteoff; /* byte offset */ - uint nbytes; /* number of bytes */ - uint16 buf[1]; -} srom_rw_t; - -/* similar cis (srom or otp) struct [iovar: may not be aligned] */ -typedef struct { - uint32 source; /* cis source */ - uint32 byteoff; /* byte offset */ - uint32 nbytes; /* number of bytes */ - /* data follows here */ -} cis_rw_t; - -#define WLC_CIS_DEFAULT 0 /* built-in default */ -#define WLC_CIS_SROM 1 /* source is sprom */ -#define WLC_CIS_OTP 2 /* source is otp */ - -/* R_REG and W_REG struct passed through ioctl */ -typedef struct { - uint32 byteoff; /* byte offset of the field in d11regs_t */ - uint32 val; /* read/write value of the field */ - uint32 size; /* sizeof the field */ - uint band; /* band (optional) */ -} rw_reg_t; - -/* Structure used by GET/SET_ATTEN ioctls - it controls power in b/g-band */ -/* PCL - Power Control Loop */ -/* current gain setting is replaced by user input */ -#define WL_ATTEN_APP_INPUT_PCL_OFF 0 /* turn off PCL, apply supplied input */ -#define WL_ATTEN_PCL_ON 1 /* turn on PCL */ -/* current gain setting is maintained */ -#define WL_ATTEN_PCL_OFF 2 /* turn off PCL. */ - -typedef struct { - uint16 auto_ctrl; /* WL_ATTEN_XX */ - uint16 bb; /* Baseband attenuation */ - uint16 radio; /* Radio attenuation */ - uint16 txctl1; /* Radio TX_CTL1 value */ -} atten_t; - -/* Per-AC retry parameters */ -struct wme_tx_params_s { - uint8 short_retry; - uint8 short_fallback; - uint8 long_retry; - uint8 long_fallback; - uint16 max_rate; /* In units of 512 Kbps */ -}; - -typedef struct wme_tx_params_s wme_tx_params_t; - -#define WL_WME_TX_PARAMS_IO_BYTES (sizeof(wme_tx_params_t) * AC_COUNT) - -/* defines used by poweridx iovar - it controls power in a-band */ -/* current gain setting is maintained */ -#define WL_PWRIDX_PCL_OFF -2 /* turn off PCL. */ -#define WL_PWRIDX_PCL_ON -1 /* turn on PCL */ -#define WL_PWRIDX_LOWER_LIMIT -2 /* lower limit */ -#define WL_PWRIDX_UPPER_LIMIT 63 /* upper limit */ -/* value >= 0 causes - * - input to be set to that value - * - PCL to be off - */ - -/* Used to get specific link/ac parameters */ -typedef struct { - int ac; - uint8 val; - struct ether_addr ea; -} link_val_t; - -#define BCM_MAC_STATUS_INDICATION (0x40010200L) -#endif /* LINUX_POSTMOGRIFY_REMOVAL */ - -typedef struct { - uint16 ver; /* version of this struct */ - uint16 len; /* length in bytes of this structure */ - uint16 cap; /* sta's advertised capabilities */ - uint32 flags; /* flags defined below */ - uint32 idle; /* time since data pkt rx'd from sta */ - struct ether_addr ea; /* Station address */ - wl_rateset_t rateset; /* rateset in use */ - uint32 in; /* seconds elapsed since associated */ - uint32 listen_interval_inms; /* Min Listen interval in ms for this STA */ - uint32 tx_pkts; /* # of packets transmitted */ - uint32 tx_failures; /* # of packets failed */ - uint32 rx_ucast_pkts; /* # of unicast packets received */ - uint32 rx_mcast_pkts; /* # of multicast packets received */ - uint32 tx_rate; /* Rate of last successful tx frame */ - uint32 rx_rate; /* Rate of last successful rx frame */ - uint32 rx_decrypt_succeeds; /* # of packet decrypted successfully */ - uint32 rx_decrypt_failures; /* # of packet decrypted unsuccessfully */ -} sta_info_t; - -#define WL_OLD_STAINFO_SIZE OFFSETOF(sta_info_t, tx_pkts) - -#define WL_STA_VER 3 - -/* Flags for sta_info_t indicating properties of STA */ -#define WL_STA_BRCM 0x1 /* Running a Broadcom driver */ -#define WL_STA_WME 0x2 /* WMM association */ -#define WL_STA_UNUSED 0x4 -#define WL_STA_AUTHE 0x8 /* Authenticated */ -#define WL_STA_ASSOC 0x10 /* Associated */ -#define WL_STA_AUTHO 0x20 /* Authorized */ -#define WL_STA_WDS 0x40 /* Wireless Distribution System */ -#define WL_STA_WDS_LINKUP 0x80 /* WDS traffic/probes flowing properly */ -#define WL_STA_PS 0x100 /* STA is in power save mode from AP's viewpoint */ -#define WL_STA_APSD_BE 0x200 /* APSD delv/trigger for AC_BE is default enabled */ -#define WL_STA_APSD_BK 0x400 /* APSD delv/trigger for AC_BK is default enabled */ -#define WL_STA_APSD_VI 0x800 /* APSD delv/trigger for AC_VI is default enabled */ -#define WL_STA_APSD_VO 0x1000 /* APSD delv/trigger for AC_VO is default enabled */ -#define WL_STA_N_CAP 0x2000 /* STA 802.11n capable */ -#define WL_STA_SCBSTATS 0x4000 /* Per STA debug stats */ - -#define WL_WDS_LINKUP WL_STA_WDS_LINKUP /* deprecated */ - -/* Values for TX Filter override mode */ -#define WLC_TXFILTER_OVERRIDE_DISABLED 0 -#define WLC_TXFILTER_OVERRIDE_ENABLED 1 - -/* Used to get specific STA parameters */ -typedef struct { - uint32 val; - struct ether_addr ea; -} scb_val_t; - -/* Used by iovar versions of some ioctls, i.e. WLC_SCB_AUTHORIZE et al */ -typedef struct { - uint32 code; - scb_val_t ioctl_args; -} authops_t; - -/* channel encoding */ -typedef struct channel_info { - int hw_channel; - int target_channel; - int scan_channel; -} channel_info_t; - -/* For ioctls that take a list of MAC addresses */ -struct maclist { - uint count; /* number of MAC addresses */ - struct ether_addr ea[1]; /* variable length array of MAC addresses */ -}; - -/* get pkt count struct passed through ioctl */ -typedef struct get_pktcnt { - uint rx_good_pkt; - uint rx_bad_pkt; - uint tx_good_pkt; - uint tx_bad_pkt; - uint rx_ocast_good_pkt; /* unicast packets destined for others */ -} get_pktcnt_t; - -/* NINTENDO2 */ -#define LQ_IDX_MIN 0 -#define LQ_IDX_MAX 1 -#define LQ_IDX_AVG 2 -#define LQ_IDX_SUM 2 -#define LQ_IDX_LAST 3 -#define LQ_STOP_MONITOR 0 -#define LQ_START_MONITOR 1 - -/* Get averages RSSI, Rx PHY rate and SNR values */ -typedef struct { - int rssi[LQ_IDX_LAST]; /* Array to keep min, max, avg rssi */ - int snr[LQ_IDX_LAST]; /* Array to keep min, max, avg snr */ - int isvalid; /* Flag indicating whether above data is valid */ -} wl_lq_t; /* Link Quality */ - -/* NINTENDO2 */ -#define MCS_INDEX_SIZE 33 - -typedef enum wl_wakeup_reason_type { - LCD_ON = 1, - LCD_OFF, - DRC1_WAKE, - DRC2_WAKE, - REASON_LAST -} wl_wr_type_t; - -typedef struct { -/* Unique filter id */ - uint32 id; - -/* stores the reason for the last wake up */ - uint8 reason; -} wl_wr_t; - -/* Get MAC specific rate histogram command */ -typedef struct { - struct ether_addr ea; /* MAC Address */ - uint8 ac_cat; /* Access Category */ - uint8 num_pkts; /* Number of packet entries to be averaged */ -} wl_mac_ratehisto_cmd_t; /* MAC Specific Rate Histogram command */ - -/* Get MAC rate histogram response */ -typedef struct { - uint32 rate[WLC_MAXRATE + 1]; /* Rates */ - uint32 mcs_index[MCS_INDEX_SIZE]; /* MCS index */ - uint32 tsf_timer[2][2]; /* Start and End time for 8bytes value */ -} wl_mac_ratehisto_res_t; /* MAC Specific Rate Histogram Response */ - -/* Values for TX Filter override mode */ -#define WLC_TXFILTER_OVERRIDE_DISABLED 0 -#define WLC_TXFILTER_OVERRIDE_ENABLED 1 - -#define WL_IOCTL_ACTION_GET 0x0 -#define WL_IOCTL_ACTION_SET 0x1 -#define WL_IOCTL_ACTION_OVL_IDX_MASK 0x1e -#define WL_IOCTL_ACTION_OVL_RSV 0x20 -#define WL_IOCTL_ACTION_OVL 0x40 -#define WL_IOCTL_ACTION_MASK 0x7e -#define WL_IOCTL_ACTION_OVL_SHIFT 1 - -/* Linux network driver ioctl encoding */ -typedef struct wl_ioctl { - uint cmd; /* common ioctl definition */ - void *buf; /* pointer to user buffer */ - uint len; /* length of user buffer */ - uint8 set; /* 1=set IOCTL; 0=query IOCTL */ - uint used; /* bytes read or written (optional) */ - uint needed; /* bytes needed (optional) */ -} wl_ioctl_t; - -/* reference to wl_ioctl_t struct used by usermode driver */ -#define ioctl_subtype set /* subtype param */ -#define ioctl_pid used /* pid param */ -#define ioctl_status needed /* status param */ - -/* - * Structure for passing hardware and software - * revision info up from the driver. - */ -typedef struct wlc_rev_info { - uint vendorid; /* PCI vendor id */ - uint deviceid; /* device id of chip */ - uint radiorev; /* radio revision */ - uint chiprev; /* chip revision */ - uint corerev; /* core revision */ - uint boardid; /* board identifier (usu. PCI sub-device id) */ - uint boardvendor; /* board vendor (usu. PCI sub-vendor id) */ - uint boardrev; /* board revision */ - uint driverrev; /* driver version */ - uint ucoderev; /* microcode version */ - uint bus; /* bus type */ - uint chipnum; /* chip number */ - uint phytype; /* phy type */ - uint phyrev; /* phy revision */ - uint anarev; /* anacore rev */ - uint chippkg; /* chip package info */ -} wlc_rev_info_t; - -#define WL_REV_INFO_LEGACY_LENGTH 48 - -#define WL_BRAND_MAX 10 -typedef struct wl_instance_info { - uint instance; - char brand[WL_BRAND_MAX]; -} wl_instance_info_t; - -/* structure to change size of tx fifo */ -typedef struct wl_txfifo_sz { - uint16 magic; - uint16 fifo; - uint16 size; -} wl_txfifo_sz_t; -/* magic pattern used for mismatch driver and wl */ -#define WL_TXFIFO_SZ_MAGIC 0xa5a5 - -/* Transfer info about an IOVar from the driver */ -/* Max supported IOV name size in bytes, + 1 for nul termination */ -#define WLC_IOV_NAME_LEN 30 -typedef struct wlc_iov_trx_s { - uint8 module; - uint8 type; - char name[WLC_IOV_NAME_LEN]; -} wlc_iov_trx_t; - -/* check this magic number */ -#define WLC_IOCTL_MAGIC 0x14e46c77 - -/* bump this number if you change the ioctl interface */ -#ifdef D11AC_IOTYPES -#define WLC_IOCTL_VERSION 2 -#define WLC_IOCTL_VERSION_LEGACY_IOTYPES 1 -#else -#define WLC_IOCTL_VERSION 1 -#endif /* D11AC_IOTYPES */ - -#define WLC_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ -#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ -#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */ -#if defined(LCNCONF) || defined(LCN40CONF) -#define WLC_SAMPLECOLLECT_MAXLEN 8192 /* Max Sample Collect buffer */ -#else -#define WLC_SAMPLECOLLECT_MAXLEN 10240 /* Max Sample Collect buffer for two cores */ -#endif - -/* common ioctl definitions */ -#define WLC_GET_MAGIC 0 -#define WLC_GET_VERSION 1 -#define WLC_UP 2 -#define WLC_DOWN 3 -#define WLC_GET_LOOP 4 -#define WLC_SET_LOOP 5 -#define WLC_DUMP 6 -#define WLC_GET_MSGLEVEL 7 -#define WLC_SET_MSGLEVEL 8 -#define WLC_GET_PROMISC 9 -#define WLC_SET_PROMISC 10 -/* #define WLC_OVERLAY_IOCTL 11 */ /* not supported */ -#define WLC_GET_RATE 12 -#define WLC_GET_MAX_RATE 13 -#define WLC_GET_INSTANCE 14 -/* #define WLC_GET_FRAG 15 */ /* no longer supported */ -/* #define WLC_SET_FRAG 16 */ /* no longer supported */ -/* #define WLC_GET_RTS 17 */ /* no longer supported */ -/* #define WLC_SET_RTS 18 */ /* no longer supported */ -#define WLC_GET_INFRA 19 -#define WLC_SET_INFRA 20 -#define WLC_GET_AUTH 21 -#define WLC_SET_AUTH 22 -#define WLC_GET_BSSID 23 -#define WLC_SET_BSSID 24 -#define WLC_GET_SSID 25 -#define WLC_SET_SSID 26 -#define WLC_RESTART 27 -#define WLC_TERMINATED 28 -/* #define WLC_DUMP_SCB 28 */ /* no longer supported */ -#define WLC_GET_CHANNEL 29 -#define WLC_SET_CHANNEL 30 -#define WLC_GET_SRL 31 -#define WLC_SET_SRL 32 -#define WLC_GET_LRL 33 -#define WLC_SET_LRL 34 -#define WLC_GET_PLCPHDR 35 -#define WLC_SET_PLCPHDR 36 -#define WLC_GET_RADIO 37 -#define WLC_SET_RADIO 38 -#define WLC_GET_PHYTYPE 39 -#define WLC_DUMP_RATE 40 -#define WLC_SET_RATE_PARAMS 41 -#define WLC_GET_FIXRATE 42 -#define WLC_SET_FIXRATE 43 -/* #define WLC_GET_WEP 42 */ /* no longer supported */ -/* #define WLC_SET_WEP 43 */ /* no longer supported */ -#define WLC_GET_KEY 44 -#define WLC_SET_KEY 45 -#define WLC_GET_REGULATORY 46 -#define WLC_SET_REGULATORY 47 -#define WLC_GET_PASSIVE_SCAN 48 -#define WLC_SET_PASSIVE_SCAN 49 -#define WLC_SCAN 50 -#define WLC_SCAN_RESULTS 51 -#define WLC_DISASSOC 52 -#define WLC_REASSOC 53 -#define WLC_GET_ROAM_TRIGGER 54 -#define WLC_SET_ROAM_TRIGGER 55 -#define WLC_GET_ROAM_DELTA 56 -#define WLC_SET_ROAM_DELTA 57 -#define WLC_GET_ROAM_SCAN_PERIOD 58 -#define WLC_SET_ROAM_SCAN_PERIOD 59 -#define WLC_EVM 60 /* diag */ -#define WLC_GET_TXANT 61 -#define WLC_SET_TXANT 62 -#define WLC_GET_ANTDIV 63 -#define WLC_SET_ANTDIV 64 -/* #define WLC_GET_TXPWR 65 */ /* no longer supported */ -/* #define WLC_SET_TXPWR 66 */ /* no longer supported */ -#define WLC_GET_CLOSED 67 -#define WLC_SET_CLOSED 68 -#define WLC_GET_MACLIST 69 -#define WLC_SET_MACLIST 70 -#define WLC_GET_RATESET 71 -#define WLC_SET_RATESET 72 -/* #define WLC_GET_LOCALE 73 */ /* no longer supported */ -#define WLC_LONGTRAIN 74 -#define WLC_GET_BCNPRD 75 -#define WLC_SET_BCNPRD 76 -#define WLC_GET_DTIMPRD 77 -#define WLC_SET_DTIMPRD 78 -#define WLC_GET_SROM 79 -#define WLC_SET_SROM 80 -#define WLC_GET_WEP_RESTRICT 81 -#define WLC_SET_WEP_RESTRICT 82 -#define WLC_GET_COUNTRY 83 -#define WLC_SET_COUNTRY 84 -#define WLC_GET_PM 85 -#define WLC_SET_PM 86 -#define WLC_GET_WAKE 87 -#define WLC_SET_WAKE 88 -/* #define WLC_GET_D11CNTS 89 */ /* -> "counters" iovar */ -#define WLC_GET_FORCELINK 90 /* ndis only */ -#define WLC_SET_FORCELINK 91 /* ndis only */ -#define WLC_FREQ_ACCURACY 92 /* diag */ -#define WLC_CARRIER_SUPPRESS 93 /* diag */ -#define WLC_GET_PHYREG 94 -#define WLC_SET_PHYREG 95 -#define WLC_GET_RADIOREG 96 -#define WLC_SET_RADIOREG 97 -#define WLC_GET_REVINFO 98 -#define WLC_GET_UCANTDIV 99 -#define WLC_SET_UCANTDIV 100 -#define WLC_R_REG 101 -#define WLC_W_REG 102 -/* #define WLC_DIAG_LOOPBACK 103 old tray diag */ -/* #define WLC_RESET_D11CNTS 104 */ /* -> "reset_d11cnts" iovar */ -#define WLC_GET_MACMODE 105 -#define WLC_SET_MACMODE 106 -#define WLC_GET_MONITOR 107 -#define WLC_SET_MONITOR 108 -#define WLC_GET_GMODE 109 -#define WLC_SET_GMODE 110 -#define WLC_GET_LEGACY_ERP 111 -#define WLC_SET_LEGACY_ERP 112 -#define WLC_GET_RX_ANT 113 -#define WLC_GET_CURR_RATESET 114 /* current rateset */ -#define WLC_GET_SCANSUPPRESS 115 -#define WLC_SET_SCANSUPPRESS 116 -#define WLC_GET_AP 117 -#define WLC_SET_AP 118 -#define WLC_GET_EAP_RESTRICT 119 -#define WLC_SET_EAP_RESTRICT 120 -#define WLC_SCB_AUTHORIZE 121 -#define WLC_SCB_DEAUTHORIZE 122 -#define WLC_GET_WDSLIST 123 -#define WLC_SET_WDSLIST 124 -#define WLC_GET_ATIM 125 -#define WLC_SET_ATIM 126 -#define WLC_GET_RSSI 127 -#define WLC_GET_PHYANTDIV 128 -#define WLC_SET_PHYANTDIV 129 -#define WLC_AP_RX_ONLY 130 -#define WLC_GET_TX_PATH_PWR 131 -#define WLC_SET_TX_PATH_PWR 132 -#define WLC_GET_WSEC 133 -#define WLC_SET_WSEC 134 -#define WLC_GET_PHY_NOISE 135 -#define WLC_GET_BSS_INFO 136 -#define WLC_GET_PKTCNTS 137 -#define WLC_GET_LAZYWDS 138 -#define WLC_SET_LAZYWDS 139 -#define WLC_GET_BANDLIST 140 -#define WLC_GET_BAND 141 -#define WLC_SET_BAND 142 -#define WLC_SCB_DEAUTHENTICATE 143 -#define WLC_GET_SHORTSLOT 144 -#define WLC_GET_SHORTSLOT_OVERRIDE 145 -#define WLC_SET_SHORTSLOT_OVERRIDE 146 -#define WLC_GET_SHORTSLOT_RESTRICT 147 -#define WLC_SET_SHORTSLOT_RESTRICT 148 -#define WLC_GET_GMODE_PROTECTION 149 -#define WLC_GET_GMODE_PROTECTION_OVERRIDE 150 -#define WLC_SET_GMODE_PROTECTION_OVERRIDE 151 -#define WLC_UPGRADE 152 -/* #define WLC_GET_MRATE 153 */ /* no longer supported */ -/* #define WLC_SET_MRATE 154 */ /* no longer supported */ -#define WLC_GET_IGNORE_BCNS 155 -#define WLC_SET_IGNORE_BCNS 156 -#define WLC_GET_SCB_TIMEOUT 157 -#define WLC_SET_SCB_TIMEOUT 158 -#define WLC_GET_ASSOCLIST 159 -#define WLC_GET_CLK 160 -#define WLC_SET_CLK 161 -#define WLC_GET_UP 162 -#define WLC_OUT 163 -#define WLC_GET_WPA_AUTH 164 -#define WLC_SET_WPA_AUTH 165 -#define WLC_GET_UCFLAGS 166 -#define WLC_SET_UCFLAGS 167 -#define WLC_GET_PWRIDX 168 -#define WLC_SET_PWRIDX 169 -#define WLC_GET_TSSI 170 -#define WLC_GET_SUP_RATESET_OVERRIDE 171 -#define WLC_SET_SUP_RATESET_OVERRIDE 172 -/* #define WLC_SET_FAST_TIMER 173 */ /* no longer supported */ -/* #define WLC_GET_FAST_TIMER 174 */ /* no longer supported */ -/* #define WLC_SET_SLOW_TIMER 175 */ /* no longer supported */ -/* #define WLC_GET_SLOW_TIMER 176 */ /* no longer supported */ -/* #define WLC_DUMP_PHYREGS 177 */ /* no longer supported */ -#define WLC_GET_PROTECTION_CONTROL 178 -#define WLC_SET_PROTECTION_CONTROL 179 -#define WLC_GET_PHYLIST 180 -#define WLC_ENCRYPT_STRENGTH 181 /* ndis only */ -#define WLC_DECRYPT_STATUS 182 /* ndis only */ -#define WLC_GET_KEY_SEQ 183 -#define WLC_GET_SCAN_CHANNEL_TIME 184 -#define WLC_SET_SCAN_CHANNEL_TIME 185 -#define WLC_GET_SCAN_UNASSOC_TIME 186 -#define WLC_SET_SCAN_UNASSOC_TIME 187 -#define WLC_GET_SCAN_HOME_TIME 188 -#define WLC_SET_SCAN_HOME_TIME 189 -#define WLC_GET_SCAN_NPROBES 190 -#define WLC_SET_SCAN_NPROBES 191 -#define WLC_GET_PRB_RESP_TIMEOUT 192 -#define WLC_SET_PRB_RESP_TIMEOUT 193 -#define WLC_GET_ATTEN 194 -#define WLC_SET_ATTEN 195 -#define WLC_GET_SHMEM 196 /* diag */ -#define WLC_SET_SHMEM 197 /* diag */ -/* #define WLC_GET_GMODE_PROTECTION_CTS 198 */ /* no longer supported */ -/* #define WLC_SET_GMODE_PROTECTION_CTS 199 */ /* no longer supported */ -#define WLC_SET_WSEC_TEST 200 -#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201 -#define WLC_TKIP_COUNTERMEASURES 202 -#define WLC_GET_PIOMODE 203 -#define WLC_SET_PIOMODE 204 -#define WLC_SET_ASSOC_PREFER 205 -#define WLC_GET_ASSOC_PREFER 206 -#define WLC_SET_ROAM_PREFER 207 -#define WLC_GET_ROAM_PREFER 208 -#define WLC_SET_LED 209 -#define WLC_GET_LED 210 -#define WLC_GET_INTERFERENCE_MODE 211 -#define WLC_SET_INTERFERENCE_MODE 212 -#define WLC_GET_CHANNEL_QA 213 -#define WLC_START_CHANNEL_QA 214 -#define WLC_GET_CHANNEL_SEL 215 -#define WLC_START_CHANNEL_SEL 216 -#define WLC_GET_VALID_CHANNELS 217 -#define WLC_GET_FAKEFRAG 218 -#define WLC_SET_FAKEFRAG 219 -#define WLC_GET_PWROUT_PERCENTAGE 220 -#define WLC_SET_PWROUT_PERCENTAGE 221 -#define WLC_SET_BAD_FRAME_PREEMPT 222 -#define WLC_GET_BAD_FRAME_PREEMPT 223 -#define WLC_SET_LEAP_LIST 224 -#define WLC_GET_LEAP_LIST 225 -#define WLC_GET_CWMIN 226 -#define WLC_SET_CWMIN 227 -#define WLC_GET_CWMAX 228 -#define WLC_SET_CWMAX 229 -#define WLC_GET_WET 230 -#define WLC_SET_WET 231 -#define WLC_GET_PUB 232 -/* #define WLC_SET_GLACIAL_TIMER 233 */ /* no longer supported */ -/* #define WLC_GET_GLACIAL_TIMER 234 */ /* no longer supported */ -#define WLC_GET_KEY_PRIMARY 235 -#define WLC_SET_KEY_PRIMARY 236 -/* #define WLC_DUMP_RADIOREGS 237 */ /* no longer supported */ -#define WLC_GET_ACI_ARGS 238 -#define WLC_SET_ACI_ARGS 239 -#define WLC_UNSET_CALLBACK 240 -#define WLC_SET_CALLBACK 241 -#define WLC_GET_RADAR 242 -#define WLC_SET_RADAR 243 -#define WLC_SET_SPECT_MANAGMENT 244 -#define WLC_GET_SPECT_MANAGMENT 245 -#define WLC_WDS_GET_REMOTE_HWADDR 246 /* handled in wl_linux.c/wl_vx.c */ -#define WLC_WDS_GET_WPA_SUP 247 -#define WLC_SET_CS_SCAN_TIMER 248 -#define WLC_GET_CS_SCAN_TIMER 249 -#define WLC_MEASURE_REQUEST 250 -#define WLC_INIT 251 -#define WLC_SEND_QUIET 252 -#define WLC_KEEPALIVE 253 -#define WLC_SEND_PWR_CONSTRAINT 254 -#define WLC_UPGRADE_STATUS 255 -#define WLC_CURRENT_PWR 256 -#define WLC_GET_SCAN_PASSIVE_TIME 257 -#define WLC_SET_SCAN_PASSIVE_TIME 258 -#define WLC_LEGACY_LINK_BEHAVIOR 259 -#define WLC_GET_CHANNELS_IN_COUNTRY 260 -#define WLC_GET_COUNTRY_LIST 261 -#define WLC_GET_VAR 262 /* get value of named variable */ -#define WLC_SET_VAR 263 /* set named variable to value */ -#define WLC_NVRAM_GET 264 /* deprecated */ -#define WLC_NVRAM_SET 265 -#define WLC_NVRAM_DUMP 266 -#define WLC_REBOOT 267 -#define WLC_SET_WSEC_PMK 268 -#define WLC_GET_AUTH_MODE 269 -#define WLC_SET_AUTH_MODE 270 -#define WLC_GET_WAKEENTRY 271 -#define WLC_SET_WAKEENTRY 272 -#define WLC_NDCONFIG_ITEM 273 /* currently handled in wl_oid.c */ -#define WLC_NVOTPW 274 -#define WLC_OTPW 275 -#define WLC_IOV_BLOCK_GET 276 -#define WLC_IOV_MODULES_GET 277 -#define WLC_SOFT_RESET 278 -#define WLC_GET_ALLOW_MODE 279 -#define WLC_SET_ALLOW_MODE 280 -#define WLC_GET_DESIRED_BSSID 281 -#define WLC_SET_DESIRED_BSSID 282 -#define WLC_DISASSOC_MYAP 283 -#define WLC_GET_NBANDS 284 /* for Dongle EXT_STA support */ -#define WLC_GET_BANDSTATES 285 /* for Dongle EXT_STA support */ -#define WLC_GET_WLC_BSS_INFO 286 /* for Dongle EXT_STA support */ -#define WLC_GET_ASSOC_INFO 287 /* for Dongle EXT_STA support */ -#define WLC_GET_OID_PHY 288 /* for Dongle EXT_STA support */ -#define WLC_SET_OID_PHY 289 /* for Dongle EXT_STA support */ -#define WLC_SET_ASSOC_TIME 290 /* for Dongle EXT_STA support */ -#define WLC_GET_DESIRED_SSID 291 /* for Dongle EXT_STA support */ -#define WLC_GET_CHANSPEC 292 /* for Dongle EXT_STA support */ -#define WLC_GET_ASSOC_STATE 293 /* for Dongle EXT_STA support */ -#define WLC_SET_PHY_STATE 294 /* for Dongle EXT_STA support */ -#define WLC_GET_SCAN_PENDING 295 /* for Dongle EXT_STA support */ -#define WLC_GET_SCANREQ_PENDING 296 /* for Dongle EXT_STA support */ -#define WLC_GET_PREV_ROAM_REASON 297 /* for Dongle EXT_STA support */ -#define WLC_SET_PREV_ROAM_REASON 298 /* for Dongle EXT_STA support */ -#define WLC_GET_BANDSTATES_PI 299 /* for Dongle EXT_STA support */ -#define WLC_GET_PHY_STATE 300 /* for Dongle EXT_STA support */ -#define WLC_GET_BSS_WPA_RSN 301 /* for Dongle EXT_STA support */ -#define WLC_GET_BSS_WPA2_RSN 302 /* for Dongle EXT_STA support */ -#define WLC_GET_BSS_BCN_TS 303 /* for Dongle EXT_STA support */ -#define WLC_GET_INT_DISASSOC 304 /* for Dongle EXT_STA support */ -#define WLC_SET_NUM_PEERS 305 /* for Dongle EXT_STA support */ -#define WLC_GET_NUM_BSS 306 /* for Dongle EXT_STA support */ -#define WLC_PHY_SAMPLE_COLLECT 307 /* phy sample collect mode */ -/* #define WLC_UM_PRIV 308 */ /* Deprecated: usermode driver */ -#define WLC_GET_CMD 309 -/* #define WLC_LAST 310 */ /* Never used - can be reused */ -#define WLC_SET_INTERFERENCE_OVERRIDE_MODE 311 /* set inter mode override */ -#define WLC_GET_INTERFERENCE_OVERRIDE_MODE 312 /* get inter mode override */ -/* #define WLC_GET_WAI_RESTRICT 313 */ /* for WAPI, deprecated use iovar instead */ -/* #define WLC_SET_WAI_RESTRICT 314 */ /* for WAPI, deprecated use iovar instead */ -/* #define WLC_SET_WAI_REKEY 315 */ /* for WAPI, deprecated use iovar instead */ -#define WLC_SET_NAT_CONFIG 316 /* for configuring NAT filter driver */ -#define WLC_GET_NAT_STATE 317 -#define WLC_LAST 318 - -#ifndef EPICTRL_COOKIE -#define EPICTRL_COOKIE 0xABADCEDE -#endif - -/* vx wlc ioctl's offset */ -#define CMN_IOCTL_OFF 0x180 - -/* - * custom OID support - * - * 0xFF - implementation specific OID - * 0xE4 - first byte of Broadcom PCI vendor ID - * 0x14 - second byte of Broadcom PCI vendor ID - * 0xXX - the custom OID number - */ - -/* begin 0x1f values beyond the start of the ET driver range. */ -#define WL_OID_BASE 0xFFE41420 - -/* NDIS overrides */ -#define OID_WL_GETINSTANCE (WL_OID_BASE + WLC_GET_INSTANCE) -#define OID_WL_GET_FORCELINK (WL_OID_BASE + WLC_GET_FORCELINK) -#define OID_WL_SET_FORCELINK (WL_OID_BASE + WLC_SET_FORCELINK) -#define OID_WL_ENCRYPT_STRENGTH (WL_OID_BASE + WLC_ENCRYPT_STRENGTH) -#define OID_WL_DECRYPT_STATUS (WL_OID_BASE + WLC_DECRYPT_STATUS) -#define OID_LEGACY_LINK_BEHAVIOR (WL_OID_BASE + WLC_LEGACY_LINK_BEHAVIOR) -#define OID_WL_NDCONFIG_ITEM (WL_OID_BASE + WLC_NDCONFIG_ITEM) - -/* EXT_STA Dongle suuport */ -#define OID_STA_CHANSPEC (WL_OID_BASE + WLC_GET_CHANSPEC) -#define OID_STA_NBANDS (WL_OID_BASE + WLC_GET_NBANDS) -#define OID_STA_GET_PHY (WL_OID_BASE + WLC_GET_OID_PHY) -#define OID_STA_SET_PHY (WL_OID_BASE + WLC_SET_OID_PHY) -#define OID_STA_ASSOC_TIME (WL_OID_BASE + WLC_SET_ASSOC_TIME) -#define OID_STA_DESIRED_SSID (WL_OID_BASE + WLC_GET_DESIRED_SSID) -#define OID_STA_SET_PHY_STATE (WL_OID_BASE + WLC_SET_PHY_STATE) -#define OID_STA_SCAN_PENDING (WL_OID_BASE + WLC_GET_SCAN_PENDING) -#define OID_STA_SCANREQ_PENDING (WL_OID_BASE + WLC_GET_SCANREQ_PENDING) -#define OID_STA_GET_ROAM_REASON (WL_OID_BASE + WLC_GET_PREV_ROAM_REASON) -#define OID_STA_SET_ROAM_REASON (WL_OID_BASE + WLC_SET_PREV_ROAM_REASON) -#define OID_STA_GET_PHY_STATE (WL_OID_BASE + WLC_GET_PHY_STATE) -#define OID_STA_INT_DISASSOC (WL_OID_BASE + WLC_GET_INT_DISASSOC) -#define OID_STA_SET_NUM_PEERS (WL_OID_BASE + WLC_SET_NUM_PEERS) -#define OID_STA_GET_NUM_BSS (WL_OID_BASE + WLC_GET_NUM_BSS) - -/* NAT filter driver support */ -#define OID_NAT_SET_CONFIG (WL_OID_BASE + WLC_SET_NAT_CONFIG) -#define OID_NAT_GET_STATE (WL_OID_BASE + WLC_GET_NAT_STATE) - -#define WL_DECRYPT_STATUS_SUCCESS 1 -#define WL_DECRYPT_STATUS_FAILURE 2 -#define WL_DECRYPT_STATUS_UNKNOWN 3 - -/* allows user-mode app to poll the status of USB image upgrade */ -#define WLC_UPGRADE_SUCCESS 0 -#define WLC_UPGRADE_PENDING 1 - -#ifdef CONFIG_USBRNDIS_RETAIL -/* struct passed in for WLC_NDCONFIG_ITEM */ -typedef struct { - char *name; - void *param; -} ndconfig_item_t; -#endif - - -/* WLC_GET_AUTH, WLC_SET_AUTH values */ -#define WL_AUTH_OPEN_SYSTEM 0 /* d11 open authentication */ -#define WL_AUTH_SHARED_KEY 1 /* d11 shared authentication */ -#ifdef BCM4330_CHIP -#define WL_AUTH_OPEN_SHARED 2 /* try open, then shared if open failed w/rc 13 */ -#else -/* BCM4334(Phoenex branch) value changed to 3 */ -#define WL_AUTH_OPEN_SHARED 3 /* try open, then shared if open failed w/rc 13 */ -#endif - -/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ -#define WL_RADIO_SW_DISABLE (1<<0) -#define WL_RADIO_HW_DISABLE (1<<1) -#define WL_RADIO_MPC_DISABLE (1<<2) -#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ - -#define WL_SPURAVOID_OFF 0 -#define WL_SPURAVOID_ON1 1 -#define WL_SPURAVOID_ON2 2 - -/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ -#define WL_TXPWR_OVERRIDE (1U<<31) -#define WL_TXPWR_NEG (1U<<30) - -#define WL_PHY_PAVARS_LEN 32 /* Phy type, Band range, chain, a1[0], b0[0], b1[0] ... */ - -#define WL_PHY_PAVAR_VER 1 /* pavars version */ - -typedef struct wl_po { - uint16 phy_type; /* Phy type */ - uint16 band; - uint16 cckpo; - uint32 ofdmpo; - uint16 mcspo[8]; -} wl_po_t; - -/* a large TX Power as an init value to factor out of MIN() calculations, - * keep low enough to fit in an int8, units are .25 dBm - */ -#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ - -/* "diag" iovar argument and error code */ -#define WL_DIAG_INTERRUPT 1 /* d11 loopback interrupt test */ -#define WL_DIAG_LOOPBACK 2 /* d11 loopback data test */ -#define WL_DIAG_MEMORY 3 /* d11 memory test */ -#define WL_DIAG_LED 4 /* LED test */ -#define WL_DIAG_REG 5 /* d11/phy register test */ -#define WL_DIAG_SROM 6 /* srom read/crc test */ -#define WL_DIAG_DMA 7 /* DMA test */ -#define WL_DIAG_LOOPBACK_EXT 8 /* enhenced d11 loopback data test */ - -#define WL_DIAGERR_SUCCESS 0 -#define WL_DIAGERR_FAIL_TO_RUN 1 /* unable to run requested diag */ -#define WL_DIAGERR_NOT_SUPPORTED 2 /* diag requested is not supported */ -#define WL_DIAGERR_INTERRUPT_FAIL 3 /* loopback interrupt test failed */ -#define WL_DIAGERR_LOOPBACK_FAIL 4 /* loopback data test failed */ -#define WL_DIAGERR_SROM_FAIL 5 /* srom read failed */ -#define WL_DIAGERR_SROM_BADCRC 6 /* srom crc failed */ -#define WL_DIAGERR_REG_FAIL 7 /* d11/phy register test failed */ -#define WL_DIAGERR_MEMORY_FAIL 8 /* d11 memory test failed */ -#define WL_DIAGERR_NOMEM 9 /* diag test failed due to no memory */ -#define WL_DIAGERR_DMA_FAIL 10 /* DMA test failed */ - -#define WL_DIAGERR_MEMORY_TIMEOUT 11 /* d11 memory test didn't finish in time */ -#define WL_DIAGERR_MEMORY_BADPATTERN 12 /* d11 memory test result in bad pattern */ - -/* band types */ -#define WLC_BAND_AUTO 0 /* auto-select */ -#define WLC_BAND_5G 1 /* 5 Ghz */ -#define WLC_BAND_2G 2 /* 2.4 Ghz */ -#define WLC_BAND_ALL 3 /* all bands */ - -/* band range returned by band_range iovar */ -#define WL_CHAN_FREQ_RANGE_2G 0 -#define WL_CHAN_FREQ_RANGE_5GL 1 -#define WL_CHAN_FREQ_RANGE_5GM 2 -#define WL_CHAN_FREQ_RANGE_5GH 3 - -#define WL_CHAN_FREQ_RANGE_5G_BAND0 1 -#define WL_CHAN_FREQ_RANGE_5G_BAND1 2 -#define WL_CHAN_FREQ_RANGE_5G_BAND2 3 -#define WL_CHAN_FREQ_RANGE_5G_BAND3 4 - -#define WL_CHAN_FREQ_RANGE_5G_4BAND 5 - -/* phy types (returned by WLC_GET_PHYTPE) */ -#define WLC_PHY_TYPE_A 0 -#define WLC_PHY_TYPE_B 1 -#define WLC_PHY_TYPE_G 2 -#define WLC_PHY_TYPE_N 4 -#define WLC_PHY_TYPE_LP 5 -#define WLC_PHY_TYPE_SSN 6 -#define WLC_PHY_TYPE_HT 7 -#define WLC_PHY_TYPE_LCN 8 -#define WLC_PHY_TYPE_LCN40 10 -#define WLC_PHY_TYPE_NULL 0xf - -/* MAC list modes */ -#define WLC_MACMODE_DISABLED 0 /* MAC list disabled */ -#define WLC_MACMODE_DENY 1 /* Deny specified (i.e. allow unspecified) */ -#define WLC_MACMODE_ALLOW 2 /* Allow specified (i.e. deny unspecified) */ - -/* - * 54g modes (basic bits may still be overridden) - * - * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 - * Preamble: Long - * Shortslot: Off - * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: Auto - * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 - * Extended Rateset: 6b, 9, 12b, 48 - * Preamble: Short required - * Shortslot: Auto - * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: On - * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 - * Preamble: Short required - * Shortslot: On and required - * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b - * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 - * Preamble: Long - * Shortslot: Auto - */ -#define GMODE_LEGACY_B 0 -#define GMODE_AUTO 1 -#define GMODE_ONLY 2 -#define GMODE_B_DEFERRED 3 -#define GMODE_PERFORMANCE 4 -#define GMODE_LRS 5 -#define GMODE_MAX 6 - -/* values for PLCPHdr_override */ -#define WLC_PLCP_AUTO -1 -#define WLC_PLCP_SHORT 0 -#define WLC_PLCP_LONG 1 - -/* values for g_protection_override and n_protection_override */ -#define WLC_PROTECTION_AUTO -1 -#define WLC_PROTECTION_OFF 0 -#define WLC_PROTECTION_ON 1 -#define WLC_PROTECTION_MMHDR_ONLY 2 -#define WLC_PROTECTION_CTS_ONLY 3 - -/* values for g_protection_control and n_protection_control */ -#define WLC_PROTECTION_CTL_OFF 0 -#define WLC_PROTECTION_CTL_LOCAL 1 -#define WLC_PROTECTION_CTL_OVERLAP 2 - -/* values for n_protection */ -#define WLC_N_PROTECTION_OFF 0 -#define WLC_N_PROTECTION_OPTIONAL 1 -#define WLC_N_PROTECTION_20IN40 2 -#define WLC_N_PROTECTION_MIXEDMODE 3 - -/* values for n_preamble_type */ -#define WLC_N_PREAMBLE_MIXEDMODE 0 -#define WLC_N_PREAMBLE_GF 1 -#define WLC_N_PREAMBLE_GF_BRCM 2 - -/* values for band specific 40MHz capabilities */ -#define WLC_N_BW_20ALL 0 -#define WLC_N_BW_40ALL 1 -#define WLC_N_BW_20IN2G_40IN5G 2 - -/* values to force tx/rx chain */ -#define WLC_N_TXRX_CHAIN0 0 -#define WLC_N_TXRX_CHAIN1 1 - -/* bitflags for SGI support (sgi_rx iovar) */ -#define WLC_N_SGI_20 0x01 -#define WLC_N_SGI_40 0x02 - -/* when sgi_tx==WLC_SGI_ALL, bypass rate selection, enable sgi for all mcs */ -#define WLC_SGI_ALL 0x02 - -/* Values for PM */ -#define PM_OFF 0 -#define PM_MAX 1 -#define PM_FAST 2 -#define PM_FORCE_OFF 3 /* use this bit to force PM off even bt is active */ - -#define LISTEN_INTERVAL 10 -/* interference mitigation options */ -#define INTERFERE_OVRRIDE_OFF -1 /* interference override off */ -#define INTERFERE_NONE 0 /* off */ -#define NON_WLAN 1 /* foreign/non 802.11 interference, no auto detect */ -#define WLAN_MANUAL 2 /* ACI: no auto detection */ -#define WLAN_AUTO 3 /* ACI: auto detect */ -#define WLAN_AUTO_W_NOISE 4 /* ACI: auto - detect and non 802.11 interference */ -#define AUTO_ACTIVE (1 << 7) /* Auto is currently active */ - -/* AP environment */ -#define AP_ENV_DETECT_NOT_USED 0 /* We aren't using AP environment detection */ -#define AP_ENV_DENSE 1 /* "Corporate" or other AP dense environment */ -#define AP_ENV_SPARSE 2 /* "Home" or other sparse environment */ -#define AP_ENV_INDETERMINATE 3 /* AP environment hasn't been identified */ - -typedef struct wl_aci_args { - int enter_aci_thresh; /* Trigger level to start detecting ACI */ - int exit_aci_thresh; /* Trigger level to exit ACI mode */ - int usec_spin; /* microsecs to delay between rssi samples */ - int glitch_delay; /* interval between ACI scans when glitch count is consistently high */ - uint16 nphy_adcpwr_enter_thresh; /* ADC power to enter ACI mitigation mode */ - uint16 nphy_adcpwr_exit_thresh; /* ADC power to exit ACI mitigation mode */ - uint16 nphy_repeat_ctr; /* Number of tries per channel to compute power */ - uint16 nphy_num_samples; /* Number of samples to compute power on one channel */ - uint16 nphy_undetect_window_sz; /* num of undetects to exit ACI Mitigation mode */ - uint16 nphy_b_energy_lo_aci; /* low ACI power energy threshold for bphy */ - uint16 nphy_b_energy_md_aci; /* mid ACI power energy threshold for bphy */ - uint16 nphy_b_energy_hi_aci; /* high ACI power energy threshold for bphy */ - uint16 nphy_noise_noassoc_glitch_th_up; /* wl interference 4 */ - uint16 nphy_noise_noassoc_glitch_th_dn; - uint16 nphy_noise_assoc_glitch_th_up; - uint16 nphy_noise_assoc_glitch_th_dn; - uint16 nphy_noise_assoc_aci_glitch_th_up; - uint16 nphy_noise_assoc_aci_glitch_th_dn; - uint16 nphy_noise_assoc_enter_th; - uint16 nphy_noise_noassoc_enter_th; - uint16 nphy_noise_assoc_rx_glitch_badplcp_enter_th; - uint16 nphy_noise_noassoc_crsidx_incr; - uint16 nphy_noise_assoc_crsidx_incr; - uint16 nphy_noise_crsidx_decr; -} wl_aci_args_t; - -#define TRIGGER_NOW 0 -#define TRIGGER_CRS 0x01 -#define TRIGGER_CRSDEASSERT 0x02 -#define TRIGGER_GOODFCS 0x04 -#define TRIGGER_BADFCS 0x08 -#define TRIGGER_BADPLCP 0x10 -#define TRIGGER_CRSGLITCH 0x20 -#define WL_ACI_ARGS_LEGACY_LENGTH 16 /* bytes of pre NPHY aci args */ -#define WL_SAMPLECOLLECT_T_VERSION 2 /* version of wl_samplecollect_args_t struct */ -typedef struct wl_samplecollect_args { - /* version 0 fields */ - uint8 coll_us; - int cores; - /* add'l version 1 fields */ - uint16 version; /* see definition of WL_SAMPLECOLLECT_T_VERSION */ - uint16 length; /* length of entire structure */ - int8 trigger; - uint16 timeout; - uint16 mode; - uint32 pre_dur; - uint32 post_dur; - uint8 gpio_sel; - bool downsamp; - bool be_deaf; - bool agc; /* loop from init gain and going down */ - bool filter; /* override high pass corners to lowest */ - /* add'l version 2 fields */ - uint8 trigger_state; - uint8 module_sel1; - uint8 module_sel2; - uint16 nsamps; -} wl_samplecollect_args_t; - -#define WL_SAMPLEDATA_HEADER_TYPE 1 -#define WL_SAMPLEDATA_HEADER_SIZE 80 /* sample collect header size (bytes) */ -#define WL_SAMPLEDATA_TYPE 2 -#define WL_SAMPLEDATA_SEQ 0xff /* sequence # */ -#define WL_SAMPLEDATA_MORE_DATA 0x100 /* more data mask */ -#define WL_SAMPLEDATA_T_VERSION 1 /* version of wl_samplecollect_args_t struct */ -/* version for unpacked sample data, int16 {(I,Q),Core(0..N)} */ -#define WL_SAMPLEDATA_T_VERSION_SPEC_AN 2 - -typedef struct wl_sampledata { - uint16 version; /* structure version */ - uint16 size; /* size of structure */ - uint16 tag; /* Header/Data */ - uint16 length; /* data length */ - uint32 flag; /* bit def */ -} wl_sampledata_t; - -#ifndef LINUX_POSTMOGRIFY_REMOVAL -/* wl_radar_args_t */ -typedef struct { - int npulses; /* required number of pulses at n * t_int */ - int ncontig; /* required number of pulses at t_int */ - int min_pw; /* minimum pulse width (20 MHz clocks) */ - int max_pw; /* maximum pulse width (20 MHz clocks) */ - uint16 thresh0; /* Radar detection, thresh 0 */ - uint16 thresh1; /* Radar detection, thresh 1 */ - uint16 blank; /* Radar detection, blank control */ - uint16 fmdemodcfg; /* Radar detection, fmdemod config */ - int npulses_lp; /* Radar detection, minimum long pulses */ - int min_pw_lp; /* Minimum pulsewidth for long pulses */ - int max_pw_lp; /* Maximum pulsewidth for long pulses */ - int min_fm_lp; /* Minimum fm for long pulses */ - int max_span_lp; /* Maximum deltat for long pulses */ - int min_deltat; /* Minimum spacing between pulses */ - int max_deltat; /* Maximum spacing between pulses */ - uint16 autocorr; /* Radar detection, autocorr on or off */ - uint16 st_level_time; /* Radar detection, start_timing level */ - uint16 t2_min; /* minimum clocks needed to remain in state 2 */ - uint32 version; /* version */ - uint32 fra_pulse_err; /* sample error margin for detecting French radar pulsed */ - int npulses_fra; /* Radar detection, minimum French pulses set */ - int npulses_stg2; /* Radar detection, minimum staggered-2 pulses set */ - int npulses_stg3; /* Radar detection, minimum staggered-3 pulses set */ - uint16 percal_mask; /* defines which period cal is masked from radar detection */ - int quant; /* quantization resolution to pulse positions */ - uint32 min_burst_intv_lp; /* minimum burst to burst interval for bin3 radar */ - uint32 max_burst_intv_lp; /* maximum burst to burst interval for bin3 radar */ - int nskip_rst_lp; /* number of skipped pulses before resetting lp buffer */ - int max_pw_tol; /* maximum tollerance allowed in detected pulse width for radar detection */ - uint16 feature_mask; /* 16-bit mask to specify enabled features */ -} wl_radar_args_t; - -#define WL_RADAR_ARGS_VERSION 2 - -typedef struct { - uint32 version; /* version */ - uint16 thresh0_20_lo; /* Radar detection, thresh 0 (range 5250-5350MHz) for BW 20MHz */ - uint16 thresh1_20_lo; /* Radar detection, thresh 1 (range 5250-5350MHz) for BW 20MHz */ - uint16 thresh0_40_lo; /* Radar detection, thresh 0 (range 5250-5350MHz) for BW 40MHz */ - uint16 thresh1_40_lo; /* Radar detection, thresh 1 (range 5250-5350MHz) for BW 40MHz */ - uint16 thresh0_20_hi; /* Radar detection, thresh 0 (range 5470-5725MHz) for BW 20MHz */ - uint16 thresh1_20_hi; /* Radar detection, thresh 1 (range 5470-5725MHz) for BW 20MHz */ - uint16 thresh0_40_hi; /* Radar detection, thresh 0 (range 5470-5725MHz) for BW 40MHz */ - uint16 thresh1_40_hi; /* Radar detection, thresh 1 (range 5470-5725MHz) for BW 40MHz */ -} wl_radar_thr_t; - -#define WL_RADAR_THR_VERSION 1 -#define WL_THRESHOLD_LO_BAND 70 /* range from 5250MHz - 5350MHz */ - -/* radar iovar SET defines */ -#define WL_RADAR_DETECTOR_OFF 0 /* radar detector off */ -#define WL_RADAR_DETECTOR_ON 1 /* radar detector on */ -#define WL_RADAR_SIMULATED 2 /* force radar detector to declare - * detection once - */ -#define WL_RSSI_ANT_VERSION 1 /* current version of wl_rssi_ant_t */ -#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ -#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ -#define WL_ANT_IDX_1 0 /* antenna index 1 */ -#define WL_ANT_IDX_2 1 /* antenna index 2 */ - -#ifndef WL_RSSI_ANT_MAX -#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ -#elif WL_RSSI_ANT_MAX != 4 -#error "WL_RSSI_ANT_MAX does not match" -#endif - -/* RSSI per antenna */ -typedef struct { - uint32 version; /* version field */ - uint32 count; /* number of valid antenna rssi */ - int8 rssi_ant[WL_RSSI_ANT_MAX]; /* rssi per antenna */ -} wl_rssi_ant_t; - -/* dfs_status iovar-related defines */ - -/* cac - channel availability check, - * ism - in-service monitoring - * csa - channel switching announcement - */ - -/* cac state values */ -#define WL_DFS_CACSTATE_IDLE 0 /* state for operating in non-radar channel */ -#define WL_DFS_CACSTATE_PREISM_CAC 1 /* CAC in progress */ -#define WL_DFS_CACSTATE_ISM 2 /* ISM in progress */ -#define WL_DFS_CACSTATE_CSA 3 /* csa */ -#define WL_DFS_CACSTATE_POSTISM_CAC 4 /* ISM CAC */ -#define WL_DFS_CACSTATE_PREISM_OOC 5 /* PREISM OOC */ -#define WL_DFS_CACSTATE_POSTISM_OOC 6 /* POSTISM OOC */ -#define WL_DFS_CACSTATES 7 /* this many states exist */ - -/* data structure used in 'dfs_status' wl interface, which is used to query dfs status */ -typedef struct { - uint state; /* noted by WL_DFS_CACSTATE_XX. */ - uint duration; /* time spent in ms in state. */ - /* as dfs enters ISM state, it removes the operational channel from quiet channel - * list and notes the channel in channel_cleared. set to 0 if no channel is cleared - */ - chanspec_t chanspec_cleared; - /* chanspec cleared used to be a uint, add another to uint16 to maintain size */ - uint16 pad; -} wl_dfs_status_t; - -#define NUM_PWRCTRL_RATES 12 - -typedef struct { - uint8 txpwr_band_max[NUM_PWRCTRL_RATES]; /* User set target */ - uint8 txpwr_limit[NUM_PWRCTRL_RATES]; /* reg and local power limit */ - uint8 txpwr_local_max; /* local max according to the AP */ - uint8 txpwr_local_constraint; /* local constraint according to the AP */ - uint8 txpwr_chan_reg_max; /* Regulatory max for this channel */ - uint8 txpwr_target[2][NUM_PWRCTRL_RATES]; /* Latest target for 2.4 and 5 Ghz */ - uint8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - uint8 txpwr_opo[NUM_PWRCTRL_RATES]; /* On G phy, OFDM power offset */ - uint8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /* Max CCK power for this band (SROM) */ - uint8 txpwr_bphy_ofdm_max; /* Max OFDM power for this band (SROM) */ - uint8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /* Max power for A band (SROM) */ - int8 txpwr_antgain[2]; /* Ant gain for each band - from SROM */ - uint8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_power_legacy_t; - -#define WL_TX_POWER_RATES_LEGACY 45 -#define WL_TX_POWER_MCS20_FIRST 12 -#define WL_TX_POWER_MCS20_NUM 16 -#define WL_TX_POWER_MCS40_FIRST 28 -#define WL_TX_POWER_MCS40_NUM 17 - -typedef struct { - uint32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - uint8 local_max; /* local max according to the AP */ - uint8 local_constraint; /* local constraint according to the AP */ - int8 antgain[2]; /* Ant gain for each band - from SROM */ - uint8 rf_cores; /* count of RF Cores being reported */ - uint8 est_Pout[4]; /* Latest tx power out estimate per RF - * chain without adjustment - */ - uint8 est_Pout_cck; /* Latest CCK tx power out estimate */ - uint8 user_limit[WL_TX_POWER_RATES_LEGACY]; /* User limit */ - uint8 reg_limit[WL_TX_POWER_RATES_LEGACY]; /* Regulatory power limit */ - uint8 board_limit[WL_TX_POWER_RATES_LEGACY]; /* Max power board can support (SROM) */ - uint8 target[WL_TX_POWER_RATES_LEGACY]; /* Latest target power */ -} tx_power_legacy2_t; - -/* TX Power index defines */ -#define WL_NUM_RATES_CCK 4 /* 1, 2, 5.5, 11 Mbps */ -#define WL_NUM_RATES_OFDM 8 /* 6, 9, 12, 18, 24, 36, 48, 54 Mbps SISO/CDD */ -#define WL_NUM_RATES_MCS_1STREAM 8 /* MCS 0-7 1-stream rates - SISO/CDD/STBC/MCS */ -#define WL_NUM_RATES_EXTRA_VHT 2 /* Additional VHT 11AC rates */ -#define WL_NUM_RATES_VHT 10 -#define WL_NUM_RATES_MCS32 1 - -#define WLC_NUM_RATES_CCK WL_NUM_RATES_CCK -#define WLC_NUM_RATES_OFDM WL_NUM_RATES_OFDM -#define WLC_NUM_RATES_MCS_1_STREAM WL_NUM_RATES_MCS_1STREAM -#define WLC_NUM_RATES_MCS_2_STREAM WL_NUM_RATES_MCS_1STREAM -#define WLC_NUM_RATES_MCS32 WL_NUM_RATES_MCS32 -#define WL_TX_POWER_CCK_NUM WL_NUM_RATES_CCK -#define WL_TX_POWER_OFDM_NUM WL_NUM_RATES_OFDM -#define WL_TX_POWER_MCS_1_STREAM_NUM WL_NUM_RATES_MCS_1STREAM -#define WL_TX_POWER_MCS_2_STREAM_NUM WL_NUM_RATES_MCS_1STREAM -#define WL_TX_POWER_MCS_32_NUM WL_NUM_RATES_MCS32 - -#define WL_NUM_2x2_ELEMENTS 4 -#define WL_NUM_3x3_ELEMENTS 6 - -typedef struct txppr { - /* start of 20MHz tx power limits */ - uint8 b20_1x1dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20_1x1ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM transmission */ - uint8 b20_1x1mcs0[WL_NUM_RATES_MCS_1STREAM]; /* SISO MCS 0-7 */ - - uint8 b20_1x2dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20_1x2cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b20_1x2cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* CDD MCS 0-7 */ - uint8 b20_2x2stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b20_2x2sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* MCS 8-15 */ - - uint8 b20_1x3dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20_1x3cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b20_1x3cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* 1 Nsts to 3 Tx Chain */ - uint8 b20_2x3stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b20_2x3sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* 2 Nsts to 3 Tx Chain */ - uint8 b20_3x3sdm_mcs16[WL_NUM_RATES_MCS_1STREAM]; /* 3 Nsts to 3 Tx Chain */ - - uint8 b20_1x1vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1 */ - uint8 b20_1x2cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD1 */ - uint8 b20_2x2stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC */ - uint8 b20_2x2sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2 */ - uint8 b20_1x3cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD2 */ - uint8 b20_2x3stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC_SPEXP1 */ - uint8 b20_2x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2_SPEXP1 */ - uint8 b20_3x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS3 */ - - /* start of 40MHz tx power limits */ - uint8 b40_dummy1x1dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b40_1x1ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM transmission */ - uint8 b40_1x1mcs0[WL_NUM_RATES_MCS_1STREAM]; /* SISO MCS 0-7 */ - - uint8 b40_dummy1x2dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b40_1x2cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b40_1x2cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* CDD MCS 0-7 */ - uint8 b40_2x2stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b40_2x2sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* MCS 8-15 */ - - uint8 b40_dummy1x3dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b40_1x3cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b40_1x3cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* 1 Nsts to 3 Tx Chain */ - uint8 b40_2x3stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b40_2x3sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* 2 Nsts to 3 Tx Chain */ - uint8 b40_3x3sdm_mcs16[WL_NUM_RATES_MCS_1STREAM]; /* 3 Nsts to 3 Tx Chain */ - - uint8 b40_1x1vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1 */ - uint8 b40_1x2cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD1 */ - uint8 b40_2x2stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC */ - uint8 b40_2x2sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2 */ - uint8 b40_1x3cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD2 */ - uint8 b40_2x3stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC_SPEXP1 */ - uint8 b40_2x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2_SPEXP1 */ - uint8 b40_3x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS3 */ - - /* start of 20in40MHz tx power limits */ - uint8 b20in40_1x1dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20in40_1x1ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM transmission */ - uint8 b20in40_1x1mcs0[WL_NUM_RATES_MCS_1STREAM]; /* SISO MCS 0-7 */ - - uint8 b20in40_1x2dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20in40_1x2cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b20in40_1x2cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* CDD MCS 0-7 */ - uint8 b20in40_2x2stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b20in40_2x2sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* MCS 8-15 */ - - uint8 b20in40_1x3dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20in40_1x3cdd_ofdm[WL_NUM_RATES_OFDM]; /* 20 in 40 MHz Legacy OFDM CDD */ - uint8 b20in40_1x3cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* 1 Nsts to 3 Tx Chain */ - uint8 b20in40_2x3stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b20in40_2x3sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* 2 Nsts to 3 Tx Chain */ - uint8 b20in40_3x3sdm_mcs16[WL_NUM_RATES_MCS_1STREAM]; /* 3 Nsts to 3 Tx Chain */ - - uint8 b20in40_1x1vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1 */ - uint8 b20in40_1x2cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD1 */ - uint8 b20in40_2x2stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC */ - uint8 b20in40_2x2sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2 */ - uint8 b20in40_1x3cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD2 */ - uint8 b20in40_2x3stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC_SPEXP1 */ - uint8 b20in40_2x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2_SPEXP1 */ - uint8 b20in40_3x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS3 */ - - /* start of 80MHz tx power limits */ - uint8 b80_dummy1x1dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b80_1x1ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM transmission */ - uint8 b80_1x1mcs0[WL_NUM_RATES_MCS_1STREAM]; /* SISO MCS 0-7 */ - - uint8 b80_dummy1x2dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b80_1x2cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b80_1x2cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* CDD MCS 0-7 */ - uint8 b80_2x2stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b80_2x2sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* MCS 8-15 */ - - uint8 b80_dummy1x3dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b80_1x3cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b80_1x3cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* 1 Nsts to 3 Tx Chain */ - uint8 b80_2x3stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b80_2x3sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* 2 Nsts to 3 Tx Chain */ - uint8 b80_3x3sdm_mcs16[WL_NUM_RATES_MCS_1STREAM]; /* 3 Nsts to 3 Tx Chain */ - - uint8 b80_1x1vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1 */ - uint8 b80_1x2cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD1 */ - uint8 b80_2x2stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC */ - uint8 b80_2x2sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2 */ - uint8 b80_1x3cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD2 */ - uint8 b80_2x3stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC_SPEXP1 */ - uint8 b80_2x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2_SPEXP1 */ - uint8 b80_3x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS3 */ - - /* start of 20in80MHz tx power limits */ - uint8 b20in80_1x1dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20in80_1x1ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM transmission */ - uint8 b20in80_1x1mcs0[WL_NUM_RATES_MCS_1STREAM]; /* SISO MCS 0-7 */ - - uint8 b20in80_1x2dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20in80_1x2cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b20in80_1x2cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* CDD MCS 0-7 */ - uint8 b20in80_2x2stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b20in80_2x2sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* MCS 8-15 */ - - uint8 b20in80_1x3dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b20in80_1x3cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b20in80_1x3cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* 1 Nsts to 3 Tx Chain */ - uint8 b20in80_2x3stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b20in80_2x3sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* 2 Nsts to 3 Tx Chain */ - uint8 b20in80_3x3sdm_mcs16[WL_NUM_RATES_MCS_1STREAM]; /* 3 Nsts to 3 Tx Chain */ - - uint8 b20in80_1x1vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1 */ - uint8 b20in80_1x2cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD1 */ - uint8 b20in80_2x2stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC */ - uint8 b20in80_2x2sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2 */ - uint8 b20in80_1x3cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD2 */ - uint8 b20in80_2x3stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC_SPEXP1 */ - uint8 b20in80_2x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2_SPEXP1 */ - uint8 b20in80_3x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS3 */ - - /* start of 40in80MHz tx power limits */ - uint8 b40in80_dummy1x1dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b40in80_1x1ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM transmission */ - uint8 b40in80_1x1mcs0[WL_NUM_RATES_MCS_1STREAM]; /* SISO MCS 0-7 */ - - uint8 b40in80_dummy1x2dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b40in80_1x2cdd_ofdm[WL_NUM_RATES_OFDM]; /* Legacy OFDM CDD transmission */ - uint8 b40in80_1x2cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* CDD MCS 0-7 */ - uint8 b40in80_2x2stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b40in80_2x2sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* MCS 8-15 */ - - uint8 b40in80_dummy1x3dsss[WL_NUM_RATES_CCK]; /* Legacy CCK/DSSS */ - uint8 b40in80_1x3cdd_ofdm[WL_NUM_RATES_OFDM]; /* MHz Legacy OFDM CDD */ - uint8 b40in80_1x3cdd_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* 1 Nsts to 3 Tx Chain */ - uint8 b40in80_2x3stbc_mcs0[WL_NUM_RATES_MCS_1STREAM]; /* STBC MCS 0-7 */ - uint8 b40in80_2x3sdm_mcs8[WL_NUM_RATES_MCS_1STREAM]; /* 2 Nsts to 3 Tx Chain */ - uint8 b40in80_3x3sdm_mcs16[WL_NUM_RATES_MCS_1STREAM]; /* 3 Nsts to 3 Tx Chain */ - - uint8 b40in80_1x1vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1 */ - uint8 b40in80_1x2cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD1 */ - uint8 b40in80_2x2stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC */ - uint8 b40in80_2x2sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2 */ - uint8 b40in80_1x3cdd_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_CDD2 */ - uint8 b40in80_2x3stbc_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS1_STBC_SPEXP1 */ - uint8 b40in80_2x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS2_SPEXP1 */ - uint8 b40in80_3x3sdm_vht[WL_NUM_RATES_EXTRA_VHT]; /* VHT8_9SS3 */ - - uint8 mcs32; /* C_CHECK - THIS NEEDS TO BE REMOVED THROUGHOUT THE CODE */ -} txppr_t; - -/* 20MHz */ -#define WL_TX_POWER_CCK_FIRST OFFSETOF(txppr_t, b20_1x1dsss) -#define WL_TX_POWER_OFDM20_FIRST OFFSETOF(txppr_t, b20_1x1ofdm) -#define WL_TX_POWER_MCS20_SISO_FIRST OFFSETOF(txppr_t, b20_1x1mcs0) -#define WL_TX_POWER_20_S1x1_FIRST OFFSETOF(txppr_t, b20_1x1mcs0) - -#define WL_TX_POWER_CCK_CDD_S1x2_FIRST OFFSETOF(txppr_t, b20_1x2dsss) -#define WL_TX_POWER_OFDM20_CDD_FIRST OFFSETOF(txppr_t, b20_1x2cdd_ofdm) -#define WL_TX_POWER_MCS20_CDD_FIRST OFFSETOF(txppr_t, b20_1x2cdd_mcs0) -#define WL_TX_POWER_20_S1x2_FIRST OFFSETOF(txppr_t, b20_1x2cdd_mcs0) -#define WL_TX_POWER_MCS20_STBC_FIRST OFFSETOF(txppr_t, b20_2x2stbc_mcs0) -#define WL_TX_POWER_MCS20_SDM_FIRST OFFSETOF(txppr_t, b20_2x2sdm_mcs8) -#define WL_TX_POWER_20_S2x2_FIRST OFFSETOF(txppr_t, b20_2x2sdm_mcs8) - -#define WL_TX_POWER_CCK_CDD_S1x3_FIRST OFFSETOF(txppr_t, b20_1x3dsss) -#define WL_TX_POWER_OFDM20_CDD_S1x3_FIRST OFFSETOF(txppr_t, b20_1x3cdd_ofdm) -#define WL_TX_POWER_20_S1x3_FIRST OFFSETOF(txppr_t, b20_1x3cdd_mcs0) -#define WL_TX_POWER_20_STBC_S2x3_FIRST OFFSETOF(txppr_t, b20_2x3stbc_mcs0) -#define WL_TX_POWER_20_S2x3_FIRST OFFSETOF(txppr_t, b20_2x3sdm_mcs8) -#define WL_TX_POWER_20_S3x3_FIRST OFFSETOF(txppr_t, b20_3x3sdm_mcs16) - -#define WL_TX_POWER_20_S1X1_VHT OFFSETOF(txppr_t, b20_1x1vht) -#define WL_TX_POWER_20_S1X2_CDD_VHT OFFSETOF(txppr_t, b20_1x2cdd_vht) -#define WL_TX_POWER_20_S2X2_STBC_VHT OFFSETOF(txppr_t, b20_2x2stbc_vht) -#define WL_TX_POWER_20_S2X2_VHT OFFSETOF(txppr_t, b20_2x2sdm_vht) -#define WL_TX_POWER_20_S1X3_CDD_VHT OFFSETOF(txppr_t, b20_1x3cdd_vht) -#define WL_TX_POWER_20_S2X3_STBC_VHT OFFSETOF(txppr_t, b20_2x3stbc_vht) -#define WL_TX_POWER_20_S2X3_VHT OFFSETOF(txppr_t, b20_2x3sdm_vht) -#define WL_TX_POWER_20_S3X3_VHT OFFSETOF(txppr_t, b20_3x3sdm_vht) - -/* 40MHz */ -#define WL_TX_POWER_40_DUMMY_CCK_FIRST OFFSETOF(txppr_t, b40_dummy1x1dsss) -#define WL_TX_POWER_OFDM40_FIRST OFFSETOF(txppr_t, b40_1x1ofdm) -#define WL_TX_POWER_MCS40_SISO_FIRST OFFSETOF(txppr_t, b40_1x1mcs0) -#define WL_TX_POWER_40_S1x1_FIRST OFFSETOF(txppr_t, b40_1x1mcs0) - -#define WL_TX_POWER_40_DUMMY_CCK_CDD_S1x2_FIRST OFFSETOF(txppr_t, b40_dummy1x2dsss) -#define WL_TX_POWER_OFDM40_CDD_FIRST OFFSETOF(txppr_t, b40_1x2cdd_ofdm) -#define WL_TX_POWER_MCS40_CDD_FIRST OFFSETOF(txppr_t, b40_1x2cdd_mcs0) -#define WL_TX_POWER_40_S1x2_FIRST OFFSETOF(txppr_t, b40_1x2cdd_mcs0) -#define WL_TX_POWER_MCS40_STBC_FIRST OFFSETOF(txppr_t, b40_2x2stbc_mcs0) -#define WL_TX_POWER_MCS40_SDM_FIRST OFFSETOF(txppr_t, b40_2x2sdm_mcs8) -#define WL_TX_POWER_40_S2x2_FIRST OFFSETOF(txppr_t, b40_2x2sdm_mcs8) - -#define WL_TX_POWER_40_DUMMY_CCK_CDD_S1x3_FIRST OFFSETOF(txppr_t, b40_dummy1x3dsss) -#define WL_TX_POWER_OFDM40_CDD_S1x3_FIRST OFFSETOF(txppr_t, b40_1x3cdd_ofdm) -#define WL_TX_POWER_40_S1x3_FIRST OFFSETOF(txppr_t, b40_1x3cdd_mcs0) -#define WL_TX_POWER_40_STBC_S2x3_FIRST OFFSETOF(txppr_t, b40_2x3stbc_mcs0) -#define WL_TX_POWER_40_S2x3_FIRST OFFSETOF(txppr_t, b40_2x3sdm_mcs8) -#define WL_TX_POWER_40_S3x3_FIRST OFFSETOF(txppr_t, b40_3x3sdm_mcs16) - -#define WL_TX_POWER_40_S1X1_VHT OFFSETOF(txppr_t, b40_1x1vht) -#define WL_TX_POWER_40_S1X2_CDD_VHT OFFSETOF(txppr_t, b40_1x2cdd_vht) -#define WL_TX_POWER_40_S2X2_STBC_VHT OFFSETOF(txppr_t, b40_2x2stbc_vht) -#define WL_TX_POWER_40_S2X2_VHT OFFSETOF(txppr_t, b40_2x2sdm_vht) -#define WL_TX_POWER_40_S1X3_CDD_VHT OFFSETOF(txppr_t, b40_1x3cdd_vht) -#define WL_TX_POWER_40_S2X3_STBC_VHT OFFSETOF(txppr_t, b40_2x3stbc_vht) -#define WL_TX_POWER_40_S2X3_VHT OFFSETOF(txppr_t, b40_2x3sdm_vht) -#define WL_TX_POWER_40_S3X3_VHT OFFSETOF(txppr_t, b40_3x3sdm_vht) - -/* 20 in 40MHz */ -#define WL_TX_POWER_20UL_CCK_FIRST OFFSETOF(txppr_t, b20in40_1x1dsss) -#define WL_TX_POWER_20UL_OFDM_FIRST OFFSETOF(txppr_t, b20in40_1x1ofdm) -#define WL_TX_POWER_20UL_S1x1_FIRST OFFSETOF(txppr_t, b20in40_1x1mcs0) - -#define WL_TX_POWER_CCK_20U_CDD_S1x2_FIRST OFFSETOF(txppr_t, b20in40_1x2dsss) -#define WL_TX_POWER_20UL_OFDM_CDD_FIRST OFFSETOF(txppr_t, b20in40_1x2cdd_ofdm) -#define WL_TX_POWER_20UL_S1x2_FIRST OFFSETOF(txppr_t, b20in40_1x2cdd_mcs0) -#define WL_TX_POWER_20UL_STBC_S2x2_FIRST OFFSETOF(txppr_t, b20in40_2x2stbc_mcs0) -#define WL_TX_POWER_20UL_S2x2_FIRST OFFSETOF(txppr_t, b20in40_2x2sdm_mcs8) - -#define WL_TX_POWER_CCK_20U_CDD_S1x3_FIRST OFFSETOF(txppr_t, b20in40_1x3dsss) -#define WL_TX_POWER_20UL_OFDM_CDD_S1x3_FIRST OFFSETOF(txppr_t, b20in40_1x3cdd_ofdm) -#define WL_TX_POWER_20UL_S1x3_FIRST OFFSETOF(txppr_t, b20in40_1x3cdd_mcs0) -#define WL_TX_POWER_20UL_STBC_S2x3_FIRST OFFSETOF(txppr_t, b20in40_2x3stbc_mcs0) -#define WL_TX_POWER_20UL_S2x3_FIRST OFFSETOF(txppr_t, b20in40_2x3sdm_mcs8) -#define WL_TX_POWER_20UL_S3x3_FIRST OFFSETOF(txppr_t, b20in40_3x3sdm_mcs16) - -#define WL_TX_POWER_20UL_S1X1_VHT OFFSETOF(txppr_t, b20in40_1x1vht) -#define WL_TX_POWER_20UL_S1X2_CDD_VHT OFFSETOF(txppr_t, b20in40_1x2cdd_vht) -#define WL_TX_POWER_20UL_S2X2_STBC_VHT OFFSETOF(txppr_t, b20in40_2x2stbc_vht) -#define WL_TX_POWER_20UL_S2X2_VHT OFFSETOF(txppr_t, b20in40_2x2sdm_vht) -#define WL_TX_POWER_20UL_S1X3_CDD_VHT OFFSETOF(txppr_t, b20in40_1x3cdd_vht) -#define WL_TX_POWER_20UL_S2X3_STBC_VHT OFFSETOF(txppr_t, b20in40_2x3stbc_vht) -#define WL_TX_POWER_20UL_S2X3_VHT OFFSETOF(txppr_t, b20in40_2x3sdm_vht) -#define WL_TX_POWER_20UL_S3X3_VHT OFFSETOF(txppr_t, b20in40_3x3sdm_vht) - -/* 80MHz */ -#define WL_TX_POWER_80_DUMMY_CCK_FIRST OFFSETOF(txppr_t, b80_dummy1x1dsss) -#define WL_TX_POWER_OFDM80_FIRST OFFSETOF(txppr_t, b80_1x1ofdm) -#define WL_TX_POWER_MCS80_SISO_FIRST OFFSETOF(txppr_t, b80_1x1mcs0) -#define WL_TX_POWER_80_S1x1_FIRST OFFSETOF(txppr_t, b80_1x1mcs0) - -#define WL_TX_POWER_80_DUMMY_CCK_CDD_S1x2_FIRST OFFSETOF(txppr_t, b80_dummy1x2dsss) -#define WL_TX_POWER_OFDM80_CDD_FIRST OFFSETOF(txppr_t, b80_1x2cdd_ofdm) -#define WL_TX_POWER_MCS80_CDD_FIRST OFFSETOF(txppr_t, b80_1x2cdd_mcs0) -#define WL_TX_POWER_80_S1x2_FIRST OFFSETOF(txppr_t, b80_1x2cdd_mcs0) -#define WL_TX_POWER_MCS80_STBC_FIRST OFFSETOF(txppr_t, b80_2x2stbc_mcs0) -#define WL_TX_POWER_MCS80_SDM_FIRST OFFSETOF(txppr_t, b80_2x2sdm_mcs8) -#define WL_TX_POWER_80_S2x2_FIRST OFFSETOF(txppr_t, b80_2x2sdm_mcs8) - -#define WL_TX_POWER_80_DUMMY_CCK_CDD_S1x3_FIRST OFFSETOF(txppr_t, b80_dummy1x3dsss) -#define WL_TX_POWER_OFDM80_CDD_S1x3_FIRST OFFSETOF(txppr_t, b80_1x3cdd_ofdm) -#define WL_TX_POWER_80_S1x3_FIRST OFFSETOF(txppr_t, b80_1x3cdd_mcs0) -#define WL_TX_POWER_80_STBC_S2x3_FIRST OFFSETOF(txppr_t, b80_2x3stbc_mcs0) -#define WL_TX_POWER_80_S2x3_FIRST OFFSETOF(txppr_t, b80_2x3sdm_mcs8) -#define WL_TX_POWER_80_S3x3_FIRST OFFSETOF(txppr_t, b80_3x3sdm_mcs16) - -#define WL_TX_POWER_80_S1X1_VHT OFFSETOF(txppr_t, b80_1x1vht) -#define WL_TX_POWER_80_S1X2_CDD_VHT OFFSETOF(txppr_t, b80_1x2cdd_vht) -#define WL_TX_POWER_80_S2X2_STBC_VHT OFFSETOF(txppr_t, b80_2x2stbc_vht) -#define WL_TX_POWER_80_S2X2_VHT OFFSETOF(txppr_t, b80_2x2sdm_vht) -#define WL_TX_POWER_80_S1X3_CDD_VHT OFFSETOF(txppr_t, b80_1x3cdd_vht) -#define WL_TX_POWER_80_S2X3_STBC_VHT OFFSETOF(txppr_t, b80_2x3stbc_vht) -#define WL_TX_POWER_80_S2X3_VHT OFFSETOF(txppr_t, b80_2x3sdm_vht) -#define WL_TX_POWER_80_S3X3_VHT OFFSETOF(txppr_t, b80_3x3sdm_vht) - -/* 20 in 80MHz */ -#define WL_TX_POWER_20UUL_CCK_FIRST OFFSETOF(txppr_t, b20in80_1x1dsss) -#define WL_TX_POWER_20UUL_OFDM_FIRST OFFSETOF(txppr_t, b20in80_1x1ofdm) -#define WL_TX_POWER_20UUL_S1x1_FIRST OFFSETOF(txppr_t, b20in80_1x1mcs0) - -#define WL_TX_POWER_CCK_20UU_CDD_S1x2_FIRST OFFSETOF(txppr_t, b20in80_1x2dsss) -#define WL_TX_POWER_20UUL_OFDM_CDD_FIRST OFFSETOF(txppr_t, b20in80_1x2cdd_ofdm) -#define WL_TX_POWER_20UUL_S1x2_FIRST OFFSETOF(txppr_t, b20in80_1x2cdd_mcs0) -#define WL_TX_POWER_20UUL_STBC_S2x2_FIRST OFFSETOF(txppr_t, b20in80_2x2stbc_mcs0) -#define WL_TX_POWER_20UUL_S2x2_FIRST OFFSETOF(txppr_t, b20in80_2x2sdm_mcs8) - -#define WL_TX_POWER_CCK_20UU_CDD_S1x3_FIRST OFFSETOF(txppr_t, b20in80_1x3dsss) -#define WL_TX_POWER_20UUL_OFDM_CDD_S1x3_FIRST OFFSETOF(txppr_t, b20in80_1x3cdd_ofdm) -#define WL_TX_POWER_20UUL_S1x3_FIRST OFFSETOF(txppr_t, b20in80_1x3cdd_mcs0) -#define WL_TX_POWER_20UUL_STBC_S2x3_FIRST OFFSETOF(txppr_t, b20in80_2x3stbc_mcs0) -#define WL_TX_POWER_20UUL_S2x3_FIRST OFFSETOF(txppr_t, b20in80_2x3sdm_mcs8) -#define WL_TX_POWER_20UUL_S3x3_FIRST OFFSETOF(txppr_t, b20in80_3x3sdm_mcs16) - -#define WL_TX_POWER_20UUL_S1X1_VHT OFFSETOF(txppr_t, b20in80_1x1vht) -#define WL_TX_POWER_20UUL_S1X2_CDD_VHT OFFSETOF(txppr_t, b20in80_1x2cdd_vht) -#define WL_TX_POWER_20UUL_S2X2_STBC_VHT OFFSETOF(txppr_t, b20in80_2x2stbc_vht) -#define WL_TX_POWER_20UUL_S2X2_VHT OFFSETOF(txppr_t, b20in80_2x2sdm_vht) -#define WL_TX_POWER_20UUL_S1X3_CDD_VHT OFFSETOF(txppr_t, b20in80_1x3cdd_vht) -#define WL_TX_POWER_20UUL_S2X3_STBC_VHT OFFSETOF(txppr_t, b20in80_2x3stbc_vht) -#define WL_TX_POWER_20UUL_S2X3_VHT OFFSETOF(txppr_t, b20in80_2x3sdm_vht) -#define WL_TX_POWER_20UUL_S3X3_VHT OFFSETOF(txppr_t, b20in80_3x3sdm_vht) - -/* 40 in 80MHz */ -#define WL_TX_POWER_40UUL_DUMMY_CCK_FIRST OFFSETOF(txppr_t, b40in80_dummy1x1dsss) -#define WL_TX_POWER_40UUL_OFDM_FIRST OFFSETOF(txppr_t, b40in80_1x1ofdm) -#define WL_TX_POWER_40UUL_S1x1_FIRST OFFSETOF(txppr_t, b40in80_1x1mcs0) - -#define WL_TX_POWER_CCK_40UU_DUMMY_CDD_S1x2_FIRST OFFSETOF(txppr_t, b40in80_dummy1x2dsss) -#define WL_TX_POWER_40UUL_OFDM_CDD_FIRST OFFSETOF(txppr_t, b40in80_1x2cdd_ofdm) -#define WL_TX_POWER_40UUL_S1x2_FIRST OFFSETOF(txppr_t, b40in80_1x2cdd_mcs0) -#define WL_TX_POWER_40UUL_STBC_S2x2_FIRST OFFSETOF(txppr_t, b40in80_2x2stbc_mcs0) -#define WL_TX_POWER_40UUL_S2x2_FIRST OFFSETOF(txppr_t, b40in80_2x2sdm_mcs8) - -#define WL_TX_POWER_CCK_40UU_DUMMY_CDD_S1x3_FIRST OFFSETOF(txppr_t, b40in80_dummy1x3dsss) -#define WL_TX_POWER_40UUL_OFDM_CDD_S1x3_FIRST OFFSETOF(txppr_t, b40in80_1x3cdd_ofdm) -#define WL_TX_POWER_40UUL_S1x3_FIRST OFFSETOF(txppr_t, b40in80_1x3cdd_mcs0) -#define WL_TX_POWER_40UUL_STBC_S2x3_FIRST OFFSETOF(txppr_t, b40in80_2x3stbc_mcs0) -#define WL_TX_POWER_40UUL_S2x3_FIRST OFFSETOF(txppr_t, b40in80_2x3sdm_mcs8) -#define WL_TX_POWER_40UUL_S3x3_FIRST OFFSETOF(txppr_t, b40in80_3x3sdm_mcs16) - -#define WL_TX_POWER_40UUL_S1X1_VHT OFFSETOF(txppr_t, b40in80_1x1vht) -#define WL_TX_POWER_40UUL_S1X2_CDD_VHT OFFSETOF(txppr_t, b40in80_1x2cdd_vht) -#define WL_TX_POWER_40UUL_S2X2_STBC_VHT OFFSETOF(txppr_t, b40in80_2x2stbc_vht) -#define WL_TX_POWER_40UUL_S2X2_VHT OFFSETOF(txppr_t, b40in80_2x2sdm_vht) -#define WL_TX_POWER_40UUL_S1X3_CDD_VHT OFFSETOF(txppr_t, b40in80_1x3cdd_vht) -#define WL_TX_POWER_40UUL_S2X3_STBC_VHT OFFSETOF(txppr_t, b40in80_2x3stbc_vht) -#define WL_TX_POWER_40UUL_S2X3_VHT OFFSETOF(txppr_t, b40in80_2x3sdm_vht) -#define WL_TX_POWER_40UUL_S3X3_VHT OFFSETOF(txppr_t, b40in80_3x3sdm_vht) - -#define WL_TX_POWER_MCS_32 OFFSETOF(txppr_t, mcs32) /* C_CHECK remove later */ - -#define WL_TX_POWER_RATES sizeof(struct txppr) - -/* sslpnphy specifics */ -#define WL_TX_POWER_MCS20_SISO_FIRST_SSN WL_TX_POWER_MCS20_SISO_FIRST -#define WL_TX_POWER_MCS40_SISO_FIRST_SSN WL_TX_POWER_MCS40_SISO_FIRST - -/* tx_power_t.flags bits */ -#define WL_TX_POWER_F_ENABLED 1 -#define WL_TX_POWER_F_HW 2 -#define WL_TX_POWER_F_MIMO 4 -#define WL_TX_POWER_F_SISO 8 -#define WL_TX_POWER_F_HT 0x10 - -typedef struct { - uint16 ver; /* version of this struct */ - uint16 len; /* length in bytes of this structure */ - uint32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - uint8 ppr[WL_TX_POWER_RATES]; /* Latest target power */ -} wl_txppr_t; - -#define WL_TXPPR_VERSION 0 -#define WL_TXPPR_LENGTH (sizeof(wl_txppr_t)) -#define WL_CLM_NUM_RATES 116 /* must be the same as CLM_NUMRATES */ -#define TX_POWER_T_VERSION 43 - -/* Defines used with channel_bandwidth for curpower */ -#define WL_BW_20MHZ 0 -#define WL_BW_40MHZ 1 -#define WL_BW_80MHZ 2 - -typedef struct { - uint32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - uint8 local_max; /* local max according to the AP */ - uint8 local_constraint; /* local constraint according to the AP */ - int8 antgain[2]; /* Ant gain for each band - from SROM */ - uint8 rf_cores; /* count of RF Cores being reported */ - uint8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ - uint8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain - * without adjustment - */ - uint8 est_Pout_cck; /* Latest CCK tx power out estimate */ - uint8 tx_power_max[4]; /* Maximum target power among all rates */ - uint tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ - uint8 user_limit[WL_TX_POWER_RATES]; /* User limit */ - int8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ - int8 target[WL_TX_POWER_RATES]; /* Latest target power */ - int8 clm_limits[WL_CLM_NUM_RATES]; /* regulatory limits - 20, 40 or 80MHz */ - int8 clm_limits_subchan1[WL_CLM_NUM_RATES]; /* regulatory limits - 20in40 or 40in80 */ - int8 clm_limits_subchan2[WL_CLM_NUM_RATES]; /* regulatory limits - 20in80MHz */ - int8 sar; /* SAR limit for display by wl executable */ - int8 channel_bandwidth; /* 20, 40 or 80 MHz bandwidth? */ - uint8 version; /* Version of the data format wlu <--> driver */ -} tx_power_t; - -typedef struct tx_inst_power { - uint8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - uint8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_inst_power_t; - - -typedef struct { - uint32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - uint8 local_max; /* local max according to the AP */ - uint8 local_constraint; /* local constraint according to the AP */ - int8 antgain[2]; /* Ant gain for each band - from SROM */ - uint8 rf_cores; /* count of RF Cores being reported */ - uint8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ - uint8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain - * without adjustment - */ - uint8 est_Pout_cck; /* Latest CCK tx power out estimate */ - uint8 tx_power_max[4]; /* Maximum target power among all rates */ - uint tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ - txppr_t user_limit; /* User limit */ - txppr_t reg_limit; /* Regulatory power limit */ - txppr_t board_limit; /* Max power board can support (SROM) */ - txppr_t target; /* Latest target power */ -} wl_txpwr_t; - -#define WL_NUM_TXCHAIN_MAX 4 -typedef struct wl_txchain_pwr_offsets { - int8 offset[WL_NUM_TXCHAIN_MAX]; /* quarter dBm signed offset for each chain */ -} wl_txchain_pwr_offsets_t; - -/* 802.11h measurement types */ -#define WLC_MEASURE_TPC 1 -#define WLC_MEASURE_CHANNEL_BASIC 2 -#define WLC_MEASURE_CHANNEL_CCA 3 -#define WLC_MEASURE_CHANNEL_RPI 4 - -/* regulatory enforcement levels */ -#define SPECT_MNGMT_OFF 0 /* both 11h and 11d disabled */ -#define SPECT_MNGMT_LOOSE_11H 1 /* allow non-11h APs in scan lists */ -#define SPECT_MNGMT_STRICT_11H 2 /* prune out non-11h APs from scan list */ -#define SPECT_MNGMT_STRICT_11D 3 /* switch to 802.11D mode */ -/* SPECT_MNGMT_LOOSE_11H_D - same as SPECT_MNGMT_LOOSE with the exception that Country IE - * adoption is done regardless of capability spectrum_management - */ -#define SPECT_MNGMT_LOOSE_11H_D 4 /* operation defined above */ - -#define WL_CHAN_VALID_HW (1 << 0) /* valid with current HW */ -#define WL_CHAN_VALID_SW (1 << 1) /* valid with current country setting */ -#define WL_CHAN_BAND_5G (1 << 2) /* 5GHz-band channel */ -#define WL_CHAN_RADAR (1 << 3) /* radar sensitive channel */ -#define WL_CHAN_INACTIVE (1 << 4) /* temporarily inactive due to radar */ -#define WL_CHAN_PASSIVE (1 << 5) /* channel is in passive mode */ -#define WL_CHAN_RESTRICTED (1 << 6) /* restricted use channel */ - -/* BTC mode used by "btc_mode" iovar */ -#define WL_BTC_DISABLE 0 /* disable BT coexistence */ -#define WL_BTC_FULLTDM 1 /* full TDM COEX */ -#define WL_BTC_ENABLE 1 /* full TDM COEX to maintain backward compatiblity */ -#define WL_BTC_PREMPT 2 /* full TDM COEX with preemption */ -#define WL_BTC_LITE 3 /* light weight coex for large isolation platform */ -#define WL_BTC_PARALLEL 4 /* BT and WLAN run in parallel with separate antenna */ -#define WL_BTC_HYBRID 5 /* hybrid coex, only ack is allowed to transmit in BT slot */ -#define WL_BTC_DEFAULT 8 /* set the default mode for the device */ -#define WL_INF_BTC_DISABLE 0 -#define WL_INF_BTC_ENABLE 1 -#define WL_INF_BTC_AUTO 3 - -/* BTC wire used by "btc_wire" iovar */ -#define WL_BTC_DEFWIRE 0 /* use default wire setting */ -#define WL_BTC_2WIRE 2 /* use 2-wire BTC */ -#define WL_BTC_3WIRE 3 /* use 3-wire BTC */ -#define WL_BTC_4WIRE 4 /* use 4-wire BTC */ - -/* BTC flags: BTC configuration that can be set by host */ -#define WL_BTC_FLAG_PREMPT (1 << 0) -#define WL_BTC_FLAG_BT_DEF (1 << 1) -#define WL_BTC_FLAG_ACTIVE_PROT (1 << 2) -#define WL_BTC_FLAG_SIM_RSP (1 << 3) -#define WL_BTC_FLAG_PS_PROTECT (1 << 4) -#define WL_BTC_FLAG_SIM_TX_LP (1 << 5) -#define WL_BTC_FLAG_ECI (1 << 6) -#define WL_BTC_FLAG_LIGHT (1 << 7) -#define WL_BTC_FLAG_PARALLEL (1 << 8) -#endif /* !defined(LINUX_POSTMOGRIFY_REMOVAL) */ - -/* Message levels */ -#define WL_ERROR_VAL 0x00000001 -#define WL_TRACE_VAL 0x00000002 -#define WL_PRHDRS_VAL 0x00000004 -#define WL_PRPKT_VAL 0x00000008 -#define WL_INFORM_VAL 0x00000010 -#define WL_TMP_VAL 0x00000020 -#define WL_OID_VAL 0x00000040 -#define WL_RATE_VAL 0x00000080 -#define WL_ASSOC_VAL 0x00000100 -#define WL_PRUSR_VAL 0x00000200 -#define WL_PS_VAL 0x00000400 -#define WL_TXPWR_VAL 0x00000800 /* retired in TOT on 6/10/2009 */ -#define WL_PORT_VAL 0x00001000 -#define WL_DUAL_VAL 0x00002000 -#define WL_WSEC_VAL 0x00004000 -#define WL_WSEC_DUMP_VAL 0x00008000 -#define WL_LOG_VAL 0x00010000 -#define WL_NRSSI_VAL 0x00020000 /* retired in TOT on 6/10/2009 */ -#define WL_LOFT_VAL 0x00040000 /* retired in TOT on 6/10/2009 */ -#define WL_REGULATORY_VAL 0x00080000 -#define WL_PHYCAL_VAL 0x00100000 /* retired in TOT on 6/10/2009 */ -#define WL_RADAR_VAL 0x00200000 /* retired in TOT on 6/10/2009 */ -#define WL_MPC_VAL 0x00400000 -#define WL_APSTA_VAL 0x00800000 -#define WL_DFS_VAL 0x01000000 -#define WL_BA_VAL 0x02000000 /* retired in TOT on 6/14/2010 */ -#define WL_ACI_VAL 0x04000000 -#define WL_MBSS_VAL 0x04000000 -#define WL_CAC_VAL 0x08000000 -#define WL_AMSDU_VAL 0x10000000 -#define WL_AMPDU_VAL 0x20000000 -#define WL_FFPLD_VAL 0x40000000 - -/* wl_msg_level is full. For new bits take the next one and AND with - * wl_msg_level2 in wl_dbg.h - */ -#define WL_DPT_VAL 0x00000001 -#define WL_SCAN_VAL 0x00000002 -#define WL_WOWL_VAL 0x00000004 -#define WL_COEX_VAL 0x00000008 -#define WL_RTDC_VAL 0x00000010 -#define WL_PROTO_VAL 0x00000020 -#define WL_BTA_VAL 0x00000040 -#define WL_CHANINT_VAL 0x00000080 -#define WL_THERMAL_VAL 0x00000100 /* retired in TOT on 6/10/2009 */ -#define WL_P2P_VAL 0x00000200 -#define WL_ITFR_VAL 0x00000400 -#define WL_MCHAN_VAL 0x00000800 -#define WL_TDLS_VAL 0x00001000 -#define WL_MCNX_VAL 0x00002000 -#define WL_PROT_VAL 0x00004000 -#define WL_PSTA_VAL 0x00008000 -/* use top-bit for WL_TIME_STAMP_VAL because this is a modifier - * rather than a message-type of its own - */ -#define WL_TIMESTAMP_VAL 0x80000000 - -/* max # of leds supported by GPIO (gpio pin# == led index#) */ -#define WL_LED_NUMGPIO 32 /* gpio 0-31 */ - -/* led per-pin behaviors */ -#define WL_LED_OFF 0 /* always off */ -#define WL_LED_ON 1 /* always on */ -#define WL_LED_ACTIVITY 2 /* activity */ -#define WL_LED_RADIO 3 /* radio enabled */ -#define WL_LED_ARADIO 4 /* 5 Ghz radio enabled */ -#define WL_LED_BRADIO 5 /* 2.4Ghz radio enabled */ -#define WL_LED_BGMODE 6 /* on if gmode, off if bmode */ -#define WL_LED_WI1 7 -#define WL_LED_WI2 8 -#define WL_LED_WI3 9 -#define WL_LED_ASSOC 10 /* associated state indicator */ -#define WL_LED_INACTIVE 11 /* null behavior (clears default behavior) */ -#define WL_LED_ASSOCACT 12 /* on when associated; blink fast for activity */ -#define WL_LED_WI4 13 -#define WL_LED_WI5 14 -#define WL_LED_BLINKSLOW 15 /* blink slow */ -#define WL_LED_BLINKMED 16 /* blink med */ -#define WL_LED_BLINKFAST 17 /* blink fast */ -#define WL_LED_BLINKCUSTOM 18 /* blink custom */ -#define WL_LED_BLINKPERIODIC 19 /* blink periodic (custom 1000ms / off 400ms) */ -#define WL_LED_ASSOC_WITH_SEC 20 /* when connected with security */ - /* keep on for 300 sec */ -#define WL_LED_START_OFF 21 /* off upon boot, could be turned on later */ -#define WL_LED_NUMBEHAVIOR 22 - -/* led behavior numeric value format */ -#define WL_LED_BEH_MASK 0x7f /* behavior mask */ -#define WL_LED_AL_MASK 0x80 /* activelow (polarity) bit */ - -/* maximum channels returned by the get valid channels iovar */ -#define WL_NUMCHANNELS 64 -#define WL_NUMCHANSPECS 100 - -/* WDS link local endpoint WPA role */ -#define WL_WDS_WPA_ROLE_AUTH 0 /* authenticator */ -#define WL_WDS_WPA_ROLE_SUP 1 /* supplicant */ -#define WL_WDS_WPA_ROLE_AUTO 255 /* auto, based on mac addr value */ - -/* number of bytes needed to define a 128-bit mask for MAC event reporting */ -#define WL_EVENTING_MASK_LEN 16 - -/* - * Join preference iovar value is an array of tuples. Each tuple has a one-byte type, - * a one-byte length, and a variable length value. RSSI type tuple must be present - * in the array. - * - * Types are defined in "join preference types" section. - * - * Length is the value size in octets. It is reserved for WL_JOIN_PREF_WPA type tuple - * and must be set to zero. - * - * Values are defined below. - * - * 1. RSSI - 2 octets - * offset 0: reserved - * offset 1: reserved - * - * 2. WPA - 2 + 12 * n octets (n is # tuples defined below) - * offset 0: reserved - * offset 1: # of tuples - * offset 2: tuple 1 - * offset 14: tuple 2 - * ... - * offset 2 + 12 * (n - 1) octets: tuple n - * - * struct wpa_cfg_tuple { - * uint8 akm[DOT11_OUI_LEN+1]; akm suite - * uint8 ucipher[DOT11_OUI_LEN+1]; unicast cipher suite - * uint8 mcipher[DOT11_OUI_LEN+1]; multicast cipher suite - * }; - * - * multicast cipher suite can be specified as a specific cipher suite or WL_WPA_ACP_MCS_ANY. - * - * 3. BAND - 2 octets - * offset 0: reserved - * offset 1: see "band preference" and "band types" - * - * 4. BAND RSSI - 2 octets - * offset 0: band types - * offset 1: +ve RSSI boost balue in dB - */ - -/* join preference types */ -#define WL_JOIN_PREF_RSSI 1 /* by RSSI */ -#define WL_JOIN_PREF_WPA 2 /* by akm and ciphers */ -#define WL_JOIN_PREF_BAND 3 /* by 802.11 band */ -#define WL_JOIN_PREF_RSSI_DELTA 4 /* by 802.11 band only if RSSI delta condition matches */ -#define WL_JOIN_PREF_TRANS_PREF 5 /* defined by requesting AP */ - -/* band preference */ -#define WLJP_BAND_ASSOC_PREF 255 /* use what WLC_SET_ASSOC_PREFER ioctl specifies */ - -/* any multicast cipher suite */ -#define WL_WPA_ACP_MCS_ANY "\x00\x00\x00\x00" - -struct tsinfo_arg { - uint8 octets[3]; -}; - -#define NFIFO 6 /* # tx/rx fifopairs */ - -#define WL_CNT_T_VERSION 8 /* current version of wl_cnt_t struct */ - -typedef struct { - uint16 version; /* see definition of WL_CNT_T_VERSION */ - uint16 length; /* length of entire structure */ - - /* transmit stat counters */ - uint32 txframe; /* tx data frames */ - uint32 txbyte; /* tx data bytes */ - uint32 txretrans; /* tx mac retransmits */ - uint32 txerror; /* tx data errors (derived: sum of others) */ - uint32 txctl; /* tx management frames */ - uint32 txprshort; /* tx short preamble frames */ - uint32 txserr; /* tx status errors */ - uint32 txnobuf; /* tx out of buffers errors */ - uint32 txnoassoc; /* tx discard because we're not associated */ - uint32 txrunt; /* tx runt frames */ - uint32 txchit; /* tx header cache hit (fastpath) */ - uint32 txcmiss; /* tx header cache miss (slowpath) */ - - /* transmit chip error counters */ - uint32 txuflo; /* tx fifo underflows */ - uint32 txphyerr; /* tx phy errors (indicated in tx status) */ - uint32 txphycrs; - - /* receive stat counters */ - uint32 rxframe; /* rx data frames */ - uint32 rxbyte; /* rx data bytes */ - uint32 rxerror; /* rx data errors (derived: sum of others) */ - uint32 rxctl; /* rx management frames */ - uint32 rxnobuf; /* rx out of buffers errors */ - uint32 rxnondata; /* rx non data frames in the data channel errors */ - uint32 rxbadds; /* rx bad DS errors */ - uint32 rxbadcm; /* rx bad control or management frames */ - uint32 rxfragerr; /* rx fragmentation errors */ - uint32 rxrunt; /* rx runt frames */ - uint32 rxgiant; /* rx giant frames */ - uint32 rxnoscb; /* rx no scb error */ - uint32 rxbadproto; /* rx invalid frames */ - uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ - uint32 rxbadda; /* rx frames tossed for invalid da */ - uint32 rxfilter; /* rx frames filtered out */ - - /* receive chip error counters */ - uint32 rxoflo; /* rx fifo overflow errors */ - uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ - - uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ - uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ - uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ - - /* misc counters */ - uint32 dmade; /* tx/rx dma descriptor errors */ - uint32 dmada; /* tx/rx dma data errors */ - uint32 dmape; /* tx/rx dma descriptor protocol errors */ - uint32 reset; /* reset count */ - uint32 tbtt; /* cnts the TBTT int's */ - uint32 txdmawar; - uint32 pkt_callback_reg_fail; /* callbacks register failure */ - - /* MAC counters: 32-bit version of d11.h's macstat_t */ - uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, - * Control Management (includes retransmissions) - */ - uint32 txrtsfrm; /* number of RTS sent out by the MAC */ - uint32 txctsfrm; /* number of CTS sent out by the MAC */ - uint32 txackfrm; /* number of ACK frames sent out */ - uint32 txdnlfrm; /* Not used */ - uint32 txbcnfrm; /* beacons transmitted */ - uint32 txfunfl[8]; /* per-fifo tx underflows */ - uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS - * or BCN) - */ - uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for - * driver enqueued frames - */ - uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ - uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ - uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not - * data/control/management - */ - uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ - uint32 rxbadplcp; /* parity check of the PLCP header failed */ - uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ - uint32 rxstrt; /* Number of received frames with a good PLCP - * (i.e. passing parity check) - */ - uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ - uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ - uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ - uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ - uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ - uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ - uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ - uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ - uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ - uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ - uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ - uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ - uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ - uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC - * (unlikely to see these) - */ - uint32 rxbeaconmbss; /* beacons received from member of BSS */ - uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from - * other BSS (WDS FRAME) - */ - uint32 rxbeaconobss; /* beacons received from other BSS */ - uint32 rxrsptmout; /* Number of response timeouts for transmitted frames - * expecting a response - */ - uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ - uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ - uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ - uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ - uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ - uint32 pmqovfl; /* Number of PMQ overflows */ - uint32 rxcgprqfrm; /* Number of received Probe requests that made it into - * the PRQ fifo - */ - uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ - uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did - * not get ACK - */ - uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ - uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ - * fifo because a probe response could not be sent out within - * the time limit defined in M_PRS_MAXTIME - */ - uint32 rxnack; /* obsolete */ - uint32 frmscons; /* obsolete */ - uint32 txnack; /* obsolete */ - uint32 txglitch_nack; /* obsolete */ - uint32 txburst; /* obsolete */ - - /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ - uint32 txfrag; /* dot11TransmittedFragmentCount */ - uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ - uint32 txfail; /* dot11FailedCount */ - uint32 txretry; /* dot11RetryCount */ - uint32 txretrie; /* dot11MultipleRetryCount */ - uint32 rxdup; /* dot11FrameduplicateCount */ - uint32 txrts; /* dot11RTSSuccessCount */ - uint32 txnocts; /* dot11RTSFailureCount */ - uint32 txnoack; /* dot11ACKFailureCount */ - uint32 rxfrag; /* dot11ReceivedFragmentCount */ - uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ - uint32 rxcrc; /* dot11FCSErrorCount */ - uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ - uint32 rxundec; /* dot11WEPUndecryptableCount */ - - /* WPA2 counters (see rxundec for DecryptFailureCount) */ - uint32 tkipmicfaill; /* TKIPLocalMICFailures */ - uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ - uint32 tkipreplay; /* TKIPReplays */ - uint32 ccmpfmterr; /* CCMPFormatErrors */ - uint32 ccmpreplay; /* CCMPReplays */ - uint32 ccmpundec; /* CCMPDecryptErrors */ - uint32 fourwayfail; /* FourWayHandshakeFailures */ - uint32 wepundec; /* dot11WEPUndecryptableCount */ - uint32 wepicverr; /* dot11WEPICVErrorCount */ - uint32 decsuccess; /* DecryptSuccessCount */ - uint32 tkipicverr; /* TKIPICVErrorCount */ - uint32 wepexcluded; /* dot11WEPExcludedCount */ - - uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ - uint32 psmwds; /* Count PSM watchdogs */ - uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ - - /* MBSS counters, AP only */ - uint32 prq_entries_handled; /* PRQ entries read in */ - uint32 prq_undirected_entries; /* which were bcast bss & ssid */ - uint32 prq_bad_entries; /* which could not be translated to info */ - uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ - uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ - uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ - uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ - - /* per-rate receive stat counters */ - uint32 rx1mbps; /* packets rx at 1Mbps */ - uint32 rx2mbps; /* packets rx at 2Mbps */ - uint32 rx5mbps5; /* packets rx at 5.5Mbps */ - uint32 rx6mbps; /* packets rx at 6Mbps */ - uint32 rx9mbps; /* packets rx at 9Mbps */ - uint32 rx11mbps; /* packets rx at 11Mbps */ - uint32 rx12mbps; /* packets rx at 12Mbps */ - uint32 rx18mbps; /* packets rx at 18Mbps */ - uint32 rx24mbps; /* packets rx at 24Mbps */ - uint32 rx36mbps; /* packets rx at 36Mbps */ - uint32 rx48mbps; /* packets rx at 48Mbps */ - uint32 rx54mbps; /* packets rx at 54Mbps */ - uint32 rx108mbps; /* packets rx at 108mbps */ - uint32 rx162mbps; /* packets rx at 162mbps */ - uint32 rx216mbps; /* packets rx at 216 mbps */ - uint32 rx270mbps; /* packets rx at 270 mbps */ - uint32 rx324mbps; /* packets rx at 324 mbps */ - uint32 rx378mbps; /* packets rx at 378 mbps */ - uint32 rx432mbps; /* packets rx at 432 mbps */ - uint32 rx486mbps; /* packets rx at 486 mbps */ - uint32 rx540mbps; /* packets rx at 540 mbps */ - - /* pkteng rx frame stats */ - uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ - uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ - - uint32 rfdisable; /* count of radio disables */ - uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ - - uint32 txexptime; /* Tx frames suppressed due to timer expiration */ - - uint32 txmpdu_sgi; /* count for sgi transmit */ - uint32 rxmpdu_sgi; /* count for sgi received */ - uint32 txmpdu_stbc; /* count for stbc transmit */ - uint32 rxmpdu_stbc; /* count for stbc received */ - - uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ - - /* WPA2 counters (see rxundec for DecryptFailureCount) */ - uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ - uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ - uint32 tkipreplay_mcst; /* TKIPReplays */ - uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ - uint32 ccmpreplay_mcst; /* CCMPReplays */ - uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ - uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ - uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ - uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ - uint32 decsuccess_mcst; /* DecryptSuccessCount */ - uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ - uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ - - uint32 dma_hang; /* count for dma hang */ - uint32 reinit; /* count for reinit */ - - uint32 pstatxucast; /* count of ucast frames xmitted on all psta assoc */ - uint32 pstatxnoassoc; /* count of txnoassoc frames xmitted on all psta assoc */ - uint32 pstarxucast; /* count of ucast frames received on all psta assoc */ - uint32 pstarxbcmc; /* count of bcmc frames received on all psta */ - uint32 pstatxbcmc; /* count of bcmc frames transmitted on all psta */ - - uint32 cso_passthrough; /* hw cso required but passthrough */ -} wl_cnt_t; - -typedef struct { - uint16 version; /* see definition of WL_CNT_T_VERSION */ - uint16 length; /* length of entire structure */ - - /* transmit stat counters */ - uint32 txframe; /* tx data frames */ - uint32 txbyte; /* tx data bytes */ - uint32 txretrans; /* tx mac retransmits */ - uint32 txerror; /* tx data errors (derived: sum of others) */ - uint32 txctl; /* tx management frames */ - uint32 txprshort; /* tx short preamble frames */ - uint32 txserr; /* tx status errors */ - uint32 txnobuf; /* tx out of buffers errors */ - uint32 txnoassoc; /* tx discard because we're not associated */ - uint32 txrunt; /* tx runt frames */ - uint32 txchit; /* tx header cache hit (fastpath) */ - uint32 txcmiss; /* tx header cache miss (slowpath) */ - - /* transmit chip error counters */ - uint32 txuflo; /* tx fifo underflows */ - uint32 txphyerr; /* tx phy errors (indicated in tx status) */ - uint32 txphycrs; - - /* receive stat counters */ - uint32 rxframe; /* rx data frames */ - uint32 rxbyte; /* rx data bytes */ - uint32 rxerror; /* rx data errors (derived: sum of others) */ - uint32 rxctl; /* rx management frames */ - uint32 rxnobuf; /* rx out of buffers errors */ - uint32 rxnondata; /* rx non data frames in the data channel errors */ - uint32 rxbadds; /* rx bad DS errors */ - uint32 rxbadcm; /* rx bad control or management frames */ - uint32 rxfragerr; /* rx fragmentation errors */ - uint32 rxrunt; /* rx runt frames */ - uint32 rxgiant; /* rx giant frames */ - uint32 rxnoscb; /* rx no scb error */ - uint32 rxbadproto; /* rx invalid frames */ - uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ - uint32 rxbadda; /* rx frames tossed for invalid da */ - uint32 rxfilter; /* rx frames filtered out */ - - /* receive chip error counters */ - uint32 rxoflo; /* rx fifo overflow errors */ - uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ - - uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ - uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ - uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ - - /* misc counters */ - uint32 dmade; /* tx/rx dma descriptor errors */ - uint32 dmada; /* tx/rx dma data errors */ - uint32 dmape; /* tx/rx dma descriptor protocol errors */ - uint32 reset; /* reset count */ - uint32 tbtt; /* cnts the TBTT int's */ - uint32 txdmawar; - uint32 pkt_callback_reg_fail; /* callbacks register failure */ - - /* MAC counters: 32-bit version of d11.h's macstat_t */ - uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, - * Control Management (includes retransmissions) - */ - uint32 txrtsfrm; /* number of RTS sent out by the MAC */ - uint32 txctsfrm; /* number of CTS sent out by the MAC */ - uint32 txackfrm; /* number of ACK frames sent out */ - uint32 txdnlfrm; /* Not used */ - uint32 txbcnfrm; /* beacons transmitted */ - uint32 txfunfl[8]; /* per-fifo tx underflows */ - uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS - * or BCN) - */ - uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for - * driver enqueued frames - */ - uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ - uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ - uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not - * data/control/management - */ - uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ - uint32 rxbadplcp; /* parity check of the PLCP header failed */ - uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ - uint32 rxstrt; /* Number of received frames with a good PLCP - * (i.e. passing parity check) - */ - uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ - uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ - uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ - uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ - uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ - uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ - uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ - uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ - uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ - uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ - uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ - uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ - uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ - uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC - * (unlikely to see these) - */ - uint32 rxbeaconmbss; /* beacons received from member of BSS */ - uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from - * other BSS (WDS FRAME) - */ - uint32 rxbeaconobss; /* beacons received from other BSS */ - uint32 rxrsptmout; /* Number of response timeouts for transmitted frames - * expecting a response - */ - uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ - uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ - uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ - uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ - uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ - uint32 pmqovfl; /* Number of PMQ overflows */ - uint32 rxcgprqfrm; /* Number of received Probe requests that made it into - * the PRQ fifo - */ - uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ - uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did - * not get ACK - */ - uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ - uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ - * fifo because a probe response could not be sent out within - * the time limit defined in M_PRS_MAXTIME - */ - uint32 rxnack; - uint32 frmscons; - uint32 txnack; - uint32 txglitch_nack; /* obsolete */ - uint32 txburst; /* obsolete */ - - /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ - uint32 txfrag; /* dot11TransmittedFragmentCount */ - uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ - uint32 txfail; /* dot11FailedCount */ - uint32 txretry; /* dot11RetryCount */ - uint32 txretrie; /* dot11MultipleRetryCount */ - uint32 rxdup; /* dot11FrameduplicateCount */ - uint32 txrts; /* dot11RTSSuccessCount */ - uint32 txnocts; /* dot11RTSFailureCount */ - uint32 txnoack; /* dot11ACKFailureCount */ - uint32 rxfrag; /* dot11ReceivedFragmentCount */ - uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ - uint32 rxcrc; /* dot11FCSErrorCount */ - uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ - uint32 rxundec; /* dot11WEPUndecryptableCount */ - - /* WPA2 counters (see rxundec for DecryptFailureCount) */ - uint32 tkipmicfaill; /* TKIPLocalMICFailures */ - uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ - uint32 tkipreplay; /* TKIPReplays */ - uint32 ccmpfmterr; /* CCMPFormatErrors */ - uint32 ccmpreplay; /* CCMPReplays */ - uint32 ccmpundec; /* CCMPDecryptErrors */ - uint32 fourwayfail; /* FourWayHandshakeFailures */ - uint32 wepundec; /* dot11WEPUndecryptableCount */ - uint32 wepicverr; /* dot11WEPICVErrorCount */ - uint32 decsuccess; /* DecryptSuccessCount */ - uint32 tkipicverr; /* TKIPICVErrorCount */ - uint32 wepexcluded; /* dot11WEPExcludedCount */ - - uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ - - /* WPA2 counters (see rxundec for DecryptFailureCount) */ - uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ - uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ - uint32 tkipreplay_mcst; /* TKIPReplays */ - uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ - uint32 ccmpreplay_mcst; /* CCMPReplays */ - uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ - uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ - uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ - uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ - uint32 decsuccess_mcst; /* DecryptSuccessCount */ - uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ - uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ - - uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ - uint32 txexptime; /* Tx frames suppressed due to timer expiration */ - uint32 psmwds; /* Count PSM watchdogs */ - uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ - - /* MBSS counters, AP only */ - uint32 prq_entries_handled; /* PRQ entries read in */ - uint32 prq_undirected_entries; /* which were bcast bss & ssid */ - uint32 prq_bad_entries; /* which could not be translated to info */ - uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ - uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ - uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ - uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ - - /* per-rate receive stat counters */ - uint32 rx1mbps; /* packets rx at 1Mbps */ - uint32 rx2mbps; /* packets rx at 2Mbps */ - uint32 rx5mbps5; /* packets rx at 5.5Mbps */ - uint32 rx6mbps; /* packets rx at 6Mbps */ - uint32 rx9mbps; /* packets rx at 9Mbps */ - uint32 rx11mbps; /* packets rx at 11Mbps */ - uint32 rx12mbps; /* packets rx at 12Mbps */ - uint32 rx18mbps; /* packets rx at 18Mbps */ - uint32 rx24mbps; /* packets rx at 24Mbps */ - uint32 rx36mbps; /* packets rx at 36Mbps */ - uint32 rx48mbps; /* packets rx at 48Mbps */ - uint32 rx54mbps; /* packets rx at 54Mbps */ - uint32 rx108mbps; /* packets rx at 108mbps */ - uint32 rx162mbps; /* packets rx at 162mbps */ - uint32 rx216mbps; /* packets rx at 216 mbps */ - uint32 rx270mbps; /* packets rx at 270 mbps */ - uint32 rx324mbps; /* packets rx at 324 mbps */ - uint32 rx378mbps; /* packets rx at 378 mbps */ - uint32 rx432mbps; /* packets rx at 432 mbps */ - uint32 rx486mbps; /* packets rx at 486 mbps */ - uint32 rx540mbps; /* packets rx at 540 mbps */ - - /* pkteng rx frame stats */ - uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ - uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ - - uint32 rfdisable; /* count of radio disables */ - uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ - - uint32 txmpdu_sgi; /* count for sgi transmit */ - uint32 rxmpdu_sgi; /* count for sgi received */ - uint32 txmpdu_stbc; /* count for stbc transmit */ - uint32 rxmpdu_stbc; /* count for stbc received */ -} wl_cnt_ver_six_t; - - -#ifndef LINUX_POSTMOGRIFY_REMOVAL -#define WL_DELTA_STATS_T_VERSION 1 /* current version of wl_delta_stats_t struct */ - -typedef struct { - uint16 version; /* see definition of WL_DELTA_STATS_T_VERSION */ - uint16 length; /* length of entire structure */ - - /* transmit stat counters */ - uint32 txframe; /* tx data frames */ - uint32 txbyte; /* tx data bytes */ - uint32 txretrans; /* tx mac retransmits */ - uint32 txfail; /* tx failures */ - - /* receive stat counters */ - uint32 rxframe; /* rx data frames */ - uint32 rxbyte; /* rx data bytes */ - - /* per-rate receive stat counters */ - uint32 rx1mbps; /* packets rx at 1Mbps */ - uint32 rx2mbps; /* packets rx at 2Mbps */ - uint32 rx5mbps5; /* packets rx at 5.5Mbps */ - uint32 rx6mbps; /* packets rx at 6Mbps */ - uint32 rx9mbps; /* packets rx at 9Mbps */ - uint32 rx11mbps; /* packets rx at 11Mbps */ - uint32 rx12mbps; /* packets rx at 12Mbps */ - uint32 rx18mbps; /* packets rx at 18Mbps */ - uint32 rx24mbps; /* packets rx at 24Mbps */ - uint32 rx36mbps; /* packets rx at 36Mbps */ - uint32 rx48mbps; /* packets rx at 48Mbps */ - uint32 rx54mbps; /* packets rx at 54Mbps */ - uint32 rx108mbps; /* packets rx at 108mbps */ - uint32 rx162mbps; /* packets rx at 162mbps */ - uint32 rx216mbps; /* packets rx at 216 mbps */ - uint32 rx270mbps; /* packets rx at 270 mbps */ - uint32 rx324mbps; /* packets rx at 324 mbps */ - uint32 rx378mbps; /* packets rx at 378 mbps */ - uint32 rx432mbps; /* packets rx at 432 mbps */ - uint32 rx486mbps; /* packets rx at 486 mbps */ - uint32 rx540mbps; /* packets rx at 540 mbps */ -} wl_delta_stats_t; -#endif /* LINUX_POSTMOGRIFY_REMOVAL */ - -#define WL_WME_CNT_VERSION 1 /* current version of wl_wme_cnt_t */ - -typedef struct { - uint32 packets; - uint32 bytes; -} wl_traffic_stats_t; - -typedef struct { - uint16 version; /* see definition of WL_WME_CNT_VERSION */ - uint16 length; /* length of entire structure */ - - wl_traffic_stats_t tx[AC_COUNT]; /* Packets transmitted */ - wl_traffic_stats_t tx_failed[AC_COUNT]; /* Packets dropped or failed to transmit */ - wl_traffic_stats_t rx[AC_COUNT]; /* Packets received */ - wl_traffic_stats_t rx_failed[AC_COUNT]; /* Packets failed to receive */ - - wl_traffic_stats_t forward[AC_COUNT]; /* Packets forwarded by AP */ - - wl_traffic_stats_t tx_expired[AC_COUNT]; /* packets dropped due to lifetime expiry */ - -} wl_wme_cnt_t; - -struct wl_msglevel2 { - uint32 low; - uint32 high; -}; - -typedef struct wl_mkeep_alive_pkt { - uint16 version; /* Version for mkeep_alive */ - uint16 length; /* length of fixed parameters in the structure */ - uint32 period_msec; - uint16 len_bytes; - uint8 keep_alive_id; /* 0 - 3 for N = 4 */ - uint8 data[1]; -} wl_mkeep_alive_pkt_t; - -#define WL_MKEEP_ALIVE_VERSION 1 -#define WL_MKEEP_ALIVE_FIXED_LEN OFFSETOF(wl_mkeep_alive_pkt_t, data) -#define WL_MKEEP_ALIVE_PRECISION 500 - -#ifndef LINUX_POSTMOGRIFY_REMOVAL -#ifdef WLBA - -#define WLC_BA_CNT_VERSION 1 /* current version of wlc_ba_cnt_t */ - -/* block ack related stats */ -typedef struct wlc_ba_cnt { - uint16 version; /* WLC_BA_CNT_VERSION */ - uint16 length; /* length of entire structure */ - - /* transmit stat counters */ - uint32 txpdu; /* pdus sent */ - uint32 txsdu; /* sdus sent */ - uint32 txfc; /* tx side flow controlled packets */ - uint32 txfci; /* tx side flow control initiated */ - uint32 txretrans; /* retransmitted pdus */ - uint32 txbatimer; /* ba resend due to timer */ - uint32 txdrop; /* dropped packets */ - uint32 txaddbareq; /* addba req sent */ - uint32 txaddbaresp; /* addba resp sent */ - uint32 txdelba; /* delba sent */ - uint32 txba; /* ba sent */ - uint32 txbar; /* bar sent */ - uint32 txpad[4]; /* future */ - - /* receive side counters */ - uint32 rxpdu; /* pdus recd */ - uint32 rxqed; /* pdus buffered before sending up */ - uint32 rxdup; /* duplicate pdus */ - uint32 rxnobuf; /* pdus discarded due to no buf */ - uint32 rxaddbareq; /* addba req recd */ - uint32 rxaddbaresp; /* addba resp recd */ - uint32 rxdelba; /* delba recd */ - uint32 rxba; /* ba recd */ - uint32 rxbar; /* bar recd */ - uint32 rxinvba; /* invalid ba recd */ - uint32 rxbaholes; /* ba recd with holes */ - uint32 rxunexp; /* unexpected packets */ - uint32 rxpad[4]; /* future */ -} wlc_ba_cnt_t; -#endif /* WLBA */ - -/* structure for per-tid ampdu control */ -struct ampdu_tid_control { - uint8 tid; /* tid */ - uint8 enable; /* enable/disable */ -}; - -/* structure for identifying ea/tid for sending addba/delba */ -struct ampdu_ea_tid { - struct ether_addr ea; /* Station address */ - uint8 tid; /* tid */ -}; -/* structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ -struct ampdu_retry_tid { - uint8 tid; /* tid */ - uint8 retry; /* retry value */ -}; - -/* Different discovery modes for dpt */ -#define DPT_DISCOVERY_MANUAL 0x01 /* manual discovery mode */ -#define DPT_DISCOVERY_AUTO 0x02 /* auto discovery mode */ -#define DPT_DISCOVERY_SCAN 0x04 /* scan-based discovery mode */ - -/* different path selection values */ -#define DPT_PATHSEL_AUTO 0 /* auto mode for path selection */ -#define DPT_PATHSEL_DIRECT 1 /* always use direct DPT path */ -#define DPT_PATHSEL_APPATH 2 /* always use AP path */ - -/* different ops for deny list */ -#define DPT_DENY_LIST_ADD 1 /* add to dpt deny list */ -#define DPT_DENY_LIST_REMOVE 2 /* remove from dpt deny list */ - -/* different ops for manual end point */ -#define DPT_MANUAL_EP_CREATE 1 /* create manual dpt endpoint */ -#define DPT_MANUAL_EP_MODIFY 2 /* modify manual dpt endpoint */ -#define DPT_MANUAL_EP_DELETE 3 /* delete manual dpt endpoint */ - -/* structure for dpt iovars */ -typedef struct dpt_iovar { - struct ether_addr ea; /* Station address */ - uint8 mode; /* mode: depends on iovar */ - uint32 pad; /* future */ -} dpt_iovar_t; - -/* flags to indicate DPT status */ -#define DPT_STATUS_ACTIVE 0x01 /* link active (though may be suspended) */ -#define DPT_STATUS_AES 0x02 /* link secured through AES encryption */ -#define DPT_STATUS_FAILED 0x04 /* DPT link failed */ - -#define DPT_FNAME_LEN 48 /* Max length of friendly name */ - -typedef struct dpt_status { - uint8 status; /* flags to indicate status */ - uint8 fnlen; /* length of friendly name */ - uchar name[DPT_FNAME_LEN]; /* friendly name */ - uint32 rssi; /* RSSI of the link */ - sta_info_t sta; /* sta info */ -} dpt_status_t; - -/* structure for dpt list */ -typedef struct dpt_list { - uint32 num; /* number of entries in struct */ - dpt_status_t status[1]; /* per station info */ -} dpt_list_t; - -/* structure for dpt friendly name */ -typedef struct dpt_fname { - uint8 len; /* length of friendly name */ - uchar name[DPT_FNAME_LEN]; /* friendly name */ -} dpt_fname_t; - -#define BDD_FNAME_LEN 32 /* Max length of friendly name */ -typedef struct bdd_fname { - uint8 len; /* length of friendly name */ - uchar name[BDD_FNAME_LEN]; /* friendly name */ -} bdd_fname_t; - -/* structure for addts arguments */ -/* For ioctls that take a list of TSPEC */ -struct tslist { - int count; /* number of tspecs */ - struct tsinfo_arg tsinfo[1]; /* variable length array of tsinfo */ -}; - -#ifdef WLTDLS -/* different ops for manual end point */ -#define TDLS_MANUAL_EP_CREATE 1 /* create manual dpt endpoint */ -#define TDLS_MANUAL_EP_MODIFY 2 /* modify manual dpt endpoint */ -#define TDLS_MANUAL_EP_DELETE 3 /* delete manual dpt endpoint */ -#define TDLS_MANUAL_EP_PM 4 /* put dpt endpoint in PM mode */ -#define TDLS_MANUAL_EP_WAKE 5 /* wake up dpt endpoint from PM */ -#define TDLS_MANUAL_EP_DISCOVERY 6 /* discover if endpoint is TDLS capable */ -#define TDLS_MANUAL_EP_CHSW 7 /* channel switch */ - -/* structure for tdls iovars */ -typedef struct tdls_iovar { - struct ether_addr ea; /* Station address */ - uint8 mode; /* mode: depends on iovar */ - chanspec_t chanspec; - uint32 pad; /* future */ -} tdls_iovar_t; -#endif /* WLTDLS */ - -/* structure for addts/delts arguments */ -typedef struct tspec_arg { - uint16 version; /* see definition of TSPEC_ARG_VERSION */ - uint16 length; /* length of entire structure */ - uint flag; /* bit field */ - /* TSPEC Arguments */ - struct tsinfo_arg tsinfo; /* TS Info bit field */ - uint16 nom_msdu_size; /* (Nominal or fixed) MSDU Size (bytes) */ - uint16 max_msdu_size; /* Maximum MSDU Size (bytes) */ - uint min_srv_interval; /* Minimum Service Interval (us) */ - uint max_srv_interval; /* Maximum Service Interval (us) */ - uint inactivity_interval; /* Inactivity Interval (us) */ - uint suspension_interval; /* Suspension Interval (us) */ - uint srv_start_time; /* Service Start Time (us) */ - uint min_data_rate; /* Minimum Data Rate (bps) */ - uint mean_data_rate; /* Mean Data Rate (bps) */ - uint peak_data_rate; /* Peak Data Rate (bps) */ - uint max_burst_size; /* Maximum Burst Size (bytes) */ - uint delay_bound; /* Delay Bound (us) */ - uint min_phy_rate; /* Minimum PHY Rate (bps) */ - uint16 surplus_bw; /* Surplus Bandwidth Allowance (range 1.0 to 8.0) */ - uint16 medium_time; /* Medium Time (32 us/s periods) */ - uint8 dialog_token; /* dialog token */ -} tspec_arg_t; - -/* tspec arg for desired station */ -typedef struct tspec_per_sta_arg { - struct ether_addr ea; - struct tspec_arg ts; -} tspec_per_sta_arg_t; - -/* structure for max bandwidth for each access category */ -typedef struct wme_max_bandwidth { - uint32 ac[AC_COUNT]; /* max bandwidth for each access category */ -} wme_max_bandwidth_t; - -#define WL_WME_MBW_PARAMS_IO_BYTES (sizeof(wme_max_bandwidth_t)) - -/* current version of wl_tspec_arg_t struct */ -#define TSPEC_ARG_VERSION 2 /* current version of wl_tspec_arg_t struct */ -#define TSPEC_ARG_LENGTH 55 /* argument length from tsinfo to medium_time */ -#define TSPEC_DEFAULT_DIALOG_TOKEN 42 /* default dialog token */ -#define TSPEC_DEFAULT_SBW_FACTOR 0x3000 /* default surplus bw */ - - -#define WL_WOWL_KEEPALIVE_MAX_PACKET_SIZE 80 -#define WLC_WOWL_MAX_KEEPALIVE 2 -/* define for flag */ -#define TSPEC_PENDING 0 /* TSPEC pending */ -#define TSPEC_ACCEPTED 1 /* TSPEC accepted */ -#define TSPEC_REJECTED 2 /* TSPEC rejected */ -#define TSPEC_UNKNOWN 3 /* TSPEC unknown */ -#define TSPEC_STATUS_MASK 7 /* TSPEC status mask */ - - -/* Software feature flag defines used by wlfeatureflag */ -#ifdef WLAFTERBURNER -#define WL_SWFL_ABBFL 0x0001 /* Allow Afterburner on systems w/o hardware BFL */ -#define WL_SWFL_ABENCORE 0x0002 /* Allow AB on non-4318E chips */ -#endif /* WLAFTERBURNER */ -#define WL_SWFL_NOHWRADIO 0x0004 -#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ -#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ - -#define WL_LIFETIME_MAX 0xFFFF /* Max value in ms */ - -/* Packet lifetime configuration per ac */ -typedef struct wl_lifetime { - uint32 ac; /* access class */ - uint32 lifetime; /* Packet lifetime value in ms */ -} wl_lifetime_t; - -/* Channel Switch Announcement param */ -typedef struct wl_chan_switch { - uint8 mode; /* value 0 or 1 */ - uint8 count; /* count # of beacons before switching */ - chanspec_t chspec; /* chanspec */ - uint8 reg; /* regulatory class */ -} wl_chan_switch_t; -#endif /* LINUX_POSTMOGRIFY_REMOVAL */ - -/* Roaming trigger definitions for WLC_SET_ROAM_TRIGGER. - * - * (-100 < value < 0) value is used directly as a roaming trigger in dBm - * (0 <= value) value specifies a logical roaming trigger level from - * the list below - * - * WLC_GET_ROAM_TRIGGER always returns roaming trigger value in dBm, never - * the logical roam trigger value. - */ -#define WLC_ROAM_TRIGGER_DEFAULT 0 /* default roaming trigger */ -#define WLC_ROAM_TRIGGER_BANDWIDTH 1 /* optimize for bandwidth roaming trigger */ -#define WLC_ROAM_TRIGGER_DISTANCE 2 /* optimize for distance roaming trigger */ -#define WLC_ROAM_TRIGGER_AUTO 3 /* auto-detect environment */ -#define WLC_ROAM_TRIGGER_MAX_VALUE 3 /* max. valid value */ - -/* Preferred Network Offload (PNO, formerly PFN) defines */ -#define WPA_AUTH_PFN_ANY 0xffffffff /* for PFN, match only ssid */ - -enum { - PFN_LIST_ORDER, - PFN_RSSI -}; - -enum { - DISABLE, - ENABLE -}; - -enum { - OFF_ADAPT, - SMART_ADAPT, - STRICT_ADAPT, - SLOW_ADAPT -}; - -#define SORT_CRITERIA_BIT 0 -#define AUTO_NET_SWITCH_BIT 1 -#define ENABLE_BKGRD_SCAN_BIT 2 -#define IMMEDIATE_SCAN_BIT 3 -#define AUTO_CONNECT_BIT 4 -#define ENABLE_BD_SCAN_BIT 5 -#define ENABLE_ADAPTSCAN_BIT 6 -#define IMMEDIATE_EVENT_BIT 8 - -#define SORT_CRITERIA_MASK 0x0001 -#define AUTO_NET_SWITCH_MASK 0x0002 -#define ENABLE_BKGRD_SCAN_MASK 0x0004 -#define IMMEDIATE_SCAN_MASK 0x0008 -#define AUTO_CONNECT_MASK 0x0010 - -#define ENABLE_BD_SCAN_MASK 0x0020 -#define ENABLE_ADAPTSCAN_MASK 0x00c0 -#define IMMEDIATE_EVENT_MASK 0x0100 - -#define PFN_VERSION 2 -#define PFN_SCANRESULT_VERSION 1 -#define MAX_PFN_LIST_COUNT 16 - -#define PFN_COMPLETE 1 -#define PFN_INCOMPLETE 0 - -#define DEFAULT_BESTN 2 -#define DEFAULT_MSCAN 0 -#define DEFAULT_REPEAT 10 -#define DEFAULT_EXP 2 - -/* PFN network info structure */ -typedef struct wl_pfn_subnet_info { - struct ether_addr BSSID; - uint8 channel; /* channel number only */ - uint8 SSID_len; - uint8 SSID[32]; -} wl_pfn_subnet_info_t; - -typedef struct wl_pfn_net_info { - wl_pfn_subnet_info_t pfnsubnet; - int16 RSSI; /* receive signal strength (in dBm) */ - uint16 timestamp; /* age in seconds */ -} wl_pfn_net_info_t; - -typedef struct wl_pfn_scanresults { - uint32 version; - uint32 status; - uint32 count; - wl_pfn_net_info_t netinfo[1]; -} wl_pfn_scanresults_t; - -/* PFN data structure */ -typedef struct wl_pfn_param { - int32 version; /* PNO parameters version */ - int32 scan_freq; /* Scan frequency */ - int32 lost_network_timeout; /* Timeout in sec. to declare - * discovered network as lost - */ - int16 flags; /* Bit field to control features - * of PFN such as sort criteria auto - * enable switch and background scan - */ - int16 rssi_margin; /* Margin to avoid jitter for choosing a - * PFN based on RSSI sort criteria - */ - uint8 bestn; /* number of best networks in each scan */ - uint8 mscan; /* number of scans recorded */ - uint8 repeat; /* Minimum number of scan intervals - *before scan frequency changes in adaptive scan - */ - uint8 exp; /* Exponent of 2 for maximum scan interval */ - int32 slow_freq; /* slow scan period */ -} wl_pfn_param_t; - -typedef struct wl_pfn_bssid { - struct ether_addr macaddr; - /* Bit4: suppress_lost, Bit3: suppress_found */ - uint16 flags; -} wl_pfn_bssid_t; -#define WL_PFN_SUPPRESSFOUND_MASK 0x08 -#define WL_PFN_SUPPRESSLOST_MASK 0x10 - -typedef struct wl_pfn_cfg { - uint32 reporttype; - int32 channel_num; - uint16 channel_list[WL_NUMCHANNELS]; -} wl_pfn_cfg_t; -#define WL_PFN_REPORT_ALLNET 0 -#define WL_PFN_REPORT_SSIDNET 1 -#define WL_PFN_REPORT_BSSIDNET 2 - -typedef struct wl_pfn { - wlc_ssid_t ssid; /* ssid name and its length */ - int32 bss_type; /* IBSS or infrastructure */ - int32 infra; /* BSS Vs IBSS */ - int32 auth; /* Open Vs Closed */ - int32 wpa_auth; /* WPA type */ - int32 wsec; /* wsec value */ -} wl_pfn_t; -#define WL_PFN_HIDDEN_BIT 2 -#define PNO_SCAN_MAX_FW 508*1000 /* max time scan time in msec */ -#define PNO_SCAN_MAX_FW_SEC PNO_SCAN_MAX_FW/1000 /* max time scan time in SEC */ -#define PNO_SCAN_MIN_FW_SEC 10 /* min time scan time in SEC */ -#define WL_PFN_HIDDEN_MASK 0x4 - -/* TCP Checksum Offload defines */ -#define TOE_TX_CSUM_OL 0x00000001 -#define TOE_RX_CSUM_OL 0x00000002 - -/* TCP Checksum Offload error injection for testing */ -#define TOE_ERRTEST_TX_CSUM 0x00000001 -#define TOE_ERRTEST_RX_CSUM 0x00000002 -#define TOE_ERRTEST_RX_CSUM2 0x00000004 - -struct toe_ol_stats_t { - /* Num of tx packets that don't need to be checksummed */ - uint32 tx_summed; - - /* Num of tx packets where checksum is filled by offload engine */ - uint32 tx_iph_fill; - uint32 tx_tcp_fill; - uint32 tx_udp_fill; - uint32 tx_icmp_fill; - - /* Num of rx packets where toe finds out if checksum is good or bad */ - uint32 rx_iph_good; - uint32 rx_iph_bad; - uint32 rx_tcp_good; - uint32 rx_tcp_bad; - uint32 rx_udp_good; - uint32 rx_udp_bad; - uint32 rx_icmp_good; - uint32 rx_icmp_bad; - - /* Num of tx packets in which csum error is injected */ - uint32 tx_tcp_errinj; - uint32 tx_udp_errinj; - uint32 tx_icmp_errinj; - - /* Num of rx packets in which csum error is injected */ - uint32 rx_tcp_errinj; - uint32 rx_udp_errinj; - uint32 rx_icmp_errinj; -}; - -/* ARP Offload feature flags for arp_ol iovar */ -#define ARP_OL_AGENT 0x00000001 -#define ARP_OL_SNOOP 0x00000002 -#define ARP_OL_HOST_AUTO_REPLY 0x00000004 -#define ARP_OL_PEER_AUTO_REPLY 0x00000008 - -/* ARP Offload error injection */ -#define ARP_ERRTEST_REPLY_PEER 0x1 -#define ARP_ERRTEST_REPLY_HOST 0x2 - -#define ARP_MULTIHOMING_MAX 8 /* Maximum local host IP addresses */ -#define ND_MULTIHOMING_MAX 8 /* Maximum local host IP addresses */ - -/* Arp offload statistic counts */ -struct arp_ol_stats_t { - uint32 host_ip_entries; /* Host IP table addresses (more than one if multihomed) */ - uint32 host_ip_overflow; /* Host IP table additions skipped due to overflow */ - - uint32 arp_table_entries; /* ARP table entries */ - uint32 arp_table_overflow; /* ARP table additions skipped due to overflow */ - - uint32 host_request; /* ARP requests from host */ - uint32 host_reply; /* ARP replies from host */ - uint32 host_service; /* ARP requests from host serviced by ARP Agent */ - - uint32 peer_request; /* ARP requests received from network */ - uint32 peer_request_drop; /* ARP requests from network that were dropped */ - uint32 peer_reply; /* ARP replies received from network */ - uint32 peer_reply_drop; /* ARP replies from network that were dropped */ - uint32 peer_service; /* ARP request from host serviced by ARP Agent */ -}; - -/* NS offload statistic counts */ -struct nd_ol_stats_t { - uint32 host_ip_entries; /* Host IP table addresses (more than one if multihomed) */ - uint32 host_ip_overflow; /* Host IP table additions skipped due to overflow */ - uint32 peer_request; /* NS requests received from network */ - uint32 peer_request_drop; /* NS requests from network that were dropped */ - uint32 peer_reply_drop; /* NA replies from network that were dropped */ - uint32 peer_service; /* NS request from host serviced by firmware */ -}; - -/* - * Keep-alive packet offloading. - */ - -/* NAT keep-alive packets format: specifies the re-transmission period, the packet - * length, and packet contents. - */ -typedef struct wl_keep_alive_pkt { - uint32 period_msec; /* Retransmission period (0 to disable packet re-transmits) */ - uint16 len_bytes; /* Size of packet to transmit (0 to disable packet re-transmits) */ - uint8 data[1]; /* Variable length packet to transmit. Contents should include - * entire ethernet packet (enet header, IP header, UDP header, - * and UDP payload) in network byte order. - */ -} wl_keep_alive_pkt_t; - -#define WL_KEEP_ALIVE_FIXED_LEN OFFSETOF(wl_keep_alive_pkt_t, data) - -/* - * Dongle pattern matching filter. - */ - -/* Packet filter types. Currently, only pattern matching is supported. */ -typedef enum wl_pkt_filter_type { - WL_PKT_FILTER_TYPE_PATTERN_MATCH /* Pattern matching filter */ -} wl_pkt_filter_type_t; - -#define WL_PKT_FILTER_TYPE wl_pkt_filter_type_t - -/* Pattern matching filter. Specifies an offset within received packets to - * start matching, the pattern to match, the size of the pattern, and a bitmask - * that indicates which bits within the pattern should be matched. - */ -typedef struct wl_pkt_filter_pattern { - uint32 offset; /* Offset within received packet to start pattern matching. - * Offset '0' is the first byte of the ethernet header. - */ - uint32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ - uint8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts - * at offset 0. Pattern immediately follows mask. - */ -} wl_pkt_filter_pattern_t; - -/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ -typedef struct wl_pkt_filter { - uint32 id; /* Unique filter id, specified by app. */ - uint32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */ - uint32 negate_match; /* Negate the result of filter matches */ - union { /* Filter definitions */ - wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */ - } u; -} wl_pkt_filter_t; - -#define WL_PKT_FILTER_FIXED_LEN OFFSETOF(wl_pkt_filter_t, u) -#define WL_PKT_FILTER_PATTERN_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_t, mask_and_pattern) - -/* IOVAR "pkt_filter_enable" parameter. */ -typedef struct wl_pkt_filter_enable { - uint32 id; /* Unique filter id */ - uint32 enable; /* Enable/disable bool */ -} wl_pkt_filter_enable_t; - -/* IOVAR "pkt_filter_list" parameter. Used to retrieve a list of installed filters. */ -typedef struct wl_pkt_filter_list { - uint32 num; /* Number of installed packet filters */ - wl_pkt_filter_t filter[1]; /* Variable array of packet filters. */ -} wl_pkt_filter_list_t; - -#define WL_PKT_FILTER_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_list_t, filter) - -/* IOVAR "pkt_filter_stats" parameter. Used to retrieve debug statistics. */ -typedef struct wl_pkt_filter_stats { - uint32 num_pkts_matched; /* # filter matches for specified filter id */ - uint32 num_pkts_forwarded; /* # packets fwded from dongle to host for all filters */ - uint32 num_pkts_discarded; /* # packets discarded by dongle for all filters */ -} wl_pkt_filter_stats_t; - -/* Sequential Commands ioctl */ -typedef struct wl_seq_cmd_ioctl { - uint32 cmd; /* common ioctl definition */ - uint32 len; /* length of user buffer */ -} wl_seq_cmd_ioctl_t; - -#define WL_SEQ_CMD_ALIGN_BYTES 4 - -/* These are the set of get IOCTLs that should be allowed when using - * IOCTL sequence commands. These are issued implicitly by wl.exe each time - * it is invoked. We never want to buffer these, or else wl.exe will stop working. - */ -#define WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd) \ - (((cmd) == WLC_GET_MAGIC) || \ - ((cmd) == WLC_GET_VERSION) || \ - ((cmd) == WLC_GET_AP) || \ - ((cmd) == WLC_GET_INSTANCE)) - -/* - * Packet engine interface - */ - -#define WL_PKTENG_PER_TX_START 0x01 -#define WL_PKTENG_PER_TX_STOP 0x02 -#define WL_PKTENG_PER_RX_START 0x04 -#define WL_PKTENG_PER_RX_WITH_ACK_START 0x05 -#define WL_PKTENG_PER_TX_WITH_ACK_START 0x06 -#define WL_PKTENG_PER_RX_STOP 0x08 -#define WL_PKTENG_PER_MASK 0xff - -#define WL_PKTENG_SYNCHRONOUS 0x100 /* synchronous flag */ - -typedef struct wl_pkteng { - uint32 flags; - uint32 delay; /* Inter-packet delay */ - uint32 nframes; /* Number of frames */ - uint32 length; /* Packet length */ - uint8 seqno; /* Enable/disable sequence no. */ - struct ether_addr dest; /* Destination address */ - struct ether_addr src; /* Source address */ -} wl_pkteng_t; - -#define NUM_80211b_RATES 4 -#define NUM_80211ag_RATES 8 -#define NUM_80211n_RATES 32 -#define NUM_80211_RATES (NUM_80211b_RATES+NUM_80211ag_RATES+NUM_80211n_RATES) -typedef struct wl_pkteng_stats { - uint32 lostfrmcnt; /* RX PER test: no of frames lost (skip seqno) */ - int32 rssi; /* RSSI */ - int32 snr; /* signal to noise ratio */ - uint16 rxpktcnt[NUM_80211_RATES+1]; -} wl_pkteng_stats_t; - -#define WL_WOWL_MAGIC (1 << 0) /* Wakeup on Magic packet */ -#define WL_WOWL_NET (1 << 1) /* Wakeup on Netpattern */ -#define WL_WOWL_DIS (1 << 2) /* Wakeup on loss-of-link due to Disassoc/Deauth */ -#define WL_WOWL_RETR (1 << 3) /* Wakeup on retrograde TSF */ -#define WL_WOWL_BCN (1 << 4) /* Wakeup on loss of beacon */ -#define WL_WOWL_TST (1 << 5) /* Wakeup after test */ -#define WL_WOWL_M1 (1 << 6) /* Wakeup after PTK refresh */ -#define WL_WOWL_EAPID (1 << 7) /* Wakeup after receipt of EAP-Identity Req */ -#define WL_WOWL_PME_GPIO (1 << 8) /* Wakeind via PME(0) or GPIO(1) */ -#define WL_WOWL_NEEDTKIP1 (1 << 9) /* need tkip phase 1 key to be updated by the driver */ -#define WL_WOWL_GTK_FAILURE (1 << 10) /* enable wakeup if GTK fails */ -#define WL_WOWL_EXTMAGPAT (1 << 11) /* support extended magic packets */ -#define WL_WOWL_ARPOFFLOAD (1 << 12) /* support ARP/NS/keepalive offloading */ -#define WL_WOWL_WPA2 (1 << 13) /* read protocol version for EAPOL frames */ -#define WL_WOWL_KEYROT (1 << 14) /* If the bit is set, use key rotaton */ -#define WL_WOWL_BCAST (1 << 15) /* If the bit is set, frm received was bcast frame */ - -#define MAGIC_PKT_MINLEN 102 /* Magic pkt min length is 6 * 0xFF + 16 * ETHER_ADDR_LEN */ - -#define WOWL_PATTEN_TYPE_ARP (1 << 0) /* ARP offload Pattern */ -#define WOWL_PATTEN_TYPE_NA (1 << 1) /* NA offload Pattern */ -typedef struct { - uint32 masksize; /* Size of the mask in #of bytes */ - uint32 offset; /* Offset to start looking for the packet in # of bytes */ - uint32 patternoffset; /* Offset of start of pattern in the structure */ - uint32 patternsize; /* Size of the pattern itself in #of bytes */ - uint32 id; /* id */ - uint32 reasonsize; /* Size of the wakeup reason code */ - uint32 flags; /* Flags to tell the pattern type and other properties */ - /* Mask follows the structure above */ - /* Pattern follows the mask is at 'patternoffset' from the start */ -} wl_wowl_pattern_t; - -typedef struct { - uint count; - wl_wowl_pattern_t pattern[1]; -} wl_wowl_pattern_list_t; - -typedef struct { - uint8 pci_wakeind; /* Whether PCI PMECSR PMEStatus bit was set */ - uint16 ucode_wakeind; /* What wakeup-event indication was set by ucode */ -} wl_wowl_wakeind_t; - -/* per AC rate control related data structure */ -typedef struct wl_txrate_class { - uint8 init_rate; - uint8 min_rate; - uint8 max_rate; -} wl_txrate_class_t; - -/* Overlap BSS Scan parameters default, minimum, maximum */ -#define WLC_OBSS_SCAN_PASSIVE_DWELL_DEFAULT 20 /* unit TU */ -#define WLC_OBSS_SCAN_PASSIVE_DWELL_MIN 5 /* unit TU */ -#define WLC_OBSS_SCAN_PASSIVE_DWELL_MAX 1000 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVE_DWELL_DEFAULT 10 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVE_DWELL_MIN 10 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVE_DWELL_MAX 1000 /* unit TU */ -#define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_DEFAULT 300 /* unit Sec */ -#define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_MIN 10 /* unit Sec */ -#define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_MAX 900 /* unit Sec */ -#define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_DEFAULT 5 -#define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_MIN 5 -#define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_MAX 100 -#define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_DEFAULT 200 /* unit TU */ -#define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_MIN 200 /* unit TU */ -#define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_MAX 10000 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_DEFAULT 20 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_MIN 20 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_MAX 10000 /* unit TU */ -#define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_DEFAULT 25 /* unit percent */ -#define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_MIN 0 /* unit percent */ -#define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_MAX 100 /* unit percent */ - -/* structure for Overlap BSS scan arguments */ -typedef struct wl_obss_scan_arg { - int16 passive_dwell; - int16 active_dwell; - int16 bss_widthscan_interval; - int16 passive_total; - int16 active_total; - int16 chanwidth_transition_delay; - int16 activity_threshold; -} wl_obss_scan_arg_t; - -#define WL_OBSS_SCAN_PARAM_LEN sizeof(wl_obss_scan_arg_t) -#define WL_MIN_NUM_OBSS_SCAN_ARG 7 /* minimum number of arguments required for OBSS Scan */ - -#define WL_COEX_INFO_MASK 0x07 -#define WL_COEX_INFO_REQ 0x01 -#define WL_COEX_40MHZ_INTOLERANT 0x02 -#define WL_COEX_WIDTH20 0x04 - -#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ - -#define MAX_RSSI_LEVELS 8 - -/* RSSI event notification configuration. */ -typedef struct wl_rssi_event { - uint32 rate_limit_msec; /* # of events posted to application will be limited to - * one per specified period (0 to disable rate limit). - */ - uint8 num_rssi_levels; /* Number of entries in rssi_levels[] below */ - int8 rssi_levels[MAX_RSSI_LEVELS]; /* Variable number of RSSI levels. An event - * will be posted each time the RSSI of received - * beacons/packets crosses a level. - */ -} wl_rssi_event_t; - -typedef struct wl_action_obss_coex_req { - uint8 info; - uint8 num; - uint8 ch_list[1]; -} wl_action_obss_coex_req_t; - - -/* IOVar parameter block for small MAC address array with type indicator */ -#define WL_IOV_MAC_PARAM_LEN 4 - -#define WL_IOV_PKTQ_LOG_PRECS 16 - -typedef struct { - uint32 num_addrs; - char addr_type[WL_IOV_MAC_PARAM_LEN]; - struct ether_addr ea[WL_IOV_MAC_PARAM_LEN]; -} wl_iov_mac_params_t; - - -/* Parameter block for PKTQ_LOG statistics */ -typedef struct { - uint32 requested; /* packets requested to be stored */ - uint32 stored; /* packets stored */ - uint32 saved; /* packets saved, - because a lowest priority queue has given away one packet - */ - uint32 selfsaved; /* packets saved, - because an older packet from the same queue has been dropped - */ - uint32 full_dropped; /* packets dropped, - because pktq is full with higher precedence packets - */ - uint32 dropped; /* packets dropped because pktq per that precedence is full */ - uint32 sacrificed; /* packets dropped, - in order to save one from a queue of a highest priority - */ - uint32 busy; /* packets droped because of hardware/transmission error */ - uint32 retry; /* packets re-sent because they were not received */ - uint32 ps_retry; /* packets retried again prior to moving power save mode */ - uint32 retry_drop; /* packets finally dropped after retry limit */ - uint32 max_avail; /* the high-water mark of the queue capacity for packets - - goes to zero as queue fills - */ - uint32 max_used; /* the high-water mark of the queue utilisation for packets - - increases with use ('inverse' of max_avail) - */ - uint32 queue_capacity; /* the maximum capacity of the queue */ -} pktq_log_counters_v01_t; - -#define sacrified sacrificed - -typedef struct { - uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; - pktq_log_counters_v01_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; - char headings[1]; -} pktq_log_format_v01_t; - - -typedef struct { - uint32 version; - wl_iov_mac_params_t params; - union { - pktq_log_format_v01_t v01; - } pktq_log; -} wl_iov_pktq_log_t; - - -/* **** EXTLOG **** */ -#define EXTLOG_CUR_VER 0x0100 - -#define MAX_ARGSTR_LEN 18 /* At least big enough for storing ETHER_ADDR_STR_LEN */ - -/* log modules (bitmap) */ -#define LOG_MODULE_COMMON 0x0001 -#define LOG_MODULE_ASSOC 0x0002 -#define LOG_MODULE_EVENT 0x0004 -#define LOG_MODULE_MAX 3 /* Update when adding module */ - -/* log levels */ -#define WL_LOG_LEVEL_DISABLE 0 -#define WL_LOG_LEVEL_ERR 1 -#define WL_LOG_LEVEL_WARN 2 -#define WL_LOG_LEVEL_INFO 3 -#define WL_LOG_LEVEL_MAX WL_LOG_LEVEL_INFO /* Update when adding level */ - -/* flag */ -#define LOG_FLAG_EVENT 1 - -/* log arg_type */ -#define LOG_ARGTYPE_NULL 0 -#define LOG_ARGTYPE_STR 1 /* %s */ -#define LOG_ARGTYPE_INT 2 /* %d */ -#define LOG_ARGTYPE_INT_STR 3 /* %d...%s */ -#define LOG_ARGTYPE_STR_INT 4 /* %s...%d */ - -typedef struct wlc_extlog_cfg { - int max_number; - uint16 module; /* bitmap */ - uint8 level; - uint8 flag; - uint16 version; -} wlc_extlog_cfg_t; - -typedef struct log_record { - uint32 time; - uint16 module; - uint16 id; - uint8 level; - uint8 sub_unit; - uint8 seq_num; - int32 arg; - char str[MAX_ARGSTR_LEN]; -} log_record_t; - -typedef struct wlc_extlog_req { - uint32 from_last; - uint32 num; -} wlc_extlog_req_t; - -typedef struct wlc_extlog_results { - uint16 version; - uint16 record_len; - uint32 num; - log_record_t logs[1]; -} wlc_extlog_results_t; - -typedef struct log_idstr { - uint16 id; - uint16 flag; - uint8 arg_type; - const char *fmt_str; -} log_idstr_t; - -#define FMTSTRF_USER 1 - -/* flat ID definitions - * New definitions HAVE TO BE ADDED at the end of the table. Otherwise, it will - * affect backward compatibility with pre-existing apps - */ -typedef enum { - FMTSTR_DRIVER_UP_ID = 0, - FMTSTR_DRIVER_DOWN_ID = 1, - FMTSTR_SUSPEND_MAC_FAIL_ID = 2, - FMTSTR_NO_PROGRESS_ID = 3, - FMTSTR_RFDISABLE_ID = 4, - FMTSTR_REG_PRINT_ID = 5, - FMTSTR_EXPTIME_ID = 6, - FMTSTR_JOIN_START_ID = 7, - FMTSTR_JOIN_COMPLETE_ID = 8, - FMTSTR_NO_NETWORKS_ID = 9, - FMTSTR_SECURITY_MISMATCH_ID = 10, - FMTSTR_RATE_MISMATCH_ID = 11, - FMTSTR_AP_PRUNED_ID = 12, - FMTSTR_KEY_INSERTED_ID = 13, - FMTSTR_DEAUTH_ID = 14, - FMTSTR_DISASSOC_ID = 15, - FMTSTR_LINK_UP_ID = 16, - FMTSTR_LINK_DOWN_ID = 17, - FMTSTR_RADIO_HW_OFF_ID = 18, - FMTSTR_RADIO_HW_ON_ID = 19, - FMTSTR_EVENT_DESC_ID = 20, - FMTSTR_PNP_SET_POWER_ID = 21, - FMTSTR_RADIO_SW_OFF_ID = 22, - FMTSTR_RADIO_SW_ON_ID = 23, - FMTSTR_PWD_MISMATCH_ID = 24, - FMTSTR_FATAL_ERROR_ID = 25, - FMTSTR_AUTH_FAIL_ID = 26, - FMTSTR_ASSOC_FAIL_ID = 27, - FMTSTR_IBSS_FAIL_ID = 28, - FMTSTR_EXTAP_FAIL_ID = 29, - FMTSTR_MAX_ID -} log_fmtstr_id_t; - -#ifdef DONGLEOVERLAYS -typedef struct { - uint32 flags_idx; /* lower 8 bits: overlay index; upper 24 bits: flags */ - uint32 offset; /* offset into overlay region to write code */ - uint32 len; /* overlay code len */ - /* overlay code follows this struct */ -} wl_ioctl_overlay_t; - -#define OVERLAY_IDX_MASK 0x000000ff -#define OVERLAY_IDX_SHIFT 0 -#define OVERLAY_FLAGS_MASK 0xffffff00 -#define OVERLAY_FLAGS_SHIFT 8 -/* overlay written to device memory immediately after loading the base image */ -#define OVERLAY_FLAG_POSTLOAD 0x100 -/* defer overlay download until the device responds w/WLC_E_OVL_DOWNLOAD event */ -#define OVERLAY_FLAG_DEFER_DL 0x200 -/* overlay downloaded prior to the host going to sleep */ -#define OVERLAY_FLAG_PRESLEEP 0x400 - -#define OVERLAY_DOWNLOAD_CHUNKSIZE 1024 -#endif /* DONGLEOVERLAYS */ - -/* no default structure packing */ -#include <packed_section_end.h> - -/* require strict packing */ -#include <packed_section_start.h> -/* Structures and constants used for "vndr_ie" IOVar interface */ -#define VNDR_IE_CMD_LEN 4 /* length of the set command string: - * "add", "del" (+ NUL) - */ - -/* 802.11 Mgmt Packet flags */ -#define VNDR_IE_BEACON_FLAG 0x1 -#define VNDR_IE_PRBRSP_FLAG 0x2 -#define VNDR_IE_ASSOCRSP_FLAG 0x4 -#define VNDR_IE_AUTHRSP_FLAG 0x8 -#define VNDR_IE_PRBREQ_FLAG 0x10 -#define VNDR_IE_ASSOCREQ_FLAG 0x20 -#define VNDR_IE_IWAPID_FLAG 0x40 /* vendor IE in IW advertisement protocol ID field */ -#define VNDR_IE_CUSTOM_FLAG 0x100 /* allow custom IE id */ - -#define VNDR_IE_INFO_HDR_LEN (sizeof(uint32)) - -typedef BWL_PRE_PACKED_STRUCT struct { - uint32 pktflag; /* bitmask indicating which packet(s) contain this IE */ - vndr_ie_t vndr_ie_data; /* vendor IE data */ -} BWL_POST_PACKED_STRUCT vndr_ie_info_t; - -typedef BWL_PRE_PACKED_STRUCT struct { - int iecount; /* number of entries in the vndr_ie_list[] array */ - vndr_ie_info_t vndr_ie_list[1]; /* variable size list of vndr_ie_info_t structs */ -} BWL_POST_PACKED_STRUCT vndr_ie_buf_t; - -typedef BWL_PRE_PACKED_STRUCT struct { - char cmd[VNDR_IE_CMD_LEN]; /* vndr_ie IOVar set command : "add", "del" + NUL */ - vndr_ie_buf_t vndr_ie_buffer; /* buffer containing Vendor IE list information */ -} BWL_POST_PACKED_STRUCT vndr_ie_setbuf_t; - -/* tag_ID/length/value_buffer tuple */ -typedef BWL_PRE_PACKED_STRUCT struct { - uint8 id; - uint8 len; - uint8 data[1]; -} BWL_POST_PACKED_STRUCT tlv_t; - -typedef BWL_PRE_PACKED_STRUCT struct { - uint32 pktflag; /* bitmask indicating which packet(s) contain this IE */ - tlv_t ie_data; /* IE data */ -} BWL_POST_PACKED_STRUCT ie_info_t; - -typedef BWL_PRE_PACKED_STRUCT struct { - int iecount; /* number of entries in the ie_list[] array */ - ie_info_t ie_list[1]; /* variable size list of ie_info_t structs */ -} BWL_POST_PACKED_STRUCT ie_buf_t; - -typedef BWL_PRE_PACKED_STRUCT struct { - char cmd[VNDR_IE_CMD_LEN]; /* ie IOVar set command : "add" + NUL */ - ie_buf_t ie_buffer; /* buffer containing IE list information */ -} BWL_POST_PACKED_STRUCT ie_setbuf_t; - -typedef BWL_PRE_PACKED_STRUCT struct { - uint32 pktflag; /* bitmask indicating which packet(s) contain this IE */ - uint8 id; /* IE type */ -} BWL_POST_PACKED_STRUCT ie_getbuf_t; - -/* structures used to define format of wps ie data from probe requests */ -/* passed up to applications via iovar "prbreq_wpsie" */ -typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_hdr { - struct ether_addr staAddr; - uint16 ieLen; -} BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_hdr_t; - -typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_data { - sta_prbreq_wps_ie_hdr_t hdr; - uint8 ieData[1]; -} BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_data_t; - -typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_list { - uint32 totLen; - uint8 ieDataList[1]; -} BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_list_t; - - -#ifdef WLMEDIA_TXFAILEVENT -typedef BWL_PRE_PACKED_STRUCT struct { - char dest[ETHER_ADDR_LEN]; /* destination MAC */ - uint8 prio; /* Packet Priority */ - uint8 flags; /* Flags */ - uint32 tsf_l; /* TSF timer low */ - uint32 tsf_h; /* TSF timer high */ - uint16 rates; /* Main Rates */ - uint16 txstatus; /* TX Status */ -} BWL_POST_PACKED_STRUCT txfailinfo_t; -#endif /* WLMEDIA_TXFAILEVENT */ - -/* no strict structure packing */ -#include <packed_section_end.h> - -/* Global ASSERT Logging */ -#define ASSERTLOG_CUR_VER 0x0100 -#define MAX_ASSRTSTR_LEN 64 - -typedef struct assert_record { - uint32 time; - uint8 seq_num; - char str[MAX_ASSRTSTR_LEN]; -} assert_record_t; - -typedef struct assertlog_results { - uint16 version; - uint16 record_len; - uint32 num; - assert_record_t logs[1]; -} assertlog_results_t; - -#define LOGRRC_FIX_LEN 8 -#define IOBUF_ALLOWED_NUM_OF_LOGREC(type, len) ((len - LOGRRC_FIX_LEN)/sizeof(type)) - -#ifdef BCMWAPI_WAI -#define IV_LEN 16 -struct wapi_sta_msg_t -{ - uint16 msg_type; - uint16 datalen; - uint8 vap_mac[6]; - uint8 reserve_data1[2]; - uint8 sta_mac[6]; - uint8 reserve_data2[2]; - uint8 gsn[IV_LEN]; - uint8 wie[256]; -}; -#endif /* BCMWAPI_WAI */ - -/* channel interference measurement (chanim) related defines */ - -/* chanim mode */ -#define CHANIM_DISABLE 0 /* disabled */ -#define CHANIM_DETECT 1 /* detection only */ -#define CHANIM_EXT 2 /* external state machine */ -#define CHANIM_ACT 3 /* full internal state machine, detect + act */ -#define CHANIM_MODE_MAX 4 - -/* define for apcs reason code */ -#define APCS_INIT 0 -#define APCS_IOCTL 1 -#define APCS_CHANIM 2 -#define APCS_CSTIMER 3 -#define APCS_BTA 4 - -/* number of ACS record entries */ -#define CHANIM_ACS_RECORD 10 - -/* CHANIM */ -#define CCASTATS_TXDUR 0 -#define CCASTATS_INBSS 1 -#define CCASTATS_OBSS 2 -#define CCASTATS_NOCTG 3 -#define CCASTATS_NOPKT 4 -#define CCASTATS_DOZE 5 -#define CCASTATS_TXOP 6 -#define CCASTATS_GDTXDUR 7 -#define CCASTATS_BDTXDUR 8 -#define CCASTATS_MAX 9 - -/* chanim acs record */ -typedef struct { - bool valid; - uint8 trigger; - chanspec_t selected_chspc; - int8 bgnoise; - uint32 glitch_cnt; - uint8 ccastats; - uint timestamp; -} chanim_acs_record_t; - -typedef struct { - chanim_acs_record_t acs_record[CHANIM_ACS_RECORD]; - uint8 count; - uint timestamp; -} wl_acs_record_t; - -typedef struct chanim_stats { - uint32 glitchcnt; /* normalized as per second count */ - uint32 badplcp; /* normalized as per second count */ - uint8 ccastats[CCASTATS_MAX]; /* normalized as 0-255 */ - int8 bgnoise; /* background noise level (in dBm) */ - chanspec_t chanspec; - uint32 timestamp; -} chanim_stats_t; - -#define WL_CHANIM_STATS_VERSION 1 -#define WL_CHANIM_COUNT_ALL 0xff -#define WL_CHANIM_COUNT_ONE 0x1 - -typedef struct { - uint32 buflen; - uint32 version; - uint32 count; - chanim_stats_t stats[1]; -} wl_chanim_stats_t; - -#define WL_CHANIM_STATS_FIXED_LEN OFFSETOF(wl_chanim_stats_t, stats) - -/* Noise measurement metrics. */ -#define NOISE_MEASURE_KNOISE 0x1 - -/* scb probe parameter */ -typedef struct { - uint32 scb_timeout; - uint32 scb_activity_time; - uint32 scb_max_probe; -} wl_scb_probe_t; - -/* ap tpc modes */ -#define AP_TPC_OFF 0 -#define AP_TPC_BSS_PWR 1 /* BSS power control */ -#define AP_TPC_AP_PWR 2 /* AP power control */ -#define AP_TPC_AP_BSS_PWR 3 /* Both AP and BSS power control */ -#define AP_TPC_MAX_LINK_MARGIN 127 - -#define AP_TPC_OFF 0 -#define AP_TPC_BSS_PWR 1 /* BSS power control */ -#define AP_TPC_AP_PWR 2 /* AP power control */ -#define AP_TPC_AP_BSS_PWR 3 /* Both AP and BSS power control */ -#define AP_TPC_MAX_LINK_MARGIN 127 -/* structure/defines for selective mgmt frame (smf) stats support */ - -#define SMFS_VERSION 1 -/* selected mgmt frame (smf) stats element */ -typedef struct wl_smfs_elem { - uint32 count; - uint16 code; /* SC or RC code */ -} wl_smfs_elem_t; - -typedef struct wl_smf_stats { - uint32 version; - uint16 length; /* reserved for future usage */ - uint8 type; - uint8 codetype; - uint32 ignored_cnt; - uint32 malformed_cnt; - uint32 count_total; /* count included the interested group */ - wl_smfs_elem_t elem[1]; -} wl_smf_stats_t; - -#define WL_SMFSTATS_FIXED_LEN OFFSETOF(wl_smf_stats_t, elem); - -enum { - SMFS_CODETYPE_SC, - SMFS_CODETYPE_RC -}; - -/* reuse two number in the sc/rc space */ -#define SMFS_CODE_MALFORMED 0xFFFE -#define SMFS_CODE_IGNORED 0xFFFD - -typedef enum smfs_type { - SMFS_TYPE_AUTH, - SMFS_TYPE_ASSOC, - SMFS_TYPE_REASSOC, - SMFS_TYPE_DISASSOC_TX, - SMFS_TYPE_DISASSOC_RX, - SMFS_TYPE_DEAUTH_TX, - SMFS_TYPE_DEAUTH_RX, - SMFS_TYPE_MAX -} smfs_type_t; - -#ifdef PHYMON - -#define PHYMON_VERSION 1 - -typedef struct wl_phycal_core_state { - /* Tx IQ/LO calibration coeffs */ - int16 tx_iqlocal_a; - int16 tx_iqlocal_b; - int8 tx_iqlocal_ci; - int8 tx_iqlocal_cq; - int8 tx_iqlocal_di; - int8 tx_iqlocal_dq; - int8 tx_iqlocal_ei; - int8 tx_iqlocal_eq; - int8 tx_iqlocal_fi; - int8 tx_iqlocal_fq; - - /* Rx IQ calibration coeffs */ - int16 rx_iqcal_a; - int16 rx_iqcal_b; - - uint8 tx_iqlocal_pwridx; /* Tx Power Index for Tx IQ/LO calibration */ - uint32 papd_epsilon_table[64]; /* PAPD epsilon table */ - int16 papd_epsilon_offset; /* PAPD epsilon offset */ - uint8 curr_tx_pwrindex; /* Tx power index */ - int8 idle_tssi; /* Idle TSSI */ - int8 est_tx_pwr; /* Estimated Tx Power (dB) */ - int8 est_rx_pwr; /* Estimated Rx Power (dB) from RSSI */ - uint16 rx_gaininfo; /* Rx gain applied on last Rx pkt */ - uint16 init_gaincode; /* initgain required for ACI */ - int8 estirr_tx; - int8 estirr_rx; - -} wl_phycal_core_state_t; - -typedef struct wl_phycal_state { - int version; - int8 num_phy_cores; /* number of cores */ - int8 curr_temperature; /* on-chip temperature sensor reading */ - chanspec_t chspec; /* channspec for this state */ - bool aci_state; /* ACI state: ON/OFF */ - uint16 crsminpower; /* crsminpower required for ACI */ - uint16 crsminpowerl; /* crsminpowerl required for ACI */ - uint16 crsminpoweru; /* crsminpoweru required for ACI */ - wl_phycal_core_state_t phycal_core[1]; -} wl_phycal_state_t; - -#define WL_PHYCAL_STAT_FIXED_LEN OFFSETOF(wl_phycal_state_t, phycal_core) -#endif /* PHYMON */ - -/* discovery state */ -typedef struct wl_p2p_disc_st { - uint8 state; /* see state */ - chanspec_t chspec; /* valid in listen state */ - uint16 dwell; /* valid in listen state, in ms */ -} wl_p2p_disc_st_t; - -/* state */ -#define WL_P2P_DISC_ST_SCAN 0 -#define WL_P2P_DISC_ST_LISTEN 1 -#define WL_P2P_DISC_ST_SEARCH 2 - -/* scan request */ -typedef struct wl_p2p_scan { - uint8 type; /* 'S' for WLC_SCAN, 'E' for "escan" */ - uint8 reserved[3]; - /* scan or escan parms... */ -} wl_p2p_scan_t; - -/* i/f request */ -typedef struct wl_p2p_if { - struct ether_addr addr; - uint8 type; /* see i/f type */ - chanspec_t chspec; /* for p2p_ifadd GO */ -} wl_p2p_if_t; - -/* i/f type */ -#define WL_P2P_IF_CLIENT 0 -#define WL_P2P_IF_GO 1 -#define WL_P2P_IF_DYNBCN_GO 2 -#define WL_P2P_IF_DEV 3 - -/* i/f query */ -typedef struct wl_p2p_ifq { - uint bsscfgidx; - char ifname[BCM_MSG_IFNAME_MAX]; -} wl_p2p_ifq_t; - -/* OppPS & CTWindow */ -typedef struct wl_p2p_ops { - uint8 ops; /* 0: disable 1: enable */ - uint8 ctw; /* >= 10 */ -} wl_p2p_ops_t; - -/* absence and presence request */ -typedef struct wl_p2p_sched_desc { - uint32 start; - uint32 interval; - uint32 duration; - uint32 count; /* see count */ -} wl_p2p_sched_desc_t; - -/* count */ -#define WL_P2P_SCHED_RSVD 0 -#define WL_P2P_SCHED_REPEAT 255 /* anything > 255 will be treated as 255 */ - -typedef struct wl_p2p_sched { - uint8 type; /* see schedule type */ - uint8 action; /* see schedule action */ - uint8 option; /* see schedule option */ - wl_p2p_sched_desc_t desc[1]; -} wl_p2p_sched_t; -#define WL_P2P_SCHED_FIXED_LEN 3 - -/* schedule type */ -#define WL_P2P_SCHED_TYPE_ABS 0 /* Scheduled Absence */ -#define WL_P2P_SCHED_TYPE_REQ_ABS 1 /* Requested Absence */ - -/* schedule action during absence periods (for WL_P2P_SCHED_ABS type) */ -#define WL_P2P_SCHED_ACTION_NONE 0 /* no action */ -#define WL_P2P_SCHED_ACTION_DOZE 1 /* doze */ -/* schedule option - WL_P2P_SCHED_TYPE_REQ_ABS */ -#define WL_P2P_SCHED_ACTION_GOOFF 2 /* turn off GO beacon/prbrsp functions */ -/* schedule option - WL_P2P_SCHED_TYPE_XXX */ -#define WL_P2P_SCHED_ACTION_RESET 255 /* reset */ - -/* schedule option - WL_P2P_SCHED_TYPE_ABS */ -#define WL_P2P_SCHED_OPTION_NORMAL 0 /* normal start/interval/duration/count */ -#define WL_P2P_SCHED_OPTION_BCNPCT 1 /* percentage of beacon interval */ -/* schedule option - WL_P2P_SCHED_TYPE_REQ_ABS */ -#define WL_P2P_SCHED_OPTION_TSFOFS 2 /* normal start/internal/duration/count with - * start being an offset of the 'current' TSF - */ - -/* feature flags */ -#define WL_P2P_FEAT_GO_CSA (1 << 0) /* GO moves with the STA using CSA method */ -#define WL_P2P_FEAT_GO_NOLEGACY (1 << 1) /* GO does not probe respond to non-p2p probe - * requests - */ -#define WL_P2P_FEAT_RESTRICT_DEV_RESP (1 << 2) /* Restrict p2p dev interface from responding */ - -#ifdef WLNIC -/* nic_cnx iovar */ -typedef struct wl_nic_cnx { - uint8 opcode; - struct ether_addr addr; - /* the following are valid for WL_NIC_CNX_CONN */ - uint8 SSID_len; - uint8 SSID[32]; - struct ether_addr abssid; - uint8 join_period; -} wl_nic_cnx_t; - -/* opcode */ -#define WL_NIC_CNX_ADD 0 /* add NIC connection */ -#define WL_NIC_CNX_DEL 1 /* delete NIC connection */ -#define WL_NIC_CNX_IDX 2 /* query NIC connection index */ -#define WL_NIC_CNX_CONN 3 /* join/create network */ -#define WL_NIC_CNX_DIS 4 /* disconnect from network */ - -/* nic_cfg iovar */ -typedef struct wl_nic_cfg { - uint8 version; - uint8 beacon_mode; - uint16 beacon_interval; - uint8 diluted_beacon_period; - uint8 repeat_EQC; - uint8 scan_length; - uint8 scan_interval; - uint8 scan_probability; - uint8 awake_window_length; - int8 TSF_correction; - uint8 ASID; - uint8 channel_usage_mode; -} wl_nic_cfg_t; - -/* version */ -#define WL_NIC_CFG_VER 1 - -/* beacon_mode */ -#define WL_NIC_BCN_NORM 0 -#define WL_NIC_BCN_DILUTED 1 - -/* channel_usage_mode */ -#define WL_NIC_CHAN_STATIC 0 -#define WL_NIC_CHAN_CYCLE 1 - -/* nic_cfg iovar */ -typedef struct wl_nic_frm { - uint8 type; - struct ether_addr da; - uint8 body[1]; -} wl_nic_frm_t; - -/* type */ -#define WL_NIC_FRM_MYNET 1 -#define WL_NIC_FRM_ACTION 2 - -/* i/f query */ -typedef struct wl_nic_ifq { - uint bsscfgidx; - char ifname[BCM_MSG_IFNAME_MAX]; -} wl_nic_ifq_t; -#endif /* WLNIC */ - -/* RFAWARE def */ -#define BCM_ACTION_RFAWARE 0x77 -#define BCM_ACTION_RFAWARE_DCS 0x01 - -/* DCS reason code define */ -#define BCM_DCS_IOVAR 0x1 -#define BCM_DCS_UNKNOWN 0xFF - -typedef struct wl_bcmdcs_data { - uint reason; - chanspec_t chspec; -} wl_bcmdcs_data_t; - -/* n-mode support capability */ -/* 2x2 includes both 1x1 & 2x2 devices - * reserved #define 2 for future when we want to separate 1x1 & 2x2 and - * control it independently - */ -#define WL_11N_2x2 1 -#define WL_11N_3x3 3 -#define WL_11N_4x4 4 - -/* define 11n feature disable flags */ -#define WLFEATURE_DISABLE_11N 0x00000001 -#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 -#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 -#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 -#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 -#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 -#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 -#define WLFEATURE_DISABLE_11N_GF 0x00000080 - -/* Proxy STA modes */ -#define PSTA_MODE_DISABLED 0 -#define PSTA_MODE_PROXY 1 -#define PSTA_MODE_REPEATER 2 - - -/* NAT configuration */ -typedef struct { - uint32 ipaddr; /* interface ip address */ - uint32 ipaddr_mask; /* interface ip address mask */ - uint32 ipaddr_gateway; /* gateway ip address */ - uint8 mac_gateway[6]; /* gateway mac address */ - uint32 ipaddr_dns; /* DNS server ip address, valid only for public if */ - uint8 mac_dns[6]; /* DNS server mac address, valid only for public if */ - uint8 GUID[38]; /* interface GUID */ -} nat_if_info_t; - -typedef struct { - uint op; /* operation code */ - bool pub_if; /* set for public if, clear for private if */ - nat_if_info_t if_info; /* interface info */ -} nat_cfg_t; - -/* op code in nat_cfg */ -#define NAT_OP_ENABLE 1 /* enable NAT on given interface */ -#define NAT_OP_DISABLE 2 /* disable NAT on given interface */ -#define NAT_OP_DISABLE_ALL 3 /* disable NAT on all interfaces */ - -/* NAT state */ -#define NAT_STATE_ENABLED 1 /* NAT is enabled */ -#define NAT_STATE_DISABLED 2 /* NAT is disabled */ - -typedef struct { - int state; /* NAT state returned */ -} nat_state_t; - -#ifdef PROP_TXSTATUS -/* Bit definitions for tlv iovar */ -/* - * enable RSSI signals: - * WLFC_CTL_TYPE_RSSI - */ -#define WLFC_FLAGS_RSSI_SIGNALS 0x0001 - -/* enable (if/mac_open, if/mac_close,, mac_add, mac_del) signals: - * - * WLFC_CTL_TYPE_MAC_OPEN - * WLFC_CTL_TYPE_MAC_CLOSE - * - * WLFC_CTL_TYPE_INTERFACE_OPEN - * WLFC_CTL_TYPE_INTERFACE_CLOSE - * - * WLFC_CTL_TYPE_MACDESC_ADD - * WLFC_CTL_TYPE_MACDESC_DEL - * - */ -#define WLFC_FLAGS_XONXOFF_SIGNALS 0x0002 - -/* enable (status, fifo_credit, mac_credit) signals - * WLFC_CTL_TYPE_MAC_REQUEST_CREDIT - * WLFC_CTL_TYPE_TXSTATUS - * WLFC_CTL_TYPE_FIFO_CREDITBACK - */ -#define WLFC_FLAGS_CREDIT_STATUS_SIGNALS 0x0004 - -#define WLFC_FLAGS_HOST_PROPTXSTATUS_ACTIVE 0x0008 -#define WLFC_FLAGS_PSQ_GENERATIONFSM_ENABLE 0x0010 -#define WLFC_FLAGS_PSQ_ZERO_BUFFER_ENABLE 0x0020 -#define WLFC_FLAGS_HOST_RXRERODER_ACTIVE 0x0040 -#endif /* PROP_TXSTATUS */ - -#define BTA_STATE_LOG_SZ 64 - -/* BTAMP Statemachine states */ -enum { - HCIReset = 1, - HCIReadLocalAMPInfo, - HCIReadLocalAMPASSOC, - HCIWriteRemoteAMPASSOC, - HCICreatePhysicalLink, - HCIAcceptPhysicalLinkRequest, - HCIDisconnectPhysicalLink, - HCICreateLogicalLink, - HCIAcceptLogicalLink, - HCIDisconnectLogicalLink, - HCILogicalLinkCancel, - HCIAmpStateChange, - HCIWriteLogicalLinkAcceptTimeout -}; - -typedef struct flush_txfifo { - uint32 txfifobmp; - uint32 hwtxfifoflush; - struct ether_addr ea; -} flush_txfifo_t; - -#define CHANNEL_5G_LOW_START 36 /* 5G low (36..48) CDD enable/disable bit mask */ -#define CHANNEL_5G_MID_START 52 /* 5G mid (52..64) CDD enable/disable bit mask */ -#define CHANNEL_5G_HIGH_START 100 /* 5G high (100..140) CDD enable/disable bit mask */ -#define CHANNEL_5G_UPPER_START 149 /* 5G upper (149..161) CDD enable/disable bit mask */ - -enum { - SPATIAL_MODE_2G_IDX = 0, - SPATIAL_MODE_5G_LOW_IDX, - SPATIAL_MODE_5G_MID_IDX, - SPATIAL_MODE_5G_HIGH_IDX, - SPATIAL_MODE_5G_UPPER_IDX, - SPATIAL_MODE_MAX_IDX -}; - -/* IOVAR "mempool" parameter. Used to retrieve a list of memory pool statistics. */ -typedef struct wl_mempool_stats { - int num; /* Number of memory pools */ - bcm_mp_stats_t s[1]; /* Variable array of memory pool stats. */ -} wl_mempool_stats_t; - - -#define IPV4_ARP_FILTER 0x0001 -#define IPV4_NETBT_FILTER 0x0002 -#define IPV4_LLMNR_FILTER 0x0004 -#define IPV4_SSDP_FILTER 0x0008 -#define IPV4_WSD_FILTER 0x0010 -#define IPV6_NETBT_FILTER 0x0200 -#define IPV6_LLMNR_FILTER 0x0400 -#define IPV6_SSDP_FILTER 0x0800 -#define IPV6_WSD_FILTER 0x1000 -/* Network Offload Engine */ -#define NWOE_OL_ENABLE 0x00000001 - -typedef struct { - uint32 ipaddr; - uint32 ipaddr_netmask; - uint32 ipaddr_gateway; -} nwoe_ifconfig_t; - -#endif /* _wlioctl_h_ */ |