diff options
Diffstat (limited to 'drivers/staging/westbridge')
34 files changed, 26887 insertions, 30 deletions
diff --git a/drivers/staging/westbridge/Kconfig b/drivers/staging/westbridge/Kconfig index 2b1c2ae..91df30e 100644 --- a/drivers/staging/westbridge/Kconfig +++ b/drivers/staging/westbridge/Kconfig @@ -39,6 +39,12 @@ config MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL help Include the OMAP3430 HAL for PNAND interface +config MACH_C110_WESTBRIDGE_AST_PNAND_HAL + bool "WESTBRIDGE C110 Astoria PNAND HAL" + select WESTBRIDGE_HAL_SELECTED + help + Include the C110 HAL for PNAND interface + config MACH_NO_WESTBRIDGE bool "no West Bridge HAL selected" help @@ -48,6 +54,7 @@ endchoice config WESTBRIDGE_DEBUG bool "West Bridge debugging" depends on WESTBRIDGE != n + default y help This is an option for use by developers; most people should say N here. This enables WESTBRIDGE core and driver debugging. diff --git a/drivers/staging/westbridge/astoria/Kconfig b/drivers/staging/westbridge/astoria/Kconfig index 1ce388a..2eff4db 100644..100755 --- a/drivers/staging/westbridge/astoria/Kconfig +++ b/drivers/staging/westbridge/astoria/Kconfig @@ -7,3 +7,6 @@ source "drivers/staging/westbridge/astoria/block/Kconfig" source "drivers/staging/westbridge/astoria/gadget/Kconfig" +source "drivers/staging/westbridge/astoria/switch/Kconfig" + + diff --git a/drivers/staging/westbridge/astoria/Makefile b/drivers/staging/westbridge/astoria/Makefile index 907bdb2..377cd29 100644..100755 --- a/drivers/staging/westbridge/astoria/Makefile +++ b/drivers/staging/westbridge/astoria/Makefile @@ -7,5 +7,12 @@ ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) endif obj-$(CONFIG_WESTBRIDGE) += device/ +ifeq ($(CONFIG_MACH_U1_NA_SPR),y) +obj-$(CONFIG_WESTBRIDGE) += switch/ +else ifeq ($(CONFIG_MACH_U1_NA_USCC),y) +obj-$(CONFIG_WESTBRIDGE) += switch/ +else obj-$(CONFIG_WESTBRIDGE) += block/ -obj-$(CONFIG_WESTBRIDGE) += gadget/
\ No newline at end of file +obj-$(CONFIG_WESTBRIDGE) += gadget/ +endif + diff --git a/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c b/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c index 96a86d0..82b46a2 100644..100755 --- a/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c +++ b/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c @@ -278,7 +278,15 @@ cy_as_mail_box_process_data(cy_as_device *dev_p, uint16_t *data) ctxt_p = dev_p->context[context]; if (cy_as_mbox_is_request(data[0])) { - cy_as_hal_assert(ctxt_p->req_p != 0); +#if defined(CONFIG_MACH_U1_NA_SPR) || defined(CONFIG_MACH_U1_NA_USCC) + if (ctxt_p->req_p == 0) { + cy_as_hal_print_message(KERN_ERR + "mailbox process : request pointer NULL\n"); + return; + } +#else + cy_as_hal_assert(ctxt_p->req_p != 0); +#endif rec_p = ctxt_p->req_p; len_p = &ctxt_p->request_length; @@ -381,6 +389,11 @@ cy_as_mail_box_process_data(cy_as_device *dev_p, uint16_t *data) * module to handle */ cy_as_ll_request_response *request_p = ctxt_p->req_p; ctxt_p->req_p = 0; + if (request_p == NULL) { + cy_as_hal_print_message(KERN_ERR + "mailbox process : request_p == NULL\n"); + return; + } if (ctxt_p->request_callback) { cy_as_device_set_in_callback(dev_p); ctxt_p->request_callback(dev_p, context, @@ -927,7 +940,10 @@ cy_as_ll_send_request( context = cy_as_mbox_get_context(box0); cy_as_hal_assert(context < CY_RQT_CONTEXT_COUNT); - ctxt_p = dev_p->context[context]; + if (context < CY_RQT_CONTEXT_COUNT) + ctxt_p = dev_p->context[context] ; + else + return CY_AS_ERROR_INVALID_PARAMETER; /* Allocate the list node */ state = cy_as_hal_disable_interrupts(); @@ -1009,13 +1025,20 @@ cy_as_ll_send_request_wait_reply( uint8_t context; /* Larger 8 sec time-out to handle the init * delay for slower storage devices in USB FS. */ - uint32_t loopcount = 800; +#if defined(CONFIG_MACH_U1_NA_SPR) || defined(CONFIG_MACH_U1_NA_USCC) + uint32_t loopcount = 400 ; +#else + uint32_t loopcount = 800; +#endif cy_as_context *ctxt_p; /* Get the context for the request */ context = cy_as_ll_request_response__get_context(req); cy_as_hal_assert(context < CY_RQT_CONTEXT_COUNT); - ctxt_p = dev_p->context[context]; + if (context < CY_RQT_CONTEXT_COUNT) + ctxt_p = dev_p->context[context] ; + else + return CY_AS_ERROR_INVALID_PARAMETER; ret = cy_as_ll_send_request(dev_p, req, resp, cy_true, cy_as_ll_send_callback); @@ -1054,7 +1077,10 @@ cy_as_ll_register_request_callback( { cy_as_context *ctxt_p; cy_as_hal_assert(context < CY_RQT_CONTEXT_COUNT); - ctxt_p = dev_p->context[context]; + if (context < CY_RQT_CONTEXT_COUNT) + ctxt_p = dev_p->context[context] ; + else + return CY_AS_ERROR_INVALID_PARAMETER; ctxt_p->request_callback = cb; return CY_AS_ERROR_SUCCESS; diff --git a/drivers/staging/westbridge/astoria/api/src/cyasmisc.c b/drivers/staging/westbridge/astoria/api/src/cyasmisc.c index 4564fc1..1652e93 100644..100755 --- a/drivers/staging/westbridge/astoria/api/src/cyasmisc.c +++ b/drivers/staging/westbridge/astoria/api/src/cyasmisc.c @@ -99,7 +99,6 @@ cy_as_bus_from_media_type(cy_as_media_type type, else *bus = 1; } - static cy_as_return_status_t my_handle_response_no_data(cy_as_device *dev_p, cy_as_ll_request_response *req_p, @@ -1021,7 +1020,7 @@ cy_as_return_status_t cy_as_misc_set_sd_power_polarity( if (ret != CY_AS_ERROR_SUCCESS) goto destroy; - return (my_handle_response_no_data(dev_p, req_p, reply_p)); + return my_handle_response_no_data(dev_p, req_p, reply_p); } else { ret = cy_as_misc_send_request(dev_p, cb, client, CY_FUNCT_CB_MISC_SETSDPOLARITY, 0, dev_p->func_cbs_misc, @@ -1232,14 +1231,16 @@ my_handle_response_reset(cy_as_device *dev_p, cy_as_device_set_low_level_stopped(dev_p); cy_as_device_set_intr_stopped(dev_p); cy_as_device_clear_suspend_mode(dev_p); +#if !defined(CONFIG_MACH_U1_NA_SPR) && !defined(CONFIG_MACH_U1_NA_USCC) cy_as_usb_cleanup(dev_p); +#endif cy_as_storage_cleanup(dev_p); /* * wait for a small amount of time to * allow reset to be complete. */ - cy_as_hal_sleep(100); + cy_as_hal_sleep(10) ; } cy_as_device_clear_reset_pending(dev_p); @@ -1264,8 +1265,9 @@ cy_as_misc_reset(cy_as_device_handle handle, /* Make sure the device is ready for the command. */ dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - +#if !defined(CONFIG_MACH_U1_NA_SPR) && !defined(CONFIG_MACH_U1_NA_USCC) + cy_as_check_device_ready(dev_p) ; +#endif /* * soft reset is not supported until we close on the issues * in the firmware with what needs to happen. diff --git a/drivers/staging/westbridge/astoria/api/src/cyasstorage.c b/drivers/staging/westbridge/astoria/api/src/cyasstorage.c index 7abd6a3..413c7f9 100644..100755 --- a/drivers/staging/westbridge/astoria/api/src/cyasstorage.c +++ b/drivers/staging/westbridge/astoria/api/src/cyasstorage.c @@ -1383,11 +1383,19 @@ my_storage_query_unit(cy_as_device *dev_p, if (req_p == 0) return CY_AS_ERROR_OUT_OF_MEMORY; - if (device > 255) + if (device > 255) { +#if defined(CONFIG_MACH_U1_NA_SPR) || defined(CONFIG_MACH_U1_NA_USCC) + cy_as_ll_destroy_request(dev_p, req_p) ; +#endif return CY_AS_ERROR_NO_SUCH_DEVICE; + } - if (unit > 255) + if (unit > 255) { +#if defined(CONFIG_MACH_U1_NA_SPR) || defined(CONFIG_MACH_U1_NA_USCC) + cy_as_ll_destroy_request(dev_p, req_p) ; +#endif return CY_AS_ERROR_NO_SUCH_UNIT; + } cy_as_ll_request_response__set_word(req_p, 0, create_address(bus, device, (uint8_t)unit)); @@ -2041,13 +2049,13 @@ cy_as_storage_sync_oper(cy_as_device *dev_p, /* Setup the DMA request */ ctxt_p = dev_p->context[CY_RQT_STORAGE_RQT_CONTEXT]; ret = cy_as_dma_drain_queue(dev_p, ep, cy_false); - + if (ret == CY_AS_ERROR_SUCCESS) { while (loopcount-- > 0) { if (dev_p->storage_wait == cy_false) break; cy_as_hal_sleep_on(&ctxt_p->channel, 10); } - + } if (dev_p->storage_wait == cy_true) { dev_p->storage_wait = cy_false; cy_as_ll_remove_request(dev_p, ctxt_p, req_p, cy_true); @@ -2829,6 +2837,9 @@ cy_as_storage_func_callback(cy_as_device *dev_p, ret = CY_AS_ERROR_NOT_SUPPORTED; break; + case CY_RQT_CHANGE_SD_FREQ: + ret = my_handle_response_no_data(dev_p, rqt, resp) ; + break ; default: ret = CY_AS_ERROR_INVALID_RESPONSE; @@ -2912,7 +2923,7 @@ cy_as_sdio_device_check( if (!cy_as_device_is_astoria_dev(dev_p)) return CY_AS_ERROR_NOT_SUPPORTED; - return (is_storage_active(dev_p)); + return is_storage_active(dev_p); } cy_as_return_status_t @@ -4121,5 +4132,80 @@ cy_as_sdio_de_init_function( return CY_AS_ERROR_SUCCESS; } +cy_as_return_status_t +cy_as_storage_change_sd_frequency( + cy_as_device_handle handle, + cy_as_bus_number_t bus, + uint8_t clk_source, + uint8_t clk_divider, + cy_as_function_callback cb, + uint32_t client) +{ + cy_as_ll_request_response *req_p, *reply_p ; + cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS ; + cy_as_device *dev_p = (cy_as_device *)handle ; + + if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) + return CY_AS_ERROR_INVALID_HANDLE ; + + ret = is_storage_active(dev_p) ; + if (ret != CY_AS_ERROR_SUCCESS) + return ret ; + + if (bus < 0 || bus >= CY_AS_MAX_BUSES) + return CY_AS_ERROR_NO_SUCH_BUS ; + + /* If SD is not supported on the specified bus, then return ERROR */ + if (dev_p->storage_device_info[bus][0].type != cy_as_media_sd_flash) + return CY_AS_ERROR_NOT_SUPPORTED; + + /* Create the request to send to the West Bridge device */ + req_p = cy_as_ll_create_request(dev_p, CY_RQT_CHANGE_SD_FREQ, + CY_RQT_STORAGE_RQT_CONTEXT, 2) ; + + if (req_p == 0) + return CY_AS_ERROR_OUT_OF_MEMORY ; + + + /* Reserve space for the reply, the reply data will not + exceed four words. */ + reply_p = cy_as_ll_create_response(dev_p, 4) ; + if (reply_p == 0) { + cy_as_ll_destroy_request(dev_p, req_p) ; + return CY_AS_ERROR_OUT_OF_MEMORY ; + } + + cy_as_ll_request_response__set_word(req_p, 0, + create_address(bus, 0, 0)) ; + cy_as_ll_request_response__set_word(req_p, 1, + (((uint16_t)clk_divider << 8) | (clk_source))) ; + + if (cb == 0) { + ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p) ; + if (ret != CY_AS_ERROR_SUCCESS) + goto destroy ; + + ret = my_handle_response_no_data(dev_p, req_p, reply_p) ; + return ret ; + } else { + ret = cy_as_misc_send_request(dev_p, cb, client, + CY_FUNCT_CB_STOR_CHANGE_SD_FREQ, 0, + dev_p->func_cbs_stor, CY_AS_REQUEST_RESPONSE_EX, + req_p, reply_p, cy_as_storage_func_callback) ; + + if (ret != CY_AS_ERROR_SUCCESS) + goto destroy ; + + /* The request and response + are freed as part of the FuncCallback */ + return ret ; + } + +destroy: + cy_as_ll_destroy_request(dev_p, req_p) ; + cy_as_ll_destroy_response(dev_p, reply_p) ; + + return ret ; +} /*[]*/ diff --git a/drivers/staging/westbridge/astoria/arch/arm/mach-c110/cyashalc110_pnand.c b/drivers/staging/westbridge/astoria/arch/arm/mach-c110/cyashalc110_pnand.c new file mode 100755 index 0000000..9e8a78e --- /dev/null +++ b/drivers/staging/westbridge/astoria/arch/arm/mach-c110/cyashalc110_pnand.c @@ -0,0 +1,2589 @@ +/* Cypress WestBridge C110 Kernel Hal source file (cyashalc110_cram.c) + =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor, +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +#ifdef CONFIG_MACH_C110_WESTBRIDGE_AST_PNAND_HAL + +#include <linux/fs.h> +#include <linux/ioport.h> +#include <linux/timer.h> +#include <linux/gpio.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +#include <linux/scatterlist.h> +#include <linux/mm.h> +#include <linux/irq.h> +#include <linux/slab.h> +#include <linux/sched.h> +#include <linux/clk.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/fixed.h> +/* include seems broken moving for patch submission + * #include <mach/mux.h> + * #include <mach/gpmc.h> + * #include <mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_cram.h> + * #include <mach/westbridge/westbridge-omap3-pnand-hal/cyasomapdev_cram.h> + * #include <mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h> + * #include <linux/westbridge/cyaserr.h> + * #include <linux/westbridge/cyasregs.h> + * #include <linux/westbridge/cyasdma.h> + * #include <linux/westbridge/cyasintr.h> + */ +/* #include <mach/mux.h> */ +#include <mach/gpio.h> +#include <mach/dma.h> +#include <linux/dma-mapping.h> +#include <linux/../../arch/arm/plat-samsung/include/plat/gpio-cfg.h> + +#include "../plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyashalc110_pnand.h" +#include "../plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasc110dev_pnand.h" +#include "../plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasmemmap.h" +#include "../../../include/linux/westbridge/cyaserr.h" +#include "../../../include/linux/westbridge/cyasregs.h" +#include "../../../include/linux/westbridge/cyasdma.h" +#include "../../../include/linux/westbridge/cyasintr.h" + +#define HAL_REV "1.1.0" + + +/* + * westbrige astoria ISR options to limit number of + * back to back DMA transfers per ISR interrupt + */ +#define MAX_DRQ_LOOPS_IN_ISR 128 + +/* + * debug prints enabling + */ +/* #define DBGPRN_ENABLED + #define DBGPRN_DMA_SETUP_RD + #define DBGPRN_DMA_SETUP_WR */ + + +/*#define CHECK_MULTI_ACCESS */ +/*#define EP_SPIN_LOCK */ + +/* + * For performance reasons, we handle storage endpoint transfers upto 4 KB + * within the HAL itself. + */ +#define CYASSTORAGE_WRITE_EP_NUM (4) +#define CYASSTORAGE_READ_EP_NUM (8) + +/* + * size of DMA packet HAL can accept from Storage API + * HAL will fragment it into smaller chunks that the P port can accept + */ +#define CYASSTORAGE_MAX_XFER_SIZE (2*32768) + +/* + * P port MAX DMA packet size according to interface/ep configurartion + */ +#define HAL_DMA_PKT_SZ 512 + +#define is_storage_e_p(ep) (((ep) == 2) || ((ep) == 4) || \ + ((ep) == 6) || ((ep) == 8)) + +/* define for Gaudi */ +#define CYASHAL_PNAND_CONFIG_SET 0x180130e +#define CYASHAL_PNAND_CONFIG_WRITE_SET 0x180010e + +/* define for EPIC2 */ +/*#define CYASHAL_PNAND_CONFIG_SET 0x180140e */ +/*#define CYASHAL_PNAND_CONFIG_WRITE_SET 0x180011e */ + +/* + * keep processing new WB DRQ in ISR untill all handled (performance feature) + */ +#define PROCESS_MULTIPLE_DRQ_IN_ISR (1) + +#define __CYAS_HAL_USE_DMA__ + +#ifdef __CYAS_HAL_USE_DMA__ + +#define SUSPND (1<<0) +#define SPIBUSY (1<<1) +#define RXBUSY (1<<2) +#define TXBUSY (1<<3) + +static struct s3c2410_dma_client cy_as_hal_dma_client = { + .name = "cyas-dma", +}; + + +typedef struct { + struct workqueue_struct *workqueue; + struct work_struct work; + spinlock_t lock; + enum dma_ch rx_dmach; + enum dma_ch tx_dmach; + struct completion xfer_completion; + unsigned state; +} cy_as_hal_driver_data; + + +static cy_as_hal_driver_data *cyashal_work; +#endif + + +int cy_as_hal_enable_power(cy_as_hal_device_tag tag, int flag); + +/* + * The type of DMA operation, per endpoint + */ +typedef enum cy_as_hal_dma_type { + cy_as_hal_read, + cy_as_hal_write, + cy_as_hal_none +} cy_as_hal_dma_type; + + +/* + * SG list halpers defined in scaterlist.h +#define sg_is_chain(sg) ((sg)->page_link & 0x01) +#define sg_is_last(sg) ((sg)->page_link & 0x02) +#define sg_chain_ptr(sg) \ + ((struct scatterlist *) ((sg)->page_link & ~0x03)) +*/ +typedef struct cy_as_hal_endpoint_dma { + cy_bool buffer_valid; + uint8_t *data_p; + uint32_t size; + /* + * sg_list_enabled - if true use, r/w DMA transfers use sg list, + * FALSE use pointer to a buffer + * sg_p - pointer to the owner's sg list, of there is such + * (like blockdriver) + * dma_xfer_sz - size of the next dma xfer on P port + * seg_xfer_cnt - counts xfered bytes for in current sg_list + * memory segment + * req_xfer_cnt - total number of bytes transfered so far in + * current request + * req_length - total request length + */ + bool sg_list_enabled; + struct scatterlist *sg_p; + uint16_t dma_xfer_sz; + uint32_t seg_xfer_cnt; + uint16_t req_xfer_cnt; + uint16_t req_length; + cy_as_hal_dma_type type; + cy_bool pending; + + struct semaphore sem; +} cy_as_hal_endpoint_dma; + +/* + * The list of c110 devices (should be one) + */ +static cy_as_c110_dev_kernel *m_c110_list_p; + +/* + * The callback to call after DMA operations are complete + */ +static cy_as_hal_dma_complete_callback callback; + +/* + * Pending data size for the endpoints + */ +static cy_as_hal_endpoint_dma end_points[16]; + +/* + * Forward declaration + */ +static void cy_handle_d_r_q_interrupt(cy_as_c110_dev_kernel *dev_p, + uint16_t read_val); + +static uint16_t intr_sequence_num; +static uint8_t intr__enable; +spinlock_t int_lock; + +static u32 iomux_vma; + + +bool have_irq; + +#ifdef CHECK_MULTI_ACCESS +static atomic_t gl_usage_cnt = { 0 }; /* throw an error if called from multiple threads!!! */ +#endif + +/** + *Command for NAND interface + **/ +#define NFCONT 0x4 +#define NFCMMD 0x8 +#define NFADDR 0xC +#define NFDATA 0x10 +#define NFSTAT 0x28 + +#define NFCONT_MASK_CS 0x2 + +#define CYAS_PNAND_CSDIO_READ0 0x5 +#define CYAS_PNAND_CSDIO_READ1 0xE0 +#define CYAS_PNAND_CSDIO_WRITE 0x85 + +#define CYAS_PNAND_LBD_READ_B1 0x0 +#define CYAS_PNAND_LBD_READ_B2 0x30 +#define CYAS_PNAND_LBD_PGMPAGE_B1 0x80 +#define CYAS_PNAND_LBD_PGMPAGE_B2 0x10 + +#define CYAS_PNAND_STATUS_READ 0x70 + + +int f_debug_flag; +int f_debug_count; + +void cy_as_hal_set_debug(int flag) +{ + f_debug_flag = flag; +} + + +#ifdef __CYAS_HAL_USE_DMA__ +void cy_as_hal_dma_txcb(struct s3c2410_dma_chan *chan, void *buf_id, + int size, enum s3c2410_dma_buffresult res) +{ + /* struct cy_as_hal_driver_data *cyashal_work = buf_id; */ + unsigned long flags; + + /* printk (KERN_ERR"cy_as_hal_dma_txcb\n"); */ + spin_lock_irqsave(&cyashal_work->lock, flags); + +/* if (res == S3C2410_RES_OK) */ + cyashal_work->state &= ~TXBUSY; + + /* If the other done */ +/* if (! (cyashal_work->state & RXBUSY)) + complete (&cyashal_work->xfer_completion); */ + + spin_unlock_irqrestore(&cyashal_work->lock, flags); +} + +uint16_t g_cyashal_mask_val; + +static void cyashal_workqueue(struct work_struct *work) +{ + cy_as_c110_dev_kernel *dev_p; + uint16_t read_val = 0; + uint16_t drq_loop_cnt = 0; + uint8_t irq_pin; + const uint16_t sentinel = (CY_AS_MEM_P0_INTR_REG_MCUINT | + CY_AS_MEM_P0_INTR_REG_MBINT | + CY_AS_MEM_P0_INTR_REG_PMINT | + CY_AS_MEM_P0_INTR_REG_PLLLOCKINT); + + /* + * sample IRQ pin level (just for statistics) + */ + irq_pin = gpio_get_value(WB_CYAS_INT); + intr_sequence_num++; + dev_p = m_c110_list_p; + read_val = + cy_as_hal_read_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INTR_REG); + + /* g_cyashal_mask_val = cy_as_hal_read_register ((cy_as_hal_device_tag)dev_p, CY_AS_MEM_P0_INT_MASK_REG) ; + cy_as_hal_write_register ((cy_as_hal_device_tag)dev_p, CY_AS_MEM_P0_INT_MASK_REG, 0x0000) ; */ + if (read_val & CY_AS_MEM_P0_INTR_REG_DRQINT) { + + do { + drq_loop_cnt++; + + cy_handle_d_r_q_interrupt(dev_p, read_val); + if (drq_loop_cnt >= MAX_DRQ_LOOPS_IN_ISR) + break; + + read_val = + cy_as_hal_read_register((cy_as_hal_device_tag) + dev_p, + CY_AS_MEM_P0_INTR_REG); + + } while (read_val & CY_AS_MEM_P0_INTR_REG_DRQINT); + + cy_as_intr_service_interrupt((cy_as_hal_device_tag) dev_p); + } + + if (read_val & sentinel) + cy_as_intr_service_interrupt((cy_as_hal_device_tag) dev_p); + +#if 1 /* def DBGPRN_ENABLED */ + if (f_debug_flag) { + DBGPRN + ("<1>_hal:_intr__exit seq:%d, mask=%4.4x,int_pin:%d DRQ_jobs:%d\n", + intr_sequence_num, g_cyashal_mask_val, irq_pin, + drq_loop_cnt); + if (++f_debug_count > 10) { + f_debug_count = 0; + f_debug_flag = 0; + } + } +#endif + /* cy_as_hal_write_register ((cy_as_hal_device_tag)dev_p, CY_AS_MEM_P0_INT_MASK_REG, g_cyashal_mask_val) ; + enable_irq (WB_CYAS_IRQ_INT); */ +} +#endif +/* + * west bridge astoria ISR (Interrupt handler) + */ +static irqreturn_t cy_astoria_int_handler(int irq, + void *dev_id, + struct pt_regs *regs) +{ + cy_as_c110_dev_kernel *dev_p; + +#ifdef __CYAS_HAL_USE_DMA__ + dev_p = dev_id; + /*g_cyashal_mask_val = cy_as_hal_read_register ((cy_as_hal_device_tag)dev_p, CY_AS_MEM_P0_INT_MASK_REG) ; + cy_as_hal_write_register ((cy_as_hal_device_tag)dev_p, CY_AS_MEM_P0_INT_MASK_REG, 0x0000) ; + disable_irq (WB_CYAS_IRQ_INT); */ +#ifdef DBGPRN_ENABLED + DBGPRN("<1>%s: call work queue \n", __func__); +#endif + queue_work(cyashal_work->workqueue, &cyashal_work->work); +#else /*__CYAS_HAL_USE_DMA__ */ + uint16_t read_val = 0; + uint16_t mask_val = 0; + + /* + * debug stuff, counts number of loops per one intr trigger + */ + uint16_t drq_loop_cnt = 0; + uint8_t irq_pin; + /* + * flags to watch + */ + const uint16_t sentinel = (CY_AS_MEM_P0_INTR_REG_MCUINT | + CY_AS_MEM_P0_INTR_REG_MBINT | + CY_AS_MEM_P0_INTR_REG_PMINT | + CY_AS_MEM_P0_INTR_REG_PLLLOCKINT); + + /* + * sample IRQ pin level (just for statistics) + */ + irq_pin = gpio_get_value(WB_CYAS_INT); + + /* + * this one just for debugging + */ + intr_sequence_num++; + + /* + * astoria device handle + */ + dev_p = dev_id; + + /* + * read Astoria intr register + */ + read_val = + cy_as_hal_read_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INTR_REG); + + /* + * save current mask value + */ + mask_val = + cy_as_hal_read_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INT_MASK_REG); + +#ifdef DBGPRN_ENABLED + DBGPRN("<1>HAL__intr__enter:_seq:%d, P0_INTR_REG:%x\n", + intr_sequence_num, read_val); +#endif + /* + * Disable WB interrupt signal generation while we are in ISR + */ + cy_as_hal_write_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INT_MASK_REG, 0x0000); + + /* + * this is a DRQ Interrupt + */ + if (read_val & CY_AS_MEM_P0_INTR_REG_DRQINT) { + + do { + /* + * handle DRQ interrupt + */ + drq_loop_cnt++; + + cy_handle_d_r_q_interrupt(dev_p, read_val); + + /* + * spending to much time in ISR may impact + * average system performance + */ + if (drq_loop_cnt >= MAX_DRQ_LOOPS_IN_ISR) + break; + + read_val = + cy_as_hal_read_register((cy_as_hal_device_tag) + dev_p, + CY_AS_MEM_P0_INTR_REG); + /* + * Keep processing if there is another DRQ int flag + */ + } while (read_val & CY_AS_MEM_P0_INTR_REG_DRQINT); + + /* Call the API interrupt handler to drain the mailbox queue. */ + cy_as_intr_service_interrupt((cy_as_hal_device_tag) dev_p); + + } + + if (read_val & sentinel) + cy_as_intr_service_interrupt((cy_as_hal_device_tag) dev_p); + +#ifdef DBGPRN_ENABLED + DBGPRN + ("<1>_hal:_intr__exit seq:%d, mask=%4.4x,int_pin:%d DRQ_jobs:%d\n", + intr_sequence_num, mask_val, irq_pin, drq_loop_cnt); +#endif + /* + * re-enable WB hw interrupts + */ + cy_as_hal_write_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INT_MASK_REG, mask_val); +#endif + return IRQ_HANDLED; +} + +static int cy_as_hal_configure_interrupts(void *dev_p) +{ + int result; + int irq_pin = WB_CYAS_INT; + +#ifdef __CYAS_HAL_USE_DMA__ + cy_as_c110_dev_kernel *tag = (cy_as_c110_dev_kernel *) dev_p; + cyashal_work = + (cy_as_hal_driver_data *) + kmalloc(sizeof(cy_as_hal_driver_data), GFP_KERNEL); + cyashal_work->workqueue = + create_singlethread_workqueue("cyashal_wq"); + if (cyashal_work) { + INIT_WORK(&cyashal_work->work, cyashal_workqueue); + } + cyashal_work->tx_dmach = DMACH_SPI0_RX; /*DMACH_UART0_RX; *//* DMACH_MTOM_0; */ + + + spin_lock_init(&cyashal_work->lock); + init_completion(&cyashal_work->xfer_completion); + +#if 0 + result = + s3c2410_dma_request(cyashal_work->tx_dmach, + &cy_as_hal_dma_client, NULL); + if (result < 0) { + cy_as_hal_print_message(KERN_ERR + "%s : s3c2410_dma_request error\n", + __func__); + s3c2410_dma_free(cyashal_work->tx_dmach, + &cy_as_hal_dma_client); + return 0; + } + cy_as_hal_print_message(KERN_ERR "%s : s3c2410_dma_request: %d\n", + __func__, result); + result = + s3c2410_dma_set_buffdone_fn(cyashal_work->tx_dmach, + cy_as_hal_dma_txcb); + cy_as_hal_print_message(KERN_ERR + "%s : s3c2410_dma_set_buffdone_fn: %d\n", + __func__, result); + /*result = s3c2410_dma_devconfig (cyashal_work->tx_dmach, S3C_DMA_MEM2MEM_P, + tag->m_phy_addr_base + NFDATA); */ + /*cy_as_hal_print_message (KERN_ERR"%s : s3c2410_dma_devconfig: %d\n", __func__, result); */ + result = s3c2410_dma_config(cyashal_work->tx_dmach, 16); + cy_as_hal_print_message(KERN_ERR "%s : s3c2410_dma_config: %d\n", + __func__, result); + result = + s3c2410_dma_setflags(cyashal_work->tx_dmach, + S3C2410_DMAF_AUTOSTART); + cy_as_hal_print_message(KERN_ERR "%s : s3c2410_dma_setflags: %d\n", + __func__, result); +#endif + irq_set_irq_type(WB_CYAS_IRQ_INT, IRQ_TYPE_EDGE_FALLING); + /* + * for shared IRQS must provide non NULL device ptr + * othervise the int won't register + * */ + result = + request_irq(WB_CYAS_IRQ_INT, + (irq_handler_t) cy_astoria_int_handler, + IRQF_SHARED, "AST_INT#", dev_p); +#else + irq_set_irq_type(WB_CYAS_IRQ_INT, IRQ_TYPE_LEVEL_LOW); + /* + * for shared IRQS must provide non NULL device ptr + * othervise the int won't register + * */ + result = + request_irq(WB_CYAS_IRQ_INT, + (irq_handler_t) cy_astoria_int_handler, + IRQF_DISABLED, "AST_INT#", dev_p); +#endif + + if (result == 0) { + cy_as_hal_print_message(KERN_INFO + "WB_CYAS_INT c110_pin: %d assigned IRQ #%d \n", + irq_pin, WB_CYAS_IRQ_INT); + have_irq = true; + + } else { + cy_as_hal_print_message + ("cyasc110hal: interrupt failed to register\n"); + gpio_free(irq_pin); + cy_as_hal_print_message(KERN_WARNING + "ASTORIA: can't get assigned IRQ%i for INT#\n", + WB_CYAS_IRQ_INT); + have_irq = false; + } + + return result; +} + +int cy_as_hal_enable_NANDCLK(int flag) +{ + struct clk *clk_nand; + struct clk *clk_onenand; + + clk_nand = clk_get(NULL, "nfcon"); + if (IS_ERR(clk_nand)) { + printk(KERN_ERR "Cannot get nfcon\n"); + } + + clk_onenand = clk_get(NULL, "onenand"); + if (IS_ERR(clk_onenand)) { + printk(KERN_ERR "Cannot get nfcon\n"); + } + + if (flag) { + clk_enable(clk_nand); + clk_enable(clk_onenand); + writel(0x180130e, iomux_vma); + } else { + clk_disable(clk_nand); + clk_disable(clk_onenand); + } + + return 0; +} + +/* + * inits all c110 h/w + */ +uint32_t cy_as_hal_processor_hw_init(cy_as_c110_dev_kernel *dev_p) +{ +/* int reg_val; */ + struct clk *clk_nand; + struct clk *clk_onenand; + struct resource *nandArea; +/* unsigned int cs_mem_base; */ + unsigned int cs_vma_base; + uint32_t rv = 0; + int temp = 0, temp1 = 0; + + cy_as_hal_print_message(KERN_INFO "init C110 hw...\n"); + + /*set gpio settings for sideload chipset (nxz) */ + + /*SIDE_CLK enable for power */ + s3c_gpio_cfgpin(WB_CLK_EN, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(WB_CLK_EN, S3C_GPIO_PULL_NONE); + gpio_set_value(WB_CLK_EN, 1); + /* msleep (10); */ + + /* SIDE_WAKEUP for sideload */ + s3c_gpio_cfgpin(WB_WAKEUP, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(WB_WAKEUP, S3C_GPIO_PULL_NONE); + gpio_set_value(WB_WAKEUP, 1); + + /* SIDE_RST */ + s3c_gpio_cfgpin(WB_RESET, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(WB_RESET, S3C_GPIO_PULL_NONE); + gpio_set_value(WB_RESET, 0); + /* msleep (100); */ + /*gpio_set_value (WB_RESET, 1); */ + + /* SIDE_INT for interrupt */ + s3c_gpio_cfgpin(WB_CYAS_INT, S3C_GPIO_SFN(0xF)); + s3c_gpio_setpull(WB_CYAS_INT, S3C_GPIO_PULL_NONE); + s5p_register_gpio_interrupt(WB_CYAS_INT); + + /* SIDE_CD for detecting SD card */ + s3c_gpio_cfgpin(WB_SDCD_INT, S3C_GPIO_SFN(0xF)); + s3c_gpio_setpull(WB_SDCD_INT, S3C_GPIO_PULL_NONE); + s5p_register_gpio_interrupt(WB_SDCD_INT); + + /* WB_AP_T_FLASH_DETECT */ + s3c_gpio_cfgpin(WB_AP_T_FLASH_DETECT, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(WB_AP_T_FLASH_DETECT, S3C_GPIO_PULL_NONE); + gpio_set_value(WB_AP_T_FLASH_DETECT, 1); +#if 0 + /*Tri-state MoviNAND bus */ + s3c_gpio_cfgpin(GPIO_NAND_CLK, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_NAND_CMD, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_NAND_D0, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_NAND_D1, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_NAND_D2, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_NAND_D3, S3C_GPIO_INPUT); + s3c_gpio_setpull(GPIO_NAND_CLK, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_NAND_CMD, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_NAND_D0, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_NAND_D1, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_NAND_D2, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_NAND_D3, S3C_GPIO_PULL_NONE); + + /*Tri-state SD */ + s3c_gpio_cfgpin(GPIO_T_FLASH_CLK, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_T_FLASH_CMD, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_T_FLASH_D0, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_T_FLASH_D1, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_T_FLASH_D2, S3C_GPIO_INPUT); + s3c_gpio_cfgpin(GPIO_T_FLASH_D3, S3C_GPIO_INPUT); + s3c_gpio_setpull(GPIO_T_FLASH_CLK, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_T_FLASH_CMD, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_T_FLASH_D0, S3C_GPIO_PULL_NONE); +#endif + + /*Setup PADs for NAND controller */ + /*GPIO_SIDE_CS */ +#if 0 + s3c_gpio_cfgpin(S5PV210_MP01(5), S3C_GPIO_SFN(3)); + s3c_gpio_setpull(S5PV210_MP01(5), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_CLE */ + s3c_gpio_cfgpin(S5PV210_MP03(0), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PV210_MP03(0), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_ALE */ + s3c_gpio_cfgpin(S5PV210_MP03(1), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PV210_MP03(1), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_WE */ + s3c_gpio_cfgpin(S5PV210_MP03(2), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PV210_MP03(2), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_RE */ + s3c_gpio_cfgpin(S5PV210_MP03(3), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PV210_MP03(3), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_RB */ + s3c_gpio_cfgpin(S5PV210_MP03(7), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PV210_MP03(7), S3C_GPIO_PULL_NONE); +#endif + /* GPIO_SIDE_CS *//*sujan */ + s3c_gpio_cfgpin(EXYNOS4_GPY0(2), S3C_GPIO_SFN(3)); + s3c_gpio_setpull(EXYNOS4_GPY0(2), S3C_GPIO_PULL_NONE); + + /* GPIO_SIDE_CLE */ + s3c_gpio_cfgpin(EXYNOS4_GPY2(0), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY2(0), S3C_GPIO_PULL_NONE); + + /* GPIO_SIDE_ALE */ + s3c_gpio_cfgpin(EXYNOS4_GPY2(1), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY2(1), S3C_GPIO_PULL_NONE); + + /* GPIO_SIDE_WE */ + s3c_gpio_cfgpin(EXYNOS4_GPY0(5), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY0(5), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_RE */ + s3c_gpio_cfgpin(EXYNOS4_GPY0(4), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY0(4), S3C_GPIO_PULL_NONE); + + /*GPIO_SIDE_RB */ + s3c_gpio_cfgpin(EXYNOS4_GPY2(2), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY2(2), S3C_GPIO_PULL_NONE); + + /*GPIO_D0----GPIO_D7 */ + s3c_gpio_cfgpin(EXYNOS4_GPY5(0), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(0), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(1), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(1), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(2), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(2), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(3), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(3), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(4), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(4), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(5), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(5), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(6), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(6), S3C_GPIO_PULL_NONE); + + s3c_gpio_cfgpin(EXYNOS4_GPY5(7), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(EXYNOS4_GPY5(7), S3C_GPIO_PULL_NONE); + +#if 0 + clk = clk_get(NULL, "onenand"); /*sujan */ + if (IS_ERR(clk)) { + printk(KERN_ERR "Cannot get nfcon\n"); + } + clk_enable(clk); +#endif + + /* Enable clock */ + /*clk = clk_get (NULL, "nfcon"); */ + + clk_nand = clk_get(NULL, "nfcon"); /*sujan */ + if (IS_ERR(clk_nand)) { + printk(KERN_ERR "Cannot get nfcon\n"); + } + + temp = clk_enable(clk_nand); + + clk_onenand = clk_get(NULL, "onenand"); /*sujan */ + if (IS_ERR(clk_onenand)) { + printk(KERN_ERR "Cannot get nfcon\n"); + } + temp1 = clk_enable(clk_onenand); + + printk(KERN_ALERT "\nClk_enable return value =%d\n", temp1); + /*set NAND Controller Configuration */ + nandArea = + request_mem_region(CYAS_DEV_BASE_ADDR, 0x1000, + "nandController"); + if (nandArea == NULL) { + printk(KERN_ERR + "Cannot request NAND controller's register memory region\n"); + } + + cs_vma_base = (unsigned int) ioremap(CYAS_DEV_BASE_ADDR, 0x1000); + if (cs_vma_base == 0) { + printk(KERN_ERR + "Cannot map NAND controller's register space to memory\n"); + } + + /* Setup NAND CFG register */ + writel(CYASHAL_PNAND_CONFIG_SET, cs_vma_base); + + dev_p->m_phy_addr_base = (void *) CYAS_DEV_BASE_ADDR; + dev_p->m_vma_addr_base = (void *) cs_vma_base; + iomux_vma = (u32) dev_p->m_vma_addr_base; + /*printk (KERN_ALERT"\nm_phy_addr_base = %x\n", dev_p->m_phy_addr_base); + printk (KERN_ALERT"\nm_vma_addr_base = %x\n", dev_p->m_vma_addr_base); */ + + dev_p->regulator = (void *) regulator_get(NULL, "vtf_2.8v"); + + + /* 1. Enable NAND Controller and CE */ + /* rv = IORD32 (dev_p->m_vma_addr_base+NFCONT); + rv &= ~0x800000 ; + rv &= ~NFCONT_MASK_CS ; + rv |= 1 ; + rv &= ~0x30000 ; *//*Soft lock disable */ + /* IOWR32 (dev_p->m_vma_addr_base+NFCONT, rv); */ + + return 0; +} + +EXPORT_SYMBOL(cy_as_hal_processor_hw_init); + +void cy_as_hal_c110_hardware_deinit(cy_as_c110_dev_kernel *dev_p) +{ + /* + * free C110 hw resources + */ + if (dev_p->m_vma_addr_base != 0) + iounmap((void *) dev_p->m_vma_addr_base); + + if (dev_p->m_phy_addr_base != 0) + release_mem_region((unsigned long) dev_p->m_phy_addr_base, + SZ_16K); + + if (have_irq) + free_irq(WB_CYAS_IRQ_INT, dev_p); + + gpio_set_value(WB_WAKEUP, 0); + cy_as_hal_enable_NANDCLK(0); +} + +/* + * These are the functions that are not part of the + * HAL layer, but are required to be called for this HAL + */ + +/* + * Called On AstDevice LKM exit + */ +int cy_as_hal_c110_pnand_stop(const char *pgm, cy_as_hal_device_tag tag) +{ + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; + + /* + * TODO: Need to disable WB interrupt handlere 1st + */ + if (0 == dev_p) + return 1; + + cy_as_hal_print_message("<1>_stopping c110 HAL layer object\n"); + if (dev_p->m_sig != CY_AS_C110_CRAM_HAL_SIG) { + cy_as_hal_print_message("<1>%s: %s: bad HAL tag\n", pgm, + __func__); + return 1; + } + + /* + * disable interrupt + */ + cy_as_hal_write_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INT_MASK_REG, 0x0000); + +#if 0 + if (dev_p->thread_flag == 0) { + dev_p->thread_flag = 1; + wait_for_completion(&dev_p->thread_complete); + cy_as_hal_print_message("cyasc110hal:" + "done cleaning thread\n"); + cy_as_hal_destroy_sleep_channel(&dev_p->thread_sc); + } +#endif + + cy_as_hal_c110_hardware_deinit(dev_p); + + /* + * Rearrange the list + */ + if (m_c110_list_p == dev_p) + m_c110_list_p = dev_p->m_next_p; + + cy_as_hal_free(dev_p); + +#ifdef __CYAS_HAL_USE_DMA__ + s3c2410_dma_free(cyashal_work->tx_dmach, &cy_as_hal_dma_client); + destroy_workqueue(cyashal_work->workqueue); + kfree(cyashal_work); + cyashal_work = NULL; +#endif + cy_as_hal_print_message(KERN_INFO "C110_kernel_hal stopped\n"); + return 0; +} + +int c110_start_intr(cy_as_hal_device_tag tag) +{ + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; + int ret = 0; + const uint16_t mask = + CY_AS_MEM_P0_INTR_REG_DRQINT | CY_AS_MEM_P0_INTR_REG_MBINT; + + /* + * register for interrupts + */ + ret = cy_as_hal_configure_interrupts(dev_p); + + /* + * enable only MBox & DRQ interrupts for now + */ + cy_as_hal_write_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_INT_MASK_REG, mask); + + return 1; +} + +/* + * Below are the functions that communicate with the WestBridge device. + * These are system dependent and must be defined by the HAL layer + * for a given system. + */ + + + +/* + * This function must be defined to write a register within the WestBridge + * device. The addr value is the address of the register to write with + * respect to the base address of the WestBridge device. + */ +void cy_as_hal_write_register(cy_as_hal_device_tag tag, + uint16_t addr, uint16_t data) +{ + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; +/* unsigned long flags; */ + u32 rv; +#ifdef CHECK_MULTI_ACCESS + static atomic_t wrreg_usage_cnt = { 0 }; /*throw an error if called from multiple threads!!! */ +#endif + +#ifndef WESTBRIDGE_NDEBUG + if (dev_p->m_sig != CY_AS_C110_CRAM_HAL_SIG) { + printk("%s: bad TAG parameter passed\n", __func__); + return; + } +#endif + + /* ******** disable interrupts * */ + /*local_irq_save (flags); */ +#ifdef CHECK_MULTI_ACCESS + if (atomic_read(&wrreg_usage_cnt) != 0) { + cy_as_hal_print_message(KERN_ERR + "CyAsC110HAL: !!!* CyAsHalWriteRegister usage:%d\n", + atomic_read(&wrreg_usage_cnt)); + } + atomic_inc(&wrreg_usage_cnt); +#endif + + rv = IORD32(dev_p->m_vma_addr_base + NFCONT); + /* rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + IOWR32(dev_p->m_vma_addr_base + NFCONT, rv); + + IOWR8(dev_p->m_vma_addr_base + NFCMMD, CYAS_PNAND_CSDIO_WRITE); + IOWR8(dev_p->m_vma_addr_base + NFADDR, addr); + IOWR8(dev_p->m_vma_addr_base + NFADDR, 0x0C); + + IOWR16(dev_p->m_vma_addr_base + NFDATA, data); + + /* rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + IOWR32(dev_p->m_vma_addr_base + NFCONT, rv); + + /* *** reinable interrupts ** */ +#ifdef CHECK_MULTI_ACCESS + atomic_dec(&wrreg_usage_cnt); +#endif + /* local_irq_restore (flags); */ +} + +/* + * This function must be defined to read a register from the WestBridge + * device. The addr value is the address of the register to read with + * respect to the base address of the WestBridge device. + */ +uint16_t cy_as_hal_read_register(cy_as_hal_device_tag tag, uint16_t addr) +{ + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; + uint16_t data = 0; +/* unsigned long flags; */ + u32 rv = 0; +#ifdef CHECK_MULTI_ACCESS + static atomic_t rdreg_usage_cnt = { 0 }; /*throw an error if called from multiple threads!!! */ +#endif + +#ifndef WESTBRIDGE_NDEBUG + if (dev_p->m_sig != CY_AS_C110_CRAM_HAL_SIG) { + printk("%s: bad TAG parameter passed\n", __func__); + return dev_p->m_sig; + } +#endif + + /* ******** disable interrupts * */ + /*local_irq_save (flags); */ +#ifdef CHECK_MULTI_ACCESS + if (atomic_read(&rdreg_usage_cnt) != 0) { + cy_as_hal_print_message(KERN_ERR + "CyAsC110HAL: !!!* CyAsHalWriteRegister usage:%d\n", + atomic_read(&rdreg_usage_cnt)); + } + atomic_inc(&rdreg_usage_cnt); +#endif + + + rv = IORD32(dev_p->m_vma_addr_base + NFCONT); + /* rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + IOWR32(dev_p->m_vma_addr_base + NFCONT, rv); + + IOWR8(dev_p->m_vma_addr_base + NFCMMD, CYAS_PNAND_CSDIO_READ0); + IOWR8(dev_p->m_vma_addr_base + NFADDR, addr); + IOWR8(dev_p->m_vma_addr_base + NFADDR, 0x0C); + IOWR8(dev_p->m_vma_addr_base + NFCMMD, CYAS_PNAND_CSDIO_READ1); + + data = (unsigned short) IORD16(dev_p->m_vma_addr_base + NFDATA); + + /* rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + IOWR32(dev_p->m_vma_addr_base + NFCONT, rv); + /* *** reinable interrupts ** */ +#ifdef CHECK_MULTI_ACCESS + atomic_dec(&rdreg_usage_cnt); + /* **************************** */ +#endif + /* local_irq_restore (flags); */ + + return data; +} + +#if 0 +/** + * ******** Endpoint buffer read w/o C110 GPMC Prefetch Engine ************* + * *** the original working code, works at max speed for 8 bit xfers *** + * *** for 16 bit the bus diagram has gaps *** + **/ +static void cy_as_hal_pNand_lbd_read(cy_as_hal_device_tag tag, + u32 row_addr, u16 count, void *buff) +{ + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; + uint16_t w16cnt; + uint16_t *ptr16; + uint32_t rv = 0; +/* unsigned long flags; */ + + w16cnt = count >> 1; /* count/2 */ + ptr16 = (uint16_t *) buff; + + /* local_irq_save (flags); */ +#ifdef CHECK_MULTI_ACCESS + if (atomic_read(&gl_usage_cnt) != 0) { + cy_as_hal_print_message(KERN_ERR + "CyAsC110HAL: !!!* %s usage:%d\n", + __FUNCTION__, + atomic_read(&gl_usage_cnt)); + } + atomic_inc(&gl_usage_cnt); +#endif + + /* 1. Enable NAND Controller and CE */ + rv = readl(dev_p->m_vma_addr_base + NFCONT); + /*rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + rv &= ~0x30000; /*Soft lock disable */ + writel(rv, dev_p->m_vma_addr_base + NFCONT); + + writeb(CYAS_PNAND_LBD_READ_B1, dev_p->m_vma_addr_base + NFCMMD); + writeb((u8) (0x0), dev_p->m_vma_addr_base + NFADDR); + writeb((u8) (0x0), dev_p->m_vma_addr_base + NFADDR); + writeb((u8) (row_addr), dev_p->m_vma_addr_base + NFADDR); + writeb((u8) (0x0), dev_p->m_vma_addr_base + NFADDR); + writeb((u8) (0x0), dev_p->m_vma_addr_base + NFADDR); + + /** finally issue a RD cmd **/ + writeb(CYAS_PNAND_LBD_READ_B2, dev_p->m_vma_addr_base + NFCMMD); + + /** ****** blast the data out in 16bit chunks ** **/ + while (w16cnt--) { + *ptr16++ = readw(dev_p->m_vma_addr_base + NFDATA); + } + /** ************************************ **/ + + /* 9. Disable NAND controller and CE */ + /*rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + writel(rv, dev_p->m_vma_addr_base + NFCONT); +#ifdef CHECK_MULTI_ACCESS + atomic_dec(&gl_usage_cnt); +#endif + /* local_irq_restore (flags); */ +} + +/** + * *********** uses LBD mode to write N bytes into astoria ************* + * Status: Working, however there are 150ns idle timeafter every 2 (16 bit or 4(8 bit) bus cycles + **/ +static void cy_as_hal_pNand_lbd_write(cy_as_hal_device_tag tag, + u32 row_addr, u16 count, void *buff) +{ + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; + uint16_t w16cnt; + uint32_t *ptr16; + uint32_t rv = 0; +/* unsigned long flags; */ + + w16cnt = count >> 2; /* count/2 */ + ptr16 = (uint32_t *) buff; + + /*local_irq_save (flags); */ +#ifdef CHECK_MULTI_ACCESS + if (atomic_read(&gl_usage_cnt) != 0) { + cy_as_hal_print_message(KERN_ERR + "CyAsC110HAL: !!!* %s usage:%d\n", + __FUNCTION__, + atomic_read(&gl_usage_cnt)); + } + atomic_inc(&gl_usage_cnt); +#endif + + /* 1. Enable NAND Controller and CE */ + rv = IORD32(dev_p->m_vma_addr_base + NFCONT); + /*rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + rv &= ~0x30000; /*Soft lock disable */ + IOWR32(dev_p->m_vma_addr_base + NFCONT, rv); + + IOWR8(dev_p->m_vma_addr_base + NFCMMD, CYAS_PNAND_LBD_PGMPAGE_B1); + IOWR8(dev_p->m_vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(dev_p->m_vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(dev_p->m_vma_addr_base + NFADDR, (u8) (row_addr)); + IOWR8(dev_p->m_vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(dev_p->m_vma_addr_base + NFADDR, (u8) (0x0)); + + while (w16cnt--) { + IOWR32(dev_p->m_vma_addr_base + NFDATA, *ptr16++); + } + + /** finally issue a PGM cmd **/ + IOWR8(dev_p->m_vma_addr_base + NFCMMD, CYAS_PNAND_LBD_PGMPAGE_B2); + + /* 9. Disable NAND controller and CE */ + /*rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + IOWR32(dev_p->m_vma_addr_base + NFCONT, rv); +#ifdef CHECK_MULTI_ACCESS + atomic_dec(&gl_usage_cnt); +#endif + /* local_irq_restore (flags); */ +} +#endif + +/* + * preps Ep pointers & data counters for next packet + * (fragment of the request) xfer returns true if + * there is a next transfer, and false if all bytes in + * current request have been xfered + */ +static inline bool prep_for_next_xfer(cy_as_hal_device_tag tag, uint8_t ep) +{ + + if (!end_points[ep].sg_list_enabled) { + /* + * no further transfers for non storage EPs + * (like EP2 during firmware download, done + * in 64 byte chunks) + */ + if (end_points[ep].req_xfer_cnt >= + end_points[ep].req_length) { +#ifdef DBGPRN_ENABLED + DBGPRN + ("<1> %s():RQ sz:%d non-_sg EP:%d completed\n", + __func__, end_points[ep].req_length, ep); +#endif + /* + * no more transfers, we are done with the request + */ + return false; + } + + /* + * calculate size of the next DMA xfer, corner + * case for non-storage EPs where transfer size + * is not egual N * HAL_DMA_PKT_SZ xfers + */ + if ((end_points[ep].req_length - + end_points[ep].req_xfer_cnt) >= HAL_DMA_PKT_SZ) { + end_points[ep].dma_xfer_sz = HAL_DMA_PKT_SZ; + } else { + /* + * that would be the last chunk less + * than P-port max size + */ + end_points[ep].dma_xfer_sz = + end_points[ep].req_length - + end_points[ep].req_xfer_cnt; + } + + return true; + } + + /* + * for SG_list assisted dma xfers + * are we done with current SG ? + */ + if (end_points[ep].seg_xfer_cnt == end_points[ep].sg_p->length) { + /* + * was it the Last SG segment on the list ? + */ + if (sg_is_last(end_points[ep].sg_p)) { +#ifdef DBGPRN_ENABLED + DBGPRN("<1> %s: EP:%d completed," + "%d bytes xfered\n", + __func__, ep, end_points[ep].req_xfer_cnt); +#endif + return false; + } else { + /* + * There are more SG segments in current + * request's sg list setup new segment + */ + + end_points[ep].seg_xfer_cnt = 0; + end_points[ep].sg_p = sg_next(end_points[ep].sg_p); + /* set data pointer for next DMA sg transfer */ + end_points[ep].data_p = + sg_virt(end_points[ep].sg_p); +#ifdef DBGPRN_ENABLED + DBGPRN("<1> %s new SG:_va:%p\n\n", + __func__, end_points[ep].data_p); +#endif + } + + } + + /* + * for sg list xfers it will always be 512 or 1024 + */ + end_points[ep].dma_xfer_sz = HAL_DMA_PKT_SZ; + + /* + * next transfer is required + */ + + return true; +} + +/* + * Astoria DMA read request, APP_CPU reads from WB ep buffer + */ +static void cy_service_e_p_dma_read_request(cy_as_c110_dev_kernel *dev_p, + uint8_t ep) +{ + cy_as_hal_device_tag tag = (cy_as_hal_device_tag) dev_p; + uint16_t v, i, size; + register uint32_t *dptr; + uint16_t ep_dma_reg = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; + /* register void *read_addr ; */ + uint16_t w16cnt; + uint32_t rv = 0; + register void *vma_addr_base = dev_p->m_vma_addr_base; + /* + * get the XFER size frtom WB eP DMA REGISTER + */ + v = cy_as_hal_read_register(tag, ep_dma_reg); + + /* + * amount of data in EP buff in bytes + */ + size = v & CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK; + +#ifdef DBGPRN_ENABLED + DBGPRN + ("<1>cy_service_e_p_dma_read_request cb: xfer_sz:%d ep:%d ptr:0x%x\n", + size, ep, end_points[ep].data_p); +#endif + /* + * memory pointer for this DMA packet xfer (sub_segment) + */ + dptr = (uint32_t *) end_points[ep].data_p; + +/* read_addr = dev_p->m_vma_addr_base + CYAS_DEV_CALC_EP_ADDR (ep) ; */ + + /* printk (KERN_ERR"\ndebug at %s %d, ptr = %x", __func__, __LINE__, dptr); */ + cy_as_hal_assert(size != 0); + + if (size || dptr) +#if 0 + { + cy_as_hal_pNand_lbd_read(tag, ep, size, dptr); + } +#else + { + + w16cnt = size >> 2; /* count/2 */ +#if 1 + /* 1. Enable NAND Controller and CE */ + rv = IORD32(vma_addr_base + NFCONT); + /* rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + /* rv &= ~0x30000 ; *//*Soft lock disable */ + IOWR32(vma_addr_base + NFCONT, rv); +#endif + IOWR8(vma_addr_base + NFCMMD, CYAS_PNAND_LBD_READ_B1); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (ep)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + + /** finally issue a RD cmd **/ + IOWR8(vma_addr_base + NFCMMD, CYAS_PNAND_LBD_READ_B2); + + /** ****** blast the data out in 16bit chunks ** **/ + while (w16cnt--) { + *dptr = IORD32(vma_addr_base + NFDATA); + dptr++; + } + /** ************************************ **/ + +#if 1 + /* 9. Disable NAND controller and CE */ + /* rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + IOWR32(vma_addr_base + NFCONT, rv); +#endif + } +#endif + /* + * clear DMAVALID bit indicating that the data has been read + */ + cy_as_hal_write_register(tag, ep_dma_reg, 0); + + end_points[ep].seg_xfer_cnt += size; + end_points[ep].req_xfer_cnt += size; + + /* + * pre-advance data pointer (if it's outside sg + * list it will be reset anyway + */ + end_points[ep].data_p += size; +#ifdef DBGPRN_ENABLED + DBGPRN("<1>cy_service_e_p_dma_read_request cb: ep:%d\n", ep); +#endif + + if (prep_for_next_xfer(tag, ep)) { + /* + * we have more data to read in this request, + * setup next dma packet due tell WB how much + * data we are going to xfer next + */ + v = end_points[ep].dma_xfer_sz /*HAL_DMA_PKT_SZ */ | + CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; + cy_as_hal_write_register(tag, ep_dma_reg, v); + /*ndelay (200); */ + } else { + end_points[ep].pending = cy_false; + end_points[ep].type = cy_as_hal_none; + end_points[ep].buffer_valid = cy_false; + +#ifdef EP_SPIN_LOCK + up(&end_points[ep].sem); +#endif + /* + * notify the API that we are done with rq on this EP + */ + if (callback) { +#ifdef DBGPRN_ENABLED + DBGPRN + ("<1>trigg rd_dma completion cb: xfer_sz:%d\n", + end_points[ep].req_xfer_cnt); +#endif + callback(tag, ep, + end_points[ep].req_xfer_cnt, + CY_AS_ERROR_SUCCESS); + } + } +} + +static uint32_t testDMAbuffer[256]; +/* + * c110_cpu needs to transfer data to ASTORIA EP buffer + */ +static void cy_service_e_p_dma_write_request(cy_as_c110_dev_kernel *dev_p, + uint8_t ep) +{ + uint16_t addr; + uint16_t v = 0, i = 0; + uint32_t size; + uint32_t *dptr; + uint32_t rv = 0; + uint16_t w16cnt; + /* register void *write_addr ; */ + void *vma_addr_base = dev_p->m_vma_addr_base; + register void *vma_addr_data = vma_addr_base + NFDATA; + + cy_as_hal_device_tag tag = (cy_as_hal_device_tag) dev_p; + /* + * note: size here its the size of the dma transfer could be + * anything > 0 && < P_PORT packet size + */ + size = end_points[ep].dma_xfer_sz; + dptr = (uint32_t *) end_points[ep].data_p; + +/* write_addr = (void *) (dev_p->m_vma_addr_base + CYAS_DEV_CALC_EP_ADDR (ep)) ; */ + +#if 0 /*def DBGPRN_ENABLED */ + DBGPRN("<1>cy_service_e_p_dma_write_request cb: size:%d\n", size); +#endif + + /* + * perform the soft DMA transfer, soft in this case + */ +#if 0 /*def __CYAS_HAL_USE_DMA__ */ + if (size == 512) { + dma_addr_t dma_source_addr = + dma_map_single(NULL, dptr, size, DMA_TO_DEVICE); + /*dma_addr_t dma_dst_addr = dma_map_single (NULL, testDMAbuffer, size, DMA_FROM_DEVICE); */ + dma_addr_t dma_dst_addr = dev_p->m_phy_addr_base + NFDATA; /*dma_map_single (NULL, vma_addr_data, 4, DMA_FROM_DEVICE); */ + /*spin_lock_irqsave (&cyashal_work->lock, flags); */ + cyashal_work->state |= TXBUSY; + /*spin_unlock_irqrestore (&cyashal_work->lock, flags); */ + /*s3c2410_dma_config (cyashal_work->tx_dmach, 1); */ + s3c2410_dma_devconfig(cyashal_work->tx_dmach, + S3C_DMA_MEM2MEM_P, dma_source_addr); + /* 1. Enable NAND Controller and CE */ + rv = IORD32(vma_addr_base + NFCONT); + /*rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + /*rv &= ~0x30000 ; *//*Soft lock disable */ + IOWR32(vma_addr_base + NFCONT, rv); + IOWR8(vma_addr_base + NFCMMD, CYAS_PNAND_LBD_PGMPAGE_B1); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (ep)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + + writel(0x180010e, vma_addr_base); + s3c2410_dma_enqueue(cyashal_work->tx_dmach, + (void *) cyashal_work, dma_dst_addr, + size); + + /*s3c2410_dma_ctrl (cyashal_work->tx_dmach, S3C2410_DMAOP_START); */ + + /*rv = msecs_to_jiffies (10) + 10; */ + /*rv = wait_for_completion_timeout (&cyashal_work->xfer_completion, rv); */ + while (1) { + ndelay(10); + if ((cyashal_work->state & TXBUSY) == 0) + break; + } + dma_unmap_single(NULL, dma_source_addr, size, + DMA_TO_DEVICE); + + /** finally issue a PGM cmd **/ + IOWR8(vma_addr_base + NFCMMD, CYAS_PNAND_LBD_PGMPAGE_B2); + /* 9. Disable NAND controller and CE */ + /*rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + IOWR32(vma_addr_base + NFCONT, rv); +#if 0 /*def DBGPRN_ENABLED */ + DBGPRN("<1>wait_for_completion_timeout: 0x%x 0x%x\n", + dma_source_addr, vma_addr_data); +#endif + } else +#endif + { + if (size) { +#if 0 + /* + * Now, write the data to the device + */ + cy_as_hal_pNand_lbd_write(tag, ep, size, dptr); +#else + register uint32_t a, b, c, d, e, f, g, h; + + w16cnt = size >> 2; /* count/2 */ +#if 1 + /* 1. Enable NAND Controller and CE */ + rv = IORD32(vma_addr_base + NFCONT); + /* rv &= ~0x800000 ; */ + rv &= ~NFCONT_MASK_CS; + rv |= 1; + /* rv &= ~0x30000 ; *//*Soft lock disable */ + IOWR32(vma_addr_base + NFCONT, rv); +#endif + IOWR8(vma_addr_base + NFCMMD, + CYAS_PNAND_LBD_PGMPAGE_B1); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (ep)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + IOWR8(vma_addr_base + NFADDR, (u8) (0x0)); + + writel(CYASHAL_PNAND_CONFIG_WRITE_SET, + vma_addr_base); +/* + while (w16cnt--) { + IOWR32( vma_addr_data, *dptr++); + }*/ + for (i = size / 32; i > 0; i--) { + a = *dptr++; + b = *dptr++; + c = *dptr++; + d = *dptr++; + e = *dptr++; + f = *dptr++; + g = *dptr++; + h = *dptr++; + + IOWR32(vma_addr_data, a); + IOWR32(vma_addr_data, b); + IOWR32(vma_addr_data, c); + IOWR32(vma_addr_data, d); + IOWR32(vma_addr_data, e); + IOWR32(vma_addr_data, f); + IOWR32(vma_addr_data, g); + IOWR32(vma_addr_data, h); + } + + switch ((size & 0x1F) / 4) { + case 15: + IOWR32(vma_addr_data, *dptr++); + + case 14: + IOWR32(vma_addr_data, *dptr++); + + case 13: + IOWR32(vma_addr_data, *dptr++); + case 12: + IOWR32(vma_addr_data, *dptr++); + case 11: + IOWR32(vma_addr_data, *dptr++); + + case 10: + IOWR32(vma_addr_data, *dptr++); + + case 9: + IOWR32(vma_addr_data, *dptr++); + case 8: + IOWR32(vma_addr_data, *dptr++); + case 7: + IOWR32(vma_addr_data, *dptr++); + + case 6: + IOWR32(vma_addr_data, *dptr++); + + case 5: + IOWR32(vma_addr_data, *dptr++); + case 4: + IOWR32(vma_addr_data, *dptr++); + case 3: + IOWR32(vma_addr_data, *dptr++); + + case 2: + IOWR32(vma_addr_data, *dptr++); + + case 1: + IOWR32(vma_addr_data, *dptr++); + break; + } + + if (size & 3) { + uint16_t *t16; + t16 = (uint16_t *) dptr; + if (size & 2) + IOWR16(vma_addr_data, *t16++); + if (size & 1) + IOWR8(vma_addr_data, + *(uint8_t *) t16); + } +#endif + } + + /** finally issue a PGM cmd **/ + IOWR8(vma_addr_base + NFCMMD, CYAS_PNAND_LBD_PGMPAGE_B2); + /* 9. Disable NAND controller and CE */ + /* rv |= 0x800000 ; */ + rv |= NFCONT_MASK_CS; + rv &= 0xfffffffe; + IOWR32(vma_addr_base + NFCONT, rv); + } + + + end_points[ep].seg_xfer_cnt += size; + end_points[ep].req_xfer_cnt += size; + /* + * pre-advance data pointer + * (if it's outside sg list it will be reset anyway) + */ + end_points[ep].data_p += size; + + /* + * now clear DMAVAL bit to indicate we are done + * transferring data and that the data can now be + * sent via USB to the USB host, sent to storage, + * or used internally. + */ + + addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; + cy_as_hal_write_register(tag, addr, size); + + writel(CYASHAL_PNAND_CONFIG_SET, vma_addr_base); + + /* + * finally, tell the USB subsystem that the + * data is gone and we can accept the + * next request if one exists. + */ + if (prep_for_next_xfer(tag, ep)) { + /* + * There is more data to go. Re-init the WestBridge DMA side + */ + v = end_points[ep].dma_xfer_sz | + CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; + cy_as_hal_write_register(tag, addr, v); + /* udelay (1); */ + } else { + + end_points[ep].pending = cy_false; + end_points[ep].type = cy_as_hal_none; + end_points[ep].buffer_valid = cy_false; + +#ifdef EP_SPIN_LOCK + up(&end_points[ep].sem); +#endif + /* + * notify the API that we are done with rq on this EP + */ + if (callback) { +#if 0 /*def DBGPRN_ENABLED */ + DBGPRN + ("<1>trigg wr_dma completion cb: xfer_sz:%d\n", + end_points[ep].req_xfer_cnt); +#endif + /* + * this callback will wake up the process that might be + * sleeping on the EP which data is being transferred + */ + callback(tag, ep, + end_points[ep].req_xfer_cnt, + CY_AS_ERROR_SUCCESS); + } + } +} + +/* + * HANDLE DRQINT from Astoria (called in AS_Intr context + */ +static void cy_handle_d_r_q_interrupt(cy_as_c110_dev_kernel *dev_p, + uint16_t read_val) +{ + uint16_t v; + static uint8_t service_ep = 2; + + /* + * We've got DRQ INT, read DRQ STATUS Register */ + v = cy_as_hal_read_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_P0_DRQ); + + if (v == 0) { +#ifndef WESTBRIDGE_NDEBUG + printk("<l>stray drq interrupt detected: read_val = 0x%x", + read_val); + printk("<l>P0_DRQ=0x%x", + cy_as_hal_read_register((cy_as_hal_device_tag) + dev_p, CY_AS_MEM_P0_DRQ)); + printk("<l>P0_INT=0x%x\n", + cy_as_hal_read_register((cy_as_hal_device_tag) + dev_p, + CY_AS_MEM_P0_INTR_REG)); +#endif + return; + } + + /* + * Now, pick a given DMA request to handle, for now, we just + * go round robin. Each bit position in the service_mask + * represents an endpoint from EP2 to EP15. We rotate through + * each of the endpoints to find one that needs to be serviced. + */ + while ((v & (1 << service_ep)) == 0) { + + if (service_ep == 15) + service_ep = 2; + else + service_ep++; + } + + if (end_points[service_ep].type == cy_as_hal_write) { + /* + * handle DMA WRITE REQUEST: app_cpu will + * write data into astoria EP buffer + */ + cy_service_e_p_dma_write_request(dev_p, service_ep); + } else if (end_points[service_ep].type == cy_as_hal_read) { + /* + * handle DMA READ REQUEST: cpu will + * read EP buffer from Astoria + */ + cy_service_e_p_dma_read_request(dev_p, service_ep); + } +#ifndef WESTBRIDGE_NDEBUG + else + cy_as_hal_print_message("<l>cyashalc110:interrupt," + " w/o pending DMA job," + "-check DRQ_MASK logic\n"); +#endif + + /* + * Now bump the EP ahead, so other endpoints get + * a shot before the one we just serviced + */ + if (end_points[service_ep].type == cy_as_hal_none) { + if (service_ep == 15) + service_ep = 2; + else + service_ep++; + } + +} + +void cy_as_hal_dma_cancel_request(cy_as_hal_device_tag tag, uint8_t ep) +{ +#ifdef DBGPRN_ENABLED + DBGPRN("<l>cy_as_hal_dma_cancel_request on ep:%d", ep); +#endif + if (end_points[ep].pending) + cy_as_hal_write_register(tag, + CY_AS_MEM_P0_EP2_DMA_REG + ep - 2, + 0); + + end_points[ep].buffer_valid = cy_false; + end_points[ep].type = cy_as_hal_none; +#ifdef EP_SPIN_LOCK + up(&end_points[ep].sem); +#endif +} + +/* + * enables/disables SG list assisted DMA xfers for the given EP + * sg_list assisted XFERS can use physical addresses of mem pages in case if the + * xfer is performed by a h/w DMA controller rather then the CPU on P port + */ +void cy_as_hal_set_ep_dma_mode(uint8_t ep, bool sg_xfer_enabled) +{ + end_points[ep].sg_list_enabled = sg_xfer_enabled; +#ifdef DBGPRN_ENABLED + DBGPRN("<1> EP:%d sg_list assisted DMA mode set to = %d\n", + ep, end_points[ep].sg_list_enabled); +#endif +} + +EXPORT_SYMBOL(cy_as_hal_set_ep_dma_mode); + +/* + * This function must be defined to transfer a block of data to + * the WestBridge device. This function can use the burst write + * (DMA) capabilities of WestBridge to do this, or it can just copy + * the data using writes. + */ +void cy_as_hal_dma_setup_write(cy_as_hal_device_tag tag, + uint8_t ep, void *buf, + uint32_t size, uint16_t maxsize) +{ + uint32_t addr = 0; + uint16_t v = 0; + + /* + * Note: "size" is the actual request size + * "maxsize" - is the P port fragment size + * No EP0 or EP1 traffic should get here + */ + cy_as_hal_assert(ep != 0 && ep != 1); + +#ifdef EP_SPIN_LOCK + while (down_interruptible(&end_points[ep].sem)); +#endif + /* + * If this asserts, we have an ordering problem. Another DMA request + * is coming down before the previous one has completed. + */ + cy_as_hal_assert(end_points[ep].buffer_valid == cy_false); + end_points[ep].buffer_valid = cy_true; + end_points[ep].type = cy_as_hal_write; + end_points[ep].pending = cy_true; + + /* + * total length of the request + */ + end_points[ep].req_length = size; + + if (size >= maxsize) { + /* + * set xfer size for very 1st DMA xfer operation + * port max packet size ( typically 512 or 1024) + */ + end_points[ep].dma_xfer_sz = maxsize; + } else { + /* + * smaller xfers for non-storage EPs + */ + end_points[ep].dma_xfer_sz = size; + } + + /* + * check the EP transfer mode uses sg_list rather then a memory buffer + * block devices pass it to the HAL, so the hAL could get to the real + * physical address for each segment and set up a DMA controller + * hardware ( if there is one) + */ + if (end_points[ep].sg_list_enabled) { + /* + * buf - pointer to the SG list + * data_p - data pointer to the 1st DMA segment + * seg_xfer_cnt - keeps track of N of bytes sent in current + * sg_list segment + * req_xfer_cnt - keeps track of the total N of bytes + * transferred for the request + */ + end_points[ep].sg_p = buf; + end_points[ep].data_p = sg_virt(end_points[ep].sg_p); + end_points[ep].seg_xfer_cnt = 0; + end_points[ep].req_xfer_cnt = 0; + +#ifdef DBGPRN_DMA_SETUP_WR + DBGPRN + ("<l>cyasc110hal:%s: EP:%d, buf:%p, buf_va:%p, req_sz:%d, maxsz:%d\n", + __func__, ep, buf, end_points[ep].data_p, size, + maxsize); +#endif + + } else { + /* + * setup XFER for non sg_list assisted EPs + */ + +#ifdef DBGPRN_DMA_SETUP_WR + DBGPRN("<1>%s non storage or sz < 512:EP:%d, sz:%d\n", + __func__, ep, size); +#endif + + end_points[ep].sg_p = NULL; + + /* + * must be a VMA of a membuf in kernel space + */ + end_points[ep].data_p = buf; + + /* + * will keep track No of bytes xferred for the request + */ + end_points[ep].req_xfer_cnt = 0; + } + + /* + * Tell WB we are ready to send data on the given endpoint + */ + v = (end_points[ep]. + dma_xfer_sz & CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK) | + CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; + + addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; + + cy_as_hal_write_register(tag, addr, v); +} + +/* + * This function must be defined to transfer a block of data from + * the WestBridge device. This function can use the burst read + * (DMA) capabilities of WestBridge to do this, or it can just + * copy the data using reads. + */ +void cy_as_hal_dma_setup_read(cy_as_hal_device_tag tag, + uint8_t ep, void *buf, + uint32_t size, uint16_t maxsize) +{ + uint32_t addr; + uint16_t v; + + /* + * Note: "size" is the actual request size + * "maxsize" - is the P port fragment size + * No EP0 or EP1 traffic should get here + */ + cy_as_hal_assert(ep != 0 && ep != 1); + +#ifdef EP_SPIN_LOCK + while (down_interruptible(&end_points[ep].sem)); +#endif + /* + * If this asserts, we have an ordering problem. + * Another DMA request is coming down before the + * previous one has completed. we should not get + * new requests if current is still in process + */ + + cy_as_hal_assert(end_points[ep].buffer_valid == cy_false); + + end_points[ep].buffer_valid = cy_true; + end_points[ep].type = cy_as_hal_read; + end_points[ep].pending = cy_true; + end_points[ep].req_xfer_cnt = 0; + end_points[ep].req_length = size; + + if (size >= maxsize) { + /* + * set xfer size for very 1st DMA xfer operation + * port max packet size ( typically 512 or 1024) + */ + end_points[ep].dma_xfer_sz = maxsize; + } else { + /* + * so that we could handle small xfers on in case + * of non-storage EPs + */ + end_points[ep].dma_xfer_sz = size; + } + + addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; + + if (end_points[ep].sg_list_enabled) { + /* + * Handle sg-list assisted EPs + * seg_xfer_cnt - keeps track of N of sent packets + * buf - pointer to the SG list + * data_p - data pointer for the 1st DMA segment + */ + end_points[ep].seg_xfer_cnt = 0; + end_points[ep].sg_p = buf; + end_points[ep].data_p = sg_virt(end_points[ep].sg_p); + +#ifdef DBGPRN_DMA_SETUP_RD + DBGPRN + ("<1>cyasc110hal:DMA_setup_read sg_list EP:%d, buf:%p, buf_va:%p, req_sz:%d, maxsz:%d\n", + ep, buf, end_points[ep].data_p, size, maxsize); +#endif + v = (end_points[ep]. + dma_xfer_sz & CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK) | + CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; + cy_as_hal_write_register(tag, addr, v); + } else { + /* + * Non sg list EP passed void *buf rather then scatterlist *sg + */ +#ifdef DBGPRN_DMA_SETUP_RD + DBGPRN("<l>%s:non-sg_list EP:%d, RQ_sz:%d, maxsz:%d\n", + __func__, ep, size, maxsize); +#endif + + end_points[ep].sg_p = NULL; + + /* + * must be a VMA of a membuf in kernel space + */ + end_points[ep].data_p = buf; + + /* + * Program the EP DMA register for Storage endpoints only. + */ + if (is_storage_e_p(ep)) { + v = (end_points[ep]. + dma_xfer_sz & + CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK) | + CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; + cy_as_hal_write_register(tag, addr, v); + } + } +} + +/* + * This function must be defined to allow the WB API to + * register a callback function that is called when a + * DMA transfer is complete. + */ +void cy_as_hal_dma_register_callback(cy_as_hal_device_tag tag, + cy_as_hal_dma_complete_callback cb) +{ + DBGPRN + ("<1>\n%s: WB API has registered a dma_complete callback:%x\n", + __func__, (uint32_t) cb); + callback = cb; +} + +/* + * This function must be defined to return the maximum size of + * DMA request that can be handled on the given endpoint. The + * return value should be the maximum size in bytes that the DMA + * module can handle. + */ +uint32_t cy_as_hal_dma_max_request_size(cy_as_hal_device_tag tag, + cy_as_end_point_number_t ep) +{ + /* + * Storage reads and writes are always done in 512 byte blocks. + * So, we do the count handling within the HAL, and save on + * some of the data transfer delay. + */ + if ((ep == CYASSTORAGE_READ_EP_NUM) || + (ep == CYASSTORAGE_WRITE_EP_NUM)) { + /* max DMA request size HAL can handle by itself */ + return CYASSTORAGE_MAX_XFER_SIZE; + } else { + /* + * For the USB - Processor endpoints, the maximum transfer + * size depends on the speed of USB operation. So, we use + * the following constant to indicate to the API that + * splitting of the data into chunks less that or equal to + * the max transfer size should be handled internally. + */ + + /* DEFINED AS 0xffffffff in cyasdma.h */ + return CY_AS_DMA_MAX_SIZE_HW_SIZE; + } +} + +/* + * This function must be defined to set the state of the WAKEUP pin + * on the WestBridge device. Generally this is done via a GPIO of + * some type. + */ +cy_bool cy_as_hal_set_wakeup_pin(cy_as_hal_device_tag tag, cy_bool state) +{ +#if 0 + if (state) { + gpio_set_value(WB_WAKEUP, 1); + } else { + gpio_set_value(WB_WAKEUP, 0); + } + return cy_true; +#else + return cy_true; +#endif +} + +void cy_as_hal_pll_lock_loss_handler(cy_as_hal_device_tag tag) +{ + cy_as_hal_print_message("<l>error: astoria PLL lock is lost\n"); + cy_as_hal_print_message + ("<l>please check the input voltage levels"); + cy_as_hal_print_message("<l>and clock, and restart the system\n"); +} + +/* + * Below are the functions that must be defined to provide the basic + * operating system services required by the API. + */ + +/* + * This function is required by the API to allocate memory. + * This function is expected to work exactly like malloc(). + */ +void *cy_as_hal_alloc(uint32_t cnt) +{ + void *ret_p; + + ret_p = kmalloc(cnt, GFP_ATOMIC); + return ret_p; +} + +/* + * This function is required by the API to free memory allocated + * with CyAsHalAlloc(). This function is'expected to work exacly + * like free(). + */ +void cy_as_hal_free(void *mem_p) +{ + kfree(mem_p); +} + +/* + * Allocator that can be used in interrupt context. + * We have to ensure that the kmalloc call does not + * sleep in this case. + */ +void *cy_as_hal_c_b_alloc(uint32_t cnt) +{ + void *ret_p; + + ret_p = kmalloc(cnt, GFP_ATOMIC); + return ret_p; +} + +/* + * This function is required to set a block of memory to a + * specific value. This function is expected to work exactly + * like memset() + */ +void cy_as_hal_mem_set(void *ptr, uint8_t value, uint32_t cnt) +{ + memset(ptr, value, cnt); +} + +static int cy_as_hal_sleep_condition; + +/* + * This function is expected to create a sleep channel. + * The data structure that represents the sleep channel object + * sleep channel (which is Linux "wait_queue_head_t wq" for this paticular HAL) + * passed as a pointer, and allpocated by the caller + * (typically as a local var on the stack) "Create" word should read as + * "SleepOn", this func doesn't actually create anything + */ +cy_bool cy_as_hal_create_sleep_channel(cy_as_hal_sleep_channel *channel) +{ + init_waitqueue_head(&channel->wq); + return cy_true; +} + +/* + * for this particular HAL it doesn't actually destroy anything + * since no actual sleep object is created in CreateSleepChannel() + * sleep channel is given by the pointer in the argument. + */ +cy_bool cy_as_hal_destroy_sleep_channel(cy_as_hal_sleep_channel *channel) +{ + return cy_true; +} + +/* + * platform specific wakeable Sleep implementation + */ +cy_bool cy_as_hal_sleep_on(cy_as_hal_sleep_channel *channel, uint32_t ms) +{ + cy_as_hal_sleep_condition = 0; + wait_event_interruptible_timeout(channel->wq, + cy_as_hal_sleep_condition, + ((ms * HZ) / 1000)); + return cy_true; +} + +/* + * wakes up the process waiting on the CHANNEL + */ +cy_bool cy_as_hal_wake(cy_as_hal_sleep_channel *channel) +{ + cy_as_hal_sleep_condition = 1; + wake_up_interruptible_all(&channel->wq); + return cy_true; +} + +uint32_t cy_as_hal_disable_interrupts() +{ +#if 0 + uint16_t v = + cy_as_hal_read_register(m_c110_list_p, + CY_AN_MEM_P0_INT_MASK_REG); + if (!intr__enable) { + cy_as_hal_write_register(m_c110_list_p, + CY_AN_MEM_P0_INT_MASK_REG, 0); + } + + intr__enable++; + return (uint32_t) v; +#else + return 0; +#endif +} + +void cy_as_hal_enable_interrupts(uint32_t val) +{ +#if 0 + intr__enable--; + if (!intr__enable) { + val = (CY_AS_MEM_P0_INTR_REG_MCUINT | + CY_AS_MEM_P0_INTR_REG_MBINT | + CY_AS_MEM_P0_INTR_REG_PMINT | + CY_AN_MEM_P0_INTR_REG_DRQINT); + cy_as_hal_write_register(m_c110_list_p, + CY_AN_MEM_P0_INT_MASK_REG, + (uint16_t) val); + } +#endif +} + +/* + * Sleep atleast 150ns, cpu dependent + */ +void cy_as_hal_sleep150(void) +{ + uint32_t i, j; + + j = 0; + for (i = 0; i < 1000; i++) + j += (~i); +} + +void cy_as_hal_sleep(uint32_t ms) +{ + cy_as_hal_sleep_channel channel; + + cy_as_hal_create_sleep_channel(&channel); + cy_as_hal_sleep_on(&channel, ms); + cy_as_hal_destroy_sleep_channel(&channel); +} + +cy_bool cy_as_hal_is_polling() +{ + return cy_false; +} + +void cy_as_hal_c_b_free(void *ptr) +{ + cy_as_hal_free(ptr); +} + +/* + * suppose to reinstate the astoria registers + * that may be clobbered in sleep mode + */ +void cy_as_hal_init_dev_registers(cy_as_hal_device_tag tag, + cy_bool is_standby_wakeup) +{ + /* specific to SPI, no implementation required */ + (void) tag; + (void) is_standby_wakeup; +} + +void cy_as_hal_read_regs_before_standby(cy_as_hal_device_tag tag) +{ + /* specific to SPI, no implementation required */ + (void) tag; +} + +cy_bool cy_as_hal_sync_device_clocks(cy_as_hal_device_tag tag) +{ + /* + * we are in asynchronous mode. so no need to handle this + */ + return true; +} + + +void cy_as_hal_dump_reg(cy_as_hal_device_tag tag) +{ + u16 data16; + int retval = 0; +#if 1 + int i; + printk(KERN_ERR "=======================================\n"); + printk(KERN_ERR "======== Astoria REG Dump =========\n"); + for (i = 0; i < 256; i++) { + data16 = cy_as_hal_read_register(tag, i); + printk(KERN_ERR "%4.4x ", data16); + if (i % 8 == 7) + printk(KERN_ERR "\n"); + } +#endif + printk(KERN_ERR "=======================================\n\n"); +#if 0 + printk(KERN_ERR "======== Astoria REG Test =========\n"); + + cy_as_hal_write_register(tag, CY_AS_MEM_MCU_MAILBOX1, 0xAAAA); + cy_as_hal_write_register(tag, CY_AS_MEM_MCU_MAILBOX2, 0x5555); + cy_as_hal_write_register(tag, CY_AS_MEM_MCU_MAILBOX3, 0xB4C3); + + data16 = cy_as_hal_read_register(tag, CY_AS_MEM_MCU_MAILBOX1); + if (data16 != 0xAAAA) { + printk(KERN_ERR + "REG Test Error in CY_AS_MEM_MCU_MAILBOX1 - %4.4x\n", + data16); + retval = 1; + } + data16 = cy_as_hal_read_register(tag, CY_AS_MEM_MCU_MAILBOX2); + if (data16 != 0x5555) { + printk(KERN_ERR + "REG Test Error in CY_AS_MEM_MCU_MAILBOX2 - %4.4x\n", + data16); + retval = 1; + } + data16 = cy_as_hal_read_register(tag, CY_AS_MEM_MCU_MAILBOX3); + if (data16 != 0xB4C3) { + printk(KERN_ERR + "REG Test Error in CY_AS_MEM_MCU_MAILBOX3 - %4.4x\n", + data16); + retval = 1; + } + + if (retval) + printk(KERN_ERR "REG Test fail !!!!!\n"); + else + printk(KERN_ERR "REG Test success !!!!!\n"); +#endif + printk(KERN_ERR "=======================================\n\n"); +} + +/* + * init C110 h/w resources + */ +int cy_as_hal_c110_pnand_start(const char *pgm, + cy_as_hal_device_tag *tag, cy_bool debug) +{ + cy_as_c110_dev_kernel *dev_p; + int i; + u16 data16[4]; + uint32_t err = 0; + int retval; + /* No debug mode support through argument as of now */ + (void) debug; + + have_irq = false; + + /* + * Initialize the HAL level endpoint DMA data. + */ + for (i = 0; i < sizeof(end_points) / sizeof(end_points[0]); i++) { +#ifdef EP_SPIN_LOCK + sema_init(&(end_points[i].sem), 1); /* usage count is 1 */ +#endif + end_points[i].data_p = 0; + end_points[i].pending = cy_false; + end_points[i].size = 0; /* No debug mode support through argument as of now */ + (void) debug; + + end_points[i].type = cy_as_hal_none; + end_points[i].sg_list_enabled = cy_false; + + /* + * by default the DMA transfers to/from the E_ps don't + * use sg_list that implies that the upper devices like + * blockdevice have to enable it for the E_ps in their + * initialization code + */ + } + + /* allocate memory for c110 HAL */ + dev_p = + (cy_as_c110_dev_kernel *) + cy_as_hal_alloc(sizeof(cy_as_c110_dev_kernel)); + if (dev_p == 0) { + cy_as_hal_print_message("out of memory allocating C110" + "device structure\n"); + return 0; + } + + dev_p->m_sig = CY_AS_C110_CRAM_HAL_SIG; + + /* initialize C110 hardware and StartC110Kernelall gpio pins */ + err = cy_as_hal_processor_hw_init(dev_p); + if (err) + goto bus_acc_error; + + /* + * Now perform a hard reset of the device to have + * the new settings take effect + */ + gpio_set_value(WB_WAKEUP, 1); + + /* + * do Astoria h/w reset + */ + DBGPRN(KERN_INFO "-_-_pulse -> westbridge RST pin\n"); + + /* + * NEGATIVE PULSE on RST pin + */ + gpio_set_value(WB_RESET, 0); + msleep(10); + gpio_set_value(WB_RESET, 1); + msleep(50); + cy_as_hal_write_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_RST_CTRL_REG, + CY_AS_MEM_RST_CTRL_REG_HARD); + msleep(10); + + data16[0] = + cy_as_hal_read_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_PNAND_CFG); + cy_as_hal_print_message(KERN_ERR "PAND_CFG = 0x%04x\n", data16[0]); + cy_as_hal_write_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_PNAND_CFG, 0x0); + + /* + * NOTE: if you want to capture bus activity on the LA, + * don't use printks in between the activities you want to capture. + * prinks may take milliseconds, and the data of interest + * will fall outside the LA capture window/buffer + */ +/* cy_as_hal_dump_reg ((cy_as_hal_device_tag)dev_p); */ + + data16[0] = + cy_as_hal_read_register((cy_as_hal_device_tag) dev_p, + CY_AS_MEM_CM_WB_CFG_ID); + + if ((data16[0] & 0xA200) != 0xA200) { + /* + * astoria device is not found + */ + printk(KERN_ERR "ERROR: astoria device is not found, " + "CY_AS_MEM_CM_WB_CFG_ID %4.4x", data16[0]); + goto bus_acc_error; + } + + cy_as_hal_print_message(KERN_INFO " register access test:" + "\n CY_AS_MEM_CM_WB_CFG_ID:%4.4x\n" + "after cfg_wr:%4.4x\n\n", + data16[0], data16[1]); + + dev_p->thread_flag = 1; + spin_lock_init(&int_lock); + dev_p->m_next_p = m_c110_list_p; + + m_c110_list_p = dev_p; + *tag = dev_p; + + cy_as_hal_configure_interrupts((void *) dev_p); + + cy_as_hal_print_message(KERN_INFO + "C110__hal started tag:%p, kernel HZ:%d\n", + dev_p, HZ); + + /* + *make processor to storage endpoints SG assisted by default + */ + cy_as_hal_set_ep_dma_mode(4, true); + cy_as_hal_set_ep_dma_mode(8, true); + + + return 1; + + /* + * there's been a NAND bus access error or + * astoria device is not connected + */ + bus_acc_error: + /* + * at this point hal tag hasn't been set yet + * so the device will not call C110_stop + */ +#if 1 + { + int i = 100; + /* s3c_gpio_cfgpin (WB_CYAS_INT, S3C_GPIO_OUTPUT); */ + /* s3c_gpio_setpull (WB_CYAS_INT, S3C_GPIO_PULL_NONE); */ + do { + gpio_set_value(WB_RESET, 0); + gpio_set_value(WB_WAKEUP, 0); + gpio_set_value(WB_CLK_EN, 0); + /* gpio_set_value (WB_CYAS_IRQ_INT, 0); */ + msleep(10); + gpio_set_value(WB_RESET, 1); + gpio_set_value(WB_WAKEUP, 1); + gpio_set_value(WB_CLK_EN, 1); + /* gpio_set_value (WB_CYAS_IRQ_INT, 1); */ + msleep(10); + } while (i--); + + } +#endif +#if 1 + { + uint32_t i1 = 0; + uint16_t read_val; + + for (i1 = 0; i1 < 100; i1++) { + read_val = + cy_as_hal_read_register((cy_as_hal_device_tag) + dev_p, + CY_AS_MEM_CM_WB_CFG_ID); + } + } +#endif + + cy_as_hal_c110_hardware_deinit(dev_p); + cy_as_hal_free(dev_p); + return 0; +} + +int cy_as_hal_enable_irq(void) +{ + enable_irq(WB_CYAS_IRQ_INT); + enable_irq(WB_SDCD_IRQ_INT); + return 0; +} + +int cy_as_hal_disable_irq(void) +{ + disable_irq(WB_CYAS_IRQ_INT); + disable_irq(WB_SDCD_IRQ_INT); + return 0; +} + +int cy_as_hal_detect_SD(void) +{ + uint8_t f_det; + f_det = gpio_get_value(WB_SDCD_INT); + if (f_det) { /* removed; */ + gpio_set_value(WB_AP_T_FLASH_DETECT, 1); + return 0; + } else + gpio_set_value(WB_AP_T_FLASH_DETECT, 0); + /*inserted */ + return 1; +} + +static int g_SDPW_count; +int cy_as_hal_enable_power(cy_as_hal_device_tag tag, int flag) +{ + + cy_as_c110_dev_kernel *dev_p = (cy_as_c110_dev_kernel *) tag; + struct regulator *regulator = + (struct regulator *) dev_p->regulator; + if (flag) { + if (g_SDPW_count == 0) { + g_SDPW_count++; + regulator_enable(regulator); + } else { + cy_as_hal_print_message(KERN_ERR + "%s: enable g_SDPW_count=%d\n", + __func__, g_SDPW_count); + } + + } else { + if (g_SDPW_count == 1) { + g_SDPW_count--; + regulator_disable(regulator); + } else { + cy_as_hal_print_message(KERN_ERR + "%s: disable g_SDPW_count=%d\n", + __func__, g_SDPW_count); + } + + } + return 1; +} + +int cy_as_hal_configure_sd_isr(void *dev_p, irq_handler_t isr_function) +{ + int result; + int irq_pin = WB_SDCD_INT; + + irq_set_irq_type(WB_SDCD_IRQ_INT, IRQ_TYPE_EDGE_BOTH); + + /* + * for shared IRQS must provide non NULL device ptr + * othervise the int won't register + * */ + cy_as_hal_print_message("%s: set_irq_type\n", __func__); + + result = + request_irq(WB_SDCD_IRQ_INT, (irq_handler_t) isr_function, + IRQF_SHARED, "AST_CD#", dev_p); + + cy_as_hal_print_message("%s: request_irq - %d\n", __func__, + result); + + if (result == 0) { + cy_as_hal_print_message(KERN_INFO + "WB_SDCD_IRQ_INT C110_pin: %d assigned IRQ #%d \n", + irq_pin, WB_SDCD_IRQ_INT); + } else { + cy_as_hal_print_message + ("WB_SDCD_IRQ_INT: interrupt failed to register - %d\n", + result); + gpio_free(irq_pin); + cy_as_hal_print_message + ("WB_SDCD_IRQ_INT: can't get assigned IRQ %i for INT#\n", + WB_SDCD_IRQ_INT); + } + + return result; +} + +int cy_as_hal_free_sd_isr(void) +{ + free_irq(WB_SDCD_IRQ_INT, NULL); + return 0; +} + + +#else +/* + * Some compilers do not like empty C files, so if the C110 hal is not being + * compiled, we compile this single function. We do this so that for a + * given target HAL there are not multiple sources for the HAL functions. + */ +void my_C110_kernel_hal_dummy_function(void) +{ +} + +#endif diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/cyashaldef.h b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/cyashaldef.h new file mode 100755 index 0000000..6ce78ae --- /dev/null +++ b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/cyashaldef.h @@ -0,0 +1,55 @@ +/* Cypress West Bridge API header file (cyashaldef.h) +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +#ifndef _INCLUDED_CYASHALDEF_H_ +#define _INCLUDED_CYASHALDEF_H_ + +/* Summary + * If set to TRUE, the basic numeric types are defined by the + * West Bridge API code + * + * Description + * The West Bridge API relies on some basic integral types to be + * defined. These types include uint8_t, int8_t, uint16_t, + * int16_t, uint32_t, and int32_t. If this macro is defined the + * West Bridge API will define these types based on some basic + * assumptions. If this value is set and the West Bridge API is + * used to set these types, the definition of these types must be + * examined to insure that they are appropriate for the given + * target architecture and compiler. + * + * Notes + * It is preferred that if the basic platform development + * environment defines these types that the CY_DEFINE_BASIC_TYPES + * macro be undefined and the appropriate target system header file + * be added to the file cyashaldef.h. + */ + +#include <linux/types.h> + + +#if !defined(__doxygen__) +typedef int cy_bool ; +#define cy_true (1) +#define cy_false (0) +#endif + +#endif /* _INCLUDED_CYASHALDEF_H_ */ diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasc110dev_pnand.h b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasc110dev_pnand.h new file mode 100755 index 0000000..fd156ef --- /dev/null +++ b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasc110dev_pnand.h @@ -0,0 +1,73 @@ +/* Cypress Antioch OMAP KERNEL file (cyanomapdev_kernel.h) +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor, +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +#ifndef __CY_AS_C110_DEV_KERNEL_H__ +#define __CY_AS_C110_DEV_KERNEL_H__ + + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/completion.h> + +/* include does not seem to work + * moving for patch submission +#include <mach/gpmc.h> +*/ +#include <mach/gpio.h> + +/* + * Constants + */ +#define CY_AS_C110_CRAM_HAL_SIG (0x2332) + + +/* + * Data structures + */ +typedef struct cy_as_c110_dev_kernel { + /* This is the signature for this data structure */ + unsigned int m_sig ; + + /* Address base of Antioch Device */ + void *m_phy_addr_base; + void *m_vma_addr_base; + /* This is a pointer to the next Antioch device in the system */ + struct cy_as_c110_dev_kernel *m_next_p; + + /* This is for thread sync */ + struct completion thread_complete; + + /* This is for thread to wait for interrupts */ + cy_as_hal_sleep_channel thread_sc; + + /* This is for thread to exit upon StopOmapKernel */ + int thread_flag; /* set 1 to exit */ + + int dma_ch; + + /* This is for dma sync */ + struct completion dma_complete; + void *regulator; +} cy_as_c110_dev_kernel; + +#endif + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyashalc110_pnand.h b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyashalc110_pnand.h new file mode 100755 index 0000000..73592ab --- /dev/null +++ b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyashalc110_pnand.h @@ -0,0 +1,320 @@ +/* Cypress Antioch HAL for C110 KERNEL header file (cyashalomapkernel.h) +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +/* + * This file contains the defintion of the hardware abstraction + * layer on OMAP3430 talking to the West Bridge Astoria device + */ + + +#ifndef _INCLUDED_CYASHALC110_KERNEL_H_ +#define _INCLUDED_CYASHALC110_KERNEL_H_ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/wait.h> +#include <linux/string.h> +/* include does not seem to work + * moving for patch submission +#include <mach/gpmc.h> +*/ +#include <mach/gpio.h> + +typedef struct cy_as_hal_sleep_channel_t { + wait_queue_head_t wq ; +} cy_as_hal_sleep_channel ; + +/* moved to staging location, eventual location + * considered is here +#include <mach/westbridge/cyashaldef.h> +#include <linux/westbridge/cyastypes.h> +#include <linux/westbridge/cyas_cplus_start.h> +*/ +#include "../cyashaldef.h" +#include "../../../../../../../include/linux/westbridge/cyastypes.h" +#include "../../../../../../../include/linux/westbridge/cyas_cplus_start.h" +#include "cyasc110dev_pnand.h" + +/* + * Below are the data structures that must be defined by the HAL layer + */ + +/* + * The HAL layer must define a TAG for identifying a specific Astoria + * device in the system. In this case the tag is a void * which is + * really an OMAP device pointer + */ +typedef void *cy_as_hal_device_tag ; + + +/* This must be included after the CyAsHalDeviceTag type is defined */ + +/* moved to staging location, eventual location + * considered is here + * #include <linux/westbridge/cyashalcb.h> +*/ +#include "../../../../../../../include/linux/westbridge/cyashalcb.h" +/* + * Below are the functions that communicate with the West Bridge + * device. These are system dependent and must be defined by + * the HAL layer for a given system. + */ + +/* + * This function must be defined to write a register within the Antioch + * device. The addr value is the address of the register to write with + * respect to the base address of the Antioch device. + */ +void +cy_as_hal_write_register(cy_as_hal_device_tag tag, + uint16_t addr, uint16_t data) ; + +/* + * This function must be defined to read a register from + * the west bridge device. The addr value is the address of + * the register to read with respect to the base address + * of the west bridge device. + */ +uint16_t +cy_as_hal_read_register(cy_as_hal_device_tag tag, uint16_t addr) ; + +/* + * This function must be defined to transfer a block of data + * to the west bridge device. This function can use the burst write + * (DMA) capabilities of Antioch to do this, or it can just copy + * the data using writes. + */ +void +cy_as_hal_dma_setup_write(cy_as_hal_device_tag tag, + uint8_t ep, void *buf, uint32_t size, uint16_t maxsize) ; + +/* + * This function must be defined to transfer a block of data + * from the Antioch device. This function can use the burst + * read (DMA) capabilities of Antioch to do this, or it can + * just copy the data using reads. + */ +void +cy_as_hal_dma_setup_read(cy_as_hal_device_tag tag, uint8_t ep, + void *buf, uint32_t size, uint16_t maxsize) ; + +/* + * This function must be defined to cancel any pending DMA request. + */ +void +cy_as_hal_dma_cancel_request(cy_as_hal_device_tag tag, uint8_t ep) ; + +/* + * This function must be defined to allow the Antioch API to + * register a callback function that is called when a DMA transfer + * is complete. + */ +void +cy_as_hal_dma_register_callback(cy_as_hal_device_tag tag, + cy_as_hal_dma_complete_callback cb) ; + +/* + * This function must be defined to return the maximum size of DMA + * request that can be handled on the given endpoint. The return + * value should be the maximum size in bytes that the DMA module can + * handle. + */ +uint32_t +cy_as_hal_dma_max_request_size(cy_as_hal_device_tag tag, + cy_as_end_point_number_t ep) ; + +/* + * This function must be defined to set the state of the WAKEUP pin + * on the Antioch device. Generally this is done via a GPIO of some + * type. + */ +cy_bool +cy_as_hal_set_wakeup_pin(cy_as_hal_device_tag tag, cy_bool state) ; + +/* + * This function is called when the Antioch PLL loses lock, because + * of a problem in the supply voltage or the input clock. + */ +void +cy_as_hal_pll_lock_loss_handler(cy_as_hal_device_tag tag) ; + + +/********************************************************************** + * + * Below are the functions that must be defined to provide the basic + * operating system services required by the API. + * +***********************************************************************/ + +/* + * This function is required by the API to allocate memory. This function + * is expected to work exactly like malloc(). + */ +void * +cy_as_hal_alloc(uint32_t cnt) ; + +/* + * This function is required by the API to free memory allocated with + * CyAsHalAlloc(). This function is expected to work exacly like free(). + */ +void +cy_as_hal_free(void *mem_p) ; + +/* + * This function is required by the API to allocate memory during a + * callback. This function must be able to provide storage at inturupt + * time. + */ +void * +cy_as_hal_c_b_alloc(uint32_t cnt) ; + +/* + * This function is required by the API to free memory allocated with + * CyAsCBHalAlloc(). + */ +void +cy_as_hal_c_b_free(void *ptr) ; + +/* + * This function is required to set a block of memory to a specific + * value. This function is expected to work exactly like memset() + */ +void +cy_as_hal_mem_set(void *ptr, uint8_t value, uint32_t cnt) ; + +/* + * This function is expected to create a sleep channel. The data + * structure that represents the sleep channel is given by the + * pointer in the argument. + */ +cy_bool +cy_as_hal_create_sleep_channel(cy_as_hal_sleep_channel *channel) ; + +/* + * This function is expected to destroy a sleep channel. The data + * structure that represents the sleep channel is given by + * the pointer in the argument. + */ + + +cy_bool +cy_as_hal_destroy_sleep_channel(cy_as_hal_sleep_channel *channel) ; + +cy_bool +cy_as_hal_sleep_on(cy_as_hal_sleep_channel *channel, uint32_t ms) ; + +cy_bool +cy_as_hal_wake(cy_as_hal_sleep_channel *channel) ; + +uint32_t +cy_as_hal_disable_interrupts(void) ; + +void +cy_as_hal_enable_interrupts(uint32_t); + +void +cy_as_hal_sleep150(void); + +void +cy_as_hal_sleep(uint32_t ms); + +cy_bool +cy_as_hal_is_polling(void); + +void cy_as_hal_init_dev_registers(cy_as_hal_device_tag tag, + cy_bool is_standby_wakeup); + +/* + * required only in spi mode + */ +cy_bool cy_as_hal_sync_device_clocks(cy_as_hal_device_tag tag); + +void cy_as_hal_read_regs_before_standby(cy_as_hal_device_tag tag); + + +#ifndef NDEBUG +#define cy_as_hal_assert(cond) if (!(cond))\ + printk(KERN_WARNING"assertion failed at %s:%d\n", __FILE__, __LINE__); +#else +#define cy_as_hal_assert(cond) +#endif + +#define cy_as_hal_print_message printk + +/* removable debug printks */ +#ifndef WESTBRIDGE_NDEBUG +#define DBG_PRINT_ENABLED +#endif + +/*#define MBOX_ACCESS_DBG_PRINT_ENABLED*/ + + +#ifdef DBG_PRINT_ENABLED + /* Debug printing enabled */ + + #define DBGPRN(...) printk(__VA_ARGS__) + #define DBGPRN_FUNC_NAME + /*printk("<1> %x:_func: %s\n", current->pid, __func__) */ + +#else + /** NO DEBUG PRINTING **/ + #define DBGPRN(...) + #define DBGPRN_FUNC_NAME + +#endif + +/* +CyAsMiscSetLogLevel(uint8_t level) +{ + debug_level = level ; +} + +#ifdef CY_AS_LOG_SUPPORT + +void +cy_as_log_debug_message(int level, const char *str) +{ + if (level <= debug_level) + cy_as_hal_print_message("log %d: %s\n", level, str) ; +} +*/ + + +/* + * print buffer helper + */ +void cyashal_prn_buf(void *buf, uint16_t offset, int len); + +/* + * These are the functions that are not part of the HAL layer, + * but are required to be called for this HAL. + */ +int cy_as_hal_c110_pnand_start(const char *pgm, + cy_as_hal_device_tag *tag, cy_bool debug) ; +int cy_as_hal_c110_pnand_stop(const char *pgm, cy_as_hal_device_tag tag) ; +int omap_start_intr(cy_as_hal_device_tag tag) ; +void cy_as_hal_set_ep_dma_mode(uint8_t ep, bool sg_xfer_enabled); + +/* moved to staging location +#include <linux/westbridge/cyas_cplus_end.h> +*/ +#include "../../../../../../../include/linux/westbridge/cyas_cplus_start.h" +#endif diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasmemmap.h b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasmemmap.h new file mode 100755 index 0000000..4034b546 --- /dev/null +++ b/drivers/staging/westbridge/astoria/arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasmemmap.h @@ -0,0 +1,84 @@ +/* + OMAP3430 ZOOM MDK astoria interface defs(cyasmemmap.h) +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ +/* include does not seem to work + * moving for patch submission +#include <mach/gpmc.h> +#include <mach/mux.h> +*/ +#include <mach/gpio.h> +#include <mach/irqs.h> +#include <mach/map.h> + +#ifndef _INCLUDED_CYASMEMMAP_H_ +#define _INCLUDED_CYASMEMMAP_H_ + +#define HIGH 1 +#define LOW 0 + +#if 0 +#define WB_RESET S5PV210_GPG3(3) +#define WB_WAKEUP S5PV210_GPG3(4) +#define WB_CLK_EN S5PV210_GPG3(6) + +#define WB_CYAS_INT S5PV210_GPG3(5) +#endif + +#define WB_RESET EXYNOS4_GPY1(3) +#define WB_WAKEUP EXYNOS4_GPY4(4) +#define WB_CLK_EN EXYNOS4_GPY2(5) + +#define WB_CYAS_INT EXYNOS4_GPC0(3) + +#define WB_CYAS_IRQ_INT gpio_to_irq(EXYNOS4_GPC0(3)) +#define WB_SDCD_INT EXYNOS4_GPX3(4) +#define WB_SDCD_IRQ_INT gpio_to_irq(EXYNOS4_GPX3(4)) + +#define WB_AP_T_FLASH_DETECT EXYNOS4_GPC0(1) +#define S5PC110_PA_SROMC 0xE8000000 +/* + * Physical address + * we use CS For mapping in C110 RAM space + */ +#define CYAS_DEV_BASE_ADDR (S5P_PA_NAND) +#define CYAS_DEV_MAX_ADDR (0xFF) +#define CYAS_DEV_ADDR_RANGE (CYAS_DEV_MAX_ADDR << 1) + +/* in CRAM or PSRAM mode OMAP A1..An wires-> Astoria, there is no A0 line */ +#define CYAS_DEV_CALC_ADDR(cyas_addr) (cyas_addr << 1) +#define CYAS_DEV_CALC_EP_ADDR(ep) (ep << 1) + +/* + * i/o access macros + */ +#define IORD32(addr) (*(volatile u32 *)(addr)) +#define IOWR32(addr, val) (*(volatile u32 *)(addr) = val) + +#define IORD16(addr) (*(volatile u16 *)(addr)) +#define IOWR16(addr, val) (*(volatile u16 *)(addr) = val) + +#define IORD8(addr) (*(volatile u8 *)(addr)) +#define IOWR8(addr, val) (*(volatile u8 *)(addr) = val) + + +#endif /* _INCLUDED_CYASMEMMAP_H_ */ + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/block/Makefile b/drivers/staging/westbridge/astoria/block/Makefile index 4a45dd0..f9ffc46 100644..100755 --- a/drivers/staging/westbridge/astoria/block/Makefile +++ b/drivers/staging/westbridge/astoria/block/Makefile @@ -7,5 +7,5 @@ ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) endif obj-$(CONFIG_WESTBRIDGE_BLOCK_DRIVER) += cyasblkdev.o -cyasblkdev-y := cyasblkdev_block.o cyasblkdev_queue.o +cyasblkdev-y := cyasblkdev_block_na_spr.o cyasblkdev_queue_na_spr.o diff --git a/drivers/staging/westbridge/astoria/block/cyasblkdev_block_na_spr.c b/drivers/staging/westbridge/astoria/block/cyasblkdev_block_na_spr.c new file mode 100644 index 0000000..2c3cd0e --- /dev/null +++ b/drivers/staging/westbridge/astoria/block/cyasblkdev_block_na_spr.c @@ -0,0 +1,2914 @@ +/* cyanblkdev_block.c - West Bridge Linux Block Driver source file +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +/* + * Linux block driver implementation for Cypress West Bridge. + * Based on the mmc block driver implementation by Andrew Christian + * for the linux 2.6.26 kernel. + * mmc_block.c, 5/28/2002 + */ + +/* + * Block driver for media (i.e., flash cards) + * + * Copyright 2002 Hewlett-Packard Company + * + * Use consistent with the GNU GPL is permitted, + * provided that this copyright notice is + * preserved in its entirety in all copies and derived works. + * + * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, + * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS + * FITNESS FOR ANY PARTICULAR PURPOSE. + * + * Many thanks to Alessandro Rubini and Jonathan Corbet! + * + * Author: Andrew Christian + * 28 May 2002 + */ +#include <linux/moduleparam.h> +#include <linux/module.h> +#include <linux/init.h> +/*#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__)*/ +#include <linux/slab.h> +/*#endif*/ +#include <linux/sched.h> +#include <linux/kernel.h> +#include <linux/fs.h> +#include <linux/errno.h> +#include <linux/hdreg.h> +#include <linux/kdev_t.h> +#include <linux/blkdev.h> + +#include <asm/system.h> +/*#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__)*/ +#include <linux/uaccess.h> +/*#else +#include < asm/uaccess.h> +#endif*/ + +#include <linux/scatterlist.h> +#include <linux/time.h> +#include <linux/signal.h> +#include <linux/delay.h> + +#include "cyasblkdev_queue.h" + +#ifndef __USE_SYNC_FUNCTION__ +/* #define __CYAS_USE_WORK_QUEUE */ +#endif + +#define CYASBLKDEV_SHIFT 0 /* Only a single partition. */ +#define CYASBLKDEV_MAX_REQ_LEN (256) +#define CYASBLKDEV_NUM_MINORS (256 >> CYASBLKDEV_SHIFT) +#define CY_AS_TEST_NUM_BLOCKS (64) +#define CYASBLKDEV_MINOR_0 1 +#define CYASBLKDEV_MINOR_1 2 +#define CYASBLKDEV_MINOR_2 3 + +static int major; + +/* parameters passed from the user space */ +static int vfat_search; +static int gl_vfat_offset[2][2] = { {-1, -1}, {-1, -1} }; + +static int private_partition_bus = -1; + +static int private_partition_size = -1; + +extern int cyasdevice_reload_firmware(int mtp_mode); +#ifdef __USE_CYAS_AUTO_SUSPEND__ +extern int cyasdevice_wakeup_thread(int flag); +extern int cyasdevice_enable_thread(void); +extern int cyasdevice_disable_thread(void); +#endif +extern int cyasdevice_save_error(int error); + +int cyasblkdev_start_sdcard(void); +int cyasblkdev_stop_sdcard(void); + +/* + * There is one cyasblkdev_blk_data per slot. + */ +struct cyasblkdev_blk_data { + spinlock_t lock; + int media_count[2]; + const struct block_device_operations *blkops; + unsigned int usage; + unsigned int suspended; + + /* handle to the west bridge device this handle, typdefed as *void */ + cy_as_device_handle dev_handle; + + /* our custom structure, in addition to request queue, + * adds lock & semaphore items*/ + struct cyasblkdev_queue queue; + + /* 16 entries is enough given max request size + * 16 * 4K (64 K per request)*/ + struct scatterlist sg[16]; + + /* non-zero enables printk of executed reqests */ + unsigned int dbgprn_flags; + + /*gen_disk for private, system disk */ + struct gendisk *system_disk; + cy_as_media_type system_disk_type; + cy_bool system_disk_read_only; + cy_bool system_disk_bus_num; + + /* sector size for the medium */ + unsigned int system_disk_blk_size; + unsigned int system_disk_first_sector; + unsigned int system_disk_unit_no; + unsigned int system_disk_disk_cap; + + /*gen_disk for bus 0 */ + struct gendisk *user_disk_0; + cy_as_media_type user_disk_0_type; + cy_bool user_disk_0_read_only; + cy_bool user_disk_0_bus_num; + + /* sector size for the medium */ + unsigned int user_disk_0_blk_size; + unsigned int user_disk_0_first_sector; + unsigned int user_disk_0_unit_no; + unsigned int user_disk_0_disk_cap; + + /*gen_disk for bus 1 */ + struct gendisk *user_disk_1; + cy_as_media_type user_disk_1_type; + cy_bool user_disk_1_read_only; + cy_bool user_disk_1_bus_num; + + /* sector size for the medium */ + unsigned int user_disk_1_blk_size; + unsigned int user_disk_1_first_sector; + unsigned int user_disk_1_unit_no; + unsigned int user_disk_1_disk_cap; + + unsigned char user_disk_0_serial_num[4]; + unsigned char user_disk_1_serial_num[4]; + unsigned char system_disk_serial_num[4]; + + unsigned char user_disk_0_CID[16]; +}; + + +#ifdef __CYAS_USE_WORK_QUEUE +typedef struct { + struct work_struct work; +} cy_work_t; + +static struct workqueue_struct *cyas_blk_wq; +static cy_work_t *cyas_blk_work; +#endif + +/* pointer to west bridge block data device superstructure */ +static struct cyasblkdev_blk_data g_blk_dev; +static struct cyasblkdev_blk_data *gl_bd; + +static int g_is_block_dev_ready; + +/* static DECLARE_MUTEX (open_lock); */ +static DEFINE_MUTEX(open_lock); + +/* local forwardd declarationss */ +static cy_as_device_handle *cyas_dev_handle; +static void cyasblkdev_blk_deinit(struct cyasblkdev_blk_data *bd); + +/*change debug print options */ +#define DBGPRN_RD_RQ (1 < 0) +#define DBGPRN_WR_RQ (1 < 1) +#define DBGPRN_RQ_END (1 < 2) + +int blkdev_ctl_dbgprn(int prn_flags) +{ + int cur_options = gl_bd->dbgprn_flags; + + DBGPRN_FUNC_NAME; + + /* set new debug print options */ + gl_bd->dbgprn_flags = prn_flags; + + /* return previous */ + return cur_options; +} + +EXPORT_SYMBOL(blkdev_ctl_dbgprn); + +static struct cyasblkdev_blk_data *cyasblkdev_blk_get(struct gendisk *disk) +{ + struct cyasblkdev_blk_data *bd; + + DBGPRN_FUNC_NAME; + + /* down (&open_lock); */ + mutex_lock(&open_lock); + bd = disk->private_data; + + if (bd && (bd->usage == 0)) + bd = NULL; + + if (bd) { + bd->usage++; +#ifndef NBDEBUG + cy_as_hal_print_message("cyasblkdev_blk_get: usage = %d\n", + bd->usage); +#endif + } + /* up (&open_lock); */ + mutex_unlock(&open_lock); + return bd; +} + +static void cyasblkdev_blk_put(struct cyasblkdev_blk_data *bd) +{ + int ret; + DBGPRN_FUNC_NAME; + + /* down (&open_lock); */ + mutex_lock(&open_lock); + if (bd && (bd == gl_bd)) { + bd->usage--; +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + (" cyasblkdev_blk_put , bd->usage= %d\n", bd->usage); +#endif + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("cyasblkdev: blk_put(bd) on bd = NULL!\n"); +#endif + /* up (&open_lock); */ + mutex_unlock(&open_lock); + return; + } + + if (bd->usage == 0) { + if (bd->queue.queue != NULL) + blk_cleanup_queue(bd->queue.queue); + + if (bd->user_disk_0 != NULL) + put_disk(bd->user_disk_0); + if (bd->user_disk_1 != NULL) + put_disk(bd->user_disk_1); + if (bd->system_disk != NULL) + put_disk(bd->system_disk); +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + + ret = cy_as_storage_release(bd->dev_handle, 0, 0, 0, 0); + if (CY_AS_ERROR_SUCCESS != ret) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("cyasblkdev: cannot release bus 0 - %d\n", + ret); +#endif + } + + ret = cy_as_storage_release(bd->dev_handle, 1, 0, 0, 0); + if (CY_AS_ERROR_SUCCESS != ret) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("cyasblkdev: cannot release bus 1 - %d\n", + ret); +#endif + } + + ret = cy_as_storage_stop(bd->dev_handle, 0, 0); + if (CY_AS_ERROR_SUCCESS != ret) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("cyasblkdev: cannot stop storage stack - %d\n", + ret); +#endif + } +#ifdef __CY_ASTORIA_SCM_KERNEL_HAL__ + /* If the SCM Kernel HAL is being used, disable the use + * of scatter/gather lists at the end of block driver usage. + */ + cy_as_hal_disable_scatter_list(cyasdevice_gethaltag()); +#endif + + /*ptr to global struct cyasblkdev_blk_data */ + /* kfree (bd); */ + gl_bd = NULL; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("cyasblkdev (blk_put): usage = %d\n", + bd->usage); +#endif + /* up (&open_lock); */ + mutex_unlock(&open_lock); +} + +static int cyasblkdev_blk_open(struct block_device *bdev, fmode_t mode) +{ + struct cyasblkdev_blk_data *bd = cyasblkdev_blk_get(bdev->bd_disk); + int ret = -ENXIO; + int bus_num = 1; + unsigned char tempbuf[32]; + unsigned char *serial_num = tempbuf; + + DBGPRN_FUNC_NAME; + + if (bd) { + ret = 0; + + if (bdev->bd_disk == bd->user_disk_0) { + if ((mode & FMODE_WRITE) + && bd->user_disk_0_read_only) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("device marked as readonly " + "and write requested\n"); +#endif + + cyasblkdev_blk_put(bd); + ret = -EROFS; + } + bus_num = bd->user_disk_0_bus_num; + serial_num = bd->user_disk_0_serial_num; + } else if (bdev->bd_disk == bd->user_disk_1) { + if ((mode & FMODE_WRITE) + && bd->user_disk_1_read_only) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("device marked as readonly " + "and write requested\n"); +#endif + + cyasblkdev_blk_put(bd); + ret = -EROFS; + } + bus_num = bd->user_disk_1_bus_num; + serial_num = bd->user_disk_1_serial_num; + } else if (bdev->bd_disk == bd->system_disk) { + if ((mode & FMODE_WRITE) + && bd->system_disk_read_only) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("device marked as readonly " + "and write requested\n"); +#endif + + cyasblkdev_blk_put(bd); + ret = -EROFS; + } + bus_num = bd->system_disk_bus_num; + serial_num = bd->system_disk_serial_num; + } +#if 0 + if (bd->usage == 2) { +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + reg_data.buf_p = tempbuf; + reg_data.length = 16; + retval = + cy_as_storage_sd_register_read(bd->dev_handle, + bus_num, 0, + cy_as_sd_reg_CID, + ®_data, 0, + 0); + if (retval != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "cyasblkdev_blk_open : fail in read CID register (%d)\n", + ret); +#endif + cyasblkdev_blk_put(bd); + ret = -ENXIO; + } else { + cy_as_hal_print_message(KERN_ERR + "cyasblkdev_blk_open : serial num = 0x%x 0x%x 0x%x 0x%x\n", + tempbuf[9], + tempbuf[10], + tempbuf[11], + tempbuf[12]); + if (memcmp(serial_num, &tempbuf[9], 4)) { + retval = + cy_as_misc_storage_changed(bd-> + dev_handle, + 0, + 0); + if (retval != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + (KERN_ERR + "cyasblkdev_blk_open : fail in cy_as_misc_storage_changed (%d) \n", + ret); +#endif + } + memcpy(serial_num, &tempbuf[9], 4); + check_disk_change(bdev); + } + } + } +#endif + } + + return ret; +} + +static int cyasblkdev_blk_release(struct gendisk *disk, fmode_t mode) +{ + struct cyasblkdev_blk_data *bd = disk->private_data; + + DBGPRN_FUNC_NAME; + + cyasblkdev_blk_put(bd); + return 0; +} + +static int cyasblkdev_blk_ioctl(struct block_device *bdev, + fmode_t mode, + unsigned int cmd, unsigned long arg) +{ + DBGPRN_FUNC_NAME; + + if (cmd == HDIO_GETGEO) { + /*for now we only process geometry IOCTL */ + struct hd_geometry geo; + + memset(&geo, 0, sizeof(struct hd_geometry)); + + geo.cylinders = get_capacity(bdev->bd_disk) / (4 * 16); + geo.heads = 4; + geo.sectors = 16; + geo.start = get_start_sect(bdev); + + /* copy to user space */ + return copy_to_user((void __user *) arg, &geo, sizeof(geo)) + ? -EFAULT : 0; + } + + return -ENOTTY; +} + +/* Media_changed block_device opp + * this one is called by kernel to confirm if the media really changed + * as we indicated by issuing check_disk_change() call */ +int cyasblkdev_media_changed(struct gendisk *gd) +{ + struct cyasblkdev_blk_data *bd; + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "cyasblkdev_media_changed() is called\n"); +#endif + + if (gd) + bd = gd->private_data; + else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("cyasblkdev_media_changed() is called, " + "but gd is null\n"); +#endif + } + + /* return media change state "1" yes, 0 no */ + return 0; +} + +/* this one called by kernel to give us a chence + * to prep the new media before it starts to rescaning + * of the newlly inserted SD media */ +int cyasblkdev_revalidate_disk(struct gendisk *gd) +{ + /*int (*revalidate_disk) (struct gendisk *); */ + +#ifndef WESTBRIDGE_NDEBUG + if (gd) + cy_as_hal_print_message + ("cyasblkdev_revalidate_disk() is called, " + "(gl_bd->usage:%d)\n", gl_bd->usage); +#endif + + /* 0 means ok, kern can go ahead with partition rescan */ + return 0; +} + + +/*standard block device driver interface */ +static struct block_device_operations cyasblkdev_bdops = { + .open = cyasblkdev_blk_open, + .release = cyasblkdev_blk_release, + .ioctl = cyasblkdev_blk_ioctl, + /* .getgeo = cyasblkdev_blk_getgeo, */ + /* added to support media removal( real and simulated) media */ + .media_changed = cyasblkdev_media_changed, + /* added to support media removal( real and simulated) media */ + .revalidate_disk = cyasblkdev_revalidate_disk, + .owner = THIS_MODULE, +}; + +#if 0 +/* west bridge block device prep request function */ +static int cyasblkdev_blk_prep_rq(struct cyasblkdev_queue *bq, + struct request *req) +{ + struct cyasblkdev_blk_data *bd = bq->data; + int stat = BLKPREP_OK; + + DBGPRN_FUNC_NAME; + + /* If we have no device, we haven't finished initialising. */ + if (!bd || !bd->dev_handle) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "cyasblkdev %s: killing request - no device/host\n", + req->rq_disk->disk_name); +#endif + stat = BLKPREP_KILL; + } + + if (bd->suspended) { + blk_plug_device(bd->queue.queue); + stat = BLKPREP_DEFER; + } + + /* Check for excessive requests. */ +#if defined(__FOR_KERNEL_2_6_35__) || defined(__FOR_KERNEL_2_6_32__) + if (blk_rq_pos(req) + blk_rq_sectors(req) > + get_capacity(req->rq_disk)) { + cy_as_hal_print_message(KERN_ERR + "cyasblkdev: bad request address\n"); + stat = BLKPREP_KILL; + } +#else + if (req->sector + req->nr_sectors > get_capacity(req->rq_disk)) { + cy_as_hal_print_message + ("cyasblkdev: bad request address\n"); + stat = BLKPREP_KILL; + } +#endif + return stat; +} +#endif +#ifdef __CYAS_USE_WORK_QUEUE +static void cyasblkdev_workqueue(struct work_struct *work) +{ + struct cyasblkdev_blk_data *bd = gl_bd; +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR "%s : execute next_queue\n", + __func__); +#endif + spin_lock_irq(&bd->lock); + + /*elevate next request, if there is one */ + if (1) { /* if (!blk_queue_plugged (bd->queue.queue)) { */ + /* queue is not plugged */ +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + bd->queue.req = blk_fetch_request(bd->queue.queue); +#else + bd->queue.req = elv_next_request(bd->queue.queue); +#endif +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR "%s blkdev_callback: " + "blk_fetch_request():%p\n", + __func__, bd->queue.req); +#endif + } else + bd->queue.req = NULL; + + spin_unlock_irq(&bd->lock); + if (bd->queue.req) { +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s blkdev_callback: about to " + "call issue_fn:%p\n", __func__, + bd->queue.req); +#endif + + bd->queue.issue_fn(&bd->queue, bd->queue.req); + } +} +#endif + +#ifndef __USE_SYNC_FUNCTION__ +/*west bridge storage async api on_completed callback */ +static void cyasblkdev_issuecallback( + /* Handle to the device completing the storage operation */ + cy_as_device_handle handle, + /* The media type completing the operation */ + cy_as_media_type type, + /* The device completing the operation */ + uint32_t device, + /* The unit completing the operation */ + uint32_t unit, + /* The block number of the completed operation */ + uint32_t block_number, + /* The type of operation */ + cy_as_oper_type op, + /* The error status */ + cy_as_return_status_t status) +{ + struct cyasblkdev_blk_data *bd = gl_bd; + uint32_t req_nr_sectors = 0; + int retry_cnt = 0; + /* DBGPRN_FUNC_NAME; */ + if (status != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: async r/w: op:%d failed with error %d at address %d\n", + __func__, op, status, + block_number); +#endif + } +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + req_nr_sectors = blk_rq_sectors(bd->queue.req); +#else + req_nr_sectors = bd->queue.req->nr_sectors; +#endif + +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR + "%s calling blk_end_request from issue_callback " + "req=0x%x, status=0x%x, nr_sectors=0x%x\n", + __func__, (unsigned int) bd->queue.req, + status, (unsigned int) req_nr_sectors); +#endif + /* if (rq_data_dir (gl_bd->queue.req) != READ) { */ + /* if (op == cy_as_op_write) { */ + cy_as_release_common_lock(); + /* } */ + /* note: blk_end_request w/o __ prefix should + * not require spinlocks on the queue*/ + if (status != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "%s: calling blk_end_request, with -EIO value", + __func__); + while (blk_end_request + (bd->queue.req, -EIO, req_nr_sectors * 512)); + } else { + while (blk_end_request + (bd->queue.req, status, req_nr_sectors * 512)) { + retry_cnt++; + }; + } +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR + "%s blkdev_callback: ended rq on %d sectors, " + "with err:%d, n:%d times\n", __func__, + (int) req_nr_sectors, status, retry_cnt); +#endif + +#ifdef __CYAS_USE_WORK_QUEUE + queue_work(cyas_blk_wq, &cyas_blk_work->work); +#else + spin_lock_irq(&bd->lock); + + /*elevate next request, if there is one */ + if (1) { /* if (!blk_queue_plugged (bd->queue.queue)) { */ + /* queue is not plugged */ +#if defined(__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + bd->queue.req = blk_fetch_request(bd->queue.queue); +#else + bd->queue.req = elv_next_request(bd->queue.queue); +#endif +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR "%s blkdev_callback: " + "blk_fetch_request():%p\n", + __func__, bd->queue.req); +#endif + } else + bd->queue.req = NULL; + + spin_unlock_irq(&bd->lock); + + if (bd->queue.req) { + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s blkdev_callback: about to " + "call issue_fn:%p\n", __func__, + bd->queue.req); +#endif + + bd->queue.issue_fn(&bd->queue, bd->queue.req); + } +#endif /* #ifdef __CYAS_USE_WORK_QUEUE */ +} +#endif + +#ifdef __USE_SYNC_FUNCTION__ +static int f_cyasblock_debug; +void cyasblkdev_set_debug_flag(int flag) +{ + f_cyasblock_debug = flag; +} + +EXPORT_SYMBOL(cyasblkdev_set_debug_flag); +/* issue astoria blkdev request (issue_fn) */ +static int cyasblkdev_blk_issue_rq(struct cyasblkdev_queue *bq, + struct request *req) +{ + struct cyasblkdev_blk_data *bd = bq->data; + int index = 0; + int ret = CY_AS_ERROR_SUCCESS; + uint32_t req_sector = 0; + uint32_t req_nr_sectors = 0; + int bus_num = 1; + int lcl_unit_no = 0; + int retry_value = 1; + + DBGPRN_FUNC_NAME; + +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + /* + * will construct a scatterlist for the given request; + * the return value is the number of actually used + * entries in the resulting list. Then, this scatterlist + * can be used for the actual DMA prep operation. + */ + do { + spin_lock_irq(&bd->lock); + index = blk_rq_map_sg(bq->queue, req, bd->sg); +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + req_sector = blk_rq_pos(req); + req_nr_sectors = blk_rq_sectors(req); +#else + req_sector = req->sector; + req_nr_sectors = req->nr_sectors; +#endif + + if (req->rq_disk == bd->user_disk_0) { + bus_num = bd->user_disk_0_bus_num; + req_sector += bd->user_disk_0_first_sector; + lcl_unit_no = bd->user_disk_0_unit_no; + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request made to disk 0 for sector=%d, num_sectors=%d, unit_no=%d\n", + __func__, req_sector, + (int) req_nr_sectors, + lcl_unit_no); +#endif + } else if (req->rq_disk == bd->user_disk_1) { + bus_num = bd->user_disk_1_bus_num; + req_sector += bd->user_disk_1_first_sector; + lcl_unit_no = bd->user_disk_1_unit_no; + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request made to disk 1 for sector=%d, num_sectors=%d, unit_no=%d\n", + __func__, req_sector, + (int) req_nr_sectors, + lcl_unit_no); +#endif + } else if (req->rq_disk == bd->system_disk) { + bus_num = bd->system_disk_bus_num; + req_sector += bd->system_disk_first_sector; + lcl_unit_no = bd->system_disk_unit_no; + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request made to system disk for sector=%d, num_sectors=%d, unit_no=%d\n", + __func__, req_sector, + (int) req_nr_sectors, + lcl_unit_no); +#endif + } +#ifndef WESTBRIDGE_NDEBUG + else { + cy_as_hal_print_message + ("%s: invalid disk used for request\n", + __func__); + } +#endif + + spin_unlock_irq(&bd->lock); + + /*printk("%s: pre-check handle 0x%x\n", __func__, bd->dev_handle); */ + if (!(bd->dev_handle)) + bd->dev_handle = cyasdevice_getdevhandle(); + + if (req_nr_sectors == 0) { + cy_as_hal_print_message(KERN_ERR + "%s: Invalid Params req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x\n\n", + __func__, req_sector, + req_nr_sectors, + (uint32_t) bd->sg); + while (blk_end_request + (req, -EIO, req_nr_sectors * 512)); + /* bq->req = NULL ; */ + /* ret = CY_AS_ERROR_INVALID_BLOCK; */ + goto issue_rq_next; + } + /* + if( req_sector > (uint32_t)get_capacity(req->rq_disk)) + { + cy_as_hal_print_message(KERN_ERR"%s: req_sector = %d of cap = %d\n", __func__, req_sector, (int)get_capacity(req->rq_disk)); + req_sector = (uint32_t)get_capacity(req->rq_disk); + while (blk_end_request(req, -EIO, req_nr_sectors*512)); + + goto issue_rq_next; + } + */ + if ((bd->sg == NULL) || (sg_virt(bd->sg) == NULL)) { + /* cy_as_hal_print_message (KERN_ERR"%s: Invalid valid address =0x%x, sg=0x%x \n\n", + __func__, (uint32_t)bd->sg, sg_virt (bd->sg)); */ + while (blk_end_request + (req, -EIO, req_nr_sectors * 512)); + /* bq->req = NULL ; */ + /* ret = CY_AS_ERROR_INVALID_BLOCK; */ + goto issue_rq_next; + } + + if (rq_data_dir(req) == READ) { +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR + "%s: calling read() req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x, index=%d\n\n", + __func__, req_sector, + req_nr_sectors, + (uint32_t) bd->sg, index); +#endif + if (ret == CY_AS_ERROR_SUCCESS) { + retry_value = 10; + do { +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + /* cy_as_acquire_common_lock (); */ + ret = + cy_as_storage_read(bd-> + dev_handle, + bus_num, 0, + lcl_unit_no, + req_sector, + bd->sg, + req_nr_sectors); + /* cy_as_release_common_lock (); */ + if ((ret == + CY_AS_ERROR_ASYNC_PENDING) + || (ret == + CY_AS_ERROR_MEDIA_ACCESS_FAILURE)) { + msleep(1); +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + (KERN_ERR + "%s: read again caused by %d, left count=%d , req_sector=%d\n", + __func__, ret, + retry_value, + req_sector); +#endif + } else if (ret == + CY_AS_ERROR_ENDPOINT_DISABLED) { + cyasdevice_reload_firmware + (-1); + cyasblkdev_start_sdcard(); + } else + break; + } while (retry_value--); + } else { + cy_as_hal_print_message(KERN_ERR + "%s: cy_as_storage_read returned %d\n", + __func__, ret); + } + + } else { +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR + "%s: calling write() req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x\n", + __func__, req_sector, + req_nr_sectors, + (uint32_t) bd->sg); +#endif + if (ret == CY_AS_ERROR_SUCCESS) { + retry_value = 10; + do { +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + /* cy_as_acquire_common_lock (); */ + ret = + cy_as_storage_write(bd-> + dev_handle, + bus_num, 0, + lcl_unit_no, + req_sector, + bd->sg, + req_nr_sectors); + /* cy_as_release_common_lock (); */ + if ((ret == + CY_AS_ERROR_ASYNC_PENDING) + || (ret == + CY_AS_ERROR_MEDIA_ACCESS_FAILURE)) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + (KERN_ERR + "%s: write again caused by %d, left count=%d, req_sector=%d \n", + __func__, ret, + retry_value, + req_sector); +#endif + msleep(1); + } else if (ret == + CY_AS_ERROR_ENDPOINT_DISABLED) + { + cyasdevice_reload_firmware + (-1); + cyasblkdev_start_sdcard(); + } else + break; + } while (retry_value--); + + + } else { + cy_as_hal_print_message(KERN_ERR + "%s: cy_as_storage_write returned %d sector %d\n", + __func__, ret, + req_sector); + } + } + if (ret == CY_AS_ERROR_INVALID_HANDLE) { + uint32_t temp_handle; + temp_handle = (uint32_t) cyasdevice_getdevhandle(); + /*cy_as_hal_print_message (KERN_ERR"%s: invalid handle 0x%x, temp handle=0x%x\n", __func__, bd->dev_handle, temp_handle); */ + /*debug only */ + /* panic (" (david's panic) west bridge: invalid handle panic"); */ + while (blk_end_request + (req, -EIO, req_nr_sectors * 512)); + } else if (ret != CY_AS_ERROR_SUCCESS) { +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + /* cy_as_hal_print_message (KERN_ERR"%s:ending i/o request on reg:%x, %d\n", __func__, (uint32_t)req, ret); */ +#endif + + while (blk_end_request + (req, -EIO, req_nr_sectors * 512)); + + if ((ret == CY_AS_ERROR_NO_FIRMWARE) + || (ret == CY_AS_ERROR_TIMEOUT)) { + /* cyasdevice_save_error (ret); */ + cyasdevice_reload_firmware(-1); + ret = cyasblkdev_start_sdcard(); + if (ret) + cy_as_hal_print_message(KERN_ERR + "%s: cyasblkdev_start_sdcard error %d\n", + __func__, + ret); + + if (ret == CY_AS_ERROR_TIMEOUT) + ret = CY_AS_ERROR_NO_SUCH_DEVICE; + } + } else { +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR + "%s: CY_AS_SUCCESS\n\n", + __func__); +#endif + while (blk_end_request + (req, ret, req_nr_sectors * 512)); + } + issue_rq_next: + spin_lock_irq(&bd->lock); + + /*elevate next request, if there is one */ + /* if (!blk_queue_plugged (bd->queue.queue)) { */ + if (1) { + /* queue is not plugged */ +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + bq->req = req = blk_fetch_request(bq->queue); +#else + bq->req = req = elv_next_request(bq->queue); +#endif +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s blkdev_callback: blk_fetch_request():%p\n", + __func__, bq->req); +#endif + } else + bq->req = req = NULL; + + if (req) + retry_value = 1; + else + retry_value = 0; + spin_unlock_irq(&bd->lock); + + } while (retry_value); + +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_enable_thread(); +#endif + + /* if (ret == CY_AS_ERROR_TIMEOUT) + { + cyasdevice_reload_firmware (-1); + } */ + return ret; +} +#else + +/* issue astoria blkdev request (issue_fn) */ +static int cyasblkdev_blk_issue_rq(struct cyasblkdev_queue *bq, + struct request *req) +{ + struct cyasblkdev_blk_data *bd = bq->data; + int index = 0; + int ret = CY_AS_ERROR_SUCCESS; + uint32_t req_sector = 0; + uint32_t req_nr_sectors = 0; + int bus_num = 0; + int lcl_unit_no = 0; + int retry_value = 0; + + DBGPRN_FUNC_NAME; + + /* + * will construct a scatterlist for the given request; + * the return value is the number of actually used + * entries in the resulting list. Then, this scatterlist + * can be used for the actual DMA prep operation. + */ + spin_lock_irq(&bd->lock); + index = blk_rq_map_sg(bq->queue, req, bd->sg); + +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + req_sector = blk_rq_pos(req); + req_nr_sectors = blk_rq_sectors(req); +#else + req_sector = req->sector; + req_nr_sectors = req->nr_sectors; +#endif + + if (req->rq_disk == bd->user_disk_0) { + bus_num = bd->user_disk_0_bus_num; + req_sector += bd->user_disk_0_first_sector; + lcl_unit_no = bd->user_disk_0_unit_no; + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request made to disk 0 " + "for sector=%d, num_sectors=%d, unit_no=%d\n", + __func__, req_sector, + (int) req_nr_sectors, lcl_unit_no); +#endif + } else if (req->rq_disk == bd->user_disk_1) { + bus_num = bd->user_disk_1_bus_num; + req_sector += bd->user_disk_1_first_sector; + lcl_unit_no = bd->user_disk_1_unit_no; + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request made to disk 1 for " + "sector=%d, num_sectors=%d, unit_no=%d\n", + __func__, req_sector, + (int) req_nr_sectors, lcl_unit_no); +#endif + } else if (req->rq_disk == bd->system_disk) { + bus_num = bd->system_disk_bus_num; + req_sector += bd->system_disk_first_sector; + lcl_unit_no = bd->system_disk_unit_no; + +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request made to system disk " + "for sector=%d, num_sectors=%d, unit_no=%d\n", + __func__, req_sector, + (int) req_nr_sectors, lcl_unit_no); +#endif + } +#ifndef WESTBRIDGE_NDEBUG + else { + cy_as_hal_print_message(KERN_ERR + "%s: invalid disk used for request\n", + __func__); + } +#endif + + spin_unlock_irq(&bd->lock); + + if (req_nr_sectors == 0) { + cy_as_hal_print_message(KERN_ERR + "%s: Invalid Params req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x\n\n", + __func__, req_sector, + req_nr_sectors, (uint32_t) bd->sg); + while (blk_end_request(req, -EIO, req_nr_sectors * 512)); + bq->req = NULL; + return CY_AS_ERROR_INVALID_BLOCK; + } + + if (req_sector > (uint32_t) get_capacity(req->rq_disk)) { + cy_as_hal_print_message(KERN_ERR + "%s: req_sector = %d of cap = %d\n", + __func__, req_sector, + (int) get_capacity(req->rq_disk)); + req_sector = (uint32_t) get_capacity(req->rq_disk); + } + + if (lcl_unit_no > 3) { + cy_as_hal_print_message(KERN_ERR + "%s: req_nr_sectors = %d\n", + __func__, req_nr_sectors); + while (blk_end_request + (req, (ret == CY_AS_ERROR_SUCCESS), + req_nr_sectors * 512)); + bq->req = NULL; + return CY_AS_ERROR_INVALID_BLOCK; + } + + if ((bd->sg == NULL) || (sg_virt(bd->sg) == NULL)) { + cy_as_hal_print_message(KERN_ERR + "%s: Invalid valid address =0x%x, sg=0x%x \n\n", + __func__, (uint32_t) bd->sg, + (uint32_t) sg_virt(bd->sg)); + while (blk_end_request(req, -EIO, req_nr_sectors * 512)); + bq->req = NULL; + return CY_AS_ERROR_INVALID_BLOCK; + } + + + cy_as_acquire_common_lock(); + if (rq_data_dir(req) == READ) { +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR "%s: calling readasync() " + "req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x index=%d\n\n", + __func__, req_sector, + req_nr_sectors, (uint32_t) bd->sg, + index); +#endif + +#if 1 /* def __CYAS_USE_WORK_QUEUE */ + retry_value = 1000; + do { +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + /* cy_as_acquire_common_lock (); */ + ret = + cy_as_storage_read_async(bd->dev_handle, + bus_num, 0, + lcl_unit_no, + req_sector, bd->sg, + req_nr_sectors, + (cy_as_storage_callback) + cyasblkdev_issuecallback); + /* cy_as_release_common_lock (); */ + if (ret == CY_AS_ERROR_ASYNC_PENDING) { +#if 1 /* ndef WESTBRIDGE_NDEBUG */ + cy_as_hal_print_message(KERN_ERR + "%s: readasync again caused by %d, left count=%d , req_sector=%d\n", + __func__, ret, + retry_value, + req_sector); +#endif + /* cy_as_release_common_lock (); */ + msleep(5); + } else + break; + } while (retry_value--); +#else + + /* cy_as_acquire_common_lock (); */ + ret = cy_as_storage_read_async(bd->dev_handle, bus_num, 0, + lcl_unit_no, req_sector, + bd->sg, req_nr_sectors, + (cy_as_storage_callback) + cyasblkdev_issuecallback); +#endif + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + cy_as_hal_print_message(KERN_ERR + "%s:readasync() error %d at " + "address %ld, unit no %d\n", + __func__, ret, + (long) blk_rq_pos(req), + lcl_unit_no); +#else + cy_as_hal_print_message + ("%s:readasync () error %d at address %ld, unit no %d\n", + __func__, ret, req->sector, lcl_unit_no); +#endif + cy_as_hal_print_message(KERN_ERR + "%s:ending i/o request " + "on reg:%x\n", __func__, + (uint32_t) req); +#endif + /* cy_as_release_common_lock (); */ + while (blk_end_request(req, + (ret == + CY_AS_ERROR_SUCCESS), + req_nr_sectors * 512)); + + retry_value = 1; + } else { + return ret; + } + } else { +#ifdef __DEBUG_BLK_LOW_LEVEL__2 + cy_as_hal_print_message(KERN_ERR + "%s: calling writeasync() " + "req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x\n\n", + __func__, req_sector, + req_nr_sectors, (uint32_t) bd->sg); +#endif + +#if 1 /* def __CYAS_USE_WORK_QUEUE */ + retry_value = 1000; + do { +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + /* cy_as_acquire_common_lock (); */ + ret = + cy_as_storage_write_async(bd->dev_handle, + bus_num, 0, + lcl_unit_no, + req_sector, bd->sg, + req_nr_sectors, + (cy_as_storage_callback) + cyasblkdev_issuecallback); + if (ret == CY_AS_ERROR_ASYNC_PENDING) { +#if 0 /* ndef WESTBRIDGE_NDEBUG */ + cy_as_hal_print_message + ("%s: writeasync again caused by %d, left count=%d , req_sector=%d\n", + __func__, ret, retry_value, + req_sector); +#endif + /* cy_as_release_common_lock (); */ + msleep(5); + } else + break; + } while (retry_value--); +#else + cy_as_acquire_common_lock(); + ret = cy_as_storage_write_async(bd->dev_handle, bus_num, 0, + lcl_unit_no, req_sector, + bd->sg, req_nr_sectors, + (cy_as_storage_callback) + cyasblkdev_issuecallback); +#endif + + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + cy_as_hal_print_message(KERN_ERR + "%s: write failed with " + "error %d at address %ld, unit no %d\n", + __func__, ret, + (long) blk_rq_pos(req), + lcl_unit_no); +#else + cy_as_hal_print_message + ("%s: write failed with error %d at address %ld, unit no %d\n", + __FUNCTION__, ret, req->sector, lcl_unit_no); +#endif +#endif + + cy_as_release_common_lock(); + + /*end IO op on this request(does both + * end_that_request_... _first & _last) */ + while (blk_end_request(req, + (ret == + CY_AS_ERROR_SUCCESS), + req_nr_sectors * 512)); + retry_value = 1; + } else { + return ret; + } + } + + cy_as_release_common_lock(); + while (retry_value) { + spin_lock_irq(&bd->lock); + + /*elevate next request, if there is one */ + if (1) { /* if (!blk_queue_plugged (bd->queue.queue)) { */ + /* queue is not plugged */ +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + bq->req = req = blk_fetch_request(bq->queue); +#else + bq->req = req = elv_next_request(bq->queue); +#endif +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s blkdev_callback: blk_fetch_request():%p\n", + __func__, bq->req); +#endif + } else + bq->req = req = NULL; + + if (req) { +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + req_nr_sectors = blk_rq_sectors(req); +#else + req_nr_sectors = req->nr_sectors; /* SECT_NUM_TRANSLATE (req->nr_sectors); */ +#endif + } else + retry_value = 0; + + spin_unlock_irq(&bd->lock); + + if (retry_value) { + while (blk_end_request + (req, -EIO, req_nr_sectors * 512)); + } + } + + return ret; +} +#endif /* #ifdef __USE_SYNC_FUNCTION__ */ + +static unsigned long + dev_use[CYASBLKDEV_NUM_MINORS / (8 * sizeof(unsigned long))]; + + +/* storage event callback (note: called in astoria isr context) */ +static void cyasblkdev_storage_callback(cy_as_device_handle dev_h, + cy_as_bus_number_t bus, + uint32_t device, + cy_as_storage_event evtype, + void *evdata) +{ +#ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: bus:%d, device:%d, evtype:%d, " + "evdata:%p\n ", __func__, bus, device, + evtype, evdata); +#endif + + switch (evtype) { + case cy_as_storage_processor: + break; + + case cy_as_storage_removed: + break; + + case cy_as_storage_inserted: + break; + + default: + break; + } +} + +#define SECTORS_TO_SCAN 819200 +#define SECTORS_TO_READ 32 + +uint32_t cyasblkdev_get_vfat_offset(int bus_num, int unit_no) +{ + /* + * for sd media, vfat partition boot record is not always + * located at sector it greatly depends on the system and + * software that was used to format the sd however, linux + * fs layer always expects it at sector 0, this function + * finds the offset and then uses it in all media r/w + * operations + */ + int sect_no, stat; + uint8_t *sect_buf; + bool br_found = false; + + DBGPRN_FUNC_NAME; + + sect_buf = kmalloc(1024, GFP_KERNEL); + + /* since HAL layer always uses sg lists instead of the + * buffer (for hw dmas) we need to initialize the sg list + * for local buffer*/ + sg_init_one(gl_bd->sg, sect_buf, 512); + + /* + * Check MPR partition table 1st, then try to scan through + * 1st 384 sectors until BR signature(intel JMP istruction + * code and ,0x55AA) is found + */ +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s scanning media for vfat partition...\n", __func__); +#endif + stat = cy_as_storage_read( + /* Handle to the device of interest */ + gl_bd->dev_handle, + /* The bus to access */ + bus_num, + /* The device to access */ + 0, + /* The unit to access */ + unit_no, + /* absolute sector number */ + 0, + /* sg structure */ + gl_bd->sg, + /* The number of blocks to be read */ + 1); + if ((sect_buf[510] == 0x55) && (sect_buf[511] == 0xaa)) { + int start_LBA; + int size_LBA = 0; + char type; + + start_LBA = 0; + + start_LBA += (sect_buf[446 + 11] & 0xFF); + start_LBA = start_LBA << 8; + start_LBA += (sect_buf[446 + 10] & 0xFF); + start_LBA = start_LBA << 8; + start_LBA += (sect_buf[446 + 9] & 0xFF); + start_LBA = start_LBA << 8; + start_LBA += (sect_buf[446 + 8] & 0xFF); + + size_LBA += (sect_buf[446 + 15] & 0xFF); + size_LBA = size_LBA << 8; + size_LBA += (sect_buf[446 + 14] & 0xFF); + size_LBA = size_LBA << 8; + size_LBA += (sect_buf[446 + 13] & 0xFF); + size_LBA = size_LBA << 8; + size_LBA += (sect_buf[446 + 12] & 0xFF); + + type = sect_buf[446 + 4]; +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s find LBA start at 0x%x, type=[0x%x]\n", __func__, + start_LBA, type); + cy_as_hal_print_message + ("%s : LBA size=0x%x, disk cap=[0x%x]\n", __func__, + size_LBA, gl_bd->user_disk_0_disk_cap); +#endif + if (type && (start_LBA < SECTORS_TO_SCAN) + && (size_LBA <= gl_bd->user_disk_0_disk_cap)) { + stat = cy_as_storage_read( + /* Handle to the device of interest */ + gl_bd->dev_handle, + /* The bus to access */ + bus_num, + /* The device to access */ + 0, + /* The unit to access */ + unit_no, + /* absolute sector number */ + start_LBA, + /* sg structure */ + gl_bd->sg, + /* The number of blocks to be read */ + 1); + + if ((sect_buf[510] == 0x55) + && (sect_buf[511] == 0xaa)) { + if (sect_buf[0] == 0xEB) { + br_found = true; + sect_no = start_LBA; +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s vfat partition found " + "at LBA start:%d\n", __func__, + sect_no); +#endif + } + + } + + } + } + + if (!br_found) { + for (sect_no = 0; sect_no < SECTORS_TO_SCAN; sect_no++) { +#if 0 /* ndef WESTBRIDGE_NDEBUG */ + cy_as_hal_print_message(KERN_ERR + "%s before cyasstorageread " + "gl_bd->sg addr=0x%x\n", + __func__, + (unsigned int) gl_bd->sg); +#endif + + stat = cy_as_storage_read( + /* Handle to the device of interest */ + gl_bd->dev_handle, + /* The bus to access */ + bus_num, + /* The device to access */ + 0, + /* The unit to access */ + unit_no, + /* absolute sector number */ + sect_no, + /* sg structure */ + gl_bd->sg, + /* The number of blocks to be read */ + 1); + + /* try only sectors with boot signature */ + if ((sect_buf[510] == 0x55) + && (sect_buf[511] == 0xaa)) { + /* vfat boot record may also be located at + * sector 0, check it first */ + if (sect_buf[0] == 0xEB) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s vfat partition found " + "at sector:%d\n", __func__, + sect_no); +#endif + + br_found = true; + break; + } + } + + if (stat != 0) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s sector scan error: %d\n", + __func__, stat); +#endif + break; + } + } + } + + kfree(sect_buf); + + if (br_found) { + gl_vfat_offset[bus_num][unit_no] = sect_no; + return sect_no; + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s sector scan error %d, bus % d unit %d\n", + __func__, stat, bus_num, unit_no); +#endif + gl_vfat_offset[bus_num][unit_no] = 0; + return 0; + } +} + +uint32_t cyasblkdev_export_vfat_offset(int bus_num, int unit_no) +{ + if (gl_vfat_offset[bus_num][unit_no] == -1) + gl_vfat_offset[bus_num][unit_no] = + cyasblkdev_get_vfat_offset(bus_num, unit_no); + + return gl_vfat_offset[bus_num][unit_no]; + +} + +EXPORT_SYMBOL(cyasblkdev_export_vfat_offset); + +cy_as_storage_query_device_data dev_data = { 0 }; + +static int cyasblkdev_add_disks(int bus_num, + struct cyasblkdev_blk_data *bd, + int total_media_count, int devidx) +{ + int ret = 0; + uint64_t disk_cap; + int lcl_unit_no; + cy_as_storage_query_unit_data unit_data = { 0 }; + cy_as_storage_sd_reg_read_data reg_data; + unsigned char tempbuf[32]; + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR "%s:query device: " + "type:%d, removable:%d, writable:%d, " + "blksize %d, units:%d, locked:%d, " + "erase_sz:%d\n", + __func__, + dev_data.desc_p.type, + dev_data.desc_p.removable, + dev_data.desc_p.writeable, + dev_data.desc_p.block_size, + dev_data.desc_p.number_units, + dev_data.desc_p.locked, + dev_data.desc_p.erase_unit_size); +#endif + + /* make sure that device is not locked */ + if (dev_data.desc_p.locked) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("%s: device is locked\n", + __func__); +#endif + ret = + cy_as_storage_release(bd->dev_handle, bus_num, 0, 0, + 0); + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s cannot release" + " storage\n", __func__); +#endif + goto out; + } + goto out; + } + + unit_data.device = 0; + unit_data.unit = 0; + unit_data.bus = bus_num; + ret = cy_as_storage_query_unit(bd->dev_handle, &unit_data, 0, 0); + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR "%s: cannot query " + "%d device unit - reason code %d\n", + __func__, bus_num, ret); +#endif + goto out; + } + + if (private_partition_bus == bus_num) { + if (private_partition_size > 0) { + ret = + cy_as_storage_create_p_partition(bd-> + dev_handle, + bus_num, 0, + private_partition_size, + 0, 0); + if ((ret != CY_AS_ERROR_SUCCESS) + && (ret != CY_AS_ERROR_ALREADY_PARTITIONED)) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: cy_as_storage_" + "create_p_partition after size > 0 check " + "failed with error code %d\n", + __func__, ret); +#endif + + disk_cap = (uint64_t) + (unit_data.desc_p.unit_size); + lcl_unit_no = 0; + + } else if (ret == CY_AS_ERROR_ALREADY_PARTITIONED) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cy_as_storage_create_p_partition " + "indicates memory already partitioned\n", + __func__); +#endif + + /*check to see that partition + * matches size */ + if (unit_data.desc_p.unit_size != + private_partition_size) { + ret = + cy_as_storage_remove_p_partition + (bd->dev_handle, bus_num, 0, 0, + 0); + if (ret == CY_AS_ERROR_SUCCESS) { + ret = + cy_as_storage_create_p_partition + (bd->dev_handle, + bus_num, 0, + private_partition_size, + 0, 0); + if (ret == + CY_AS_ERROR_SUCCESS) { + unit_data.bus = + bus_num; + unit_data.device = + 0; + unit_data.unit = 1; + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cy_as_storage_create_p_partition " + "after removal unexpectedly failed " + "with error %d\n", + __func__, + ret); +#endif + + /* need to requery bus + * seeing as delete + * successful and create + * failed we have changed + * the disk properties */ + unit_data.bus = + bus_num; + unit_data.device = + 0; + unit_data.unit = 0; + } + + ret = + cy_as_storage_query_unit + (bd->dev_handle, + &unit_data, 0, 0); + if (ret != + CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cannot query %d " + "device unit - reason code %d\n", + __func__, + bus_num, ret); +#endif + goto out; + } else { + disk_cap = + (uint64_t) + (unit_data. + desc_p. + unit_size); + lcl_unit_no = + unit_data.unit; + } + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cy_as_storage_remove_p_partition " + "failed with error %d\n", + __func__, ret); +#endif + + unit_data.bus = bus_num; + unit_data.device = 0; + unit_data.unit = 1; + + ret = + cy_as_storage_query_unit + (bd->dev_handle, + &unit_data, 0, 0); + if (ret != + CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cannot query %d " + "device unit - reason " + "code %d\n", + __func__, + bus_num, ret); +#endif + goto out; + } + + disk_cap = (uint64_t) + (unit_data.desc_p. + unit_size); + lcl_unit_no = + unit_data.unit; + } + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: partition " + "exists and sizes equal\n", + __func__); +#endif + + /*partition already existed, + * need to query second unit*/ + unit_data.bus = bus_num; + unit_data.device = 0; + unit_data.unit = 1; + + ret = + cy_as_storage_query_unit(bd-> + dev_handle, + &unit_data, + 0, 0); + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cannot query %d " + "device unit " + "- reason code %d\n", + __func__, bus_num, + ret); +#endif + goto out; + } else { + disk_cap = (uint64_t) + (unit_data.desc_p. + unit_size); + lcl_unit_no = + unit_data.unit; + } + } + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cy_as_storage_create_p_partition " + "created successfully\n", __func__); +#endif + + disk_cap = (uint64_t) + (unit_data.desc_p.unit_size - + private_partition_size); + + lcl_unit_no = 1; + } + } +#ifndef WESTBRIDGE_NDEBUG + else { + cy_as_hal_print_message + ("%s: invalid partition_size%d\n", __func__, + private_partition_size); + + disk_cap = (uint64_t) + (unit_data.desc_p.unit_size); + lcl_unit_no = 0; + } +#endif + } else { + disk_cap = (uint64_t) + (unit_data.desc_p.unit_size); + lcl_unit_no = 0; + } + + if ((bus_num == 0) || (total_media_count == 1)) { + sprintf(bd->user_disk_0->disk_name, + "cyasblkdevblk%d", devidx); + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("%s: disk unit_sz:%lu blk_sz:%d, " + "start_blk:%lu, capacity:%llu\n", + __func__, (unsigned long) + unit_data.desc_p.unit_size, + unit_data.desc_p.block_size, + (unsigned long) + unit_data.desc_p.start_block, + (uint64_t) disk_cap); +#endif + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: setting gendisk disk " + "capacity to %d\n", __func__, + (int) disk_cap); +#endif + + /* initializing bd->queue */ +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR "%s: init bd->queue\n", + __func__); +#endif + /* this will create a + * queue kernel thread */ + cyasblkdev_init_queue(&bd->queue, &bd->lock); + + /* bd->queue.prep_fn = cyasblkdev_blk_prep_rq; */ + bd->queue.issue_fn = cyasblkdev_blk_issue_rq; + bd->queue.data = bd; + + /*blk_size should always + * be a multiple of 512, + * set to the max to ensure + * that all accesses aligned + * to the greatest multiple, + * can adjust request to + * smaller block sizes + * dynamically*/ + + bd->user_disk_0_read_only = !dev_data.desc_p.writeable; + bd->user_disk_0_blk_size = dev_data.desc_p.block_size; + bd->user_disk_0_type = dev_data.desc_p.type; + bd->user_disk_0_bus_num = bus_num; + bd->user_disk_0->major = major; + bd->user_disk_0->first_minor = devidx << CYASBLKDEV_SHIFT; + bd->user_disk_0->minors = 8; + bd->user_disk_0->fops = &cyasblkdev_bdops; + bd->user_disk_0->private_data = bd; + bd->user_disk_0->queue = bd->queue.queue; + bd->dbgprn_flags = DBGPRN_RD_RQ; + bd->user_disk_0_unit_no = lcl_unit_no; + +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + blk_queue_logical_block_size(bd->queue.queue, + bd->user_disk_0_blk_size); +#else + blk_queue_hardsect_size(bd->queue.queue, + bd->user_disk_0_blk_size); +#endif + + bd->user_disk_0_disk_cap = disk_cap; + + set_capacity(bd->user_disk_0, disk_cap); + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: returned from set_capacity %d\n", __func__, + (int) disk_cap); +#endif + + /* need to start search from + * public partition beginning */ +#if 1 + if (vfat_search) { + bd->user_disk_0_first_sector = + cyasblkdev_get_vfat_offset(bd-> + user_disk_0_bus_num, + bd-> + user_disk_0_unit_no); + } else { + bd->user_disk_0_first_sector = 0; + } +#else + cyasblkdev_get_vfat_offset(bd->user_disk_0_bus_num, + bd->user_disk_0_unit_no); + bd->user_disk_0_first_sector = 0; + +#endif + reg_data.buf_p = tempbuf; + reg_data.length = 16; + ret = + cy_as_storage_sd_register_read(bd->dev_handle, + bd->user_disk_0_bus_num, + 0, cy_as_sd_reg_CID, + ®_data, 0, 0); + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "cyasblkdev_blk_open : fail in read CID register on user_disk_0\n"); +#endif + goto out; + } else { + memcpy(bd->user_disk_0_serial_num, &tempbuf[9], 4); + memcpy(bd->user_disk_0_CID, &tempbuf[0], 16); + } + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("%s: set user_disk_0_first " + "sector to %d\n", __func__, + bd->user_disk_0_first_sector); + cy_as_hal_print_message("%s: add_disk: disk->major=0x%x\n", + __func__, bd->user_disk_0->major); + cy_as_hal_print_message("%s: add_disk: " + "disk->first_minor=0x%x\n", + __func__, + bd->user_disk_0->first_minor); + cy_as_hal_print_message("%s: add_disk: " + "disk->minors=0x%x\n", __func__, + bd->user_disk_0->minors); + cy_as_hal_print_message("%s: add_disk: " + "disk->disk_name=%s\n", __func__, + bd->user_disk_0->disk_name); + cy_as_hal_print_message("%s: add_disk: " + "disk->part_tbl=0x%x\n", __func__, + (unsigned int) + bd->user_disk_0->part_tbl); + cy_as_hal_print_message("%s: add_disk: " + "disk->queue=0x%x\n", __func__, + (unsigned int) + bd->user_disk_0->queue); + cy_as_hal_print_message("%s: add_disk: " + "disk->flags=0x%x\n", + __func__, (unsigned int) + bd->user_disk_0->flags); + cy_as_hal_print_message("%s: add_disk: " + "disk->driverfs_dev=0x%x\n", + __func__, (unsigned int) + bd->user_disk_0->driverfs_dev); + cy_as_hal_print_message("%s: add_disk: " + "disk->slave_dir=0x%x\n", + __func__, (unsigned int) + bd->user_disk_0->slave_dir); + cy_as_hal_print_message("%s: add_disk: " + "disk->random=0x%x\n", + __func__, (unsigned int) + bd->user_disk_0->random); + cy_as_hal_print_message("%s: add_disk: " + "disk->node_id=0x%x\n", + __func__, (unsigned int) + bd->user_disk_0->node_id); +#endif + + add_disk(bd->user_disk_0); + + } else if ((bus_num == 1) && (total_media_count == 2)) { + bd->user_disk_1_read_only = !dev_data.desc_p.writeable; + bd->user_disk_1_blk_size = dev_data.desc_p.block_size; + bd->user_disk_1_type = dev_data.desc_p.type; + bd->user_disk_1_bus_num = bus_num; + bd->user_disk_1->major = major; + bd->user_disk_1->first_minor = + (devidx + 1) << CYASBLKDEV_SHIFT; + bd->user_disk_1->minors = 8; + bd->user_disk_1->fops = &cyasblkdev_bdops; + bd->user_disk_1->private_data = bd; + bd->user_disk_1->queue = bd->queue.queue; + bd->dbgprn_flags = DBGPRN_RD_RQ; + bd->user_disk_1_unit_no = lcl_unit_no; + + sprintf(bd->user_disk_1->disk_name, + "cyasblkdevblk%d", (devidx + 1)); + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("%s: disk unit_sz:%lu " + "blk_sz:%d, " + "start_blk:%lu, " + "capacity:%llu\n", + __func__, (unsigned long) + unit_data.desc_p.unit_size, + unit_data.desc_p.block_size, + (unsigned long) + unit_data.desc_p.start_block, + (uint64_t) disk_cap); +#endif + + /*blk_size should always be a + * multiple of 512, set to the max + * to ensure that all accesses + * aligned to the greatest multiple, + * can adjust request to smaller + * block sizes dynamically*/ + if (bd->user_disk_0_blk_size > bd->user_disk_1_blk_size) { +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + blk_queue_logical_block_size(bd->queue.queue, + bd-> + user_disk_0_blk_size); +#else + blk_queue_hardsect_size(bd->queue.queue, + bd->user_disk_0_blk_size); +#endif +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: set hard sect_sz:%d\n", __func__, + bd->user_disk_0_blk_size); +#endif + } else { +#if defined (__FOR_KERNEL_2_6_35__) || defined (__FOR_KERNEL_2_6_32__) + blk_queue_logical_block_size(bd->queue.queue, + bd-> + user_disk_1_blk_size); +#else + blk_queue_hardsect_size(bd->queue.queue, + bd->user_disk_1_blk_size); +#endif +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: set hard sect_sz:%d\n", __func__, + bd->user_disk_1_blk_size); +#endif + } + + bd->user_disk_1_disk_cap = disk_cap; + set_capacity(bd->user_disk_1, disk_cap); +#if 1 + if (vfat_search) { + bd->user_disk_1_first_sector = + cyasblkdev_get_vfat_offset(bd-> + user_disk_1_bus_num, + bd-> + user_disk_1_unit_no); + } else { + bd->user_disk_1_first_sector = 0; + } +#else + cyasblkdev_get_vfat_offset(bd->user_disk_1_bus_num, + bd->user_disk_1_unit_no); + bd->user_disk_1_first_sector = 0; +#endif + reg_data.buf_p = tempbuf; + reg_data.length = 16; + ret = + cy_as_storage_sd_register_read(bd->dev_handle, + bd->user_disk_1_bus_num, + 0, cy_as_sd_reg_CID, + ®_data, 0, 0); + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "cyasblkdev_blk_open : fail in read CID register on user_disk_1 \n"); +#endif + } else { + memcpy(bd->user_disk_1_serial_num, &tempbuf[9], 4); + memcpy(bd->user_disk_0_CID, &tempbuf[0], 16); + } + + add_disk(bd->user_disk_1); + } + + if (lcl_unit_no > 0) { + if (bd->system_disk == NULL) { + bd->system_disk = + alloc_disk(CYASBLKDEV_MINOR_2 + << CYASBLKDEV_SHIFT); + if (bd->system_disk == NULL) { + /* kfree (bd); */ + bd = ERR_PTR(-ENOMEM); + return CY_AS_ERROR_OUT_OF_MEMORY; + } + disk_cap = (uint64_t) + (private_partition_size); + + /* set properties of + * system disk */ + bd->system_disk_read_only = + !dev_data.desc_p.writeable; + bd->system_disk_blk_size = + dev_data.desc_p.block_size; + bd->system_disk_bus_num = bus_num; + bd->system_disk->major = major; + bd->system_disk->first_minor = + (devidx + 2) << CYASBLKDEV_SHIFT; + bd->system_disk->minors = 8; + bd->system_disk->fops = &cyasblkdev_bdops; + bd->system_disk->private_data = bd; + bd->system_disk->queue = bd->queue.queue; + /* don't search for vfat + * with system disk */ + bd->system_disk_first_sector = 0; + sprintf(bd->system_disk->disk_name, + "cyasblkdevblk%d", (devidx + 2)); + + bd->system_disk_disk_cap = disk_cap; + set_capacity(bd->system_disk, disk_cap); + + reg_data.buf_p = tempbuf; + reg_data.length = 16; + ret = + cy_as_storage_sd_register_read(bd->dev_handle, + bd-> + system_disk_bus_num, + 0, + cy_as_sd_reg_CID, + ®_data, 0, + 0); + if (ret != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "cyasblkdev_blk_open : fail in read CID register on system_disk\n"); +#endif + } else { + memcpy(bd->system_disk_serial_num, + &tempbuf[9], 4); + memcpy(bd->user_disk_0_CID, &tempbuf[0], + 16); + } + + add_disk(bd->system_disk); + } +#ifndef WESTBRIDGE_NDEBUG + else { + cy_as_hal_print_message + ("%s: system disk already allocated %d\n", + __func__, bus_num); + } +#endif + } + out: + return ret; +} + +static struct cyasblkdev_blk_data *cyasblkdev_blk_alloc(void) +{ + struct cyasblkdev_blk_data *bd; + int ret = 0; + cy_as_return_status_t stat = -1; + int bus_num = 0; + int total_media_count = 0; + int devidx = 0; + int check_media_count; + DBGPRN_FUNC_NAME; + + total_media_count = 0; + devidx = find_first_zero_bit(dev_use, CYASBLKDEV_NUM_MINORS); + if (devidx >= CYASBLKDEV_NUM_MINORS) + return ERR_PTR(-ENOSPC); + + __set_bit(devidx, dev_use); + __set_bit(devidx + 1, dev_use); + + /* bd = kzalloc (sizeof (struct cyasblkdev_blk_data), GFP_KERNEL); */ + bd = &g_blk_dev; + if (bd) { + gl_bd = bd; + memset(bd, 0, sizeof(struct cyasblkdev_blk_data)); + + spin_lock_init(&bd->lock); + bd->usage = 1; + /* setup the block_dev_ops pointer */ + bd->blkops = &cyasblkdev_bdops; + + /* Get the device handle */ + bd->dev_handle = cyasdevice_getdevhandle(); + if (0 == bd->dev_handle) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("%s: get device failed\n", + __func__); +#endif + ret = ENODEV; + goto out; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s west bridge device handle:%x\n", + __func__, + (uint32_t) bd->dev_handle); +#endif + + /* start the storage api and get a handle to the + * device we are interested in. */ + + /* Error code to use if the conditions are not satisfied. */ + ret = ENOMEDIUM; + + stat = + cy_as_misc_release_resource(bd->dev_handle, + cy_as_bus_0); + if ((stat != CY_AS_ERROR_SUCCESS) + && (stat != CY_AS_ERROR_RESOURCE_NOT_OWNED)) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: cannot release " + "resource bus 0 - reason code %d\n", + __func__, stat); +#endif + } + + stat = + cy_as_misc_release_resource(bd->dev_handle, + cy_as_bus_1); + if ((stat != CY_AS_ERROR_SUCCESS) + && (stat != CY_AS_ERROR_RESOURCE_NOT_OWNED)) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: cannot release " + "resource bus 0 - reason code %d\n", + __func__, stat); +#endif + } + + /* skkm */ +#if 1 + stat = + cy_as_storage_device_control(bd->dev_handle, 1, 0, + cy_true, cy_false, + cy_as_storage_detect_GPIO, + 0, 0); + if (stat != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message + ("<1>CyAsBlkDev: Cannot control StorageDevice - Reason code %d\n", + stat); + goto out; + } +#endif +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: call storage start APIs\n", + __func__); +#endif + /* start storage stack */ + stat = cy_as_storage_start(bd->dev_handle, 0, 0x101); + if (stat != CY_AS_ERROR_SUCCESS + && stat != CY_AS_ERROR_ALREADY_RUNNING) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: cannot start storage " + "stack - reason code %d\n", + __func__, stat); +#endif + goto out; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: storage started:%d ok\n", + __func__, stat); +#endif + + stat = cy_as_storage_register_callback(bd->dev_handle, + cyasblkdev_storage_callback); + if (stat != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: cannot register callback " + "- reason code %d\n", + __func__, stat); +#endif + goto out; + } + + for (bus_num = 0; bus_num < 2; bus_num++) { + stat = cy_as_storage_query_bus(bd->dev_handle, + bus_num, + &bd-> + media_count + [bus_num], 0, 0); + if (stat == CY_AS_ERROR_SUCCESS) { + total_media_count = total_media_count + + bd->media_count[bus_num]; + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: cannot query %d, " + "reason code: %d\n", + __func__, bus_num, + stat); +#endif + goto out; + } + } + + if (total_media_count == 0) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: no storage media was found\n", __func__); +#endif + goto out; + } else if (total_media_count >= 1) { + if (bd->user_disk_0 == NULL) { + + bd->user_disk_0 = + alloc_disk(CYASBLKDEV_MINOR_0 + << CYASBLKDEV_SHIFT); + if (bd->user_disk_0 == NULL) { + /* kfree (bd); */ + bd = ERR_PTR(-ENOMEM); + return bd; + } + } +#ifndef WESTBRIDGE_NDEBUG + else { + cy_as_hal_print_message(KERN_ERR + "%s: no available " + "gen_disk for disk 0, " + "physically inconsistent\n", + __func__); + } +#endif + } + + if (total_media_count == 2) { + if (bd->user_disk_1 == NULL) { + bd->user_disk_1 = + alloc_disk(CYASBLKDEV_MINOR_1 + << CYASBLKDEV_SHIFT); + if (bd->user_disk_1 == NULL) { + /* kfree (bd); */ + bd = ERR_PTR(-ENOMEM); + return bd; + } + } +#ifndef WESTBRIDGE_NDEBUG + else { + cy_as_hal_print_message(KERN_ERR + "%s: no available " + "gen_disk for media, " + "physically inconsistent\n", + __func__); + } +#endif + } +#ifndef WESTBRIDGE_NDEBUG + else if (total_media_count > 2) { + cy_as_hal_print_message(KERN_ERR + "%s: count corrupted = 0x%d\n", + __func__, + total_media_count); + } +#endif + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: %d device(s) found\n", + __func__, total_media_count); +#endif + + check_media_count = 0; + + for (bus_num = 0; bus_num <= 1; bus_num++) { + /*claim storage for cpu */ +#if 1 /* skkm */ + stat = cy_as_storage_claim(bd->dev_handle, + bus_num, 0, 0, 0); + if (stat != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "%s: cannot claim " + "%d bus - reason code %d\n", + __func__, bus_num, + stat); + /* goto out; */ + } +#endif + + dev_data.bus = bus_num; + dev_data.device = 0; + + stat = cy_as_storage_query_device(bd->dev_handle, + &dev_data, 0, 0); + if (stat == CY_AS_ERROR_SUCCESS) { +#if 0 /* skkm */ + stat = + cy_as_storage_change_sd_frequency(bd-> + dev_handle, + bus_num, + 0x11, + 0x18, + 0, + 0); + if (stat != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: Cannot control cy_as_storage_change_sd_frequency - reason [%d]\n", + __func__, stat); +#endif + } +#endif + stat = + cyasblkdev_add_disks(bus_num, bd, + total_media_count, + devidx); + if (stat == CY_AS_ERROR_SUCCESS) + check_media_count++; + } else if (stat == CY_AS_ERROR_NO_SUCH_DEVICE) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: no device on bus %d\n", __func__, + bus_num); +#endif + } else { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cannot query %d device " + "- reason code %d\n", __func__, + bus_num, stat); +#endif + goto err_put_disk; + } + } /* end for (bus_num = 0; bus_num <= 1; bus_num++) */ + + if (total_media_count != check_media_count) + goto err_put_disk; + + /* sg_init_table (bd->sg, 16); */ + return bd; + } + err_put_disk: + if (bd->user_disk_0 != NULL) { + put_disk(bd->user_disk_0); + bd->user_disk_0 = NULL; + } + if (bd->user_disk_1 != NULL) { + put_disk(bd->user_disk_1); + bd->user_disk_1 = NULL; + } + if (bd->system_disk != NULL) { + put_disk(bd->system_disk); + bd->system_disk = NULL; + } + + out: + __clear_bit(devidx, dev_use); + __clear_bit(devidx + 1, dev_use); + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message("%s: bd failed to initialize\n", __func__); +#endif + + /* kfree (bd); */ + /* bd = ERR_PTR (-ret); */ + return ERR_PTR(-ret); +} + + +/*init west bridge block device */ +static int cyasblkdev_blk_initialize(void) +{ + struct cyasblkdev_blk_data *bd; + int res; + + DBGPRN_FUNC_NAME; + + res = register_blkdev(major, "cyasblkdev"); + + if (res < 0) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_WARNING + "%s unable to get major %d for cyasblkdev media: %d\n", + __func__, major, res); +#endif + return res; + } + + if (major == 0) + major = res; + +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s cyasblkdev registered with major number: %d\n", __func__, + major); +#endif + + bd = cyasblkdev_blk_alloc(); + if (IS_ERR(bd)) + return PTR_ERR(bd); + + return 0; +} + +/* start block device */ +int cyasblkdev_blk_init(int fmajor, int fsearch) +{ + int res = -ENOMEM; + + DBGPRN_FUNC_NAME; + + if (g_is_block_dev_ready) + return 0; + + g_is_block_dev_ready = 1; + + major = fmajor; + vfat_search = fsearch; + +#ifdef __CYAS_USE_WORK_QUEUE + cyas_blk_wq = create_workqueue("cyas_blk_wq"); + cyas_blk_work = + (cy_work_t *) kmalloc(sizeof(cy_work_t), GFP_KERNEL); + if (cyas_blk_work) { + INIT_WORK(&cyas_blk_work->work, cyasblkdev_workqueue); + } +#endif + /* get the cyasdev handle for future use */ + cyas_dev_handle = cyasdevice_getdevhandle(); + + if (cyasblkdev_blk_initialize() == 0) + return 0; +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR "cyasblkdev init error:%d\n", + res); +#endif + return res; +} + + +static void cyasblkdev_blk_deinit(struct cyasblkdev_blk_data *bd) +{ + DBGPRN_FUNC_NAME; + + if (bd) { + int devidx; + + if (bd->user_disk_0 != NULL) { + cy_as_hal_print_message(KERN_ERR + "[%s] del_gendisk user_disk_0\n", + __func__); + del_gendisk(bd->user_disk_0); + devidx = bd->user_disk_0->first_minor + >> CYASBLKDEV_SHIFT; + __clear_bit(devidx, dev_use); + } + + if (bd->user_disk_1 != NULL) { + cy_as_hal_print_message(KERN_ERR + "[%s] del_gendisk user_disk_1\n", + __func__); + del_gendisk(bd->user_disk_1); + devidx = bd->user_disk_1->first_minor + >> CYASBLKDEV_SHIFT; + __clear_bit(devidx, dev_use); + } + + if (bd->system_disk != NULL) { + cy_as_hal_print_message(KERN_ERR + "[%s] del_gendisk system_disk\n", + __func__); + del_gendisk(bd->system_disk); + devidx = bd->system_disk->first_minor + >> CYASBLKDEV_SHIFT; + __clear_bit(devidx, dev_use); + } + + if (bd->queue.queue != NULL) + cyasblkdev_cleanup_queue(&bd->queue); + + cyasblkdev_blk_put(bd); +/* + while(1) + { + if( bd->usage == 1 ) + break; + cy_as_hal_sleep(10); + } +*/ + } +} + +/* block device exit */ +void cyasblkdev_blk_exit(void) +{ + int loot_count = 1000; + DBGPRN_FUNC_NAME; + + /*cy_as_hal_print_message (KERN_ERR"[%s] dev = %d gl_bd = 0x%x\n", __func__, g_is_block_dev_ready, gl_bd) ; */ + + if (g_is_block_dev_ready) { + if (gl_bd) { + cyasblkdev_blk_deinit(gl_bd); + unregister_blkdev(major, "cyasblkdev"); + + while (--loot_count) { + if (gl_bd == NULL) + break; + msleep(10); + } + + if (gl_bd) + cyasblkdev_blk_put(gl_bd); + } + gl_vfat_offset[0][0] = -1; + gl_vfat_offset[0][1] = -1; + gl_vfat_offset[1][0] = -1; + gl_vfat_offset[1][1] = -1; + +#ifdef __CYAS_USE_WORK_QUEUE + kfree(cyas_blk_work); + cyas_blk_work = NULL; + destroy_workqueue(cyas_blk_wq); +#endif + g_is_block_dev_ready = 0; + } +} + +EXPORT_SYMBOL(cyasblkdev_blk_init); +EXPORT_SYMBOL(cyasblkdev_blk_exit); + +int cyasblkdev_start_sdcard(void) +{ + struct cyasblkdev_blk_data *bd; + int bus_num; + int retval; + cy_as_storage_query_device_data dev_data; + uint32_t count = 0; + + DBGPRN_FUNC_NAME; + + if (g_is_block_dev_ready && gl_bd) { + bd = gl_bd; + + if (bd->user_disk_0) { + bus_num = bd->user_disk_0_bus_num; + } else if (bd->user_disk_1) { + bus_num = bd->user_disk_1_bus_num; + } else if (bd->system_disk) { + bus_num = bd->system_disk_bus_num; + } else + return -1; + + cyas_dev_handle = bd->dev_handle = + cyasdevice_getdevhandle(); + + retval = + cy_as_storage_device_control(bd->dev_handle, 1, 0, + cy_true, cy_false, + cy_as_storage_detect_GPIO, + 0, 0); + if (retval != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message + ("<1>CyAsBlkDev: Cannot control StorageDevice - Reason code %d\n", + retval); + } + + retval = cy_as_storage_start(bd->dev_handle, 0, 0x101); + if (retval != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : fail in cy_as_storage_stop (%d)\n", + __func__, retval); +#endif + return retval; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : cy_as_storage_start is called\n", + __func__); +#endif + + retval = + cy_as_storage_query_media(bd->dev_handle, + cy_as_media_sd_flash, &count, + 0, 0); + if (retval != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "ERROR: Cannot query SD device count - Reason code %d\n", + retval); + return retval; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : cy_as_storage_query_media is called - media count = %d\n", + __func__, count); +#endif + + if (count) { + dev_data.bus = bus_num; + dev_data.device = 0; + + retval = + cy_as_storage_query_device(bd->dev_handle, + &dev_data, 0, 0); + if (retval != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message + ("%s: cannot query %d device - reason code %d\n", + __func__, bus_num, retval); +#endif + return retval; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : cy_as_storage_query_device is called - found \n", + __func__); +#endif + } else { + return -1; + } + } + return 0; +} + +EXPORT_SYMBOL(cyasblkdev_start_sdcard); + +int cyasblkdev_stop_sdcard(void) +{ + struct cyasblkdev_blk_data *bd; + int retval; + + DBGPRN_FUNC_NAME; + + if (g_is_block_dev_ready && gl_bd) { + bd = gl_bd; + + retval = cy_as_storage_stop(bd->dev_handle, 0, 0); + if (retval != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : fail in cy_as_storage_stop (%d)\n", + __func__, retval); +#endif + return -1; + } +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : cy_as_storage_stop is called - found \n", + __func__); +#endif + + } + return 0; +} + +EXPORT_SYMBOL(cyasblkdev_stop_sdcard); + + +/* block device exit */ +int cyasblkdev_check_sdcard(void) +{ + struct cyasblkdev_blk_data *bd; + cy_as_storage_sd_reg_read_data reg_data; + int bus_num; + unsigned char tempbuf[32]; + unsigned char *serial_num; + int retval; + + DBGPRN_FUNC_NAME; + + if (g_is_block_dev_ready && gl_bd) { + bd = gl_bd; + + if (bd->user_disk_0) { + bus_num = bd->user_disk_0_bus_num; + serial_num = bd->user_disk_0_serial_num; + } else if (bd->user_disk_1) { + bus_num = bd->user_disk_1_bus_num; + serial_num = bd->user_disk_1_serial_num; + } else if (bd->system_disk) { + bus_num = bd->system_disk_bus_num; + serial_num = bd->system_disk_serial_num; + } else + return 0; + +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_wakeup_thread(1); +#endif + /* + retval = cy_as_misc_storage_changed(bd->dev_handle, 0, 0); + if(retval != CY_AS_ERROR_SUCCESS) + { + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR "%s : fail in cy_as_misc_storage_changed (%d) \n", __func__, retval); + #endif + return -1; + } + */ + reg_data.buf_p = tempbuf; + reg_data.length = 16; + retval = + cy_as_storage_sd_register_read(bd->dev_handle, bus_num, + 0, cy_as_sd_reg_CID, + ®_data, 0, 0); + if (retval != CY_AS_ERROR_SUCCESS) { +#ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : fail in read CID register (%d)\n", + __func__, retval); +#endif + return -1; + } else { + cy_as_hal_print_message(KERN_ERR + "%s : serial num = 0x%x 0x%x 0x%x 0x%x\n", + __func__, tempbuf[9], + tempbuf[10], tempbuf[11], + tempbuf[12]); + if (memcmp(serial_num, &tempbuf[9], 4)) { + return 1; + } + } + + } else + return 1; + return 0; +} + +EXPORT_SYMBOL(cyasblkdev_check_sdcard); + +int cyasblkdev_copy_char_to_int(char *dest, char *src) +{ + dest[0] = src[3]; + dest[1] = src[2]; + dest[2] = src[1]; + dest[3] = src[0]; + return 4; +} + +int cyasblkdev_get_serial(void) +{ + struct cyasblkdev_blk_data *bd; + int serial_num = 0; + + if (g_is_block_dev_ready && gl_bd) { + bd = gl_bd; + + if (bd->user_disk_0) { + cyasblkdev_copy_char_to_int((char *) &serial_num, + bd-> + user_disk_0_serial_num); + } else if (bd->user_disk_1) { + cyasblkdev_copy_char_to_int((char *) &serial_num, + bd-> + user_disk_1_serial_num); + } else if (bd->system_disk) { + cyasblkdev_copy_char_to_int((char *) &serial_num, + bd-> + system_disk_serial_num); + } + } + return serial_num; +} + +EXPORT_SYMBOL(cyasblkdev_get_serial); + +int cyasblkdev_get_CID(char *ptrCID) +{ + struct cyasblkdev_blk_data *bd; + int i; + if (g_is_block_dev_ready && gl_bd) { + bd = gl_bd; + + if (bd->user_disk_0) { + for (i = 0; i < 16; i += 4) + cyasblkdev_copy_char_to_int(&ptrCID[i], + &bd-> + user_disk_0_CID + [i]); + return 16; + } else if (bd->user_disk_1) { + for (i = 0; i < 16; i += 4) + cyasblkdev_copy_char_to_int(&ptrCID[i], + &bd-> + user_disk_0_CID + [i]); + return 16; + } else if (bd->system_disk) { + for (i = 0; i < 16; i += 4) + cyasblkdev_copy_char_to_int(&ptrCID[i], + &bd-> + user_disk_0_CID + [i]); + return 16; + } + } + + memset(ptrCID, 0, 16); + return 0; +} + +EXPORT_SYMBOL(cyasblkdev_get_CID); + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h b/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h index 51cba6a..06c6029 100644 --- a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h +++ b/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h @@ -35,6 +35,9 @@ #include "../include/linux/westbridge/cyashal.h" #include "../include/linux/westbridge/cyastoria.h" +#define __USE_SYNC_FUNCTION__ +#define __FOR_KERNEL_2_6_35__ + struct request; struct task_struct; @@ -48,12 +51,15 @@ struct cyasblkdev_queue { int (*issue_fn)(struct cyasblkdev_queue *, struct request *); void *data; struct request_queue *queue; + int test_code; }; extern int cyasblkdev_init_queue(struct cyasblkdev_queue *, spinlock_t *); extern void cyasblkdev_cleanup_queue(struct cyasblkdev_queue *); extern void cyasblkdev_queue_suspend(struct cyasblkdev_queue *); extern void cyasblkdev_queue_resume(struct cyasblkdev_queue *); +extern void cy_as_acquire_common_lock(void); +extern void cy_as_release_common_lock(void); extern cy_as_device_handle cyasdevice_getdevhandle(void); #define MOD_LOGS 1 diff --git a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue_na_spr.c b/drivers/staging/westbridge/astoria/block/cyasblkdev_queue_na_spr.c new file mode 100755 index 0000000..7f80ef4 --- /dev/null +++ b/drivers/staging/westbridge/astoria/block/cyasblkdev_queue_na_spr.c @@ -0,0 +1,470 @@ +/* cyanblkdev_queue.h - Antioch Linux Block Driver queue source file +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor, +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +/* + * Request queue handling for Antioch block device driver. + * Based on the mmc queue handling code by Russell King in the + * linux 2.6.10 kernel. + */ + +/* + * linux/drivers/mmc/mmc_queue.c + * + * Copyright (C) 2003 Russell King, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/blkdev.h> +#include <linux/kthread.h> +#include <linux/freezer.h> +#include <linux/scatterlist.h> +#include <linux/slab.h> + +#include "cyasblkdev_queue.h" + +#define CYASBLKDEV_QUEUE_EXIT (1 << 0) +#define CYASBLKDEV_QUEUE_SUSPENDED (1 << 1) +#define CY_AS_USE_ASYNC_API + + + +/* print flags by name */ +const char *rq_flag_bit_names[] = { + "REQ_RW", /* not set, read. set, write */ + "REQ_FAILFAST", /* no low level driver retries */ + "REQ_SORTED", /* elevator knows about this request */ + "REQ_SOFTBARRIER", /* may not be passed by ioscheduler */ + "REQ_HARDBARRIER", /* may not be passed by drive either */ + "REQ_FUA", /* forced unit access */ + "REQ_NOMERGE", /* don't touch this for merging */ + "REQ_STARTED", /* drive already may have started this one */ + "REQ_DONTPREP", /* don't call prep for this one */ + "REQ_QUEUED", /* uses queueing */ + "REQ_ELVPRIV", /* elevator private data attached */ + "REQ_FAILED", /* set if the request failed */ + "REQ_QUIET", /* don't worry about errors */ + "REQ_PREEMPT", /* set for "ide_preempt" requests */ + "REQ_ORDERED_COLOR",/* is before or after barrier */ + "REQ_RW_SYNC", /* request is sync (O_DIRECT) */ + "REQ_ALLOCED", /* request came from our alloc pool */ + "REQ_RW_META", /* metadata io request */ + "REQ_COPY_USER", /* contains copies of user pages */ + "REQ_NR_BITS", /* stops here */ +}; + +static int cyasblkdev_is_running; +void verbose_rq_flags(int flags) +{ + int i; + uint32_t j; + j = 1; + for (i = 0; i < 32; i++) { + if (flags & j) + DBGPRN("<1>%s", rq_flag_bit_names[i]); + j = j << 1; + } +} + + +/* + * Prepare a -BLK_DEV request. Essentially, this means passing the + * preparation off to the media driver. The media driver will + * create request to CyAsDev. + */ +static int cyasblkdev_prep_request( + struct request_queue *q, struct request *req) +{ + struct cyasblkdev_queue *bq = q->queuedata; + DBGPRN_FUNC_NAME; + + /* we only like normal block requests.*/ + if (req->cmd_type != REQ_TYPE_FS && !(req->cmd_flags & REQ_DISCARD)) { + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_INFO"%s:%x bad request received\n", + __func__, current->pid) ; + #endif + + blk_dump_rq_flags(req, "cyasblkdev bad request"); + return BLKPREP_KILL; + } + if (!bq) + return BLKPREP_KILL; + + req->cmd_flags |= REQ_DONTPREP; + + return BLKPREP_OK; +} + +/* queue worker thread */ +static int cyasblkdev_queue_thread(void *d) +{ + DECLARE_WAITQUEUE(wait, current); + struct cyasblkdev_queue *bq = d; + struct request_queue *q = bq->queue; + u32 qth_pid; + struct request *req ; + + DBGPRN_FUNC_NAME; + + /* + * set iothread to ensure that we aren't put to sleep by + * the process freezing. we handle suspension ourselves. + */ + daemonize("cyasblkdev_queue_thread"); + + /* signal to queue_init() so it could contnue */ + complete(&bq->thread_complete); + + down(&bq->thread_sem); + add_wait_queue(&bq->thread_wq, &wait); + + qth_pid = current->pid; + + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s:%x started, bq:%p, q:%p\n", __func__, qth_pid, bq, q) ; + #endif + + do { + req = NULL; + + /* the thread wants to be woken up by signals as well */ + set_current_state(TASK_INTERRUPTIBLE); + + spin_lock_irq(q->queue_lock); + + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: for bq->queue is null\n", __func__); + #endif + + #if 1 /* def __USE_SYNC_FUNCTION__ */ + if (!bq->req) + #endif + { + /* chk if queue is plugged */ + if (1) { +#if defined(__FOR_KERNEL_2_6_35__) || defined(__FOR_KERNEL_2_6_32__) + bq->req = req = blk_fetch_request(q); +#else + bq->req = req = elv_next_request(q); +#endif + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: blk_fetch_request:%x\n", + __func__, (uint32_t)req); + #endif + } else { + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: queue plugged, " + "skip blk_fetch()\n", __func__); + #endif + } + } + spin_unlock_irq(q->queue_lock); + + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: checking if request queue is null\n", __func__); + #endif + + if (!req) { + if (bq->flags & CYASBLKDEV_QUEUE_EXIT) { + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s:got QUEUE_EXIT flag\n", __func__); + #endif + + break; + } + + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: request queue is null, goto sleep, " + "thread_sem->count=%d\n", + __func__, bq->thread_sem.count); + if (spin_is_locked(q->queue_lock)) { + cy_as_hal_print_message(KERN_ERR"%s: queue_lock " + "is locked, need to release\n", __func__); + spin_unlock(q->queue_lock); + + if (spin_is_locked(q->queue_lock)) + cy_as_hal_print_message(KERN_ERR + "%s: unlock did not work\n", + __func__); + } else { + cy_as_hal_print_message(KERN_ERR + "%s: checked lock, is not locked\n", + __func__); + } + #endif + + cyasblkdev_is_running = 0; + + up(&bq->thread_sem); + + /* yields to the next rdytorun proc, + * then goes back to sleep*/ + schedule(); + down(&bq->thread_sem); + + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: wake_up,continue\n", + __func__); + #endif + continue; + } + + /* new req recieved, issue it to the driver */ + set_current_state(TASK_RUNNING); + + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s: issued a RQ:%x\n", + __func__, (uint32_t)req); + #endif + cyasblkdev_is_running = 1; + bq->issue_fn(bq, req); + + #ifdef __DEBUG_BLK_LOW_LEVEL_2_ + cy_as_hal_print_message(KERN_ERR + "%s: bq->issue_fn() returned\n", + __func__); + #endif + + + } while (1); + + set_current_state(TASK_RUNNING); + remove_wait_queue(&bq->thread_wq, &wait); + up(&bq->thread_sem); + + complete_and_exit(&bq->thread_complete, 0); + + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR"%s: is finished\n", __func__) ; + #endif + + return 0; +} + +/* + * Generic request handler. it is called for any queue on a + * particular host. When the host is not busy, we look for a request + * on any queue on this host, and attempt to issue it. This may + * not be the queue we were asked to process. + */ +static void cyasblkdev_request(struct request_queue *q) +{ + struct cyasblkdev_queue *bq = q->queuedata; + struct request *req; + DBGPRN_FUNC_NAME; + + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR + "%s new request on cyasblkdev_queue_t bq:=%x\n", + __func__, (uint32_t)bq); + #endif + + + if (!bq) { + /* printk(KERN_ERR "cyasblkdev_request: killing requests for dead queue\n"); */ +#if defined(__FOR_KERNEL_2_6_35__) || defined(__FOR_KERNEL_2_6_32__) + while ((req = blk_fetch_request(q)) != NULL) { + req->cmd_flags |= REQ_QUIET; + __blk_end_request_all(req, -EIO); + } +#else + while ((req = elv_next_request(q)) != NULL) { + do { + ret = __blk_end_request(req, -EIO, blk_rq_cur_bytes(req)); + } while (ret); + } +#endif + return; + } + + if (!bq->req) { + #ifdef __DEBUG_BLK_LOW_LEVEL_2_ + cy_as_hal_print_message(KERN_ERR"%s wake_up(&bq->thread_wq)\n", + __func__); + #endif + + /* wake up cyasblkdev_queue worker thread*/ + wake_up(&bq->thread_wq); + } else { + #ifdef __DEBUG_BLK_LOW_LEVEL__ + cy_as_hal_print_message(KERN_ERR"%s: don't wake Q_thr, bq->req:%x\n", + __func__, (uint32_t)bq->req); + #endif + } +} + +/* + * cyasblkdev_init_queue - initialise a queue structure. + * @bq: cyasblkdev queue + * @dev: CyAsDeviceHandle to attach this queue + * @lock: queue lock + * + * Initialise a cyasblkdev_request queue. + */ + +/* MAX NUMBER OF SECTORS PER REQUEST **/ +#define Q_MAX_SECTORS 128 + +/* MAX NUMBER OF PHYS SEGMENTS (entries in the SG list)*/ +#define Q_MAX_SGS 16 + +int cyasblkdev_init_queue(struct cyasblkdev_queue *bq, spinlock_t *lock) +{ + int ret; + + DBGPRN_FUNC_NAME; + + /* 1st param is a function that wakes up the queue thread */ + bq->queue = blk_init_queue(cyasblkdev_request, lock); + if (!bq->queue) + return -ENOMEM; + + blk_queue_prep_rq(bq->queue, cyasblkdev_prep_request); + + blk_queue_bounce_limit(bq->queue, BLK_BOUNCE_HIGH); +#ifdef __FOR_KERNEL_2_6_35__ + blk_queue_max_hw_sectors(bq->queue, Q_MAX_SECTORS); +#else + blk_queue_max_sectors(bq->queue, Q_MAX_SECTORS); +#endif + /* As of now, we have the HAL/driver support to + * merge scattered segments and handle them simultaneously. + * so, setting the max_phys_segments to 8. */ +#ifdef __FOR_KERNEL_2_6_35__ + blk_queue_max_segments(bq->queue, Q_MAX_SGS); +#else + blk_queue_max_phys_segments(bq->queue, Q_MAX_SGS); + blk_queue_max_hw_segments(bq->queue, Q_MAX_SGS); +#endif + /* should be < then HAL can handle */ + blk_queue_max_segment_size(bq->queue, 512*Q_MAX_SECTORS); + bq->queue->queuedata = bq; + bq->req = NULL; + bq->test_code = 0x12345678; + init_completion(&bq->thread_complete); + init_waitqueue_head(&bq->thread_wq); + sema_init(&bq->thread_sem, 1); + ret = kernel_thread(cyasblkdev_queue_thread, bq, CLONE_KERNEL); + if (ret >= 0) { + /* wait until the thread is spawned */ + wait_for_completion(&bq->thread_complete); + + /* reinitialize the completion */ + init_completion(&bq->thread_complete); + ret = 0; + goto out; + } + +out: + return ret; +} +EXPORT_SYMBOL(cyasblkdev_init_queue); + +/*called from blk_put() */ +void cyasblkdev_cleanup_queue(struct cyasblkdev_queue *bq) +{ + struct request_queue *q = bq->queue; + unsigned long flags; + + DBGPRN_FUNC_NAME; + + /* Make sure the queue isn't suspended, as that will deadlock */ + cyasblkdev_queue_resume(bq); + + bq->flags |= CYASBLKDEV_QUEUE_EXIT; + wake_up(&bq->thread_wq); + wait_for_completion(&bq->thread_complete); + + /* Empty the queue */ + spin_lock_irqsave(q->queue_lock, flags); + q->queuedata = NULL; + blk_start_queue(q); + spin_unlock_irqrestore(q->queue_lock, flags); + cy_as_hal_print_message(KERN_ERR"%s: is finished\n", __func__) ; + + /* blk_cleanup_queue(bq->queue); */ +} +EXPORT_SYMBOL(cyasblkdev_cleanup_queue); + + +/** + * cyasblkdev_queue_suspend - suspend a CyAsBlkDev request queue + * @bq: CyAsBlkDev queue to suspend + * + * Stop the block request queue, and wait for our thread to + * complete any outstanding requests. This ensures that we + * won't suspend while a request is being processed. + */ +void cyasblkdev_queue_suspend(struct cyasblkdev_queue *bq) +{ + struct request_queue *q = bq->queue; + unsigned long flags; + + DBGPRN_FUNC_NAME; + + if (!(bq->flags & CYASBLKDEV_QUEUE_SUSPENDED)) { + bq->flags |= CYASBLKDEV_QUEUE_SUSPENDED; + + spin_lock_irqsave(q->queue_lock, flags); + blk_stop_queue(q); + spin_unlock_irqrestore(q->queue_lock, flags); + + down(&bq->thread_sem); + } +} +EXPORT_SYMBOL(cyasblkdev_queue_suspend); + +/*cyasblkdev_queue_resume - resume a previously suspended + * CyAsBlkDev request queue @bq: CyAsBlkDev queue to resume */ +void cyasblkdev_queue_resume(struct cyasblkdev_queue *bq) +{ + struct request_queue *q = bq->queue; + unsigned long flags; + + DBGPRN_FUNC_NAME; + + if (bq->flags & CYASBLKDEV_QUEUE_SUSPENDED) { + bq->flags &= ~CYASBLKDEV_QUEUE_SUSPENDED; + + up(&bq->thread_sem); + + spin_lock_irqsave(q->queue_lock, flags); + blk_start_queue(q); + spin_unlock_irqrestore(q->queue_lock, flags); + } +} +EXPORT_SYMBOL(cyasblkdev_queue_resume); + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/device/Kconfig b/drivers/staging/westbridge/astoria/device/Kconfig index cc99658..7dcad9d 100644 --- a/drivers/staging/westbridge/astoria/device/Kconfig +++ b/drivers/staging/westbridge/astoria/device/Kconfig @@ -4,6 +4,7 @@ config WESTBRIDGE_DEVICE_DRIVER tristate "West Bridge Device Driver" + default y help Include the West Bridge based device driver diff --git a/drivers/staging/westbridge/astoria/device/Makefile b/drivers/staging/westbridge/astoria/device/Makefile index 7af8b5b..b0160bc 100644..100755 --- a/drivers/staging/westbridge/astoria/device/Makefile +++ b/drivers/staging/westbridge/astoria/device/Makefile @@ -5,7 +5,14 @@ ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) EXTRA_CFLAGS += -DWESTBRIDGE_NDEBUG endif - +ifeq ($(CONFIG_MACH_U1_NA_SPR),y) +EXTRA_CFLAGS += -DWESTBRIDGE_ASTORIA +EXTRA_CFLAGS += -D__USE_CYAS_AUTO_SUSPEND__ +endif +ifeq ($(CONFIG_MACH_U1_NA_USCC),y) +EXTRA_CFLAGS += -DWESTBRIDGE_ASTORIA +EXTRA_CFLAGS += -D__USE_CYAS_AUTO_SUSPEND__ +endif obj-$(CONFIG_WESTBRIDGE_DEVICE_DRIVER) += cyasdev.o @@ -18,6 +25,20 @@ cyasdev-y := ../arch/arm/mach-omap2/cyashalomap_kernel.o cyasdevice.o \ ../api/src/cyasstorage.o ../api/src/cyasusb.o else +ifeq ($(CONFIG_MACH_U1_NA_SPR),y) +cyasdev-y := ../arch/arm/mach-c110/cyashalc110_pnand.o cyasdevice_na_spr.o \ + ../api/src/cyasdma.o ../api/src/cyasintr.o ../api/src/cyaslep2pep.o \ + ../api/src/cyaslowlevel.o ../api/src/cyasmisc.o \ + ../api/src/cyasstorage.o \ + ../block/cyasblkdev_block_na_spr.o ../block/cyasblkdev_queue_na_spr.o cyasdiagnostics.o +else ifeq ($(CONFIG_MACH_U1_NA_USCC),y) +cyasdev-y := ../arch/arm/mach-c110/cyashalc110_pnand.o cyasdevice_na_spr.o \ + ../api/src/cyasdma.o ../api/src/cyasintr.o ../api/src/cyaslep2pep.o \ + ../api/src/cyaslowlevel.o ../api/src/cyasmisc.o \ + ../api/src/cyasstorage.o \ + ../block/cyasblkdev_block_na_spr.o ../block/cyasblkdev_queue_na_spr.o cyasdiagnostics.o +else # should not get here, need to be built with some hal cyasdev-y := cyasdevice.o endif +endif diff --git a/drivers/staging/westbridge/astoria/device/cyandevice_export.h b/drivers/staging/westbridge/astoria/device/cyandevice_export.h new file mode 100755 index 0000000..e185c37 --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/cyandevice_export.h @@ -0,0 +1,33 @@ +/* +## cyandevice_export.h - Linux Antioch device driver file +## +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street +## Fifth Floor, Boston, MA 02110-1301, USA. +## =========================== +*/ + +/* + * Export Misc APIs that can be used from the other driver modules. + * The APIs to create a device handle and download firmware are not exported + * because they are expected to be used only by this kernel module. + */ + +EXPORT_SYMBOL(cy_as_hal_alloc) ; +EXPORT_SYMBOL(cy_as_hal_free) ; +EXPORT_SYMBOL(cy_as_hal_mem_set); +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/device/cyasdevice_na_spr.c b/drivers/staging/westbridge/astoria/device/cyasdevice_na_spr.c new file mode 100755 index 0000000..ef3970c --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/cyasdevice_na_spr.c @@ -0,0 +1,1560 @@ +/* +## cyandevice.c - Linux Antioch device driver file +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/workqueue.h> + +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/sched.h> +#include <linux/scatterlist.h> +#include <linux/err.h> +#include <linux/firmware.h> +#include <linux/platform_device.h> +#include <linux/slab.h> + +#include <linux/semaphore.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +/* moved for staging location + * update/patch submission +#include <linux/westbridge/cyastoria.h> +#include <linux/westbridge/cyashal.h> +#include <linux/westbridge/cyasregs.h> +*/ + +#include "../include/linux/westbridge/cyastoria.h" +#include "../include/linux/westbridge/cyashal.h" +#include "../include/linux/westbridge/cyasregs.h" +#include "../arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyasmemmap.h" + +#ifdef WESTBRIDGE_ASTORIA +#include "firmware/cyastfw_sd_mmc_rel_silicon.h" +#include "firmware/cyastfw_mtp_sd_mmc_rel_silicon.h" +#endif + +/* API exports include file */ +#include "cyandevice_export.h" +#include "cyasdiagnostics.h" + +#define __USE_ISR_FOR_SD_DETECT__ +#ifdef __USE_CYAS_AUTO_SUSPEND__ +#define CYASDEVICE_THREAD_EXIT (1 << 0) +#define CYASDEVICE_THREAD_SUSPENDED (1 << 1) +#define CYASDEVICE_THREAD_TIMER (1 << 2) + +#define CYASDEVICE_THREAD_ENABLE (1 << 7) + +#define CYASDEVICE_STANDBY_TIMEOUT 200 +#endif + +typedef struct { + struct delayed_work work; + int f_reload; + int f_status; + int f_isrunning; +} cy_work_t; + +typedef struct cyasdevice { + /* Handle to the Antioch device */ + cy_as_device_handle dev_handle; + /* Handle to the HAL */ + cy_as_hal_device_tag hal_tag; + /* spinlock_t common_lock; */ + struct semaphore common_sema; + unsigned long flags; + + struct workqueue_struct *cy_wq; + cy_work_t *cy_work; + struct semaphore wq_sema; + uint8_t f_platform_driver; + +#ifdef __USE_CYAS_AUTO_SUSPEND__ + struct completion thread_sleep_complete; + wait_queue_head_t thread_sleep_wq; + struct semaphore thread_sleep_sem; + unsigned long thread_sleep_flags; + unsigned long thread_sleep_enable; + int thread_sleep_count; +#endif +} cyasdevice; + +#ifdef __USE_CYAS_AUTO_SUSPEND__ +int cyasdevice_wakeup_thread(int flag); +int cyasdevice_enable_thread(void); +int cyasdevice_disable_thread(void); +#endif + +/* global ptr to astoria device */ +static cyasdevice *cy_as_device_controller; +int cy_as_device_init_done; +const char *dev_handle_name = "cy_astoria_dev_handle"; + +static int firmware_number; +static int f_isStandby; + +extern int cyasblkdev_start_sdcard(void); +extern int cyasblkdev_stop_sdcard(void); + +extern int cyasblkdev_check_sdcard(void); +extern int cyasblkdev_get_serial(void); +extern int cyasblkdev_get_CID(char *ptrCID); +extern int cyasblkdev_blk_init(int fmajor, int fsearch); +extern void cyasblkdev_blk_exit(void); +int cyasdevice_reload_firmware(int mtp_mode); +void cy_as_acquire_common_lock(void); +void cy_as_release_common_lock(void); +int cyasdevice_enter_standby(void); +int cyasdevice_leave_standby(void); + +#ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL +extern void cy_as_hal_config_c_s_mux(void); +#endif + +extern int cy_as_hal_detect_SD(void); + +#ifdef __USE_ISR_FOR_SD_DETECT__ +extern int cy_as_hal_enable_irq(void); +extern int cy_as_hal_disable_irq(void); +extern int cy_as_hal_configure_sd_isr(void *dev_p, irq_handler_t isr_function); +extern int cy_as_hal_free_sd_isr(void); +extern int cy_as_hal_enable_power(cy_as_hal_device_tag tag, int flag); +#endif + + +extern int cy_as_hal_enable_NANDCLK(int flag); + +int g_SD_flag; +static void cy_wq_function(struct work_struct *work) +{ + int status; + int is_inserted; + int ret; + int retry_count; + + down(&cy_as_device_controller->thread_sleep_sem); + + down(&cy_as_device_controller->wq_sema); + cy_as_device_controller->cy_work->f_isrunning = 1; + up(&cy_as_device_controller->wq_sema); + + status = cy_as_device_controller->cy_work->f_status; + g_SD_flag = is_inserted = cy_as_hal_detect_SD(); + + if (cy_as_device_controller->cy_work->f_reload == 1) { + cy_as_device_controller->cy_work->f_reload = 0; + cy_as_hal_enable_power(cy_as_device_controller->hal_tag, 1); + } + + #ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_disable_thread(); + #endif + + if (!is_inserted) { /* removed SD card. */ + + cy_as_hal_print_message(KERN_ERR + "[cyasdevice.c] %s: SD card is removed.\n", __func__) ; + if (status) { + cy_as_hal_print_message(KERN_ERR + "[cyasdevice.c] %s: cyasblkdev_blk_exit\n", __func__) ; + down(&cy_as_device_controller->wq_sema); + cyasdevice_leave_standby(); + cy_as_device_controller->cy_work->f_status = 0x0; + up(&cy_as_device_controller->wq_sema); + + cyasblkdev_blk_exit(); + retry_count = 0; + while (!cy_as_device_init_done) { + if (++retry_count == 5) { + cyasdevice_reload_firmware(0); + break; + } + msleep(10); + } + + } + down(&cy_as_device_controller->wq_sema); + cyasdevice_enter_standby(); + up(&cy_as_device_controller->wq_sema); + msleep(10); + } else { /* insterted SD card. */ + + cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s:\ + leave standby\n", __func__) ; + down(&cy_as_device_controller->wq_sema); + cyasdevice_leave_standby(); + up(&cy_as_device_controller->wq_sema); + + retry_count = 0; + while (!cy_as_device_init_done) { + if (++retry_count == 5) { + cyasdevice_reload_firmware(0); + break; + } + msleep(10); + } + + cy_as_hal_print_message(KERN_ERR + "++++++++++++ [cyasdevice.c] %s: SD card is inserted.\n", + __func__) ; + if (cy_as_device_controller->cy_work->f_reload == 2) { + cy_as_device_controller->cy_work->f_reload = 0; + + ret = cyasblkdev_check_sdcard(); + if (ret == 1) { + cy_as_hal_print_message( + "[cyasdevice.c] %s: cyasblkdev_blk_exit\n", + __func__) ; + cyasblkdev_blk_exit(); + status = + cy_as_device_controller->cy_work->f_status = 0x0; + } else if (ret < 0) { + cyasblkdev_blk_exit(); + cy_as_hal_print_message( + "[cyasdevice.c] %s: reload firmware\n", __func__) ; + status = cy_as_device_controller->cy_work->f_status = 0x0; + } else { + #ifdef __USE_CYAS_AUTO_SUSPEND__ + cyasdevice_enable_thread(); + #endif + } + } + if (status == 0) { + cy_as_hal_print_message(KERN_ERR + "[cyasdevice.c] %s: cyasblkdev_blk_init\n", __func__) ; + cy_as_device_controller->cy_work->f_status = 0x1; + + retry_count = 2; + + while (retry_count--) { + ret = cyasblkdev_blk_init(0, 0); + + if (ret) { + cyasblkdev_blk_exit(); + msleep(10); + cyasdevice_reload_firmware(-1); + msleep(10); + } else + break; + } + + if (ret) { + down(&cy_as_device_controller->wq_sema); + cyasdevice_enter_standby(); + up(&cy_as_device_controller->wq_sema); + msleep(10); + + cy_as_device_controller->cy_work->f_isrunning = 0; + up(&cy_as_device_controller->thread_sleep_sem); + return; + } + } + + #ifdef __USE_CYAS_AUTO_SUSPEND__ + /* cyasdevice_enable_thread(); */ + #endif + } + cy_as_device_controller->cy_work->f_isrunning = 0; + + up(&cy_as_device_controller->thread_sleep_sem); + + return; +} +#ifdef __USE_ISR_FOR_SD_DETECT__ +static irqreturn_t cyasdevice_int_handler(int irq, void *dev_id, struct pt_regs *regs) +{ + int cur_SD_flag = cy_as_hal_detect_SD(); + + if (g_SD_flag != cur_SD_flag) { + g_SD_flag = cur_SD_flag; + queue_delayed_work(cy_as_device_controller->cy_wq, + &cy_as_device_controller->cy_work->work, 0); + } + return IRQ_HANDLED ; +} +#endif +/* below structures and functions primarily + * implemented for firmware loading */ +#ifdef __CYAS_SYSFS_FOR_DIAGNOSTICS__ + +extern int cy_as_diagnostics(cy_as_diag_cmd_type mode, char *result); + +char cyas_diagnostics[1024]; + +static ssize_t show_cyas_diagnostics(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return snprintf(buf, PAGE_SIZE, "%s\n", cyas_diagnostics); +} + +static ssize_t store_cyas_diagnostics(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret; + int mode = 0; + int i = 0, len; + + sscanf(buf, "%s", cyas_diagnostics); + + len = strnlen(buf, PAGE_SIZE); + + while (i < len) { + if (buf[i] < 0x30 || buf[i] > 0x39) + break; + + mode += (buf[i]&0x0F); + + i++; + + if (i == len) + break; + else if (buf[i] == 0xa) + break; + else + mode *= 10; + } + + cy_as_hal_print_message("[%s] mode=%d\n", __func__, mode); + + switch (mode) { + case 1: + ret = cy_as_diagnostics(CY_AS_DIAG_GET_VERSION, cyas_diagnostics); + break; + case 2: + ret = cy_as_diagnostics(CY_AS_DIAG_DISABLE_MSM_SDIO, cyas_diagnostics); + break; + case 3: + ret = cy_as_diagnostics(CY_AS_DIAG_ENABLE_MSM_SDIO, cyas_diagnostics); + break; + case 4: + ret = cy_as_diagnostics(CY_AS_DIAG_LEAVE_STANDBY, cyas_diagnostics); + break; + case 5: + ret = cy_as_diagnostics(CY_AS_DIAG_ENTER_STANDBY, cyas_diagnostics); + break; + case 6: + ret = cy_as_diagnostics(CY_AS_DIAG_CREATE_BLKDEV, cyas_diagnostics); + break; + case 7: + ret = cy_as_diagnostics(CY_AS_DIAG_DESTROY_BLKDEV, cyas_diagnostics); + break; + case 11: + ret = cy_as_diagnostics(CY_AS_DIAG_SD_MOUNT, cyas_diagnostics); + break; + case 12: + ret = cy_as_diagnostics(CY_AS_DIAG_SD_READ, cyas_diagnostics); + break; + case 13: + ret = cy_as_diagnostics(CY_AS_DIAG_SD_WRITE, cyas_diagnostics); + break; + case 14: + ret = cy_as_diagnostics(CY_AS_DIAG_SD_UNMOUNT, cyas_diagnostics); + break; + case 21: + ret = cy_as_diagnostics(CY_AS_DIAG_CONNECT_UMS, cyas_diagnostics); + break; + case 22: + ret = cy_as_diagnostics(CY_AS_DIAG_DISCONNECT_UMS, cyas_diagnostics); + break; + case 31: + ret = cy_as_diagnostics(CY_AS_DIAG_CONNECT_MTP, cyas_diagnostics); + break; + case 32: + ret = cy_as_diagnostics(CY_AS_DIAG_DISCONNECT_MTP, cyas_diagnostics); + break; + case 40: + ret = cy_as_diagnostics(CY_AS_DIAG_TEST_RESET_LOW, cyas_diagnostics); + break; + case 41: + ret = cy_as_diagnostics(CY_AS_DIAG_TEST_RESET_HIGH, cyas_diagnostics); + break; + default: + ret = 1; + break; + } + + if (ret) + return 0; + + return len; +} + +static DEVICE_ATTR(cyas_diagnostics, + S_IRUGO | S_IWUSR, + show_cyas_diagnostics, + store_cyas_diagnostics); + +static int serial; +static ssize_t show_cyas_serial(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + serial = cyasblkdev_get_serial(); + return snprintf(buf, PAGE_SIZE, "0x%08x\n", serial); +} + +static ssize_t store_cyas_serial(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t count) +{ + return strlen(buf); +} + +static DEVICE_ATTR(serial, S_IRUGO | S_IWUSR, show_cyas_serial, store_cyas_serial); + +static int wbcid[4]; +static ssize_t show_cyas_wbcid(struct device *dev, struct device_attribute *attr, char *buf) +{ + int size; + size = cyasblkdev_get_CID((char *)wbcid); + return snprintf(buf, PAGE_SIZE, "%08x%08x%08x%08x\n", wbcid[0], wbcid[1], wbcid[2], wbcid[3]); +} + +static ssize_t store_cyas_wbcid(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t count) +{ + return strlen(buf); +} + +static DEVICE_ATTR(wbcid, S_IRUGO | S_IWUSR, show_cyas_wbcid, store_cyas_wbcid); + +#endif +static struct platform_device *westbridge_pd; + +static int __devinit wb_probe(struct platform_device *devptr) +{ + cy_as_hal_print_message("%s called\n", __func__); + return 0; +} + +static int __devexit wb_remove(struct platform_device *devptr) +{ + cy_as_hal_print_message("%s called\n", __func__); + return 0; +} + +static int wb_suspend(struct platform_device *devptr, pm_message_t pm) +{ + disable_irq(WB_SDCD_IRQ_INT); + + down(&cy_as_device_controller->wq_sema); + if (cy_as_device_controller->cy_work->f_isrunning) { + up(&cy_as_device_controller->wq_sema); + enable_irq(WB_SDCD_IRQ_INT); + return -1; + } + up(&cy_as_device_controller->wq_sema); + + /* cy_as_hal_print_message(KERN_ERR"%s called\n", __func__); */ + /* down(&cy_as_device_controller->wq_sema); */ + cyasdevice_disable_thread(); + cancel_delayed_work(&cy_as_device_controller->cy_work->work); + + cyasdevice_enter_standby(); + /* disable clock */ + /* cy_as_hal_sleep(10); */ + msleep(10); + disable_irq(WB_CYAS_IRQ_INT); + gpio_set_value(WB_CLK_EN, 0); + cy_as_hal_enable_NANDCLK(0); + cy_as_hal_enable_power(cy_as_device_controller->hal_tag, 0); + /* up(&cy_as_device_controller->wq_sema); */ + return 0; +} + +static int wb_resume(struct platform_device *devptr) +{ + int retval; + int sd_status; + /* cy_as_hal_print_message(KERN_ERR"%s called\n", __func__); */ + /* cyasdevice_leave_standby(); */ + /* down(&cy_as_device_controller->wq_sema); */ + cy_as_hal_enable_power(cy_as_device_controller->hal_tag, 1); + cy_as_hal_enable_NANDCLK(1); + gpio_set_value(WB_CLK_EN, 1); + msleep(10); + /* cy_as_hal_sleep(10); */ + /* up(&cy_as_device_controller->wq_sema); */ + enable_irq(WB_CYAS_IRQ_INT); + msleep(5); + sd_status = cy_as_hal_detect_SD(); + if (sd_status) { + down(&cy_as_device_controller->wq_sema); + cy_as_device_controller->cy_work->f_isrunning = 1; + up(&cy_as_device_controller->wq_sema); + retval = cyasdevice_wakeup_thread(1); + + if (retval == 0) { + msleep(10); + cyasblkdev_stop_sdcard(); + retval = cyasblkdev_start_sdcard(); + /* retval = cy_as_misc_storage_changed( + cy_as_device_controller->dev_handle, 0, 0); */ + if (retval != CY_AS_ERROR_SUCCESS) { + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s : fail in cy_as_misc_storage_changed (%d)\n", + __func__, retval); + #endif + } + } + down(&cy_as_device_controller->wq_sema); + cy_as_device_controller->cy_work->f_isrunning = 0; + up(&cy_as_device_controller->wq_sema); + } + if (sd_status || cy_as_device_controller->cy_work->f_status) { + cy_as_device_controller->cy_work->f_reload = 2; + queue_delayed_work(cy_as_device_controller->cy_wq, + &cy_as_device_controller->cy_work->work, 0); + } + enable_irq(WB_SDCD_IRQ_INT); + return 0; +} + +static struct platform_driver west_bridge_driver = { + .probe = wb_probe, + .remove = __devexit_p(wb_remove), + .suspend = wb_suspend, + .resume = wb_resume, + .driver = { + .name = "west_bridge_dev"}, +}; + + +static void cyasdevice_deinit(cyasdevice *cy_as_dev) +{ + cy_as_hal_print_message("<1>_cy_as_device deinitialize called\n"); + if (!cy_as_dev) { + cy_as_hal_print_message("<1>_cy_as_device_deinit: " + "device handle %x is invalid\n", (uint32_t)cy_as_dev); + return; + } + + /* stop west_brige */ + if (cy_as_dev->dev_handle) { + cy_as_hal_print_message("<1>_cy_as_device: " + "cy_as_misc_destroy_device called\n"); + if (cy_as_misc_destroy_device(cy_as_dev->dev_handle) != + CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message( + "<1>_cy_as_device: destroying failed\n"); + } + } + + if (cy_as_dev->hal_tag) { + + #ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL + if (stop_o_m_a_p_kernel(dev_handle_name, + cy_as_dev->hal_tag) != 0) + cy_as_hal_print_message("<1>_cy_as_device: stopping " + "OMAP kernel HAL failed\n"); + + #endif +#ifdef CONFIG_MACH_C110_WESTBRIDGE_AST_PNAND_HAL + if (cy_as_hal_c110_pnand_stop(dev_handle_name, cy_as_dev->hal_tag) != 0) + cy_as_hal_print_message("<1>_cy_as_device: stopping C110 CRAM HAL failed\n"); +#endif + + } + cy_as_hal_print_message("<1>_cy_as_device:HAL layer stopped\n"); + + if (cy_as_dev->f_platform_driver) { + cy_as_hal_print_message("<1>_cy_as_device: remove cyas_diagnostics\n") ; + #ifdef __CYAS_SYSFS_FOR_DIAGNOSTICS__ + device_remove_file(&westbridge_pd->dev, &dev_attr_cyas_diagnostics); + device_remove_file(&westbridge_pd->dev, &dev_attr_serial); + device_remove_file(&westbridge_pd->dev, &dev_attr_wbcid); + #endif + + cy_as_hal_print_message("<1>_cy_as_device: unregister west_bridge_driver\n") ; + platform_driver_unregister(&west_bridge_driver); + } + + kfree(cy_as_dev); + cy_as_device_controller = NULL; + cy_as_hal_print_message("<1>_cy_as_device: deinitialized\n"); +} + +/*called from src/cyasmisc.c:MyMiscCallback() as a func + * pointer [dev_p->misc_event_cb] which was previously + * registered by CyAsLLRegisterRequestCallback(..., + * MyMiscCallback); called from CyAsMiscConfigureDevice() + * which is in turn called from cyasdevice_initialize() in + * this src + */ +static void cy_misc_callback(cy_as_device_handle h, + cy_as_misc_event_type evtype, void *evdata) +{ + (void)h; + (void)evdata; + + switch (evtype) { + case cy_as_event_misc_initialized: + cy_as_hal_print_message("<1>_cy_as_device: " + "initialization done callback triggered\n"); + cy_as_device_init_done = 1; + break; + + case cy_as_event_misc_awake: + cy_as_hal_print_message("<1>_cy_as_device: " + "cy_as_event_misc_awake event callback triggered\n"); + cy_as_device_init_done = 1; + break; + default: + break; + } +} + +void cy_as_acquire_common_lock() +{ + /* if (cy_as_device_controller) */ + /*while(!cy_as_device_controller);*/ + /* printk("%s called by %s\n", __func__, caller); */ + down(&cy_as_device_controller->common_sema); +} +EXPORT_SYMBOL(cy_as_acquire_common_lock); + +void cy_as_release_common_lock(void) +{ + /* if (cy_as_device_controller) */ + /*while(!cy_as_device_controller);*/ + /* printk("%s called by %s\n", __func__, caller); */ + up(&cy_as_device_controller->common_sema); +} +EXPORT_SYMBOL(cy_as_release_common_lock); + +/* reset astoria and reinit all regs */ + #define PNAND_REG_CFG_INIT_VAL 0x0000 +void hal_reset(cy_as_hal_device_tag tag) +{ + cy_as_hal_print_message("<1> send soft hard rst: " + "MEM_RST_CTRL_REG_HARD...\n"); + cy_as_hal_write_register(tag, CY_AS_MEM_RST_CTRL_REG, + CY_AS_MEM_RST_CTRL_REG_HARD); + mdelay(60); + + cy_as_hal_print_message("<1> after RST: si_rev_REG:%x, " + "PNANDCFG_reg:%x\n", + cy_as_hal_read_register(tag, CY_AS_MEM_CM_WB_CFG_ID), + cy_as_hal_read_register(tag, CY_AS_MEM_PNAND_CFG) + ); + + /* set it to LBD */ + cy_as_hal_write_register(tag, CY_AS_MEM_PNAND_CFG, + PNAND_REG_CFG_INIT_VAL); +} +EXPORT_SYMBOL(hal_reset); + + + + +/* west bridge device driver main init */ +static int cyasdevice_initialize(void) +{ + cyasdevice *cy_as_dev = 0; + int ret = 0; + int retval = 0; + cy_as_device_config config; + cy_as_hal_sleep_channel channel; + cy_as_get_firmware_version_data ver_data = {0}; + const char *str = ""; + int spin_lim; + const struct firmware *fw_entry; + + cy_as_device_init_done = 0; + + cy_as_misc_set_log_level(8); + + cy_as_hal_print_message("<1>_cy_as_device initialize called\n"); + + if (cy_as_device_controller != 0) { + cy_as_hal_print_message("<1>_cy_as_device: the device " + "has already been initilaized. ignoring\n"); + return -EBUSY; + } + + /* cy_as_dev = CyAsHalAlloc (sizeof(cyasdevice), SLAB_KERNEL); */ + cy_as_dev = cy_as_hal_alloc(sizeof(cyasdevice)); + if (cy_as_dev == NULL) { + cy_as_hal_print_message("<1>_cy_as_device: " + "memory allocation failed\n"); + return -ENOMEM; + } + memset(cy_as_dev, 0, sizeof(cyasdevice)); + + + /* Init the HAL & CyAsDeviceHandle */ + + #ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL + /* start OMAP HAL init instsnce */ + + if (!start_o_m_a_p_kernel(dev_handle_name, + &(cy_as_dev->hal_tag), cy_false)) { + + cy_as_hal_print_message( + "<1>_cy_as_device: start OMAP34xx HAL failed\n"); + goto done; + } + #endif + +#ifdef CONFIG_MACH_C110_WESTBRIDGE_AST_PNAND_HAL + /* start C110 HAL init instsnce */ + if (!cy_as_hal_c110_pnand_start(dev_handle_name, + &(cy_as_dev->hal_tag), cy_false)) { + cy_as_hal_print_message("<1>_cy_as_device: start C110 HAL failed\n") ; + goto done; + } +#endif + /* Now create the device */ + if (cy_as_misc_create_device(&(cy_as_dev->dev_handle), + cy_as_dev->hal_tag) != CY_AS_ERROR_SUCCESS) { + + cy_as_hal_print_message( + "<1>_cy_as_device: create device failed\n"); + goto done; + } + + memset(&config, 0, sizeof(config)); + config.dmaintr = cy_true; + + ret = cy_as_misc_configure_device(cy_as_dev->dev_handle, &config); + if (ret != CY_AS_ERROR_SUCCESS) { + + cy_as_hal_print_message( + "<1>_cy_as_device: configure device " + "failed. reason code: %d\n", ret); + goto done; + } + + ret = cy_as_misc_register_callback(cy_as_dev->dev_handle, + cy_misc_callback); + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message("<1>_cy_as_device: " + "cy_as_misc_register_callback failed. " + "reason code: %d\n", ret); + goto done; + } + + ret = platform_driver_register(&west_bridge_driver); + if (unlikely(ret < 0)) + return ret; + westbridge_pd = platform_device_register_simple( + "west_bridge_dev", -1, NULL, 0); + + if (IS_ERR(westbridge_pd)) { + cy_as_hal_print_message("[%s] error in register the platform\ + driver for west bridge\n", __FUNCTION__); + platform_driver_unregister(&west_bridge_driver); + return PTR_ERR(westbridge_pd); + } else { + #ifdef __CYAS_SYSFS_FOR_DIAGNOSTICS__ + ret = device_create_file(&westbridge_pd->dev, &dev_attr_cyas_diagnostics); + if (ret) + cy_as_hal_print_message("[%s] error in device_create_file\ + for device_create_file 1\n", __FUNCTION__); + ret = device_create_file(&westbridge_pd->dev, &dev_attr_serial); + if (ret) + cy_as_hal_print_message("[%s] error in device_create_file\ + for device_create_file 2\n", __FUNCTION__); + ret = device_create_file(&westbridge_pd->dev, &dev_attr_wbcid); + if (ret) + cy_as_hal_print_message("[%s] error in device_create_file\ + for device_create_file 2\n", __FUNCTION__); + #endif + } + cy_as_dev->f_platform_driver = 1; +#if 0 + /* Load the firmware */ + ret = request_firmware(&fw_entry, + "west bridge fw", &westbridge_pd->dev); + if (ret) { + cy_as_hal_print_message("cy_as_device: " + "request_firmware failed return val = %d\n", ret); + } else { + cy_as_hal_print_message("cy_as_device: " + "got the firmware %d size=0x%x\n", ret, fw_entry->size); + + ret = cy_as_misc_download_firmware( + cy_as_dev->dev_handle, + fw_entry->data, + fw_entry->size , + 0, 0); + } + release_firmware(fw_entry); +#endif + +#ifdef WESTBRIDGE_ASTORIA + if (firmware_number == 0) { + cy_as_hal_print_message("<1>_cy_as_device: firmware_number=0, download firmware cyastfw_sd_mmc_rel_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyastfw_sd_mmc_rel_silicon_array.fw_image, + CYASTFW_SD_MMC_REL_SILICON_SIZE , 0, 0) ; + } else { + cy_as_hal_print_message("<1>_cy_as_device: firmware_number=1, download firmware cyastfw_mtp_sd_mmc_rel_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, cyastfw_mtp_sd_mmc_rel_silicon_array.fw_image, CYASTFW_MTP_SD_MMC_REL_SILICON_SIZE , 0, 0) ; + } +#endif + + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message("<1>_cy_as_device: cannot download firmware. reason code: %d\n", ret); + goto done; + } + + /* spin until the device init is completed */ + /* 50 -MAX wait time for the FW load & init + * to complete is 5sec*/ + spin_lim = 500; + + cy_as_hal_create_sleep_channel(&channel); + while (!cy_as_device_init_done) { + + cy_as_hal_sleep_on(&channel, 10) ; + + if (spin_lim-- <= 0) { + cy_as_hal_print_message( + "<1>\n_e_r_r_o_r!: " + "wait for FW init has timed out !!!"); + break; + } + } + cy_as_hal_destroy_sleep_channel(&channel); + + if (spin_lim > 0) + cy_as_hal_print_message( + "cy_as_device: astoria firmware is loaded\n"); + + ret = cy_as_misc_get_firmware_version(cy_as_dev->dev_handle, + &ver_data, 0, 0); + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message("<1>_cy_as_device: cannot get firmware " + "version. reason code: %d\n", ret); + goto done; + } + + if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x06)) + str = "nand and SD/MMC."; + else if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x08)) + str = "nand and CEATA."; + else if (ver_data.media_type & 0x01) + str = "nand."; + else if (ver_data.media_type & 0x08) + str = "CEATA."; + else + str = "SD/MMC."; + + cy_as_hal_print_message("<1> cy_as_device:_firmware version: %s " + "major=%d minor=%d build=%d,\n_media types supported:%s\n", + ((ver_data.is_debug_mode) ? "debug" : "release"), + ver_data.major, ver_data.minor, ver_data.build, str); + +/* printk("%s: lock address is 0x%x\n", __func__, (unsigned int)&cy_as_dev->common_lock); */ +/* spin_lock_init(&cy_as_dev->common_lock); */ +/* printk("%s: lock address is 0x%x\n", __func__, (unsigned int)&cy_as_dev->common_lock); */ + + printk("%s: lock address is 0x%x\n", __func__, (unsigned int)&cy_as_dev->common_sema); + sema_init(&cy_as_dev->common_sema, 1); + sema_init(&cy_as_dev->wq_sema, 1); + printk("%s: lock address is 0x%x\n", __func__, (unsigned int)&cy_as_dev->common_sema); + /* done now */ + cy_as_device_controller = cy_as_dev; + + + + return 0; + +done: + if (cy_as_dev) + cyasdevice_deinit(cy_as_dev); + + return -EINVAL; +} + +cy_as_device_handle cyasdevice_getdevhandle(void) +{ + if (cy_as_device_controller) { + #ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL + cy_as_hal_config_c_s_mux(); + #endif + + return cy_as_device_controller->dev_handle; + } + return NULL; +} +EXPORT_SYMBOL(cyasdevice_getdevhandle); + +cy_as_hal_device_tag cyasdevice_gethaltag(void) +{ + if (cy_as_device_controller) + return (cy_as_hal_device_tag) + cy_as_device_controller->hal_tag; + + return NULL; +} +EXPORT_SYMBOL(cyasdevice_gethaltag); + +static int g_first_error_enter; +static int g_first_error_leave; + +int cyasdevice_enter_standby(void) +{ + int retval; + if (f_isStandby == cy_false) { + /* cy_as_acquire_common_lock(); */ + /* cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s mode\n", __func__) ; */ + retval = cy_as_misc_enter_standby(cy_as_device_controller->dev_handle, cy_false, 0, 0); + if (retval != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s: error - %d\n", __func__, retval) ; + if (!g_first_error_enter) + g_first_error_enter = retval; + } + /* msleep(5); */ + + f_isStandby = cy_true; + /* cy_as_release_common_lock(); */ + cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s end mode\n", __func__) ; + + if (g_first_error_enter || g_first_error_leave) + cy_as_hal_print_message(KERN_ERR + "[%s] 1st error %d - %d\n", __func__, + g_first_error_enter, g_first_error_leave) ; + } + return 0; +} +EXPORT_SYMBOL(cyasdevice_enter_standby) ; + +int cyasdevice_leave_standby(void) +{ + int retval = 0; + uint16_t v1, v2 ; + uint32_t count = 20 ; + + if (f_isStandby == cy_true) { + cy_as_device_init_done = 0; + + /* cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s mode \n", __func__) ; */ + retval = cy_as_misc_leave_standby(cy_as_device_controller->dev_handle, cy_as_bus_1); + if (retval != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s: error - %d\n", __func__, retval) ; + if (!g_first_error_leave) + g_first_error_leave = retval; + } + + while (cy_as_device_init_done == 0 && count--) + msleep(1); + + if (cy_as_device_init_done == 0) { + gpio_set_value(WB_WAKEUP, 0); + msleep(1); + gpio_set_value(WB_WAKEUP, 1); + msleep(10); + } + /* cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s count=%d\n", __func__,count) ; */ + + count = 0x08; + while (count) { + v1 = cy_as_hal_read_register(cy_as_device_controller->hal_tag, CY_AS_MEM_RST_CTRL_REG); + if ((v1 & CY_AS_MEM_RST_RSTCMPT) == 0) + cy_as_hal_print_message( + KERN_ERR"Initialization Message Received,but reset complete bit still not set\n"); + else { + v2 = cy_as_hal_read_register(cy_as_device_controller->hal_tag, CY_AS_MEM_P0_VM_SET); + if (v2 & CY_AS_MEM_P0_VM_SET_CFGMODE) + cy_as_hal_print_message( + KERN_ERR"Initialization Message Received,but config bit still not set\n"); + else + break; + } + count--; + msleep(1); + } + cy_as_hal_print_message(KERN_ERR"[cyasdevice.c] %s end mode count=%d\n", __func__, count) ; + + f_isStandby = cy_false; + + if (cy_as_device_init_done == 0) { + if (!g_first_error_leave) + g_first_error_leave = 0x7F; + retval = 0x7F; + } else + retval = 0; + + if (g_first_error_enter || g_first_error_leave) + cy_as_hal_print_message(KERN_ERR + "[%s] 1st error %d - %d\n", __func__, + g_first_error_enter, g_first_error_leave) ; + } + return retval; +} +EXPORT_SYMBOL(cyasdevice_leave_standby) ; + +/**********************************************/ +/* SD Card Detect Routine by Samsung */ +/**********************************************/ +extern int cyasblkdev_blk_init(int fmajor, int fsearch); +extern void cyasblkdev_blk_exit(void); + +void cyasdevice_spoof_removal(void) +{ + cyasblkdev_blk_exit(); + cy_as_device_controller->cy_work->f_status = 0; +} +EXPORT_SYMBOL(cyasdevice_spoof_removal); + +void cyasdevice_spoof_insertion(void) +{ + uint ret = 0; + ret = cyasblkdev_blk_init(0, 0); + if (ret != CY_AS_ERROR_SUCCESS) + printk(KERN_ERR "%s: unable to initialize block device\n", __func__); + cy_as_device_controller->cy_work->f_status = 1; +} +EXPORT_SYMBOL(cyasdevice_spoof_insertion); + + +int cyasdevice_reload_firmware(int mtp_mode) +{ + cyasdevice *cy_as_dev = cy_as_device_controller ; + int ret = 0 ; + cy_as_device_config config ; + cy_as_hal_sleep_channel channel ; + /* cy_as_get_firmware_version_data ver_data = {0}; */ + /* const char *str = "" ; */ + int spin_lim; + + cy_as_hal_print_message("<r>_cy_as_device deinitialize called\n") ; + + /* cyasdevice_leave_standby(); */ + +#if 0/* def CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL */ + /* ret = cy_as_misc_reset(cy_as_dev->dev_handle, cy_as_reset_hard, cy_false, 0, 0); */ + /* if (ret != CY_AS_ERROR_SUCCESS) { */ + /* cy_as_hal_print_message("<1>_cy_as_device: cy_as_misc_reset failed. reason code: %d\n", ret) ; */ + /* } */ + if (cy_as_dev) { + /* stop west_brige */ + if (cy_as_dev->dev_handle) { + cy_as_hal_print_message("<r>_cy_as_device: " + "cy_as_misc_destroy_device called\n") ; + if (cy_as_misc_destroy_device(cy_as_dev->dev_handle) != + CY_AS_ERROR_SUCCESS) + cy_as_hal_print_message( + "<1>_cy_as_device: destroying failed\n"); + } + + if (cy_as_dev->hal_tag) { + if (cy_as_hal_c110_pnand_stop(dev_handle_name, cy_as_dev->hal_tag) != 0) + cy_as_hal_print_message("<r>_cy_as_device: stopping C110 PNAND HAL failed\n"); + } + + cy_as_hal_print_message("<r>_cy_as_device:HAL layer stopped\n") ; + } + + /* Init the HAL & CyAsDeviceHandle */ + /* start OMAP HAL init instsnce */ + if (!cy_as_hal_c110_pnand_start(dev_handle_name, &(cy_as_dev->hal_tag), cy_false)) { + cy_as_hal_print_message("<1>_cy_as_device: start C110 HAL failed\n") ; + goto reload_done; + } + + /* Now create the device */ + if (cy_as_misc_create_device(&(cy_as_dev->dev_handle), + cy_as_dev->hal_tag) != CY_AS_ERROR_SUCCESS) { + + cy_as_hal_print_message( + "<1>_cy_as_device: create device failed\n") ; + goto reload_done ; + } +#else + ret = cy_as_misc_reset(cy_as_dev->dev_handle, + cy_as_reset_hard, cy_true, 0, 0); + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message( + "<1>_cy_as_device: cy_as_misc_reset failed. reason code: %d\n", ret) ; + } + + gpio_set_value(WB_RESET, 0); + mdelay(10); + gpio_set_value(WB_RESET, 1); + mdelay(50); + +#endif + if (mtp_mode == 1) + firmware_number = 1; + else if (mtp_mode == 0) + firmware_number = 0; + + f_isStandby = cy_false; + + cy_as_device_init_done = 0; + + cy_as_misc_set_log_level(8); + + cy_as_hal_print_message("<r>_cy_as_device initialize called\n") ; + + + memset(&config, 0, sizeof(config)); + config.dmaintr = cy_true; + + ret = cy_as_misc_configure_device(cy_as_dev->dev_handle, &config) ; + if (ret != CY_AS_ERROR_SUCCESS) { + + cy_as_hal_print_message( + "<1>_cy_as_device: configure device " + "failed. reason code: %d\n", ret) ; + goto reload_done; + } + + ret = cy_as_misc_register_callback(cy_as_dev->dev_handle, + cy_misc_callback) ; + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message("<1>_cy_as_device: " + "cy_as_misc_register_callback failed. " + "reason code: %d\n", ret) ; + goto reload_done; + } + +#if 0 + /* Load the firmware */ + ret = request_firmware(&fw_entry, + "west bridge fw", &westbridge_pd->dev); + if (ret) { + cy_as_hal_print_message("cy_as_device: " + "request_firmware failed return val = %d\n", ret); + } else { + cy_as_hal_print_message("cy_as_device: " + "got the firmware %d size=0x%x\n", ret, fw_entry->size); + + ret = cy_as_misc_download_firmware( + cy_as_dev->dev_handle, + fw_entry->data, + fw_entry->size , + 0, 0) ; + } + release_firmware(fw_entry); +#endif +#ifdef WESTBRIDGE_ANTIOCH_CSP + if (firmware_number == 0) { + cy_as_hal_print_message("<r>reload_fw: firmware_number=0,\ + download firmware cyanfw_sd_mmc_rel_csp_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyanfw_sd_mmc_rel_csp_silicon_array.fw_image, + CYANFW_SD_MMC_REL_CSP_SILICON_SIZE , 0, 0) ; + } else { + cy_as_hal_print_message("<r>reload_fw: firmware_number=0,\ + download firmware cyanfw_mtp_sd_mmc_rel_csp_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyanfw_mtp_sd_mmc_rel_csp_silicon_array.fw_image, + CYANFW_MTP_SD_MMC_REL_CSP_SILICON_SIZE , 0, 0) ; + } +#endif +#ifdef WESTBRIDGE_ANTIOCH + if (firmware_number == 0) { + cy_as_hal_print_message("<r>reload_fw: firmware_number=0,\ + download firmware cyanfw_sd_mmc_rel_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyanfw_sd_mmc_rel_silicon_array.fw_image, + CYANFW_SD_MMC_REL_SILICON_SIZE , 0, 0) ; + } else { + cy_as_hal_print_message("<r>reload_fw: firmware_number=0,\ + download firmware cyanfw_mtp_sd_mmc_rel_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyanfw_mtp_sd_mmc_rel_silicon_array.fw_image, + CYANFW_MTP_SD_MMC_REL_SILICON_SIZE , 0, 0) ; + } +#endif +#ifdef WESTBRIDGE_ASTORIA + if (firmware_number == 0) { + cy_as_hal_print_message( + "<r>reload_fw: firmware_number=0,\ + download firmware cyastfw_sd_mmc_rel_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyastfw_sd_mmc_rel_silicon_array.fw_image, + CYASTFW_SD_MMC_REL_SILICON_SIZE , 0, 0) ; + } else { + cy_as_hal_print_message( + "<r>reload_fw: firmware_number=0,\ + download firmware cyastfw_mtp_sd_mmc_rel_silicon_array image\n") ; + ret = cy_as_misc_download_firmware(cy_as_dev->dev_handle, + cyastfw_mtp_sd_mmc_rel_silicon_array.fw_image, + CYASTFW_MTP_SD_MMC_REL_SILICON_SIZE , 0, 0) ; + } +#endif + + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message("<1>_cy_as_device: cannot download "\ + "firmware. reason code: %d\n", ret) ; + goto reload_done; + } + + /* spin until the device init is completed */ + /* 50 -MAX wait time for the FW load & init + * to complete is 5sec*/ + spin_lim = 500; + + cy_as_hal_create_sleep_channel(&channel) ; + while (!cy_as_device_init_done) { + + cy_as_hal_sleep_on(&channel, 10) ; + + if (spin_lim-- <= 0) { + cy_as_hal_print_message( + "%s: ERROR!: wait for FW init " + "has timed out !!!", __func__); + break; + } + } + cy_as_hal_destroy_sleep_channel(&channel) ; + + if (spin_lim > 0) + cy_as_hal_print_message( + "cy_as_device: astoria firmware is loaded\n") ; +#if 0 + ret = cy_as_misc_get_firmware_version(cy_as_dev->dev_handle, + &ver_data, 0, 0) ; + if (ret != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message("<1>_cy_as_device: cannot get firmware " + "version. reason code: %d\n", ret) ; + goto reload_done; + } + + if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x06)) + str = "nand and SD/MMC." ; + else if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x08)) + str = "nand and CEATA." ; + else if (ver_data.media_type & 0x01) + str = "nand." ; + else if (ver_data.media_type & 0x08) + str = "CEATA." ; + else + str = "SD/MMC." ; + + cy_as_hal_print_message("<1> cy_as_device:_firmware version: %s " + "major=%d minor=%d build=%d,\n_media types supported:%s\n", + ((ver_data.is_debug_mode) ? "debug" : "release"), + ver_data.major, ver_data.minor, ver_data.build, str) ; +#endif + return 0 ; + +reload_done: + return -EINVAL ; +} +EXPORT_SYMBOL(cyasdevice_reload_firmware) ; + +#ifdef __USE_CYAS_AUTO_SUSPEND__ +int cyasdevice_wakeup_thread(int flag) +{ + int retval; + + /* down(&cy_as_device_controller->thread_sleep_sem); */ + down(&cy_as_device_controller->wq_sema); + cy_as_device_controller->thread_sleep_count++; + cy_as_device_controller->thread_sleep_enable = 0; + /* up(&cy_as_device_controller->thread_sleep_sem); */ + retval = cyasdevice_leave_standby(); + /* if (!flag) */ + /* wake_up(&cy_as_device_controller->thread_sleep_wq); */ + + up(&cy_as_device_controller->wq_sema); + + if (retval) { + cyasdevice_reload_firmware(-1); + + if (flag) { + retval = cyasblkdev_start_sdcard(); + if (retval) + cy_as_hal_print_message(KERN_ERR + "%s: cyasblkdev_start_sdcard error %d\n", + __func__, retval); + } + } + + return retval; +} +EXPORT_SYMBOL(cyasdevice_wakeup_thread) ; + +int cyasdevice_enable_thread(void) +{ + /* down(&cy_as_device_controller->thread_sleep_sem); */ + down(&cy_as_device_controller->wq_sema); + cy_as_device_controller->thread_sleep_enable = CYASDEVICE_THREAD_ENABLE; + cy_as_device_controller->thread_sleep_count++; + /* up(&cy_as_device_controller->thread_sleep_sem); */ + wake_up(&cy_as_device_controller->thread_sleep_wq); + up(&cy_as_device_controller->wq_sema); + return 0; +} +EXPORT_SYMBOL(cyasdevice_enable_thread) ; + +int cyasdevice_disable_thread(void) +{ + /* down(&cy_as_device_controller->thread_sleep_sem); */ + down(&cy_as_device_controller->wq_sema); + cy_as_device_controller->thread_sleep_count++; + cy_as_device_controller->thread_sleep_enable = 0; + /* up(&cy_as_device_controller->thread_sleep_sem); */ + /* wake_up(&cy_as_device_controller->thread_sleep_wq); */ + up(&cy_as_device_controller->wq_sema); + + return 0; +} +EXPORT_SYMBOL(cyasdevice_disable_thread) ; + +/* queue worker thread */ +static int cyasdevice_sleep_thread(void *d) +{ + /* cyasdevice *cy_as_dev = (cyasdevice *)cy_as_device_controller; */ + u32 qth_pid; + DECLARE_WAITQUEUE(wait, current); + /* DBGPRN_FUNC_NAME; */ + long ret = 0; + int prev_counter = 0; + int check_retry = 0; + /* + * set iothread to ensure that we aren't put to sleep by + * the process freezing. we handle suspension ourselves. + */ + daemonize("cyasdevice_sleep_thread"); + + /* signal to queue_init() so it could contnue */ + complete(&cy_as_device_controller->thread_sleep_complete); + + down(&cy_as_device_controller->wq_sema); + add_wait_queue(&cy_as_device_controller->thread_sleep_wq, &wait); + + cy_as_device_controller->thread_sleep_flags = CYASDEVICE_THREAD_SUSPENDED; + cy_as_device_controller->thread_sleep_count = 0; + + qth_pid = current->pid; + + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s:%x started, cyasdevice:%p\n", __func__, + qth_pid, cy_as_device_controller) ; + #endif + + do { + /* the thread wants to be woken up by signals as well */ + if (cy_as_device_controller->thread_sleep_flags & CYASDEVICE_THREAD_EXIT) { + #ifdef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR"%s:got SLEEP_T_EXIT flag\n", __func__); + #endif + break; + } + + #if 0 + if (signal_pending(current)) { + ret = -EINTR; + break; + } + #endif + + /* set_current_state(TASK_INTERRUPTIBLE); */ + /* yields to the next rdytorun proc, + * then goes back to sleep*/ + set_current_state(TASK_INTERRUPTIBLE); + up(&cy_as_device_controller->wq_sema); + if (cy_as_device_controller->thread_sleep_flags & CYASDEVICE_THREAD_TIMER) + ret = schedule_timeout(msecs_to_jiffies(CYASDEVICE_STANDBY_TIMEOUT)); + else + schedule(); + + set_current_state(TASK_RUNNING); + /* down(&cy_as_dev->thread_sleep_sem); */ + down(&cy_as_device_controller->wq_sema); + if (cy_as_device_controller->thread_sleep_enable) { + if (cy_as_device_controller->thread_sleep_flags & CYASDEVICE_THREAD_TIMER) { + if (!ret) { /*timeout */ + + if (prev_counter == cy_as_device_controller->thread_sleep_count) + check_retry++; + else + check_retry = 0; + + prev_counter = cy_as_device_controller->thread_sleep_count; + if (check_retry > 3) { + cy_as_device_controller->thread_sleep_flags = CYASDEVICE_THREAD_SUSPENDED; + #ifdef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: chage mode to CYASDEVICE_THREAD_SUSPENDED\n", + __func__); + #endif + } + } else { /* wake_up */ + + if (cy_as_device_controller->cy_work->f_status == 0) { + #ifdef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: chage mode to CYASDEVICE_THREAD_SUSPENDED\n", + __func__); + #endif + cy_as_device_controller->thread_sleep_flags = + CYASDEVICE_THREAD_SUSPENDED; + } + check_retry = 0; + } + } else { + if (cy_as_device_controller->cy_work->f_status) { + #ifdef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: chage mode to CYASDEVICE_THREAD_TIMER\n", + __func__); + #endif + cy_as_device_controller->thread_sleep_flags = CYASDEVICE_THREAD_TIMER; + } + check_retry = 0; + } + } else { + check_retry = 0; + #ifdef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR + "%s: CYASDEVICE_THREAD diabled\n", __func__); + #endif + cy_as_device_controller->thread_sleep_flags = CYASDEVICE_THREAD_SUSPENDED; + } + + if (check_retry > 3) { + check_retry = 0; + /* to do for enter standby mode. */ + /* down(&cy_as_dev->wq_sema); */ + cyasdevice_enter_standby(); + msleep(20); + /* up(&cy_as_dev->wq_sema); */ + } + } while (1); + + set_current_state(TASK_RUNNING); + remove_wait_queue(&cy_as_device_controller->thread_sleep_wq, &wait); + complete_and_exit(&cy_as_device_controller->thread_sleep_complete, 0); + + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_ERR"%s: is finished\n", __func__) ; + #endif + + return 0; +} +#endif +/*init Westbridge device driver **/ +static int __init cyasdevice_init(void) +{ + int retry_count = 3; + int ret_val = 0; + f_isStandby = cy_false; +/* Retry if Westbridge device is failed to initialize */ + do { + ret_val = cyasdevice_initialize(); + if (ret_val == 0) + break; + msleep(100); + } while (--retry_count); + + if (ret_val != 0) + return -ENODEV; + +#ifdef __USE_CYAS_AUTO_SUSPEND__ + { + int ret; + + init_completion( + &cy_as_device_controller->thread_sleep_complete); + init_waitqueue_head(&cy_as_device_controller->thread_sleep_wq); + /* init_MUTEX(&cy_as_device_controller->thread_sleep_sem); */ + sema_init(&cy_as_device_controller->thread_sleep_sem, 1); + + ret = kernel_thread(cyasdevice_sleep_thread, + cy_as_device_controller, CLONE_KERNEL); + if (ret >= 0) { + /* wait until the thread is spawned */ + wait_for_completion( + &cy_as_device_controller->thread_sleep_complete); + + /* reinitialize the completion */ + init_completion( + &cy_as_device_controller->thread_sleep_complete); + ret = 0; + } + } +#endif + + cy_as_device_controller->cy_wq = create_workqueue("wb_queue"); + if (cy_as_device_controller->cy_wq) { + cy_as_device_controller->cy_work = (cy_work_t *)kmalloc(sizeof(cy_work_t), + GFP_KERNEL); + if (cy_as_device_controller->cy_work) { + INIT_DELAYED_WORK( + &cy_as_device_controller->cy_work->work, + cy_wq_function); + cy_as_device_controller->cy_work->f_status = 0x0; + cy_as_device_controller->cy_work->f_reload = 1; + cy_as_device_controller->cy_work->f_isrunning = 0; + +#ifdef __USE_ISR_FOR_SD_DETECT__ + cy_as_hal_configure_sd_isr( + (void *)cy_as_device_controller->hal_tag, + (irq_handler_t) cyasdevice_int_handler); +#endif + if (cy_as_hal_detect_SD()) { + cy_as_hal_print_message( + "<1>%s: SD card scan:\n", __func__) ; + /* queue_delayed_work(cy_as_device_controller->cy_wq, + &cy_as_device_controller->cy_work->work, 10 * HZ); */ + } else { + queue_delayed_work( + cy_as_device_controller->cy_wq, + &cy_as_device_controller->cy_work->work, HZ); + } + + } + } + + return 0; +} + + +static void __exit cyasdevice_cleanup(void) +{ +#ifdef __USE_CYAS_AUTO_SUSPEND__ + cy_as_device_controller->thread_sleep_flags = CYASDEVICE_THREAD_EXIT; + wake_up(&cy_as_device_controller->thread_sleep_wq); + wait_for_completion(&cy_as_device_controller->thread_sleep_complete); +#endif + kfree(cy_as_device_controller->cy_work); + destroy_workqueue(cy_as_device_controller->cy_wq); + +#ifdef __USE_ISR_FOR_SD_DETECT__ + cy_as_hal_free_sd_isr(); +#endif + cyasdevice_deinit(cy_as_device_controller); +} + + +MODULE_DESCRIPTION("west bridge device driver"); +MODULE_AUTHOR("cypress semiconductor"); +MODULE_LICENSE("GPL"); + +module_init(cyasdevice_init); +module_exit(cyasdevice_cleanup); + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/device/cyasdiagnostics.c b/drivers/staging/westbridge/astoria/device/cyasdiagnostics.c new file mode 100644 index 0000000..378eb06 --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/cyasdiagnostics.c @@ -0,0 +1,359 @@ +/* +## cyasdiagnostics.c - Linux Antioch device driver file +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ +#include <linux/fs.h> +#include <linux/ioport.h> +#include <linux/timer.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +#include <linux/scatterlist.h> +#include <linux/mm.h> +#include <linux/irq.h> +#include <linux/gpio.h> +#include <asm/io.h> +#include <linux/clk.h> + +#include <linux/device.h> +#include <linux/sched.h> +#include "cyasdiagnostics.h" + +#include "../include/linux/westbridge/cyashal.h" +#include "../include/linux/westbridge/cyastoria.h" + + +extern uint32_t cy_as_hal_storage_test(cy_as_device_handle dev_p, uint32_t loop_max); + +extern cy_as_device_handle cyasdevice_getdevhandle(void); +extern cy_as_hal_device_tag cyasdevice_gethaltag(void); +extern int cyasdevice_enter_standby(void); +extern int cyasdevice_leave_standby(void); + +extern int CyAsAPIUsbInit(void); +extern int CyAsAPIUsbExit(void); +extern int cyasdevice_reload_firmware(int mtp_mode); + +extern int cyasblkdev_blk_init(int fmajor, int fsearch); +extern void cyasblkdev_blk_exit(void); +extern int cy_as_gadget_init(int fmtp); +extern void cy_as_gadget_cleanup(void); + +#define CYASSTORAGE_MAX_XFER_SIZE (2*32768) +#define MAX_DRQ_LOOPS_IN_ISR 128 + +uint8_t *actdata ; +uint8_t *expdata ; + +uint32_t start_unit; + +int cy_as_diagnostics(cy_as_diag_cmd_type mode, char *result) +{ + uint32_t retVal = 0; +#ifdef __CYAS_SYSFS_FOR_DIAGNOSTICS__ + cy_as_device_handle cyas_hd = cyasdevice_getdevhandle(); + + switch (mode) { + case CY_AS_DIAG_GET_VERSION: + { + cy_as_get_firmware_version_data ver_data = {0}; + const char *str = "" ; + cyasdevice_leave_standby(); + retVal = cy_as_misc_get_firmware_version(cyas_hd, &ver_data, 0, 0) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message( + "cy_as_diagnostics: cannot get firmware version. reason code: %d\n", + retVal) ; + sprintf(result, "fail - %d", retVal); + return retVal; + } + + if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x06)) + str = "nand and SD/MMC." ; + else if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x08)) + str = "nand and CEATA." ; + else if (ver_data.media_type & 0x01) + str = "nand." ; + else if (ver_data.media_type & 0x08) + str = "CEATA." ; + else + str = "SD/MMC." ; + + cyasdevice_enter_standby(); + cy_as_hal_print_message("<1> cy_as_device:_firmware version: %s " + "major=%d minor=%d build=%d,\n_media types supported:%s\n", + ((ver_data.is_debug_mode) ? "debug" : "release"), + ver_data.major, ver_data.minor, ver_data.build, str) ; + sprintf(result, "%d.%d.%d", ver_data.major, ver_data.minor, ver_data.build); + } + break; + + case CY_AS_DIAG_DISABLE_MSM_SDIO: + break; + case CY_AS_DIAG_ENABLE_MSM_SDIO: + break; + case CY_AS_DIAG_ENTER_STANDBY: + cyasdevice_enter_standby(); + break; + case CY_AS_DIAG_LEAVE_STANDBY: + cyasdevice_leave_standby(); + break; + case CY_AS_DIAG_CREATE_BLKDEV: + retVal = cyasblkdev_blk_init(0, 0); + break; + case CY_AS_DIAG_DESTROY_BLKDEV: + cyasblkdev_blk_exit(); + break; + case CY_AS_DIAG_SD_MOUNT: + { + int i; + uint32_t count = 0 ; + int bus = 1 ; + cy_as_storage_query_device_data dev_data ; + cy_as_storage_query_unit_data unit_data = {0} ; + cyasdevice_leave_standby(); + actdata = (uint8_t *)cy_as_hal_alloc(CYASSTORAGE_MAX_XFER_SIZE); + expdata = (uint8_t *)cy_as_hal_alloc(CYASSTORAGE_MAX_XFER_SIZE); + cy_as_hal_mem_set(actdata, 0, CYASSTORAGE_MAX_XFER_SIZE); + cy_as_hal_mem_set(expdata, 0, CYASSTORAGE_MAX_XFER_SIZE); + retVal = cy_as_storage_device_control(cyas_hd, bus, + 0, cy_true, cy_false, cy_as_storage_detect_SDAT_3, 0, 0) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "ERROR: Cannot set Device control - Reason code %d\n", retVal) ; + return retVal; + } + + /* Start the storage API and get a handle to the device we are interested in. */ + retVal = cy_as_storage_start(cyas_hd, 0, 0) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "ERROR: Cannot start storage stack - Reason code %d\n", retVal) ; + return retVal; + } + retVal = cy_as_storage_query_media(cyas_hd, cy_as_media_sd_flash, &count, 0, 0) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "ERROR: Cannot query SD device count - Reason code %d\n", retVal) ; + return retVal; + } + if (!count) { + cy_as_hal_print_message(KERN_ERR"ERROR: SD storage media was not found\n") ; + return retVal; + } else { + cy_as_hal_print_message(KERN_ERR + "SUCCESS: %d SD device(s) found. SD_CLK, SD_CMD, and SD_D0 connected\n", + count) ; + dev_data.bus = 1 ; + dev_data.device = 0 ; + retVal = cy_as_storage_query_device(cyas_hd, &dev_data, 0, 0); + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "ERROR: Cannot query SD device count - Reason code %d\n", retVal) ; + return retVal; + } else { + #if 1 /* skkm */ + retVal = cy_as_storage_change_sd_frequency(cyas_hd, bus, 0x11, 24, 0, 0); + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message( + "%s: Cannot control cy_as_storage_change_sd_frequency - reason [%d]\n", __func__, retVal) ; + } + #endif + cy_as_hal_print_message(KERN_ERR"Checking for SD_WP Connectivity:\n"); + if (dev_data.desc_p.writeable) + cy_as_hal_print_message(KERN_ERR" SD media is not write protected\n") ; + else + cy_as_hal_print_message(KERN_ERR" SD media is write protected %d\n", retVal) ; + unit_data.device = 0 ; + unit_data.unit = 0 ; + unit_data.bus = bus; + retVal = cy_as_storage_query_unit(cyas_hd, &unit_data, 0, 0) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + #ifndef WESTBRIDGE_NDEBUG + cy_as_hal_print_message(KERN_INFO + "%s: cannot query %d device unit - reason code %d\n", + __func__, unit_data.bus, retVal) ; + #endif + return retVal; + } + } + } + cy_as_hal_set_ep_dma_mode(4, false); + cy_as_hal_set_ep_dma_mode(8, false); + start_unit = unit_data.desc_p.unit_size - MAX_DRQ_LOOPS_IN_ISR*2; + for (i = 0 ; i < CYASSTORAGE_MAX_XFER_SIZE ; i++) + expdata[i] = i; + } + break; + + case CY_AS_DIAG_SD_READ: + { + int i; + int bus = 1 ; + struct timespec mStartTime, mEndTime; + long second, nano; + long mDelta; + + mStartTime = CURRENT_TIME; + retVal = cy_as_storage_read( + cyas_hd, bus, 0, 0, start_unit, + actdata, MAX_DRQ_LOOPS_IN_ISR) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR + "ERROR: cannot read from block device - code %d\n", + retVal) ; + break; + } + + mEndTime = CURRENT_TIME; + second = mEndTime.tv_sec - mStartTime.tv_sec; + nano = mEndTime.tv_nsec - mStartTime.tv_nsec; + mDelta = (second*1000000) + nano/1000; + cy_as_hal_print_message("<1>%s: reading speed = %d KByte/s\n", + __func__, + (int)((CYASSTORAGE_MAX_XFER_SIZE*1000)/mDelta)) ; + if (memcmp(expdata, actdata, 2048) != 0) { + int errCnt = 0 ; + cy_as_hal_print_message(KERN_ERR + "++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n") ; + for (i = 0 ; i < 2048 ; i++) { + if (expdata[i] != actdata[i]) { + cy_as_hal_print_message(KERN_ERR "EXP[%d]: 0x%02x\n", i, expdata[i]); + cy_as_hal_print_message(KERN_ERR "ACT[%d]: 0x%02x\n", i, actdata[i]); + errCnt++ ; + if (errCnt > 10) + break; + } + } + cy_as_hal_print_message(KERN_ERR + "++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n") ; + retVal = CY_AS_ERROR_INVALID_RESPONSE; + break; + } else + cy_as_hal_print_message(KERN_ERR "success : storage test\n") ; + + } + break; + case CY_AS_DIAG_SD_WRITE: + { + int i; + int bus = 1 ; + struct timespec mStartTime, mEndTime; + long second, nano; + long mDelta; + for (i = 0 ; i < CYASSTORAGE_MAX_XFER_SIZE ; i++) + expdata[i] = i; + mStartTime = CURRENT_TIME; + retVal = cy_as_storage_write(cyas_hd, bus, 0, 0, start_unit, expdata, MAX_DRQ_LOOPS_IN_ISR) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR "ERROR: cannot write to block device - code %d\n", retVal) ; + break; + } + mEndTime = CURRENT_TIME; + second = mEndTime.tv_sec - mStartTime.tv_sec; + nano = mEndTime.tv_nsec - mStartTime.tv_nsec; + mDelta = (second*1000000) + nano/1000; + cy_as_hal_print_message("<1>%s: writing speed = %d KByte/s\n", + __func__, + (int)((CYASSTORAGE_MAX_XFER_SIZE*1000)/mDelta)) ; + } + break; + case CY_AS_DIAG_SD_UNMOUNT: + cy_as_hal_set_ep_dma_mode(4, true); + cy_as_hal_set_ep_dma_mode(8, true); + + /* Start the storage API and get a handle to the device we are interested in. */ + retVal = cy_as_storage_stop(cyas_hd, 0, 0) ; + if (retVal != CY_AS_ERROR_SUCCESS) { + cy_as_hal_print_message(KERN_ERR"ERROR: Cannot stop storage stack - Reason code %d\n", retVal) ; + return retVal; + } + cy_as_hal_free(actdata); + cy_as_hal_free(expdata); + cyasdevice_enter_standby(); + break; +#if 0 + case CY_AS_DIAG_CONNECT_UMS: + cyasdevice_leave_standby(); + /* cyasblkdev_blk_exit(); */ + + cyasdevice_reload_firmware(0); + /* CyAsHalSelUSBSwitch(1); */ + retVal = CyAsAPIUsbInit(); + if (retVal) { + cy_as_hal_print_message("%s: USB test failed.\n", __func__) ; + return 0; + } else { + msleep(1000); + cy_as_hal_print_message("%s: USB connected.\n", __func__) ; + } + cy_as_hal_print_message("%s: UMS MODE init done\n", __func__) ; + break; + + case CY_AS_DIAG_DISCONNECT_UMS: + + CyAsAPIUsbExit(); + /* CyAsHalSelUSBSwitch(0); */ + cy_as_hal_print_message("%s: UMS mode - close done\n", __func__) ; + + cyasdevice_reload_firmware(1); + /* cyasblkdev_blk_init(0, 0); */ + cyasdevice_enter_standby(); + cy_as_hal_print_message("%s: reload F/W - close done\n", __func__) ; + break; + case CY_AS_DIAG_CONNECT_MTP: + cyasdevice_leave_standby(); + /* CyAsHalSelUSBSwitch(1); */ + cyasblkdev_blk_init(0, 0); + retVal = cy_as_gadget_init(1); + if (retVal) + cy_as_hal_print_message("%s: cy_as_gadget_init failed.\n", __func__) ; + else + cy_as_hal_print_message("%s: cy_as_gadget_init success\n", __func__) ; + cy_as_hal_print_message("%s: Start cy_as_gadget driver - init done\n", __func__) ; + break; + case CY_AS_DIAG_DISCONNECT_MTP: + cyasblkdev_blk_exit(); + cy_as_gadget_cleanup(); + /* CyAsHalSelUSBSwitch(0); */ + cyasdevice_enter_standby(); + cy_as_hal_print_message("%s: cy_as_gadget driver - close done\n", __func__) ; + break; +#endif + case CY_AS_DIAG_TEST_RESET_LOW: + /* cy_as_hal_set_reset_pin(0); */ + cy_as_hal_print_message("%s: cy_as_hal_set_reset_pin - set LOW\n", __func__) ; + break; + + case CY_AS_DIAG_TEST_RESET_HIGH: + /* cy_as_hal_set_reset_pin(1); */ + cy_as_hal_print_message("%s: cy_as_hal_set_reset_pin - set HIGH\n", __func__) ; + break; + default: + cy_as_hal_print_message("%s: unkown mode\n", __func__) ; + break; + + } +#endif + return retVal; +} +EXPORT_SYMBOL(cy_as_diagnostics); + + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/device/cyasdiagnostics.h b/drivers/staging/westbridge/astoria/device/cyasdiagnostics.h new file mode 100644 index 0000000..a1194fc --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/cyasdiagnostics.h @@ -0,0 +1,44 @@ +/* +## cyasdiagnostics.h - Linux Antioch device driver file +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ + +#define __CYAS_SYSFS_FOR_DIAGNOSTICS__ +typedef enum cy_as_diag_cmd_type { + CY_AS_DIAG_GET_VERSION = 1, + CY_AS_DIAG_DISABLE_MSM_SDIO = 2, + CY_AS_DIAG_ENABLE_MSM_SDIO = 3, + CY_AS_DIAG_LEAVE_STANDBY = 4, + CY_AS_DIAG_ENTER_STANDBY = 5, + CY_AS_DIAG_CREATE_BLKDEV = 6, + CY_AS_DIAG_DESTROY_BLKDEV = 7, + CY_AS_DIAG_SD_MOUNT = 11, + CY_AS_DIAG_SD_READ = 12, + CY_AS_DIAG_SD_WRITE = 13, + CY_AS_DIAG_SD_UNMOUNT = 14, + CY_AS_DIAG_CONNECT_UMS = 21, + CY_AS_DIAG_DISCONNECT_UMS = 22, + CY_AS_DIAG_CONNECT_MTP = 31, + CY_AS_DIAG_DISCONNECT_MTP = 32, + CY_AS_DIAG_TEST_RESET_LOW = 40, + CY_AS_DIAG_TEST_RESET_HIGH = 41 +} cy_as_diag_cmd_type; + +/*[]*/ diff --git a/drivers/staging/westbridge/astoria/device/firmware/cyanfw_mtp_sd_mmc_rel_csp_silicon.h b/drivers/staging/westbridge/astoria/device/firmware/cyanfw_mtp_sd_mmc_rel_csp_silicon.h new file mode 100644 index 0000000..108681b --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/firmware/cyanfw_mtp_sd_mmc_rel_csp_silicon.h @@ -0,0 +1,3041 @@ +#define CYANFW_MTP_SD_MMC_REL_CSP_SILICON_SIZE 24270 +union { + uint8_t fw_image[CYANFW_MTP_SD_MMC_REL_CSP_SILICON_SIZE]; + uint16_t dummy_for_word_alignment; +} cyanfw_mtp_sd_mmc_rel_csp_silicon_array = { + { + 0x02, 0x0e, 0x27, 0x02, 0x52, 0x2a, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x4e, 0xf5, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x5c, 0xcb, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x0f, 0xfb, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x10, 0x00, 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0x44, 0x20, + 0xf0, 0x22, 0x90, 0x03, 0x43, 0xe0, 0x44, 0x01, + 0xf0, 0x22} +}; diff --git a/drivers/staging/westbridge/astoria/device/firmware/cyanfw_sd_mmc_rel_csp_silicon.h b/drivers/staging/westbridge/astoria/device/firmware/cyanfw_sd_mmc_rel_csp_silicon.h new file mode 100644 index 0000000..a9de520 --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/firmware/cyanfw_sd_mmc_rel_csp_silicon.h @@ -0,0 +1,2961 @@ +#define CYANFW_SD_MMC_REL_CSP_SILICON_SIZE 23630 +union { + uint8_t fw_image[CYANFW_SD_MMC_REL_CSP_SILICON_SIZE]; + uint16_t dummy_for_word_alignment; +} cyanfw_sd_mmc_rel_csp_silicon_array = { + { + 0x02, 0x12, 0x42, 0x02, 0x52, 0x1e, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x52, 0x3e, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x58, 0xc6, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x47, 0xf8, 0x00, 0x00, 0x00, 0x00, + 0x00, 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0x79, 0xaa, 0xaf, 0x2a, 0x22, 0xf5, 0x9a, + 0x74, 0x00, 0xf5, 0x9b, 0xe4, 0x22, 0xe4, 0x90, + 0x04, 0x2c, 0xf0, 0xa3, 0xf0, 0x22, 0x7b, 0x10, + 0x7a, 0x00, 0x02, 0x1f, 0x09, 0xae, 0x07, 0xed, + 0xf0, 0x02, 0x26, 0x6e, 0x90, 0x00, 0xad, 0xe0, + 0xfd, 0xaf, 0x2a, 0x22, 0x90, 0x00, 0xfd, 0xe0, + 0x44, 0x01, 0xf0, 0x22} +}; diff --git a/drivers/staging/westbridge/astoria/device/firmware/cyanfw_sd_mmc_rel_silicon.h b/drivers/staging/westbridge/astoria/device/firmware/cyanfw_sd_mmc_rel_silicon.h new file mode 100644 index 0000000..8cb8920 --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/firmware/cyanfw_sd_mmc_rel_silicon.h @@ -0,0 +1,2943 @@ +#define CYANFW_SD_MMC_REL_SILICON_SIZE 23488 +union { + uint8_t fw_image[CYANFW_SD_MMC_REL_SILICON_SIZE]; + uint16_t dummy_for_word_alignment; +} cyanfw_sd_mmc_rel_silicon_array = { + { + 0x02, 0x12, 0x3e, 0x02, 0x53, 0xe7, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x54, 0x07, 0x00, 0x00, 0x00, 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+#define CYASTFW_MTP_SD_MMC_REL_SILICON_SIZE 24012 +union { + uint8_t fw_image[CYASTFW_MTP_SD_MMC_REL_SILICON_SIZE]; + uint16_t dummy_for_word_alignment; +} cyastfw_mtp_sd_mmc_rel_silicon_array = { + { + 0x02, 0x0f, 0x1c, 0x02, 0x53, 0x93, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x53, 0xa8, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x5b, 0xa9, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x37, 0xc2, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x21, 0xa3, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 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0x44, 0xec, 0x4d, + 0x4e, 0x4f, 0x22, 0x90, 0x00, 0xc7, 0x12, 0x0c, + 0xc9, 0x78, 0x09, 0x02, 0x0c, 0x39, 0xe4, 0xf5, + 0x32, 0xf5, 0x31, 0xf5, 0x30, 0xf5, 0x2f, 0x22, + 0x12, 0x18, 0x75, 0xe4, 0x90, 0xe6, 0x04, 0xf0, + 0x22, 0xa8, 0x04, 0xa9, 0x05, 0xaa, 0x06, 0xab, + 0x07, 0x22} +}; diff --git a/drivers/staging/westbridge/astoria/device/firmware/cyastfw_sd_mmc_rel_silicon.h b/drivers/staging/westbridge/astoria/device/firmware/cyastfw_sd_mmc_rel_silicon.h new file mode 100644 index 0000000..82e8b1f --- /dev/null +++ b/drivers/staging/westbridge/astoria/device/firmware/cyastfw_sd_mmc_rel_silicon.h @@ -0,0 +1,2821 @@ + +#define CYASTFW_SD_MMC_REL_SILICON_SIZE 22502 +union { + uint8_t fw_image[CYASTFW_SD_MMC_REL_SILICON_SIZE]; + uint16_t dummy_for_word_alignment; +} cyastfw_sd_mmc_rel_silicon_array = { + { + 0x02, 0x10, 0xae, 0x02, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x51, 0x20, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x55, 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0xfc, 0xf0, 0xc2, 0xab, 0xc2, + 0x8e, 0xe5, 0x89, 0x54, 0x0f, 0x44, 0x30, 0xf5, + 0x89, 0x22, 0xc0, 0xe0, 0xc0, 0x83, 0xc0, 0x82, + 0x30, 0x28, 0x0a, 0xc2, 0x28, 0x90, 0x00, 0xfc, + 0x74, 0x04, 0xf0, 0x80, 0x0d, 0x90, 0x00, 0xfc, + 0xe0, 0x60, 0x07, 0x14, 0xf0, 0xe0, 0x70, 0x02, + 0xd2, 0x22, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xe0, + 0x32, 0xe0, 0x90, 0xe2, 0x66, 0xf0, 0x90, 0xe6, + 0x7b, 0xe0, 0x90, 0xe2, 0x69, 0xf0, 0x90, 0xe6, + 0x7b, 0xe0, 0x90, 0xe2, 0x68, 0xf0, 0x90, 0xe6, + 0x7b, 0xe0, 0x90, 0xe2, 0x6b, 0xf0, 0x90, 0xe6, + 0x7b, 0xe0, 0x90, 0xe2, 0x6a, 0xf0, 0x22, 0x90, + 0x04, 0x2a, 0xe0, 0xfe, 0xa3, 0xe0, 0xff, 0xe4, + 0xfc, 0xfd, 0x78, 0x09, 0x12, 0x0c, 0x54, 0xe4, + 0x2f, 0xff, 0xe4, 0x3e, 0xfe, 0xed, 0x34, 0x02, + 0xfd, 0xe4, 0x3c, 0xfc, 0x90, 0x04, 0x41, 0x02, + 0x0c, 0xd9, 0xe0, 0xfe, 0xa3, 0xe0, 0xac, 0x06, + 0x8c, 0x46, 0xf5, 0x47, 0x85, 0x47, 0x82, 0x85, + 0x46, 0x83, 0xa3, 0xa3, 0xe0, 0x78, 0x8b, 0xf2, + 0xee, 0x78, 0xb3, 0xf2, 0x22, 0x90, 0xe6, 0x15, + 0x74, 0x62, 0xf0, 0x90, 0xe6, 0x1b, 0x74, 0x40, + 0xf0, 0x22, 0x90, 0x04, 0x2a, 0xed, 0xff, 0xee, + 0xf0, 0xa3, 0xef, 0xf0, 0x22, 0x90, 0x03, 0x40, + 0xe0, 0xfe, 0xa3, 0xe0, 0xfd, 0xed, 0x8e, 0x27, + 0xf5, 0x28, 0x85, 0x28, 0x82, 0x85, 0x27, 0x83, + 0x22, 0x12, 0x0b, 0xe1, 0x8f, 0x2e, 0x8e, 0x2d, + 0x8d, 0x2c, 0x8c, 0x2b, 0x8f, 0x32, 0x8e, 0x31, + 0x8d, 0x30, 0x8c, 0x2f, 0x22, 0xab, 0x32, 0xaa, + 0x31, 0xa9, 0x30, 0xa8, 0x2f, 0xd3, 0x02, 0x0c, + 0x30, 0x90, 0xe2, 0x0b, 0xe0, 0x54, 0x78, 0x13, + 0x13, 0x13, 0x54, 0x1f, 0x22, 0x90, 0xe2, 0xa4, + 0xf0, 0xe4, 0x90, 0xe2, 0xa6, 0x22, 0x90, 0x03, + 0x41, 0xe0, 0xc4, 0x33, 0x33, 0x54, 0xc0, 0xff, + 0x22, 0x74, 0xc3, 0x90, 0xe2, 0x65, 0xf0, 0x90, + 0xe2, 0x64, 0x22, 0x90, 0x00, 0xdb, 0xe0, 0x25, + 0xe0, 0x25, 0xe0, 0x24, 0xd3, 0xf5, 0x82, 0xe4, + 0x34, 0x00, 0xf5, 0x83, 0x22, 0x90, 0x04, 0x2a, + 0x74, 0xff, 0xf5, 0xf0, 0x02, 0x0b, 0xb0, 0x78, + 0x83, 0x74, 0x02, 0xf2, 0x74, 0x22, 0xf2, 0x74, + 0x16, 0xf2, 0x74, 0x36, 0xf2, 0x22, 0x90, 0x00, + 0xdd, 0xe0, 0x54, 0xfd, 0xf0, 0x90, 0xe2, 0x42, + 0x74, 0x25, 0xf0, 0x22, 0x90, 0x04, 0x2a, 0xe0, + 0xfe, 0xa3, 0xe0, 0xff, 0xe4, 0xfc, 0x22, 0xe4, + 0x90, 0xe2, 0x41, 0xf0, 0xa3, 0xe0, 0x54, 0xfe, + 0xf0, 0x22, 0x90, 0x04, 0x83, 0xf0, 0x90, 0x04, + 0x84, 0x74, 0x12, 0xf0, 0x22, 0x90, 0x04, 0xb6, + 0x12, 0x0c, 0xa1, 0xec, 0x4d, 0x4e, 0x4f, 0x22, + 0x90, 0xe2, 0x31, 0x74, 0x08, 0xf0, 0x90, 0x00, + 0xe8, 0xe0, 0x22, 0x85, 0x2d, 0x82, 0x85, 0x2c, + 0x83, 0xe0, 0xf2, 0x05, 0x2d, 0x22, 0x8d, 0x82, + 0x8c, 0x83, 0xa3, 0xa3, 0xa3, 0xe0, 0xfd, 0x22, + 0x90, 0x03, 0x51, 0xe0, 0xfb, 0xad, 0x28, 0xaf, + 0x27, 0x22, 0x74, 0x74, 0x25, 0x51, 0xf5, 0x82, + 0xe4, 0x34, 0x04, 0x22, 0x85, 0xe8, 0x5a, 0xe4, + 0xf5, 0xe8, 0x02, 0x0e, 0xa1, 0x12, 0x1e, 0xe5, + 0xe4, 0x90, 0xe6, 0x04, 0xf0, 0x22, 0x90, 0xe2, + 0xa4, 0xf0, 0xe4, 0x90, 0xe2, 0xa6, 0x22, 0x78, + 0x34, 0x7c, 0x00, 0x7a, 0x00, 0x79, 0x0c, 0x22, + 0xab, 0x2d, 0xaa, 0x2e, 0xa9, 0x2f, 0xe4, 0xff, + 0x22, 0x90, 0x03, 0x50, 0xe0, 0x90, 0x04, 0x85, + 0xf0, 0x22, 0x90, 0x04, 0x3b, 0x12, 0x0c, 0xa1, + 0x78, 0x09, 0x22, 0x90, 0xe2, 0x33, 0xf0, 0x12, + 0x1e, 0xe5, 0xe4, 0x22, 0xe4, 0x90, 0xe2, 0x1b, + 0xf0, 0x02, 0x1e, 0xe5, 0xc2, 0xe8, 0x90, 0xe6, + 0xb5, 0x74, 0x01, 0xf0, 0x22, 0x90, 0xe2, 0x34, + 0xf0, 0x02, 0x1e, 0xe5, 0x90, 0x00, 0xfd, 0xe0, + 0x44, 0x01, 0xf0, 0x22, 0x90, 0x04, 0xb0, 0xe0, + 0xfd, 0x7c, 0x00, 0x22, 0xe4, 0x78, 0x5c, 0xf2, + 0x78, 0x5e, 0xf2, 0x22, 0x34, 0x01, 0xfe, 0xf0, + 0xa3, 0xef, 0xf0, 0x22} +}; diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h index b695ba1..3f46201 100644 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h +++ b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h @@ -91,13 +91,27 @@ #endif /*****************************/ +#ifdef CONFIG_MACH_C110_WESTBRIDGE_AST_PNAND_HAL + + #ifdef CY_HAL_DEFINED + #error only one HAL layer can be defined + #endif + + #define CY_HAL_DEFINED +/* moved to staging location, eventual implementation + * considered is here + * #include mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h> +*/ + #include "../../../arch/arm/plat-c110/include/mach/westbridge/westbridge-c110-pnand-hal/cyashalc110_pnand.h" + +#endif + /******/ #ifdef __CY_ASTORIA_CUSTOMER_HAL__ #ifdef CY_HAL_DEFINED #error only one HAL layer can be defined #endif -br #define CY_HAL_DEFINED #include "cyashal_customer.h" diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h index df7c2b6..ad60de7 100644 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h +++ b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h @@ -255,6 +255,8 @@ typedef enum cy_as_funct_c_b_type { CY_FUNCT_CB_STOR_GETTRANSFERAMOUNT, /* Data from a CyAsStorageErase call. */ CY_FUNCT_CB_STOR_ERASE, + /* Data from a CyAsStorageStorChangeSDFrequency call. */ + CY_FUNCT_CB_STOR_CHANGE_SD_FREQ, /* Data from a CyAsStorageCancelAsync call. */ CY_FUNCT_CB_ABORT_P2S_XFER, /* Data from a CyAsUsbStart call. */ @@ -516,7 +518,7 @@ typedef struct cy_as_get_firmware_version_data { EXTERN cy_as_return_status_t cy_as_misc_create_device( /* Return value for handle to created device */ - cy_as_device_handle *handle_p, + cy_as_device_handle * handle_p, /* The HAL specific tag for this device */ cy_as_hal_device_tag tag ); @@ -575,7 +577,7 @@ cy_as_misc_configure_device( /* Handle to the device to configure */ cy_as_device_handle handle, /* Configuration information */ - cy_as_device_config *config_p + cy_as_device_config * config_p ); /* Summary @@ -678,7 +680,7 @@ cy_as_misc_get_firmware_version( /* Handle to the device to configure */ cy_as_device_handle handle, /* Return values indicating the firmware version. */ - cy_as_get_firmware_version_data *data, + cy_as_get_firmware_version_data * data, /* Callback to call when the operation is complete. */ cy_as_function_callback cb, /* Client data to be passed to the callback. */ @@ -857,7 +859,7 @@ cy_as_misc_acquire_resource( /* Handle to the device to configure */ cy_as_device_handle handle, /* The resource to acquire */ - cy_as_resource_type *resource, + cy_as_resource_type * resource, /* If true, force West Bridge to release the resource */ cy_bool force, /* Callback to call when the operation is complete. */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h index 773b645..ab4d660 100644 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h +++ b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h @@ -955,6 +955,7 @@ * CY_RQT_SDIO_RESUME * CY_RQT_SDIO_RESET_DEV * CY_RQT_P2S_DMA_START + * CY_RQT_CHANGE_SD_FREQ */ #ifndef __doxygen__ #define CY_RQT_STORAGE_RQT_CONTEXT (2) @@ -1946,6 +1947,34 @@ * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS */ #define CY_RQT_P2S_DMA_START (35) +#if defined(CONFIG_MACH_U1_NA_SPR) || defined(CONFIG_MACH_U1_NA_USCC) +/* Summary + Changes the operating frequency of the SD card dynamically. + + Direction + P Port Processor -> West Bridge + + Length (in transfers) + 1 + + MailBox0 + * Context = 2 + * Request code = 36 + + D0 + Bits 12 - 15 : Bus number + Bits 8 - 11 : Device number + Bits 0 - 7 : Not used + + D1 + Bits 7 - 0 : Clock source setting + Bits 15 - 8 : Clock divider setting + + Responses + * CY_RESP_SUCCESS_FAILURE + */ +#define CY_RQT_CHANGE_SD_FREQ (36) +#endif /******************************************************/ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h index 52b93c3..6e3d4a8 100644 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h +++ b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h @@ -1219,7 +1219,7 @@ cy_as_storage_query_device( /* Handle to the device of interest */ cy_as_device_handle handle, /* Parameters and return value for the query call */ - cy_as_storage_query_device_data *data, + cy_as_storage_query_device_data * data, /* Callback to be called when the operation is complete */ cy_as_function_callback cb, /* Client data to be passed to the callback */ @@ -1288,7 +1288,7 @@ cy_as_storage_query_unit( to be instructed to disable the card detect feature. Also, if the hardware design does not use the SD_WP GPIO of the West Bridge to handle SD card's write protect notch, the handling - of write protection if firmware should be disabled. This API + of write protection if firmware should be disabled. This AP is used to enable/disable the card detect and write protect support in West Bridge firmware. @@ -1432,7 +1432,7 @@ cy_as_storage_read( Notes If the Samsung CEATA drive is the target for a read/write operation, the maximum - number of sectors that can be accessed through a single API + number of sectors that can be accessed through a single AP call is limited to 2047. Longer accesses addressed to a Samsung CEATA drive can result in time-out errors. @@ -1585,7 +1585,7 @@ cy_as_storage_write( Notes If the Samsung CEATA drive is the target for a read/write operation, the maximum - number of sectors that can be accessed through a single API + number of sectors that can be accessed through a single AP call is limited to 2047. Longer accesses addressed to a Samsung CEATA drive can result in time-out errors. @@ -1887,7 +1887,7 @@ cy_as_storage_get_transfer_amount( /* Device number of interest */ uint32_t device, /* Return value containing read/write sector counts. */ - cy_as_m_s_c_progress_data *data_p, + cy_as_m_s_c_progress_data * data_p, /* Callback in case of async call */ cy_as_function_callback cb, /* Client context to pass to the callback */ @@ -2059,7 +2059,7 @@ cy_as_sdio_query_card( /* Device number */ uint32_t device, /* Buffer to store card properties */ - cy_as_sdio_card *data_p + cy_as_sdio_card * data_p ); /* Summary @@ -2534,7 +2534,7 @@ cy_as_sdio_query_function( /* IO function Number */ uint8_t n_function_no, /* Buffer to store function properties */ - cy_as_sdio_func *data_p + cy_as_sdio_func * data_p ); /* Summary @@ -2749,7 +2749,57 @@ cy_as_sdio_resume( uint8_t *data_p ); +/* Summary + Change the operating clock frequency on the SD port. + + Description + This function is used to dynamically change the operating clock + frequency on the SD/MMC port(s) of the West Bridge device. This + function should only be used in consultation with Cypress support, + as setting random clock values can cause errors. + + The device firmware does not remember the clock value specified, + and will only make an instantaneous change to the frequency. If + the SD/MMC card has to be re-initialized due to a remove/insert + event or due to an access error, the frequency will be changed + back to the default value. + * Valid in Asynchronous Callback: Yes + * Valid on Antioch device: Yes + + Returns + * CY_AS_ERROR_SUCCESS - the media information was returned + * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in + * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not + been configured + * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded + into West Bridge + * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been + started + * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in suspend mode + * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with the + West Bridge device + * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available + * CY_AS_ERROR_INVALID_RESPONSE - an error message was recieved from + the firmware +*/ +cy_as_return_status_t +cy_as_storage_change_sd_frequency ( + /* Handle to the West Bridge device. */ + cy_as_device_handle handle, + /* Target bus number on which to make the change. */ + cy_as_bus_number_t bus, + /* Clock source setting (can be 0x03, 0x01 or 0x11). */ + uint8_t clk_source, + /* Factor by which to divide the source clock. The caller + should make sure that the effective clock speed is + greater than or equal to 5 MHz. */ + uint8_t clk_divider, + /* Callback function to call on completion. */ + cy_as_function_callback cb, + /* Client data to send to the callback. */ + uint32_t client + ); /* For supporting deprecated functions */ #include "cyasstorage_dep.h" diff --git a/drivers/staging/westbridge/astoria/switch/Kconfig b/drivers/staging/westbridge/astoria/switch/Kconfig new file mode 100644 index 0000000..507531c --- /dev/null +++ b/drivers/staging/westbridge/astoria/switch/Kconfig @@ -0,0 +1,10 @@ +# +# West Bridge switch driver configuration +# + +config WESTBRIDGE_SWITCH_DRIVER + tristate "West Bridge switch Driver" + default m + help + Include the West Bridge based switch peripheral controller driver + diff --git a/drivers/staging/westbridge/astoria/switch/Makefile b/drivers/staging/westbridge/astoria/switch/Makefile new file mode 100755 index 0000000..811ea74 --- /dev/null +++ b/drivers/staging/westbridge/astoria/switch/Makefile @@ -0,0 +1,9 @@ +# Makefile for the kernel westbridge hal +# +ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) + EXTRA_CFLAGS += -DWESTBRIDGE_NDEBUG +endif + +obj-$(CONFIG_WESTBRIDGE_SWITCH_DRIVER) += cyasswitch.o + + diff --git a/drivers/staging/westbridge/astoria/switch/cyasswitch.c b/drivers/staging/westbridge/astoria/switch/cyasswitch.c new file mode 100644 index 0000000..b6f7625 --- /dev/null +++ b/drivers/staging/westbridge/astoria/switch/cyasswitch.c @@ -0,0 +1,255 @@ +/* cyasswitch.c - West Bridge test module source file +## =========================== +## Copyright (C) 2010 Cypress Semiconductor +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License +## as published by the Free Software Foundation; either version 2 +## of the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin Street, Fifth Floor +## Boston, MA 02110-1301, USA. +## =========================== +*/ +#include <linux/fs.h> +#include <linux/ioport.h> +#include <linux/timer.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +#include <linux/scatterlist.h> +#include <linux/mm.h> +#include <linux/irq.h> +#include <linux/gpio.h> +#include <asm/io.h> +#include <linux/clk.h> + +#include <linux/device.h> +#include <linux/sched.h> + +#include "../include/linux/westbridge/cyashal.h" +#include "../include/linux/westbridge/cyastoria.h" +#include "../device/cyasdiagnostics.h" + +#define CY_AS_DRIVER_DESC "cypress west bridge usb switch" +#define CY_AS_DRIVER_VERSION "REV 0.1" + +extern int cy_as_diagnostics(cy_as_diag_cmd_type mode, char *result); + +static int mode; +module_param(mode, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(mode, "firmware number, change switch=0, UMS=1"); + +char *cyasswitch_buf; + +static int __init cy_as_switch_init(void) +{ + uint32_t retVal = 0; + + cyasswitch_buf = (uint8_t *) cy_as_hal_alloc(4096); + cy_as_hal_mem_set(cyasswitch_buf, 0, 4096); + + switch (mode) { + case 1: + retVal = + cy_as_diagnostics(CY_AS_DIAG_GET_VERSION, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_GET_VERSION failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_GET_VERSION - %s\n", + cyasswitch_buf); + break; + + case 10: + { + int i; + retVal = + cy_as_diagnostics(CY_AS_DIAG_SD_MOUNT, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_MOUNT failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_MOUNT - %s\n", + cyasswitch_buf); + + for (i = 0; i < 4; i++) { + retVal = + cy_as_diagnostics(CY_AS_DIAG_SD_WRITE, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_MOUNT failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_MOUNT - %s KBytes/s\n", + cyasswitch_buf); + + } + + for (i = 0; i < 32; i++) { + retVal = + cy_as_diagnostics(CY_AS_DIAG_SD_READ, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_MOUNT failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_MOUNT - %s KBytes/s\n", + cyasswitch_buf); + + } + + } + break; + + case 20: + retVal = + cy_as_diagnostics(CY_AS_DIAG_CONNECT_UMS, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_CONNECT_UMS failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_CONNECT_UMS - %s\n", + cyasswitch_buf); + break; + + case 30: + retVal = + cy_as_diagnostics(CY_AS_DIAG_CONNECT_MTP, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_CONNECT_MTP failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_CONNECT_MTP - %s\n", + cyasswitch_buf); + break; + + case 40: + cy_as_diagnostics(CY_AS_DIAG_DISABLE_MSM_SDIO, + cyasswitch_buf); + + cy_as_diagnostics(CY_AS_DIAG_LEAVE_STANDBY, + cyasswitch_buf); + + retVal = + cy_as_diagnostics(CY_AS_DIAG_CREATE_BLKDEV, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_CREATE_BLKDEV failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_CREATE_BLKDEV - %s\n", + cyasswitch_buf); + + break; + + default: + cy_as_hal_print_message + ("<1>CyAsSwitch: unkown mode, please run 'rmmod cyasswitch.ko' \n"); + break; + + } + return 0; +} + +module_init(cy_as_switch_init); + +static void __exit cy_as_switch_cleanup(void) +{ + uint32_t retVal = 0; + + switch (mode) { + case 10: + retVal = + cy_as_diagnostics(CY_AS_DIAG_SD_UNMOUNT, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_UNMOUNT failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_SD_UNMOUNT - %s\n", + cyasswitch_buf); + break; + + case 20: + + retVal = + cy_as_diagnostics(CY_AS_DIAG_DISCONNECT_UMS, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_DISCONNECT_UMS failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_DISCONNECT_UMS - %s\n", + cyasswitch_buf); + break; + + case 30: + retVal = + cy_as_diagnostics(CY_AS_DIAG_DISCONNECT_MTP, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_DISCONNECT_MTP failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_DISCONNECT_MTP - %s\n", + cyasswitch_buf); + break; + + case 40: + retVal = + cy_as_diagnostics(CY_AS_DIAG_DESTROY_BLKDEV, + cyasswitch_buf); + if (retVal) + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_DESTROY_BLKDEV failed.\n"); + else + cy_as_hal_print_message + ("<1>CyAsSwitch: CY_AS_DIAG_DESTROY_BLKDEV - %s\n", + cyasswitch_buf); + + cy_as_diagnostics(CY_AS_DIAG_ENTER_STANDBY, + cyasswitch_buf); + + cy_as_diagnostics(CY_AS_DIAG_ENABLE_MSM_SDIO, + cyasswitch_buf); + break; + + default: + break; + } + + cy_as_hal_print_message("<1>CyAsSwitch: exit \n"); + + cy_as_hal_free(cyasswitch_buf); + + return; +} + +module_exit(cy_as_switch_cleanup); + + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION(CY_AS_DRIVER_DESC); +MODULE_AUTHOR("cypress semiconductor"); +/*[]*/ |