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* ARM: gic: Use cpu pm notifiers to save gic stateColin Cross2014-12-301-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | When the cpu is powered down in a low power mode, the gic cpu interface may be reset, and when the cpu cluster is powered down, the gic distributor may also be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the gic cpu interface registers, and the CPU_CLUSTER_PM_ENTER and CPU_CLUSTER_PM_EXIT notifiers to save and restore the gic distributor registers. Merge note: Samsung had already applied the changes to struct gic_chip_data, although it still remains in the .c file instead of having been moved to the header. Original-author: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Conflicts: arch/arm/include/asm/hardware/gic.h Change-Id: I50b5cdd161637ff7b871ac5ffb30d669ec60c662
* samsung opensource update4codeworkx2012-08-031-0/+3
| | | | Change-Id: I9db25f213bb1577c4468873c66b230a0566b6cf2
* samsung update 1codeworkx2012-06-028-38/+1703
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* ARM: dmabounce: fix map_single() error return valueRussell King2011-07-031-1/+1
| | | | | | | When map_single() is unable to obtain a safe buffer, we must return the dma_addr_t error value, which is ~0 rather than 0. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-rmk' of ↵Russell King2011-05-251-1/+1
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable Conflicts: arch/arm/Kconfig arch/arm/mach-exynos4/mach-nuri.c
| * ARM: S5P6442: Removing ARCH_S5P6442Kukjin Kim2011-05-121-1/+1
| | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge branch 'devel-stable' into for-linusRussell King2011-05-231-39/+45
|\ \ | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/mach-ns9xxx/include/mach/uncompress.h
| * | ARM: GIC: Convert GIC library to use the IO relaxed operationsSantosh Shilimkar2011-05-111-24/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GIC register accesses today make use of readl()/writel() which prove to be very expensive when used along with mandatory barriers. This mandatory barriers also introduces an un-necessary and expensive l2x0_sync() operation. On Cortex-A9 MP cores, GIC IO accesses from CPU are direct and doesn't go through L2X0 write buffer. A DSB before writel_relaxed() in gic_raise_softirq() is added to be compliant with the Barrier Litmus document - the mailbox scenario. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com>
| * | ARM: gic: use handle_fasteoi_irq for SPIsWill Deacon2011-05-111-16/+16
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the gic uses handle_level_irq for handling SPIs (Shared Peripheral Interrupts), requiring active interrupts to be masked at the distributor level during IRQ handling. On a virtualised system, only the CPU interfaces are virtualised in hardware. Accesses to the distributor must be trapped by the hypervisor, adding latency to the critical interrupt path in Linux. This patch modifies the GIC code to use handle_fasteoi_irq for handling interrupts, which only requires us to signal EOI to the CPU interface when handling is complete. Cascaded IRQ handling is also updated to use the chained IRQ enter/exit functions to honour the flow control of the parent chip. Note that commit 846afbd1 ("GIC: Dont disable INT in ack callback") broke cascading interrupts by forgetting to add IRQ masking. This is no longer an issue because the unmask call is now unnecessary. Tested on Versatile Express and Realview EB (1176 w/ cascaded GICs). Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Tested-and-acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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*---. \ Merge branches 'consolidate-clksrc', 'consolidate-flash', ↵Russell King2011-05-231-8/+0
|\ \ \ \ | | |_|/ | |/| | | | | | 'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate
| | | * ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizesRussell King2011-05-121-8/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than each platform providing its own function to adjust the zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this adjustment. This ensures that the actual DMA zone size and the ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with each other, and moves this complexity out of the platform code. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clockevents: ARM sp804: obtain sp804 timer rate via clksRussell King2011-05-231-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows platforms to specify the rate of the SP804 clockevent via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clockevents: ARM sp804: allow clockevent name to be specifiedRussell King2011-05-231-4/+5
| | | | | | | | | | | | | | | | | | | | | This allows platforms to specify the clcokevent name upon registration. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clocksource: ARM sp804: obtain sp804 timer rate via clksRussell King2011-05-231-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows platforms to specify the rate of the SP804 clocksource via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clocksource: ARM sp804: allow clocksource name to be specifiedRussell King2011-05-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows platforms to specify the clocksource name upon registration, which is necessary should they wish to register more than one sp804 clocksource. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clocksource: convert ARM 32-bit down counting clocksourcesRussell King2011-05-231-24/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: Use struct syscore_ops instead of sysdevs for PM in common codeRafael J. Wysocki2011-04-241-44/+25
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Convert some ARM architecture's common code to using struct syscore_ops objects for power management instead of sysdev classes and sysdevs. This simplifies the code and reduces the kernel's memory footprint. It also is necessary for removing sysdevs from the kernel entirely in the future. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
* | Merge branch 'fix' of ↵Russell King2011-04-131-2/+2
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes
| * | Fix common misspellingsLucas De Marchi2011-03-311-2/+2
| |/ | | | | | | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* | ARM: 6872/1: arch:common:Makefile Remove unused config in the Makefile.Justin P. Mattock2011-04-101-1/+0
|/ | | | | | | | | | The patch below removes an unused config variable found by using a kernel cleanup script. Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner2011-03-295-12/+10
| | | | | | Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: Reorder irq_set_ function callsThomas Gleixner2011-03-294-5/+5
| | | | | | | | | | | | | | | | | | | | Reorder irq_set_chip() irq_set_chip_data() irq_set_handler() to irq_set_chip() irq_set_handler() irq_set_chip_data() so the next patch can combine irq_set_chip() and irq_set_handler() to irq_set_chip_and_handler(). Automated conversion with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: Cleanup the irq namespaceThomas Gleixner2011-03-295-33/+33
| | | | | | Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: gic: Use proper accessor functionsThomas Gleixner2011-03-291-1/+1
| | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'misc' into develRussell King2011-03-161-13/+59
|\ | | | | | | | | Conflicts: arch/arm/Kconfig
| * ARM: 6777/1: gic: Add hooks for architecture specific extensionsSantosh Shilimkar2011-03-091-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Few architectures combine the GIC with an external interrupt controller. On such systems it may be necessary to update both the GIC registers and the external controller's registers to control IRQ behavior. This can be addressed in couple of possible methods. 1. Export common GIC routines along with 'struct irq_chip gic_chip' and allow architectures to have custom function by override. 2. Provide architecture specific function pointer hooks within GIC library and leave platforms to add the necessary code as part of these hooks. First one might be non-intrusive but have few shortcomings like arch needs to have there own custom gic library. Locks used should be common since it caters to same IRQs etc. Maintenance point of view also it leads to multiple file fixes. The second probably is cleaner and portable. It ensures that all the common GIC infrastructure is not touched and also provides archs to address their specific issue. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Colin Cross <ccross@android.com> Tested-by: Colin Cross <ccross@android.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: irq migration: update GIC migration codeRussell King2011-02-231-13/+12
| | | | | | | | | | | | | | | | | | This cleans up after the conversion to irq_data. Rename the function to match the method, and remove the now useless lookup of the irq descriptor which is never used. Move the bitmask calculation out of the irq_controller_lock region. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6762/1: Update number of VIC for S5P6442 and S5PC100Kukjin Kim2011-02-261-0/+1
| | | | | | | | | | | | | | | | | | The S5P6442 and S5PC100 SoCs have 4 VICs. However, default VIC number is defined 2 in arch/arm/common. So can be happened some problem on it. Basically, it requires for suspend and resume. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6761/1: Update number of VIC for S5PV210Kukjin Kim2011-02-261-0/+1
|/ | | | | | | | The S5PV210 SoC have 4 VICs. It requires for suspend and resume. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-01-155-114/+118
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
| * ARM: sa1111: fix typo in sa1111_retrigger_lowirq()Pavel Machek2011-01-141-1/+1
| | | | | | | | | | Signed-off-by: Pavel Machek <pma@sysgo.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * ARM: vic: irq_data conversion.Lennert Buytenhek2011-01-131-16/+16
| | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
| * ARM: sa1111: irq_data conversion.Lennert Buytenhek2011-01-131-47/+47
| | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
| * ARM: LoCoMo: irq_data conversion.Lennert Buytenhek2011-01-131-12/+12
| | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
| * ARM: ITE 8152: irq_data conversion.Lennert Buytenhek2011-01-131-5/+9
| | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Mike Rapoport <mike@compulab.co.il>
| * ARM: gic: irq_data conversion.Lennert Buytenhek2011-01-131-33/+33
| | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
* | Merge branch 'for-next' of ↵Linus Torvalds2011-01-132-2/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) Documentation/trace/events.txt: Remove obsolete sched_signal_send. writeback: fix global_dirty_limits comment runtime -> real-time ppc: fix comment typo singal -> signal drivers: fix comment typo diable -> disable. m68k: fix comment typo diable -> disable. wireless: comment typo fix diable -> disable. media: comment typo fix diable -> disable. remove doc for obsolete dynamic-printk kernel-parameter remove extraneous 'is' from Documentation/iostats.txt Fix spelling milisec -> ms in snd_ps3 module parameter description Fix spelling mistakes in comments Revert conflicting V4L changes i7core_edac: fix typos in comments mm/rmap.c: fix comment sound, ca0106: Fix assignment to 'channel'. hrtimer: fix a typo in comment init/Kconfig: fix typo anon_inodes: fix wrong function name in comment fix comment typos concerning "consistent" poll: fix a typo in comment ... Fix up trivial conflicts in: - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c) - fs/ext4/ext4.h Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
| * Merge branch 'master' into for-nextJiri Kosina2010-12-221-18/+46
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * | tree-wide: fix comment/printk typosUwe Kleine-König2010-11-012-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | Merge branch 'misc' into develRussell King2011-01-063-191/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * \ \ Merge branch 'smp' into miscRussell King2011-01-061-4/+24
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S arch/arm/mm/ioremap.c
| * | | | ARM: DMA: add support for DMA debuggingRussell King2011-01-061-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ARM support for the DMA debug infrastructure, which allows the DMA API usage to be debugged. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6483/1: arm & sh: factorised duplicated clkdev.cJean-Christop PLAGNIOL-VILLARD2010-11-263-184/+0
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'clksrc' into develRussell King2011-01-051-3/+1
|\ \ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-vexpress/v2m.c arch/arm/plat-omap/counter_32k.c arch/arm/plat-versatile/Makefile
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*-------. \ \ \ Merge branches 'ftrace', 'gic', 'io', 'kexec', 'mod', 'sa11x0', 'sh' and ↵Russell King2011-01-053-21/+203
|\ \ \ \ \ \ \ \ | | |_|_|_|/ / / | |/| | | | / / | | | | | |/ / | | | | |/| / | | | | |_|/ | | | |/| | 'versatile' into devel
| | | | | * ARM: 6432/1: move timer-sp.c from versatile to commonRob Herring2010-11-042-0/+155
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Rob Herring <rob.herring@smooth-stone.com> The timer-sp h/w used on versatile platforms can also be used for other platforms, so move it to a common location. Signed-off-by: Rob Herring <rob.herring@smooth-stone.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: GIC: move enablement of PPI interrupts to gic.cRussell King2010-12-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid adding nasty genirq-specific code to local timers to enable PPI interrupts. Instead, provide a gic function to do this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: GIC: move gic_data[] initialization into gic_init()Russell King2010-12-141-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids writing unnecessarily to gic_data[] from other CPUs, making this a mostly read-only variable. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King2010-12-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_initRussell King2010-12-141-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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