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* Blackfin: mach/bfin_serial_5xx.h: punt now-unused headerMike Frysinger2011-05-281-52/+0
| | | | | | | | Now that the serial code has been unified in bfin_serial.h, and the Blackfin UART driver pushed its resources to the boards files, we don't need these headers anymore. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly lists to latest public infoMike Frysinger2011-05-251-3/+12
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf533/bf537/bf561: convert to BFIN_IRQ helperMike Frysinger2011-05-251-65/+64
| | | | | | | This brings the parts in line with newer ones, and makes things easier to read at a glance. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: clean up style in irq definesMike Frysinger2011-05-251-225/+154
| | | | | | | | | | These files had a lot of whitespace damage, mostly due to copying and pasting original files that had damage. The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so punt them all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify core IRQ definitionsMike Frysinger2011-05-251-116/+1
| | | | | | | Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: kgdb: apply anomaly 257 work aroundSonic Zhang2011-01-101-1/+5
| | | | | | | | | | | When run kgdb testing, it looks like coreb hangs in single step or trap exception without handling anomaly 05000257 properly on bf561 v0.5. But, the anomaly list says it apply to bf561 v0.4 and bellow. Apply its work around to 0.5 temporarily until the behavior and the root cause can be confirmed by the hardware team. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: SMP: add multicore pll handlersMike Frysinger2011-01-101-0/+53
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify pll.h headersMike Frysinger2011-01-101-63/+1
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: rewrite IPI handling to avoid memory allocationYi Li2011-01-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, sending an interprocessor interrupt (IPI) requires building up a message dynamically which means memory allocation. But often times, we will want to send an IPI in low level contexts where allocation is not possible which may lead to a panic(). So create a per-cpu static array for the message queue and use that instead. Further, while we have two supplemental interrupts, we are currently only using one of them. So use the second one for the most common IPI message of all -- smp_send_reschedule(). This avoids ugly contention for locks which in turn would require an IPI message ... In general, this improves SMP performance, and in some cases allows the SMP port to work in places it wouldn't before. Such as the PREEMPT_RT state where the slab is protected by a per-cpu spin lock. If the slab kmalloc/kfree were to put the task to sleep, and that task was actually the IPI handler, then the system falls down yet again. After running some various stress tests on the system, the static limit of 5 messages seems to work. On the off chance even this overflows, we simply panic(), and we can review that scenario to see if the limit needs to be increased a bit more. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: fix mem_map.h SMP overridesGraf Yang2011-01-101-7/+9
| | | | | | | | | The BF561 mem_map.h header has the __ASSEMBLY__/CONFIG_SMP checks out of order which leads to build errors for assembly code that happens to include this file. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: tweak platform_request_ipi() usageGraf Yang2011-01-101-1/+3
| | | | | | | | | | This function takes an irq_handler_t function, but the prototype in the header doesn't match the function definition. This is due to the smp headers needing to avoid circular dependencies. So change the function to take a simple pointer. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: update a few more SIC_SYSCR locationsMike Frysinger2011-01-101-12/+12
| | | | | | Looks like I missed a few new spots when renaming the SICA macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: drop asm/irq.h include from mach headersMike Frysinger2011-01-101-3/+0
| | | | | | | These were only included because of the irq handling of the PLL funcs, and those PLL funcs have been moved out into their own header now. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: clean up mach header includesMike Frysinger2011-01-103-21/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The main asm/blackfin.h header will pull in mach/blackfin.h to get all the fun Blackfin defines. So having any of the sub-mach headers trying to include asm/blackfin.h makes no sense -- punt it. The mach/blackfin.h header takes care of including the part-specific def headers which in turn will include any other needed def file. Similarly, it takes care of pulling in the part-specific cdef header. So move this logic out of the blackfin.h when necessary. Further, make sure the cdef headers do not waste time including the def headers again. Since all parts need the common def/cdef headers, move this logic out of the part-specific headers and into the mach/blackfin.h file. Finally, we need to split the BF539 def header since the BF538 does not have MXVR and we don't want to expose those MMRs. So now all parts should have the same behavior: mach/blackfin.h asm/def_LPBlackfin.h part-specific def.h if ! asm asm/cdef_LPBlackfin.h part-specific cdef.h And the sub def/cdef headers only tail into what they need. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: push gpio (port) defines into common headersMike Frysinger2011-01-102-38/+2
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: standardize DMAC traffic control MMRs & MDMA MMRsMike Frysinger2011-01-102-444/+330
| | | | | | | | | | Use the same naming convention for DMA traffic MMRs (most were legacy anyways) so we can avoid useless ifdef trees. Same goes for MDMA names -- this actually allows us to undo a bunch of ifdef redirects that existed for this purpose alone. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_serial.h: unify heavily duplicated serial codeMike Frysinger2011-01-104-164/+16
| | | | | | | | Each Blackfin port has been duplicating UART structures and defines when there really is no need for it. So start a new bfin_serial.h header to unify all these pieces and give ourselves a fresh start. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: rewrite SICA_xxx to just SIC_xxxMike Frysinger2010-10-223-85/+61
| | | | | | | This matches all the other Blackfin ports and keep us from having to write bf561-specific code in many places. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: punt short SPI MMR bit namesMike Frysinger2010-10-221-57/+0
| | | | | | | Now that the common header defines everything and the SPI drivers are using it, we can drop these duplicated global namespace polluters. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: Rename IRQ flags handling functionsDavid Howells2010-10-071-4/+4
| | | | | | | | | | | | | | | Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by: David Howells <dhowells@redhat.com>
* Blackfin: Split PLL code from mach-specific cdef headersDavid Howells2010-10-072-50/+63
| | | | | | | Split the PLL control code from the Blackfin machine-specific cdef headers so that the irqflags functions can be renamed without incurring a header loop. Signed-off-by: David Howells <dhowells@redhat.com>
* Blackfin: punt duplicate SPORT MMR definesMike Frysinger2010-08-271-60/+0
| | | | | | | The common bfin_sport.h header now has unified definitions of these, so stop polluting the global namespace. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: gpio/portmux: clean up whitespace corruptionMike Frysinger2010-08-062-49/+49
| | | | | | | Random tabs instead of spaces, mixes of the two, and unicode spaces instead of ascii spaces. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CSMike Frysinger2010-08-061-0/+1
| | | | | | | This is parallel to the existing P_DEFAULT_BOOT_SPI_CS, but in terms of the GPIO value so it can be used with the normal gpio API. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly lists to latest public infoMike Frysinger2010-08-061-4/+9
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: increase NR_IRQS beyond NR on-chip IRQsMichael Hennerich2010-03-091-1/+2
| | | | | | | This makes room for off-chip IRQ controllers. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: make core timers per-cpu clock events for HRTYi Li2010-03-091-0/+2
| | | | | | | | | | | | | | | SMP systems require per-cpu local clock event devices in order to enable HRT support. One a BF561, we can use local core timer for this purpose. Originally, there was one global core-timer clock event device set up for core A. To accomplish this feat, we need to split the gptimer0/core timer logic so that each is a standalone clock event. There is no requirement that we only have one clock event source anyways. Once we have this, we just define per-cpu clock event devices for each local core timer. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify DMA masksMike Frysinger2009-12-151-47/+0
| | | | | | | Every Blackfin variant has the same DMA bit masks, so avoid duplicating them over and over in each mach header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify duplicated power masksMike Frysinger2009-12-151-54/+0
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly listsMike Frysinger2009-11-251-5/+20
| | | | | | | | Add some recently documented anomalies (473, 474, 475, 477). Also stick a "do not edit" notice in here so people know these are copies of some master version. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: mass clean up of copyright/licensing infoRobin Getz2009-10-079-160/+25
| | | | | | | | | | | | | | | | | | Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly listsYi Li2009-09-161-0/+2
| | | | | Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix wrong CTS inversionSonic Zhang2009-07-161-1/+1
| | | | | | | | The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: handle BF561 Core B memory regions better when SMP=nMike Frysinger2009-07-161-1/+22
| | | | | | | | | Rather than assume Core B is always run with caches turned on, let people load into any of the on-chip memory regions. It is their business how the SRAM/Cache regions are utilized, so don't prevent them from being able to load into them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly lists to match latest sheets/usageGraf Yang2009-07-161-0/+1
| | | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify memory map headersMike Frysinger2009-06-222-16/+43
| | | | | | | | | | Many aspects of the Blackfin memory map is exactly the same across all variants. Rather than copy and paste all of these duplicated values in each header, unify all of these into the common Blackfin memory map header file. In the process, push down BF561 SMP specific stuff to the BF561 specific header to keep the noise down. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly listsMike Frysinger2009-06-221-43/+46
| | | | | | Update anomaly headers to match latest released anomaly sheets. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add MDMA defines to make cross-variant coding easierGraf Yang2009-06-122-0/+85
| | | | | | | | Add some defines to make the BF538/BF561 look like most other Blackfin parts in that it has a MDMA0 channel available for low level init. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: pull updated anomaly lists from toolchainMike Frysinger2009-06-121-8/+17
| | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* tty: Blackin CTS/RTSSonic Zhang2009-04-071-3/+6
| | | | | | | | | | | | | | | Both software emulated and hardware based CTS and RTS are enabled in serial driver. The CTS RTS PIN connection on BF548 UART port is defined as a modem device not as a host device. In order to test it under Linux, please nake a cross UART cable to exchange CTS and RTS signal. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Change hardware flow control from poll to interrupt drivenSonic Zhang2009-04-071-20/+0
| | | | | | | | | | Only the CTS bit is affected. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Blackfin arch: add stubs for anomalies 447 and 448Mike Frysinger2009-03-061-0/+2
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: update anomaly sheets to match latest public infoMike Frysinger2009-03-041-2/+2
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - Error if one serial has hardware flow control and ↵Tom Parker2009-03-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the other doesn't I have a system where UART0 is configured with hardware flow control, but UART1 doesn't have it enabled. Attempting to access UART1 in this configuration results in the following error in dmesg: <3>bfin-gpio: GPIO 0 is already reserved as Peripheral by bfin-uart ! <5>Stack from 0082bc7c: <5> 0082bc88 00404dd6 00000003 00000000 0054051e 004079da 0082bcb4 00000000 <5> 00000003 00000000 0052686c 0113f2a0 005fa3f0 00000032 20515249 00003035 <5> 00427228 00526e50 0113f2e0 005fa3f0 00000032 0113f2e0 0054b748 0000ffff <5> 22222222 22222222 004e1628 00427304 00000000 00000032 00000023 0054b748 <5> 00487a94 0054b7e8 0054b748 0000000b 00487fb8 0054b748 0054b748 00000001 <5> 0000000a 005fa3f0 009d4fe8 0101e3c0 0054b748 005fa3f0 0050b134 0054b748 <5> <5>Call Trace: <4>[<00485c16>] _uart_startup+0x56/0x178 <4>[<004865c8>] _uart_open+0x40/0x3e0 <4>[<0048661c>] _uart_open+0x94/0x3e0 <4>[<0047f1ce>] _init_dev+0x1fa/0x450 <4>[<004e1628>] ___mutex_unlock_slowpath+0x30/0xe8 <4>[<004815da>] _tty_open+0xf6/0x21c <4>[<0043dab0>] ___path_lookup_intent_open+0x34/0x7c <4>[<004375e4>] _chrdev_open+0x7c/0x134 <4>[<0043dc2c>] _open_namei+0x60/0x568 <4>[<00433fa2>] ___dentry_open+0x9e/0x188 <4>[<00437568>] _chrdev_open+0x0/0x134 <4>[<0043410c>] _nameidata_to_filp+0x30/0x3c <4>[<00434152>] _do_filp_open+0x3a/0x44 <4>[<00408826>] _task_running_tick+0x102/0x278 <4>[<0043418e>] _do_sys_open+0x32/0xac <4>[<0043ede4>] _sys_ioctl+0x28/0x50 <4>[<0043edbc>] _sys_ioctl+0x0/0x50 <4>[<00434224>] _sys_open+0x18/0x20 <4>[<0043420c>] _sys_open+0x0/0x20 <4>[<00418174>] _sys_setuid+0x0/0xc8 This is because the #ifdef's in bfin_serial_5xx.h are messed up. More specifically, they add/remove the uart_{rts,cts}_pin fields in bfin_serial_resources based on whether the particular port has rts/cts enabled, as opposed to when either port has it enabled. This patch fixed this. Signed-off-by: Tom Parker <blackfin@tevp.net> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix compile failure when missing the anomaly definitionMike Frysinger2009-03-031-0/+1
| | | | | | | | make sure ANOMALY_05000278/ANOMALY_05000380 is defined for all parts Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Add BF561 PPI POLS, POLC MasksMichael Hennerich2009-02-041-0/+2
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrdSonic Zhang2009-02-041-0/+1
| | | | | | | | | | | | | | [Mike Frysinger <vapier.adi@gmail.com>: - setup P_DEFAULT_BOOT_SPI_CS for every arch based on the default bootrom behavior and convert all our boards to it - revert previous anomaly change ... bf51x is not affected by anomaly 05000353] Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: merge adeos blackfin part to arch/blackfin/Yi Li2009-01-071-4/+4
| | | | | | | | | | | | | | | | | | [Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: update anomaly headers to match latest sheetsMike Frysinger2009-01-071-1/+12
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Remove wasted SIR header filesGraf Yang2009-01-071-125/+0
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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