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* m68k: merge m68k and m68knommu arch directoriesGreg Ungerer2011-03-2516-1980/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a lot of common code that could be shared between the m68k and m68knommu arch branches. It makes sense to merge the two branches into a single directory structure so that we can more easily share that common code. This is a brute force merge, based on a script from Stephen King <sfking@fdwdc.com>, which was originally written by Arnd Bergmann <arnd@arndb.de>. > The script was inspired by the script Sam Ravnborg used to merge the > includes from m68knommu. For those files common to both arches but > differing in content, the m68k version of the file is renamed to > <file>_mm.<ext> and the m68knommu version of the file is moved into the > corresponding m68k directory and renamed <file>_no.<ext> and a small > wrapper file <file>.<ext> is used to select between the two version. Files > that are common to both but don't differ are removed from the m68knommu > tree and files and directories that are unique to the m68knommu tree are > moved to the m68k tree. Finally, the arch/m68knommu tree is removed. > > To select between the the versions of the files, the wrapper uses > > #ifdef CONFIG_MMU > #include <file>_mm.<ext> > #else > #include <file>_no.<ext> > #endif On top of this file merge I have done a simplistic merge of m68k and m68knommu Kconfig, which primarily attempts to keep existing options and menus in place. Other than a handful of options being moved it produces identical .config outputs on m68k and m68knommu targets I tested it on. With this in place there is now quite a bit of scope for merge cleanups in future patches. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: external interrupt support to ColdFire intc-simr controllerGreg Ungerer2011-03-151-4/+110
| | | | | | | | | | The EDGE Port module of some ColdFire parts using the intc-simr interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: external interrupt support to ColdFire intc-2 controllerGreg Ungerer2011-03-151-4/+81
| | | | | | | | | | The EDGE Port module of some ColdFire parts using the intc-2 interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: limit interrupts supported by ColdFire intc-simr driverGreg Ungerer2011-03-151-23/+24
| | | | | | | | | | The intc-simr interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move some init code out of unmask routine for ColdFire intc-2Greg Ungerer2011-03-151-15/+32
| | | | | | | | Use a proper irq_startup() routine to intialize the interrupt priority and level register in the ColdFire intc-2 controller code. We shouldn't be checking if the priority/level has been set on every unmask operation. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: limit interrupts supported by ColdFire intc-2 driverGreg Ungerer2011-03-151-33/+25
| | | | | | | | | | The intc-2 interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up use of MBAR for DRAM registers on ColdFire startGreg Ungerer2011-03-151-3/+3
| | | | | | | | | | | | In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove use of MBAR in old-style ColdFire timerGreg Ungerer2011-03-151-2/+2
| | | | | | | | | Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move ColdFire DMA register addresses to per-cpu headersGreg Ungerer2011-03-151-4/+4
| | | | | | | | | | | The base addresses of the ColdFire DMA unit registers belong with all the other address definitions in the per-cpu headers. The current definitions assume they are relative to an MBAR register. Not all ColdFire CPUs have an MBAR register. A clean address define can only be acheived in the per-cpu headers along with all the other chips peripheral base addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove MBAR and IPSBAR hacks for the ColdFire 520x CPUsGreg Ungerer2011-03-151-2/+2
| | | | | | | | | | The ColdFire 5207 and 5208 CPUs have fixed peripheral addresses. They do not use the setable peripheral address registers like the MBAR and IPSBAR used on many other ColdFire parts. Don't use fake values of MBAR and IPSBAR when using peripheral addresses for them, there is no need to. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move ColdFire PIT timer base addressesGreg Ungerer2011-03-151-1/+1
| | | | | | | | | | | | The PIT hardware timer module used in some ColdFire CPU's is not always addressed relative to an IPSBAR register. Parts like the ColdFire 5207 and 5208 have fixed peripheral addresses. So lets not define the register addresses of the PIT relative to an IPSBAR definition. Move the base address definitions into the per-part headers. This is a lot more consistent since all the other peripheral base addresses are defined in the per-part header files already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove kludge seting of MCF_IPSBAR for ColdFire 54xxGreg Ungerer2011-03-151-8/+6
| | | | | | | | | | | | | | | The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: Convert coldfire intc-simr irq_chip to newThomas Gleixner2011-03-151-6/+12
| | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: Convert coldfire intc-2 irq_chip to newThomas Gleixner2011-03-151-6/+10
| | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: Convert coldfire intc irq_chip to newThomas Gleixner2011-03-151-10/+10
| | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix use of un-defined _TIF_WORK_MASKGreg Ungerer2011-02-081-1/+0
| | | | | | | | | | | | | | The _TIF_WORK_MASK definition was removed in the clean up of MMU and non-MMU arch/m68k/include/asm/thread_info*.h files (this was commit cddafa3500fde4a07e5bf899ec97a04069f8f7ce, "merge MMU and non-MMU thread_info.h"). It didn't get cleaned out of the entry.S code for the 68328 and 68360 based platforms. And it was replaced by a hard coded constant mask for coldfire platforms. There is currently no need to mask any of these bits, so fix all uses (and former uses) to check for any non-zero value. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-01-184-53/+81
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (25 commits) m68knommu: fix broken setting of irq_chip and handler m68knommu: switch to using -mcpu= flags for ColdFire targets m68knommu: arch/m68knommu/Kconfig whitespace cleanup m68knommu: create optimal separate instruction and data cache for ColdFire m68knommu: support ColdFire caches that do copyback and write-through m68knommu: support version 2 ColdFire split cache m68knommu: make cache push code ColdFire generic m68knommu: clean up ColdFire cache control code m68knommu: move inclusion of ColdFire v4 cache registers m68knommu: merge bit definitions for version 3 ColdFire cache controller m68knommu: create bit definitions for the version 2 ColdFire cache controller m68knommu: remove empty __iounmap() it is no used m68knommu: remove kernel_map() code, it is not used m68knommu: remove do_page_fault(), it is not used m68knommu: use user stack pointer hardware on some ColdFire cores m68knommu: remove command line printing DEBUG m68knommu: remove fasthandler interrupt code m68knommu: move UART addressing to part specific includes m68knommu: fix clock rate value reported for ColdFire 54xx parts m68knommu: move ColdFire CPU names into their headers ...
| * m68knommu: make cache push code ColdFire genericGreg Ungerer2011-01-052-1/+49
| | | | | | | | | | | | | | | | | | | | | | | | Currently the code to push cache lines is only available to version 4 cores. Version 3 cores may also need to use this if we support copy- back caches on them. Move this code to make it more generic, and useful for all version ColdFire cores. With this in place we can now have a single cache_flush_all() code path that does all the right things on all version cores. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: clean up ColdFire cache control codeGreg Ungerer2011-01-051-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cache control code for the ColdFire CPU's is a big ugly mess of "#ifdef"ery liberally coated with bit constants. Clean it up. The cache controllers in the various ColdFire parts are actually quite similar. Just differing in some bit flags and options supported. Using the header defines now in place it is pretty easy to factor out the small differences and use common setup and flush/invalidate code. I have preserved the cache setups as they where in the old code (except where obviously wrong - like in the case of the 5249). Following from this it should be easy now to extend the possible setups used on the CACHE controllers that support split cacheing or copy-back or write through options. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: use user stack pointer hardware on some ColdFire coresGreg Ungerer2011-01-051-20/+10
| | | | | | | | | | | | | | | | | | The more modern ColdFire parts (even if based on older version cores) have separate user and supervisor stack pointers (a7 register). Modify the ColdFire CPU setup and exception code to enable and use this on parts that have it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove fasthandler interrupt codeGreg Ungerer2011-01-051-27/+1
| | | | | | | | | | | | | | There are no users of the old "fasthandler" interrupt entry code. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: make Coldfire 548x support more genericGreg Ungerer2011-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The ColdFire 547x family of processors is very similar to the ColdFire 548x series. Almost all of the support for them is the same. Make the code supporting the 548x more gneric, so it will be capable of supporting both families. For the most part this is a renaming excerise to make the support code more obviously apply to both families. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: Handle multiple pending signalsAl Viro2011-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | we shouldn't bugger off to userland when there still are pending signals; among other things it makes e.g. SIGSEGV triggered by failure to build a sigframe to be delivered _now_ and not when we hit the next syscall or interrupt. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | m68knommu: Switch to saner sigsuspendAl Viro2011-01-071-2/+1
|/ | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2010-10-256-24/+201
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits) m68knommu: convert to using tracehook_report_syscall_* m68knommu: some boards use fixed phy for FEC ethernet m68knommu: support the external GPIO based interrupts of the 5272 m68knommu: mask of vector bits in exception word properly m68knommu: change to new flag variables m68knommu: Fix MCFUART_TXFIFOSIZE for m548x. m68knommu: add basic mmu-less m548x support m68knommu: .gitignore vmlinux.lds m68knommu: stop using __do_IRQ m68knommu: rename PT_OFF_VECTOR to PT_OFF_FORMATVEC. m68knommu: add support for Coldfire 547x/548x interrupt controller m68k{nommu}: Remove unused DEFINE's from asm-offsets.c m68knommu: whitespace cleanup in 68328/entry.S m68knommu: Document supported chips in intc-2.c and intc-simr.c. m68knommu: fix strace support for 68328/68360 m68knommu: fix default starting date arch/m68knommu: Removing dead 68328_SERIAL_UART2 config option arch/m68knommu: Removing dead RAM_{16,32}_MB config option arch/m68knommu: Removing dead M68KFPU_EMU config option arch/m68knommu: Removing dead RELOCATE config option ...
| * m68knommu: convert to using tracehook_report_syscall_*Greg Ungerer2010-10-221-2/+2
| | | | | | | | | | | | | | Break up syscall_trace() into separate entry and exit routines that use tracehook_report_syscall_entry() and tracehook_report_syscall_exit(). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: change to new flag variablesmatt mooney2010-10-211-2/+2
| | | | | | | | | | | | | | Replace EXTRA_CFLAGS with ccflags-y and EXTRA_AFLAGS with asflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: add basic mmu-less m548x supportPhilippe De Muyter2010-10-212-0/+146
| | | | | | | | | | | | | | | | | | | | | | | | Add a very basic mmu-less support for coldfire m548x family. This is perhaps also valid for m547x family. The port comprises the serial, tick timer and reboot support. The gpio part compiles but is empty. This gives a functional albeit limited linux for the m548x coldfire family. This has been tested on a Freescale M548xEVB Lite board with a M5484 processor and the default dbug monitor. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: stop using __do_IRQGreg Ungerer2010-10-213-14/+15
| | | | | | | | | | | | | | | | | | | | | | The use of __do_IRQ is deprecated, so lets stop using it. Generally the interrupts on the supported processors here are level triggered, so this is strait forward to switch over to using the standard handle_level_irq flow handler. (Although some ColdFire parts support edge triggered GPIO line interrupts we have no support for them yet). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: add support for Coldfire 547x/548x interrupt controllerPhilippe De Muyter2010-10-211-8/+32
| | | | | | | | | | | | | | | | | | | | The Coldfire MCF547x/MCF548x have the same interrupt controller as the MCF528x e.g., but only one, not two as in the MCF528x. Modify intc-2.c to support only one interrupt controller if MCFICM_INTC1 is not defined. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Document supported chips in intc-2.c and intc-simr.c.Philippe De Muyter2010-10-212-1/+7
| | | | | | | | | | | | | | | | | | The chips lists were in commit logs, but should also be in source files. This way it is easier to choose the right source file for a not yet supported Coldfire. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | Merge branch 'for-linus' of ↵Linus Torvalds2010-10-221-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Add missing I/O macros {in,out}{w,l}_p() for !CONFIG_ISA m68k: Remove big kernel lock in cache flush code m68k: __pa(): cast arg to long fbdev: atafb - Remove undead ifdef ATAFB_FALCON zorro: Fix device_register() error handling fbdev/m68k: Fix section mismatches in q40fb.c m68k/m68knommu: merge the MMU and non-MMU traps.h m68k/m68knommu: merge MMU and non-MMU thread_info.h m68k/m68knommu: merge MMU and non-MMU atomic.h m68k/m68knommu: clean up page.h m68k/m68knommu: merge machdep.h files into a single file m68k/m68knommu: merge MMU and non-MMU string.h m68k/m68knommu: Remove dead SMP config option m68k: move definition of THREAD_SIZE into thread_info_mm.h m68k: Use asm-generic/ioctls.h (enables termiox) m68k: Remove dead GG2 config option
| * | m68k/m68knommu: merge MMU and non-MMU thread_info.hGreg Ungerer2010-10-221-2/+2
| |/ | | | | | | | | | | | | | | The MMU and non-MMU versions of thread_info.h are quite similar. Merge the two files. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | Fix IRQ flag handling namingDavid Howells2010-10-071-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration, it maps: local_irq_enable() -> raw_local_irq_enable() local_irq_disable() -> raw_local_irq_disable() local_irq_save() -> raw_local_irq_save() ... and under the other configuration, it maps: raw_local_irq_enable() -> local_irq_enable() raw_local_irq_disable() -> local_irq_disable() raw_local_irq_save() -> local_irq_save() ... This is quite confusing. There should be one set of names expected of the arch, and this should be wrapped to give another set of names that are expected by users of this facility. Change this to have the arch provide: flags = arch_local_save_flags() flags = arch_local_irq_save() arch_local_irq_restore(flags) arch_local_irq_disable() arch_local_irq_enable() arch_irqs_disabled_flags(flags) arch_irqs_disabled() arch_safe_halt() Then linux/irqflags.h wraps these to provide: raw_local_save_flags(flags) raw_local_irq_save(flags) raw_local_irq_restore(flags) raw_local_irq_disable() raw_local_irq_enable() raw_irqs_disabled_flags(flags) raw_irqs_disabled() raw_safe_halt() with type checking on the flags 'arguments', and then wraps those to provide: local_save_flags(flags) local_irq_save(flags) local_irq_restore(flags) local_irq_disable() local_irq_enable() irqs_disabled_flags(flags) irqs_disabled() safe_halt() with tracing included if enabled. The arch functions can now all be inline functions rather than some of them having to be macros. Signed-off-by: David Howells <dhowells@redhat.com> [X86, FRV, MN10300] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [Tile] Signed-off-by: Michal Simek <monstr@monstr.eu> [Microblaze] Tested-by: Catalin Marinas <catalin.marinas@arm.com> [ARM] Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> [AVR] Acked-by: Tony Luck <tony.luck@intel.com> [IA-64] Acked-by: Hirokazu Takata <takata@linux-m32r.org> [M32R] Acked-by: Greg Ungerer <gerg@uclinux.org> [M68K/M68KNOMMU] Acked-by: Ralf Baechle <ralf@linux-mips.org> [MIPS] Acked-by: Kyle McMartin <kyle@mcmartin.ca> [PA-RISC] Acked-by: Paul Mackerras <paulus@samba.org> [PowerPC] Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [S390] Acked-by: Chen Liqin <liqin.chen@sunplusct.com> [Score] Acked-by: Matt Fleming <matt@console-pimps.org> [SH] Acked-by: David S. Miller <davem@davemloft.net> [Sparc] Acked-by: Chris Zankel <chris@zankel.net> [Xtensa] Reviewed-by: Richard Henderson <rth@twiddle.net> [Alpha] Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> [H8300] Cc: starvik@axis.com [CRIS] Cc: jesper.nilsson@axis.com [CRIS] Cc: linux-cris-kernel@axis.com
* m68knommu: fix invalid flags on coldfire pit clocksourcejohn stultz2010-01-161-1/+0
| | | | | | | | | | | | | | | | | The m68knommu coldfire pit clocksource looks like it was incorrectly marked as a continuous clocksource. Running with it marked as a continuous clocksource could cause hangs when the system switches to highres mode or enables nohz. This patch removes the CLOCK_SOURCE_IS_CONTINUOUS flag on the coldfire pit clocksource. This will disallow systems using this clocksource from entering oneshot mode (disabling highres timers and nohz). Signed-off-by: John Stultz <johnstul@us.ibm.com> Acked-by: Greg Ungerer <gerg@snapgear.com> Cc: Steven King <sfking@fdwdc.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* m68knommu: export clk_* symbols in clk.cSteven King2009-12-041-1/+6
| | | | | | | | export the clk_* stubs defined in arch/m68knommu/platform/coldfire/clk.c so they can be used by modules. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@goober.(none)>
* m68knommu: add uboot commandline argument passing supportLennart Sorensen2009-12-041-0/+10
| | | | | | | | | | | | | | | | This patch adds m68knommu support for getting the kernel command line arguments from uboot, including the passing of an initrd image from uboot. We use this on a 5270/5271 based board, and have used it on the 5271evb development board. It is based on a patch found in the linux-2.6-denx git tree, although that tree seems to have had lots of other changes since which are not in the main Linus kernel. I believe this will work on all coldfires, although other m68knommu might be missing the _init_sp stuff in head.S as far as I can tell. I only have the coldfire to test on. Signed-off-by: Lennart Sorensen <lsorense@csclub.uwaterloo.ca> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix rename of pt_regs offset defines breakageGreg Ungerer2009-09-301-10/+10
| | | | | | | | | Commit f159ee782990aacb5494738c98f13a2aa61dbb4a ("locking, m68k/asm-offsets: Rename pt_regs offset defines") breaks the m68knommu entry code that relies on these define names. Fix the files to match the new define names. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: create a speciailized ColdFire 5272 interrupt controllerGreg Ungerer2009-09-161-1/+1
| | | | | | | | The ColdFire 5272 CPU has a very different interrupt controller than any of the other ColdFire parts. It needs its own controller code to correctly setup and ack interrupts. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up old ColdFire timer irq setupGreg Ungerer2009-09-161-7/+2
| | | | | | | | The recent changes to the old ColdFire interrupt controller code means we no longer need to manually unmask the timer interrupt. That is now done in the interrupt controller code proper. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: map ColdFire interrupts to correct masking bitsGreg Ungerer2009-09-161-17/+27
| | | | | | | | | The older simple ColdFire interrupt controller has no one-to-one mapping of interrupt numbers to bits in the interrupt mask register. Create a mapping array that each ColdFire CPU type can populate with its available interrupts and the bits that each use in the interrupt mask register. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: simplify ColdFire "timers" clock initializationGreg Ungerer2009-09-161-13/+4
| | | | | | | | | The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: support code to mask external interrupts on old ColdFire CPU'sGreg Ungerer2009-09-161-0/+4
| | | | | | | | The external interrupts used on the old Coldfire parts with the old style interrupt controller can be properly mask/unmasked in the interrupt handling code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: merge old ColdFire interrupt controller masking macrosGreg Ungerer2009-09-161-1/+58
| | | | | | | | | | Currently the code that supports setting the old style ColdFire interrupt controller mask registers is macros in the include files of each of the CPU types. Merge all these into a set of real masking functions in the old Coldfire interrupt controller code proper. All the macros are basically the same (excepting a register size difference on really early parts). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove duplicate ColdFire mcf_autovector() codeGreg Ungerer2009-09-161-0/+27
| | | | | | | | | Each of the ColdFire CPU platform code that used the old style interrupt controller had its own copy of the mcf_autovector() function. They are all the same, remove them all and create a single function in the common coldfire/intc.c code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: mask off all interrupts in ColdFire intc-simr controllerGreg Ungerer2009-09-161-0/+5
| | | | | | | | The ColdFire intc-simr interrupt controller should mask off all interrupt sources at init time. Doing it here instead of separately in each platform setup. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove interrupt masking from ColdFire pit timerGreg Ungerer2009-09-161-8/+0
| | | | | | | | With proper interrupt controller code in place there is no need for devices like the timers to have custom interrupt masking code. Remove it (and the defines that go along with it). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use common interrupt controller code for older ColdFire CPU'sGreg Ungerer2009-09-163-25/+62
| | | | | | | | | The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple interrupt controller. Use common setup code for them. This addition means that all ColdFire CPU's now have some specific type of interrupt controller code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: general interrupt controller for ColdFire 532x partsGreg Ungerer2009-09-162-7/+19
| | | | | | | | | The ColdFire 532x family of parts uses 2 of the same INTC interrupt controlers used in the ColdFire 520x family. So modify the code to support both parts. The extra code for the second INTC controler in the case of the 520x is easily optimized away to nothing. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: general interrupt controller for ColdFire many 52xx partsGreg Ungerer2009-09-162-3/+96
| | | | | | | | | | | | Create general interrupt controller code for the many ColdFire version 2 cores that use the two region INTC interrupt controller. This includes the 523x family, 5270, 5271, 5274, 5275, and the 528x families. This code does proper masking and unmasking of interrupts. With this in place some of the driver hacks in place to support ColdFire interrupts can finally go away. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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