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* MIPS: WRPPMC: Move code one directory level up.Ralf Baechle2010-08-057-411/+0
| | | | | | | It was the last platform under gt64120 and will fit better into the new platform makefile scheme, if moved. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Update Yoichi Yuasa's e-mail addressYoichi Yuasa2009-07-031-1/+1
| | | | | Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] remove wrppmc_machine_power_off()Yoichi Yuasa2008-07-152-7/+1
| | | | | | | It can be replace wrppmc_machine_halt(). Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] replace inline assembler to cpu_wait()Yoichi Yuasa2008-07-151-5/+4
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] remove unused mips_machtypeYoichi Yuasa2008-01-291-2/+0
| | | | | | | Removed unused mips_machtype. These are only set but not used. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] time: Remove wrppmc's definition of plat_timer_setup.Ralf Baechle2007-10-291-6/+0
| | | | | | The only thing it used to do is now done by cevt-r4k.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] WRPPMC serial support move to platform deviceYoichi Yuasa2007-10-113-35/+81
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] cleanup WRPPMC include filesYoichi Yuasa2007-10-114-35/+12
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Deforest the function pointer jungle in the time code.Ralf Baechle2007-10-112-5/+1
| | | | | | | Hard to follow who is pointing what to where and why so it's simply getting in the way of the time code renovation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] ARC: Get rid of mips_machgroupRalf Baechle2007-10-111-1/+0
| | | | | | | This has not been any serious user of this ill conceived thing since the original invention in like '95. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use -Werror on subdirectories which build cleanly.Ralf Baechle2007-07-311-0/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* serial: add early_serial_setup() back to header fileYinghai Lu2007-07-181-0/+1
| | | | | | | | | early_serial_setup was removed from serial.h, but forgot to put in serial_8250.h Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [MIPS] WRPPMC: Fix build.Ralf Baechle2007-07-101-2/+2
| | | | | | | Using another systems defines is a safe way to get your code broken by accident when that system is removed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routinesYoichi Yuasa2007-04-271-2/+2
| | | | | | | | | This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines. GT64111 PCI is almost the same as GT64120's PCI_0. This patch don't change GT64120 PCI routines. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Misc fixes for plat_irq_dispatch functionsThiemo Seufer2007-03-191-1/+1
| | | | | | | | | | | | o adds missing ST0_IM masks, which caused the logging of valid interrupts as spurious o stops pnx8550 to log every interrupt as spurious o adds cause register masks for ip22/ip32, which caused handling of masked interrupts o removes some superfluous parentheses in the SNI interrupt code Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Kill redundant EXTRA_AFLAGSAtsushi Nemoto2007-02-261-2/+0
| | | | | | | | | | Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line. This is redundant while AFLAGS contains $(cflags-y) and any options only listed in CFLAGS (not in cflags-y) should be unnecessary for asm sources. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] prom_free_prom_memory cleanupAtsushi Nemoto2007-02-061-2/+1
| | | | | | | | | Current prom_free_prom_memory() implementations are almost same as free_init_pages(), or no-op. Make free_init_pages() extern (again) and make prom_free_prom_memory() use it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Define MIPS_CPU_IRQ_BASE in generic headerAtsushi Nemoto2007-02-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle2006-10-081-5/+5
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Replace board_timer_setup function pointer by plat_timer_setup.Ralf Baechle2006-07-132-3/+1
| | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
* [MIPS] Don't include obsolete <linux/config.h>.Ralf Baechle2006-07-132-2/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove first timer interrupt setup in wrppmc_timer_setup()Yoichi Yuasa2006-06-291-4/+0
| | | | | | | The first timer interrupt setup already happens in time_init(). Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.Yoichi Yuasa2006-06-291-3/+0
| | | | | | | | mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so set_c0_status(ST0_IM) isn't necessary. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix the build error of Wind River PPMC board, rewrite irq code to CMark.Zhan2006-06-294-65/+15
| | | | | | | | | o Fix the build error Wind River PPMC board caused by the change of plat_setup hook interface. o Rewrite first level interrupt dispatch code to C. Signed-off-by: Rongkai.Zhan <rongkai.zhan@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Wind River 4KC PPMC Eval Board SupportMark.Zhan2006-06-197-0/+469
Support for the GT-64120-based Wind River 4KC PPMC Evaluation board. Signed-off-by: Rongkai.Zhan <Rongkai.zhan@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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