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* [MIPS] Add support for MIPS CMP platform.Ralf Baechle2008-04-281-81/+15
* [MIPS] Remove TLB sanitation codeChris Dearman2008-04-281-47/+0
* [MIPS] SMP: Call platform methods via ops structure.Ralf Baechle2008-01-291-87/+106
* [MIPS] MT: Scheduler support for SMTRalf Baechle2008-01-291-1/+5
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-111-1/+1
* [MIPS] SMP: Scatter __cpuinit over the code as needed.Ralf Baechle2007-08-271-3/+3
* [MIPS] VSMP: Fix initialization ordering bug.Ralf Baechle2007-07-041-2/+2
* [MIPS] Separate performance counter interruptsChris Dearman2007-06-141-6/+6
* [MIPS] Define MIPS_CPU_IRQ_BASE in generic headerAtsushi Nemoto2007-02-061-5/+4
* [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irqAtsushi Nemoto2006-11-301-0/+2
* [MIPS] VSMP: Synchronize cp0 counters on bootup.Ralf Baechle2006-10-311-0/+2
* [MIPS] VSMP: Fix initialization ordering bug.Ralf Baechle2006-10-311-69/+83
* [MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle2006-10-081-8/+8
* [MIPS] MT: Initialise all writable bits in Cause register to zero.Chris Dearman2006-09-271-1/+1
* [PATCH] irq-flags: MIPS: Use the new IRQF_ constantsThomas Gleixner2006-07-021-2/+2
* [MIPS] FPU affinity for MT ASE.Ralf Baechle2006-04-191-0/+11
* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-191-0/+349
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