1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
|
/* linux/arch/arm/mach-exynos/asv-4x12.c
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* EXYNOS4X12 - ASV(Adaptive Supply Voltage) driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <mach/asv.h>
#include <mach/map.h>
#include <plat/cpu.h>
/* ASV function for Fused Chip */
#define IDS_ARM_OFFSET 24
#define IDS_ARM_MASK 0xFF
#define HPM_OFFSET 12
#define HPM_MASK 0x1F
#define FUSED_SG_OFFSET 3
#define ORIG_SG_OFFSET 17
#define ORIG_SG_MASK 0xF
#define MOD_SG_OFFSET 21
#define MOD_SG_MASK 0x7
#define LOCKING_OFFSET 7
#define LOCKING_MASK 0x1F
#define EMA_OFFSET 6
#define EMA_MASK 0x1
#define DEFAULT_ASV_GROUP 1
#define CHIP_ID_REG (S5P_VA_CHIPID + 0x4)
unsigned int exynos_armclk_max;
struct asv_judge_table exynos4x12_limit[] = {
/* HPM, IDS */
{ 0, 0}, /* Reserved Group */
{ 0, 0}, /* Reserved Group */
{ 14, 9},
{ 16, 14},
{ 18, 17},
{ 20, 20},
{ 21, 24},
{ 22, 30},
{ 23, 34},
{ 24, 39},
{100, 100},
{999, 999}, /* Reserved Group */
};
struct asv_judge_table exynos4x12_limit_rev2[] = {
#if 0
/* 0705 dvfs table */
/* HPM, IDS */
{ 0, 0}, /* Reserved Group */
{ 15, 8}, /* ASV1 Group */
{ 16, 11},
{ 18, 14},
{ 19, 18},
{ 20, 22},
{ 21, 26},
{ 22, 29},
{ 23, 36},
{ 24, 44},
{ 25, 56},
{999, 999}, /* ASV11 Group */
#else
/* 0725 dvfs table */
/* HPM, IDS */
{ 0, 0}, /* Reserved Group */
{ 15, 8}, /* ASV1 Group */
{ 16, 11},
{ 18, 14},
{ 19, 18},
{ 20, 22},
{ 21, 26},
{ 22, 29},
{ 23, 36},
{ 24, 40},
{ 25, 45},
{ 26, 50},
{999, 999}, /* ASV11 Group */
#endif
};
struct asv_judge_table exynos4212_limit[] = {
/* HPM, IDS */
{ 0, 0}, /* Reserved Group */
{ 17, 12},
{ 18, 13},
{ 20, 14},
{ 22, 18},
{ 24, 22},
{ 25, 29},
{ 26, 31},
{ 27, 35},
{ 28, 39},
{100, 100},
{999, 999}, /* Reserved Group */
};
static int exynos4x12_get_hpm(struct samsung_asv *asv_info)
{
asv_info->hpm_result = (asv_info->pkg_id >> HPM_OFFSET) & HPM_MASK;
return 0;
}
static int exynos4x12_get_ids(struct samsung_asv *asv_info)
{
asv_info->ids_result = (asv_info->pkg_id >> IDS_ARM_OFFSET) & IDS_ARM_MASK;
return 0;
}
static void exynos4x12_pre_set_abb(void)
{
if (samsung_rev() >= EXYNOS4412_REV_2_0) {
switch (exynos_result_of_asv) {
case 0:
case 1:
exynos4x12_set_abb_member(ABB_ARM, ABB_MODE_075V);
exynos4x12_set_abb_member(ABB_INT, ABB_MODE_100V);
exynos4x12_set_abb_member(ABB_MIF, ABB_MODE_100V);
exynos4x12_set_abb_member(ABB_G3D, ABB_MODE_100V);
break;
case 2:
exynos4x12_set_abb_member(ABB_ARM, ABB_MODE_100V);
exynos4x12_set_abb_member(ABB_INT, ABB_MODE_100V);
exynos4x12_set_abb_member(ABB_MIF, ABB_MODE_140V);
exynos4x12_set_abb_member(ABB_G3D, ABB_MODE_100V);
break;
case 3:
case 4:
case 5:
case 6:
case 7:
exynos4x12_set_abb_member(ABB_ARM, ABB_MODE_130V);
exynos4x12_set_abb_member(ABB_INT, ABB_MODE_130V);
exynos4x12_set_abb_member(ABB_MIF, ABB_MODE_140V);
exynos4x12_set_abb_member(ABB_G3D, ABB_MODE_100V);
break;
case 8:
case 9:
case 10:
case 11:
case 12:
exynos4x12_set_abb_member(ABB_ARM, ABB_MODE_130V);
exynos4x12_set_abb_member(ABB_INT, ABB_MODE_130V);
exynos4x12_set_abb_member(ABB_MIF, ABB_MODE_140V);
exynos4x12_set_abb_member(ABB_G3D, ABB_MODE_130V);
break;
default:
exynos4x12_set_abb(ABB_MODE_130V);
break;
}
} else {
switch (exynos_result_of_asv) {
case 0:
case 1:
case 2:
case 3:
exynos4x12_set_abb(ABB_MODE_100V);
break;
case 4:
case 5:
case 6:
case 7:
exynos4x12_set_abb(ABB_MODE_130V);
break;
default:
exynos4x12_set_abb(ABB_MODE_130V);
break;
}
}
}
static int exynos4x12_asv_store_result(struct samsung_asv *asv_info)
{
unsigned int i;
if (soc_is_exynos4412()) {
if (samsung_rev() >= EXYNOS4412_REV_2_0) {
for (i = 0; i < ARRAY_SIZE(exynos4x12_limit_rev2); i++) {
if ((asv_info->ids_result <= exynos4x12_limit_rev2[i].ids_limit) ||
(asv_info->hpm_result <= exynos4x12_limit_rev2[i].hpm_limit)) {
exynos_result_of_asv = i;
break;
}
}
} else {
for (i = 0; i < ARRAY_SIZE(exynos4x12_limit); i++) {
if ((asv_info->ids_result <= exynos4x12_limit[i].ids_limit) ||
(asv_info->hpm_result <= exynos4x12_limit[i].hpm_limit)) {
exynos_result_of_asv = i;
break;
}
}
}
} else {
for (i = 0; i < ARRAY_SIZE(exynos4212_limit); i++) {
if ((asv_info->ids_result <= exynos4212_limit[i].ids_limit) ||
(asv_info->hpm_result <= exynos4212_limit[i].hpm_limit)) {
exynos_result_of_asv = i;
break;
}
}
}
/*
* If ASV result value is lower than default value
* Fix with default value.
*/
if (exynos_result_of_asv < DEFAULT_ASV_GROUP)
exynos_result_of_asv = DEFAULT_ASV_GROUP;
#ifndef CONFIG_SAMSUNG_PRODUCT_SHIP
pr_info("EXYNOS4X12(NO SG): IDS : %d HPM : %d RESULT : %d\n",
asv_info->ids_result, asv_info->hpm_result, exynos_result_of_asv);
#endif
exynos4x12_pre_set_abb();
return 0;
}
int exynos4x12_asv_init(struct samsung_asv *asv_info)
{
unsigned int tmp;
unsigned int exynos_orig_sp;
unsigned int exynos_mod_sp;
int exynos_cal_asv;
exynos_result_of_asv = 0;
exynos_special_flag = 0;
exynos_dynamic_ema = false;
pr_info("EXYNOS4X12: Adaptive Support Voltage init\n");
tmp = __raw_readl(CHIP_ID_REG);
/* Store PKG_ID */
asv_info->pkg_id = tmp;
#ifdef CONFIG_EXYNOS4X12_1000MHZ_SUPPORT
exynos_armclk_max = 1000000;
#else
/* If maximum armclock is fused, set its value */
if (samsung_rev() < EXYNOS4412_REV_2_0) {
switch (tmp & MOD_SG_MASK) {
case 0:
case 3:
exynos_armclk_max = 1400000;
break;
case 2:
exynos_armclk_max = 1000000;
break;
default:
exynos_armclk_max = 1400000;
break;
}
}
#endif
if ((tmp >> EMA_OFFSET) & EMA_MASK)
exynos_dynamic_ema = true;
else
exynos_dynamic_ema = false;
/* If Speed group is fused, get speed group from */
if ((tmp >> FUSED_SG_OFFSET) & 0x1) {
exynos_orig_sp = (tmp >> ORIG_SG_OFFSET) & ORIG_SG_MASK;
exynos_mod_sp = (tmp >> MOD_SG_OFFSET) & MOD_SG_MASK;
exynos_cal_asv = exynos_orig_sp - exynos_mod_sp;
/*
* If There is no origin speed group,
* store 1 asv group into exynos_result_of_asv.
*/
if (!exynos_orig_sp) {
pr_info("EXYNOS4X12: No Origin speed Group\n");
exynos_result_of_asv = DEFAULT_ASV_GROUP;
} else {
if (exynos_cal_asv < DEFAULT_ASV_GROUP)
exynos_result_of_asv = DEFAULT_ASV_GROUP;
else
exynos_result_of_asv = exynos_cal_asv;
}
pr_info("EXYNOS4X12(SG): ORIG : %d MOD : %d RESULT : %d\n",
exynos_orig_sp, exynos_mod_sp, exynos_result_of_asv);
/* set Special flag into exynos_special_flag */
exynos_special_flag = (tmp >> LOCKING_OFFSET) & LOCKING_MASK;
exynos4x12_pre_set_abb();
return -EEXIST;
}
/* set Special flag into exynos_special_flag */
exynos_special_flag = (tmp >> LOCKING_OFFSET) & LOCKING_MASK;
asv_info->get_ids = exynos4x12_get_ids;
asv_info->get_hpm = exynos4x12_get_hpm;
asv_info->store_result = exynos4x12_asv_store_result;
return 0;
}
|
