aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/isdbt/fc8150/fc8150_hpi.c
blob: 67d84846282eb11e2ecc6378ae6abebcb1d928db (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
/*****************************************************************************
 Copyright(c) 2012 FCI Inc. All Rights Reserved

 File name : fc8150_hpi.c

 Description : fc8150 host interface

*******************************************************************************/
#include "linux/io.h"

#include "fci_types.h"
#include "fc8150_regs.h"
#include "fci_oal.h"

#define HPIC_READ           0x01 /* read command */
#define HPIC_WRITE          0x02 /* write command */
#define HPIC_AINC           0x04 /* address increment */
#define HPIC_BMODE          0x00 /* byte mode */
#define HPIC_WMODE          0x10 /* word mode */
#define HPIC_LMODE          0x20 /* long mode */
#define HPIC_ENDIAN         0x00 /* little endian */
#define HPIC_CLEAR          0x80 /* currently not used */

#define BBM_BASE_ADDR       0
#define BBM_BASE_OFFSET     0

#define FC8150_ADDR_REG(x)     outb(x, (BBM_BASE_ADDR	\
				+ (BBM_ADDRESS_REG << BBM_BASE_OFFSET)))
#define FC8150_CMD_REG(x)     outb(x, (BBM_BASE_ADDR	\
				+ (BBM_COMMAND_REG << BBM_BASE_OFFSET)))
#define FC8150_DATA_REG_OUT(x)     outb(x, (BBM_BASE_ADDR	\
				+ (BBM_DATA_REG << BBM_BASE_OFFSET)))
#define FC8150_DATA_REG_IN     inb(BBM_BASE_ADDR	\
				+ (BBM_DATA_REG << BBM_BASE_OFFSET))

int fc8150_hpi_init(HANDLE hDevice, u16 param1, u16 param2)
{
	OAL_CREATE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_byteread(HANDLE hDevice, u16 addr, u8 *data)
{
	u8 command = HPIC_READ | HPIC_BMODE | HPIC_ENDIAN;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);

	*data = FC8150_DATA_REG_IN;
	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_wordread(HANDLE hDevice, u16 addr, u16 *data)
{
	u8 command = HPIC_READ | HPIC_AINC | HPIC_BMODE | HPIC_ENDIAN;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);

	*data = FC8150_DATA_REG_IN;
	*data |= FC8150_DATA_REG_IN << 8;
	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_longread(HANDLE hDevice, u16 addr, u32 *data)
{
	u8 command = HPIC_READ | HPIC_AINC | HPIC_BMODE | HPIC_ENDIAN;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);

	*data = FC8150_DATA_REG_IN;
	*data |= FC8150_DATA_REG_IN << 8;
	*data |= FC8150_DATA_REG_IN << 16;
	*data |= FC8150_DATA_REG_IN << 24;
	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_bulkread(HANDLE hDevice, u16 addr, u8 *data, u16 length)
{
	s32 i;
	u8 command = HPIC_READ | HPIC_AINC | HPIC_BMODE | HPIC_ENDIAN;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);

	for (i = 0; i < length; i++)
		data[i] = FC8150_DATA_REG_IN;

	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_bytewrite(HANDLE hDevice, u16 addr, u8 data)
{
	u8 command = HPIC_WRITE | HPIC_BMODE | HPIC_ENDIAN;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);
	FC8150_DATA_REG_OUT(data);
	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_wordwrite(HANDLE hDevice, u16 addr, u16 data)
{
	u8 command = HPIC_WRITE | HPIC_BMODE | HPIC_ENDIAN | HPIC_AINC;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);
	FC8150_DATA_REG_OUT(data & 0xff);
	FC8150_DATA_REG_OUT((data & 0xff00) >> 8);
	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_longwrite(HANDLE hDevice, u16 addr, u32 data)
{
	u8 command = HPIC_WRITE | HPIC_BMODE | HPIC_ENDIAN | HPIC_AINC;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);

	FC8150_DATA_REG_OUT(data & 0xff);
	FC8150_DATA_REG_OUT((data & 0xff00) >> 8);
	FC8150_DATA_REG_OUT((data & 0xff0000) >> 16);
	FC8150_DATA_REG_OUT((data & 0xff000000) >> 24);
	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_bulkwrite(HANDLE hDevice, u16 addr, u8 *data, u16 length)
{
	s32 i;
	u8 command = HPIC_WRITE | HPIC_BMODE | HPIC_ENDIAN | HPIC_AINC;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);
	for (i = 0; i < length; i++)
		FC8150_DATA_REG_OUT(data[i]);

	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_dataread(HANDLE hDevice, u16 addr, u8 *data, u32 length)
{
	s32 i;
	u8 command = HPIC_READ | HPIC_BMODE | HPIC_ENDIAN;

	OAL_OBTAIN_SEMAPHORE();
	FC8150_ADDR_REG(addr & 0xff);
	FC8150_ADDR_REG((addr & 0xff00) >> 8);
	FC8150_CMD_REG(command);

	for (i = 0; i < length; i++)
		data[i] = FC8150_DATA_REG_IN;

	OAL_RELEASE_SEMAPHORE();

	return BBM_OK;
}

int fc8150_hpi_deinit(HANDLE hDevice)
{
	OAL_DELETE_SEMAPHORE();

	return BBM_OK;
}