1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
|
/* exynos_drm.h
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* Authors:
* Inki Dae <inki.dae@samsung.com>
* Joonyoung Shim <jy0922.shim@samsung.com>
* Seung-Woo Kim <sw0312.kim@samsung.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _EXYNOS_DRM_H_
#define _EXYNOS_DRM_H_
#include "drm.h"
/**
* User-desired buffer creation information structure.
*
* @size: user-desired memory allocation size.
* - this size value would be page-aligned internally.
* @flags: user request for setting memory type or cache attributes.
* @handle: returned a handle to created gem object.
* - this handle will be set by gem module of kernel side.
*/
struct drm_exynos_gem_create {
uint64_t size;
unsigned int flags;
unsigned int handle;
};
/**
* A structure for getting buffer offset.
*
* @handle: a pointer to gem object created.
* @pad: just padding to be 64-bit aligned.
* @offset: relatived offset value of the memory region allocated.
* - this value should be set by user.
*/
struct drm_exynos_gem_map_off {
unsigned int handle;
unsigned int pad;
uint64_t offset;
};
/**
* A structure for mapping buffer.
*
* @handle: a handle to gem object created.
* @pad: just padding to be 64-bit aligned.
* @size: memory size to be mapped.
* @mapped: having user virtual address mmaped.
* - this variable would be filled by exynos gem module
* of kernel side with user virtual address which is allocated
* by do_mmap().
*/
struct drm_exynos_gem_mmap {
unsigned int handle;
unsigned int pad;
uint64_t size;
uint64_t mapped;
};
/**
* User-requested user space importing structure
*
* @userptr: user space address allocated by malloc.
* @size: size to the buffer allocated by malloc.
* @flags: indicate user-desired cache attribute to map the allocated buffer
* to kernel space.
* @handle: a returned handle to created gem object.
* - this handle will be set by gem module of kernel side.
*/
struct drm_exynos_gem_userptr {
uint64_t userptr;
uint64_t size;
unsigned int flags;
unsigned int handle;
};
/**
* A structure to gem information.
*
* @handle: a handle to gem object created.
* @flags: flag value including memory type and cache attribute and
* this value would be set by driver.
* @size: size to memory region allocated by gem and this size would
* be set by driver.
*/
struct drm_exynos_gem_info {
unsigned int handle;
unsigned int flags;
uint64_t size;
};
/**
* A structure for user connection request of virtual display.
*
* @connection: indicate whether doing connetion or not by user.
* @extensions: if this value is 1 then the vidi driver would need additional
* 128bytes edid data.
* @edid: the edid data pointer from user side.
*/
struct drm_exynos_vidi_connection {
unsigned int connection;
unsigned int extensions;
uint64_t *edid;
};
/**
* A structure for ump.
*
* @gem_handle: a pointer to gem object created.
* @secure_id: ump secure id and this value would be filled
* by kernel side.
*/
struct drm_exynos_gem_ump {
unsigned int gem_handle;
unsigned int secure_id;
};
/* temporary codes for legacy fimc and mfc drivers. */
/**
* A structure for getting physical address corresponding to a gem handle.
*/
struct drm_exynos_gem_get_phy {
unsigned int gem_handle;
unsigned int pad;
uint64_t size;
uint64_t phy_addr;
};
/**
* A structure for importing physical memory to a gem.
*/
struct drm_exynos_gem_phy_imp {
uint64_t phy_addr;
uint64_t size;
unsigned int gem_handle;
unsigned int pad;
};
/* indicate cache units. */
enum e_drm_exynos_gem_cache_sel {
EXYNOS_DRM_L1_CACHE = 1 << 0,
EXYNOS_DRM_L2_CACHE = 1 << 1,
EXYNOS_DRM_ALL_CORES = 1 << 2,
EXYNOS_DRM_ALL_CACHES = EXYNOS_DRM_L1_CACHE |
EXYNOS_DRM_L2_CACHE,
EXYNOS_DRM_ALL_CACHES_CORES = EXYNOS_DRM_L1_CACHE |
EXYNOS_DRM_L2_CACHE |
EXYNOS_DRM_ALL_CORES,
EXYNOS_DRM_CACHE_SEL_MASK = EXYNOS_DRM_ALL_CACHES_CORES
};
/* indicate cache operation types. */
enum e_drm_exynos_gem_cache_op {
EXYNOS_DRM_CACHE_INV_ALL = 1 << 3,
EXYNOS_DRM_CACHE_INV_RANGE = 1 << 4,
EXYNOS_DRM_CACHE_CLN_ALL = 1 << 5,
EXYNOS_DRM_CACHE_CLN_RANGE = 1 << 6,
EXYNOS_DRM_CACHE_FSH_ALL = EXYNOS_DRM_CACHE_INV_ALL |
EXYNOS_DRM_CACHE_CLN_ALL,
EXYNOS_DRM_CACHE_FSH_RANGE = EXYNOS_DRM_CACHE_INV_RANGE |
EXYNOS_DRM_CACHE_CLN_RANGE,
EXYNOS_DRM_CACHE_OP_MASK = EXYNOS_DRM_CACHE_FSH_ALL |
EXYNOS_DRM_CACHE_FSH_RANGE
};
/* memory type definitions. */
enum e_drm_exynos_gem_mem_type {
/* Physically Continuous memory and used as default. */
EXYNOS_BO_CONTIG = 0 << 0,
/* Physically Non-Continuous memory. */
EXYNOS_BO_NONCONTIG = 1 << 0,
/* non-cachable mapping and used as default. */
EXYNOS_BO_NONCACHABLE = 0 << 1,
/* cachable mapping. */
EXYNOS_BO_CACHABLE = 1 << 1,
/* write-combine mapping. */
EXYNOS_BO_WC = 1 << 2,
/* user space memory allocated by malloc. */
EXYNOS_BO_USERPTR = 1 << 3,
EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE |
EXYNOS_BO_WC | EXYNOS_BO_USERPTR
};
/**
* A structure for cache operation.
*
* @usr_addr: user space address.
* P.S. it SHOULD BE user space.
* @size: buffer size for cache operation.
* @flags: select cache unit and cache operation.
*/
struct drm_exynos_gem_cache_op {
uint64_t usr_addr;
unsigned int size;
unsigned int flags;
};
struct drm_exynos_plane_set_zpos {
__u32 plane_id;
__s32 zpos;
};
struct drm_exynos_g2d_get_ver {
__u32 major;
__u32 minor;
};
struct drm_exynos_g2d_cmd {
__u32 offset;
__u32 data;
};
enum drm_exynos_g2d_event_type {
G2D_EVENT_NOT,
G2D_EVENT_NONSTOP,
G2D_EVENT_STOP, /* not yet */
};
struct drm_exynos_g2d_set_cmdlist {
struct drm_exynos_g2d_cmd *cmd;
struct drm_exynos_g2d_cmd *cmd_gem;
__u32 cmd_nr;
__u32 cmd_gem_nr;
/* for g2d event */
__u64 user_data;
__u32 event_type;
__u32 reserved;
};
struct drm_exynos_g2d_exec {
__u32 async;
__u32 reserved;
};
enum drm_exynos_rot_flip {
ROT_FLIP_NONE,
ROT_FLIP_VERTICAL,
ROT_FLIP_HORIZONTAL,
};
enum drm_exynos_rot_degree {
ROT_DEGREE_0,
ROT_DEGREE_90,
ROT_DEGREE_180,
ROT_DEGREE_270,
};
#define DRM_EXYNOS_ROT_MAX_BUF 3
/**
* A structure for rotator buffer
*
* @src_handle: Source GEM handles.
* @dst_handle: Destination GEM handles.
* - *_handle[0] : For RGB or Y buffer.
* - *_handle[1] : For CbCr or Cb buffer.
* - *_handle[2] : For Cr buffer.
* @src_cnt: Number of source GEM handles.
* @dst_cnt: Number of destination GEM handles.
* @src_w: Source Buffer width.
* @src_h: Source Buffer height.
* @dst_w: Destination Buffer width.
* @dst_h: Destination Buffer height.
*/
struct drm_exynos_rot_buffer {
__u32 src_handle[DRM_EXYNOS_ROT_MAX_BUF];
__u32 dst_handle[DRM_EXYNOS_ROT_MAX_BUF];
__u32 src_cnt;
__u32 dst_cnt;
__u32 src_w;
__u32 src_h;
__u32 dst_w;
__u32 dst_h;
};
/**
* A structure for rotator control.
*
* @img_fmt: Source / destination buffer (image)format.
* - fourcc code from drm_fourcc.h
* - DRM_FORMAT_RGB888
* - DRM_FORMAT_RGB565
* - DRM_FORMAT_YUYV : YUV 4:2:2 packed, YCbYCr
* - DRM_FORMAT_NV12M : YUV 4:2:0 non-contiguous 2-plane, Y/CbCr
* - DRM_FORMAT_YUV420M : YUV 4:2:0 non-contiguous 3-plane, Y/Cb/Cr
* @flip: Flip operation value.
* @degree: Rotation operation degree value.
*/
struct drm_exynos_rot_control {
__u32 img_fmt;
enum drm_exynos_rot_flip flip;
enum drm_exynos_rot_degree degree;
__u32 reserved;
};
/**
* A structure for rotator crop.
*
* @src_x: Cropped image position x in source buffer[FROM].
* @src_y: Cropped image position y in source buffer[FROM].
* @src_w: Cropped image width in source buffer.
* @src_h: Cropped image height in source buffer.
* @dst_x: Cropped image position x in destination buffer[TO].
* @dst_y: Cropped image position y in destination buffer[TO].
*/
struct drm_exynos_rot_crop {
__u32 src_x;
__u32 src_y;
__u32 src_w;
__u32 src_h;
__u32 dst_x;
__u32 dst_y;
};
/**
* A structure for rotator operation.
*
* @buf: (Image)Buffer data.
* @control: Control data.
* @crop: Cropped image data.
* @user_data: Not used yet.
*/
struct drm_exynos_rot_exec_data {
struct drm_exynos_rot_buffer buf;
struct drm_exynos_rot_control control;
struct drm_exynos_rot_crop crop;
__u64 user_data;
};
#define DRM_EXYNOS_GEM_CREATE 0x00
#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01
#define DRM_EXYNOS_GEM_MMAP 0x02
#define DRM_EXYNOS_GEM_USERPTR 0x03
#define DRM_EXYNOS_GEM_GET 0x04
/* Reserved 0x04 ~ 0x05 for exynos specific gem ioctl */
#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06
#define DRM_EXYNOS_VIDI_CONNECTION 0x07
/* temporary ioctl command. */
#define DRM_EXYNOS_GEM_EXPORT_UMP 0x10
#define DRM_EXYNOS_GEM_CACHE_OP 0x12
#define DRM_EXYNOS_GEM_GET_PHY 0x13
#define DRM_EXYNOS_GEM_PHY_IMP 0x14
/* G2D */
#define DRM_EXYNOS_G2D_GET_VER 0x20
#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21
#define DRM_EXYNOS_G2D_EXEC 0x22
/* Rotator */
#define DRM_EXYNOS_ROTATOR_EXEC 0x30
#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
#define DRM_IOCTL_EXYNOS_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_MAP_OFFSET, struct drm_exynos_gem_map_off)
#define DRM_IOCTL_EXYNOS_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)
#define DRM_IOCTL_EXYNOS_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_USERPTR, struct drm_exynos_gem_userptr)
#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info)
#define DRM_IOCTL_EXYNOS_GEM_EXPORT_UMP DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_EXPORT_UMP, struct drm_exynos_gem_ump)
#define DRM_IOCTL_EXYNOS_GEM_CACHE_OP DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_CACHE_OP, struct drm_exynos_gem_cache_op)
/* temporary ioctl command. */
#define DRM_IOCTL_EXYNOS_GEM_GET_PHY DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_GET_PHY, struct drm_exynos_gem_get_phy)
#define DRM_IOCTL_EXYNOS_GEM_PHY_IMP DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_PHY_IMP, struct drm_exynos_gem_phy_imp)
#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
#define DRM_IOCTL_EXYNOS_ROTATOR_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_ROTATOR_EXEC, struct drm_exynos_rot_exec_data)
/* EXYNOS specific events */
#define DRM_EXYNOS_G2D_EVENT 0x80000000
struct drm_exynos_g2d_event {
struct drm_event base;
__u64 user_data;
__u32 tv_sec;
__u32 tv_usec;
__u32 cmdlist_no;
__u32 reserved;
};
/**
* A structure for lcd panel information.
*
* @timing: default video mode for initializing
* @width_mm: physical size of lcd width.
* @height_mm: physical size of lcd height.
*/
struct exynos_drm_panel_info {
struct fb_videomode timing;
u32 width_mm;
u32 height_mm;
};
/**
* Platform Specific Structure for DRM based FIMD.
*
* @panel: default panel info for initializing
* @default_win: default window layer number to be used for UI.
* @bpp: default bit per pixel.
* @enabled: indicate whether fimd hardware was on or not at bootloader.
*/
struct exynos_drm_fimd_pdata {
struct exynos_drm_panel_info panel;
u32 vidcon0;
u32 vidcon1;
unsigned int default_win;
unsigned int bpp;
bool enabled;
bool mdnie_enabled;
unsigned int dynamic_refresh;
unsigned int high_freq;
};
/**
* Platform Specific Structure for DRM based HDMI.
*
* @hdmi_dev: device point to specific hdmi driver.
* @mixer_dev: device point to specific mixer driver.
*
* this structure is used for common hdmi driver and each device object
* would be used to access specific device driver(hdmi or mixer driver)
*/
struct exynos_drm_common_hdmi_pd {
struct device *hdmi_dev;
struct device *mixer_dev;
};
/**
* Platform Specific Structure for DRM based HDMI core.
*
* @is_v13: set if hdmi version 13 is.
* @cfg_hpd: function pointer to configure hdmi hotplug detection pin
* @get_hpd: function pointer to get value of hdmi hotplug detection pin
*/
struct exynos_drm_hdmi_pdata {
bool is_v13;
void (*cfg_hpd)(bool external);
int (*get_hpd)(void);
};
#endif
|