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#ifndef _ARCH_ARM_MACH_MSM_MDM_IOCTLS_H
#define _ARXH_ARM_MACH_MSM_MDM_IOCTLS_H
#define CHARM_CODE 0xCC
#define WAKE_CHARM _IO(CHARM_CODE, 1)
#define RESET_CHARM _IO(CHARM_CODE, 2)
#define CHECK_FOR_BOOT _IOR(CHARM_CODE, 3, int)
#define WAIT_FOR_BOOT _IO(CHARM_CODE, 4)
#define NORMAL_BOOT_DONE _IOW(CHARM_CODE, 5, int)
#define RAM_DUMP_DONE _IOW(CHARM_CODE, 6, int)
#define WAIT_FOR_RESTART _IOR(CHARM_CODE, 7, int)
#define SILENT_RESET_CONTROL _IOR(CHARM_CODE, 8, int)
#define AUTOPM_LOCK _IOW(CHARM_CODE, 9, int)
#define GET_BOOT_PROTOCOL _IOW(CHARM_CODE, 10, int)
#define GET_FORCE_RAMDUMP _IOW(CHARM_CODE, 11, int)
#define WAIT_FOR_ERROR _IOW(CHARM_CODE, 12, int)
enum charm_boot_type {
CHARM_NORMAL_BOOT = 0,
CHARM_RAM_DUMPS,
};
#endif
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