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author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
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committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/ChangeLog | |
parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/ChangeLog')
-rw-r--r-- | gcc-4.9/gcc/ChangeLog | 5366 |
1 files changed, 5366 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/ChangeLog b/gcc-4.9/gcc/ChangeLog new file mode 100644 index 0000000..3741b54 --- /dev/null +++ b/gcc-4.9/gcc/ChangeLog @@ -0,0 +1,5366 @@ +2014-03-24 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (-flto): Expand section about + using static libraries with LTO. + +2014-03-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR rtl-optimization/60501 + * optabs.def (addptr3_optab): New optab. + * optabs.c (gen_addptr3_insn, have_addptr3_insn): New function. + * doc/md.texi ("addptrm3"): Document new RTL standard expander. + * expr.h (gen_addptr3_insn, have_addptr3_insn): Add prototypes. + + * lra.c (emit_add3_insn): Use the addptr pattern if available. + + * config/s390/s390.md ("addptrdi3", "addptrsi3"): New expanders. + +2014-03-24 Ulrich Drepper <drepper@gmail.com> + + * config/i386/avx512fintrin.h: Define _mm512_set1_ps and + _mm512_set1_pd. + + * config/i386/avxintrin.h (_mm256_undefined_si256): Define. + (_mm256_undefined_ps): Define. + (_mm256_undefined_pd): Define. + * config/i386/emmintrin.h (_mm_undefined_si128): Define. + (_mm_undefined_pd): Define. + * config/i386/xmmintrin.h (_mm_undefined_ps): Define. + * config/i386/avx512fintrin.h (_mm512_undefined_si512): Define. + (_mm512_undefined_ps): Define. + (_mm512_undefined_pd): Define. + Use _mm*_undefined_*. + * config/i386/avx2intrin.h: Use _mm*_undefined_*. + +2014-03-24 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64-simd-builtins.def (lshr): DI mode excluded. + (lshr_simd): DI mode added. + * config/aarch64/aarch64-simd.md (aarch64_lshr_simddi): New pattern. + (aarch64_ushr_simddi): Likewise. + * config/aarch64/aarch64.md (UNSPEC_USHR64): New unspec. + * config/aarch64/arm_neon.h (vshr_n_u64): Intrinsic fixed. + (vshrd_n_u64): Likewise. + +2014-03-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * Makefile.in (s-macro_list): Depend on cc1. + +2014-03-23 Teresa Johnson <tejohnson@google.com> + + * ipa-utils.c (ipa_print_order): Use specified dump file. + +2014-03-23 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/60601 + * bb-reorder.c (fix_up_fall_thru_edges): Test EDGE_FALLTHRU everywhere. + + * gcc.c (eval_spec_function): Initialize save_growing_value. + +2014-03-22 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/60613 + * internal-fn.c (ubsan_expand_si_overflow_addsub_check): For + code == MINUS_EXPR, never swap op0 with op1. + + * toplev.c (init_local_tick): Avoid signed integer multiplication + overflow. + * genautomata.c (reserv_sets_hash_value): Fix rotate idiom, avoid + shift by first operand's bitsize. + +2014-03-21 Jakub Jelinek <jakub@redhat.com> + + PR target/60610 + * config/i386/i386.h (TARGET_64BIT_P): If not TARGET_BI_ARCH, + redefine to 1 or 0. + * config/i386/darwin.h (TARGET_64BIT_P): Redefine to + TARGET_ISA_64BIT_P(x). + +2014-03-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_expand_vector_set): Generate a + pattern for vector nor instead of subtract from splat(-1). + (altivec_expand_vec_perm_const_le): Likewise. + +2014-03-21 Richard Henderson <rth@twiddle.net> + + PR target/60598 + * ifcvt.c (dead_or_predicable): Return FALSE if there are any frame + related insns after epilogue_completed. + +2014-03-21 Martin Jambor <mjambor@suse.cz> + + PR ipa/59176 + * cgraph.h (symtab_node): New flag body_removed. + * ipa.c (symtab_remove_unreachable_nodes): Set body_removed flag + when removing bodies. + * symtab.c (dump_symtab_base): Dump body_removed flag. + * cgraph.c (verify_edge_corresponds_to_fndecl): Skip nodes which + had their bodies removed. + +2014-03-21 Martin Jambor <mjambor@suse.cz> + + PR ipa/60419 + * ipa.c (symtab_remove_unreachable_nodes): Clear thunk flag of nodes + in the border. + +2014-03-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60577 + * tree-core.h (struct tree_base): Document nothrow_flag use + in VAR_DECL_NONALIASED. + * tree.h (VAR_DECL_NONALIASED): New. + (may_be_aliased): Adjust. + * coverage.c (build_var): Set VAR_DECL_NONALIASED. + +2014-03-20 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1): Remove outdated comment. + +2014-03-20 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/60597 + * ira.c (adjust_cleared_regs): Call copy_rtx on + *reg_equiv[REGNO (loc)].src_p before passing it to + simplify_replace_fn_rtx. + + PR target/60568 + * config/i386/i386.c (x86_output_mi_thunk): Surround UNSPEC_GOT + into CONST, put pic register as first operand of PLUS. Use + gen_const_mem for both 32-bit and 64-bit PIC got loads. + +2014-03-20 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/aarch64/aarch64.c (MEMORY_MOVE_COST): Delete. + +2014-03-20 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.c (sparc_do_work_around_errata): Implement work + around for store forwarding issue in the FPU on the UT699. + * config/sparc/sparc.md (in_branch_delay): Return false for single FP + loads and operations if -mfix-ut699 is specified. + (divtf3_hq): Tweak attribute. + (sqrttf2_hq): Likewise. + +2014-03-20 Eric Botcazou <ebotcazou@adacore.com> + + * calls.c (store_one_arg): Remove incorrect const qualification on the + type of the temporary. + * cfgexpand.c (expand_return): Likewise. + * expr.c (expand_constructor): Likewise. + (expand_expr_real_1): Likewise. + +2014-03-20 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/arm/arm.c (arm_dwarf_register_span): Update the element number + of parts. + +2014-03-19 Kaz Kojima <kkojima@gcc.gnu.org> + + PR target/60039 + * config/sh/sh.md (udivsi3_i1): Clobber R1 register. + +2014-03-19 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/aarch-common-protos.h + (alu_cost_table): Fix spelling of "extend". + * config/arm/arm.c (arm_new_rtx_costs): Fix spelling of "extend". + +2014-03-19 Richard Biener <rguenther@suse.de> + + PR middle-end/60553 + * tree-core.h (tree_type_common): Re-order pointer members + to reduce recursion depth during GC walks. + +2014-03-19 Marek Polacek <polacek@redhat.com> + + PR sanitizer/60569 + * ubsan.c (ubsan_type_descriptor): Check that DECL_NAME is nonnull + before accessing it. + +2014-03-19 Richard Biener <rguenther@suse.de> + + PR lto/59543 + * lto-streamer-in.c (input_function): In WPA stage do not drop + debug stmts. + +2014-03-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/60559 + * vectorizable_mask_load_store): Replace scalar MASK_LOAD + with build_zero_cst assignment. + +2014-03-18 Kai Tietz <ktietz@redhat.com> + + PR rtl-optimization/56356 + * sdbout.c (sdbout_parms): Verify that parms' + incoming argument is valid. + (sdbout_reg_parms): Likewise. + +2014-03-18 Richard Henderson <rth@redhat.com> + + PR target/60562 + * config/i386/i386.md (*float<SWI48x><MODEF>2_i387): Move down to + be shadowed by *float<SWI48><MODEF>2_sse. Test X87_ENABLE_FLOAT. + (*float<SWI48><MODEF>2_sse): Check X87_ENABLE_FLOAT for alternative 0. + +2014-03-18 Basile Starynkevitch <basile@starynkevitch.net> + + * plugin.def: Improve comment for PLUGIN_INCLUDE_FILE. + * doc/plugins.texi (Plugin callbacks): Mention + PLUGIN_INCLUDE_FILE. + Italicize plugin event names in description. Explain that + PLUGIN_PRAGMAS has no sense for lto1. Explain + PLUGIN_INCLUDE_FILE. + Remind that no GCC functions should be called after + PLUGIN_FINISH. + Explain what pragmas with expansion are. + +2014-03-18 Martin Liska <mliska@suse.cz> + + * cgraph.c (cgraph_update_edges_for_call_stmt_node): Added case when + gimple call statement is update. + * gimple-fold.c (gimple_fold_call): Changed order for GIMPLE_ASSIGN and + GIMPLE_CALL, where gsi iterator still points to GIMPLE CALL. + +2014-03-18 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/60557 + * ubsan.c (ubsan_instrument_unreachable): Call + initialize_sanitizer_builtins. + (ubsan_pass): Likewise. + + PR sanitizer/60535 + * ubsan.c (ubsan_type_descriptor, ubsan_create_data): Call + varpool_finalize_decl instead of rest_of_decl_compilation. + +2014-03-18 Richard Biener <rguenther@suse.de> + + * df-problems.c (df_rd_confluence_n): Avoid bitmap_copy + by using bitmap_and_compl instead of bitmap_and_compl_into. + (df_rd_transfer_function): Likewise. + +2014-03-18 Richard Biener <rguenther@suse.de> + + * doc/lto.texi (fresolution): Fix typo. + +2014-03-18 Richard Biener <rguenther@suse.de> + + * doc/invoke.texi (flto): Update for changes in 4.9. + +2014-03-18 Richard Biener <rguenther@suse.de> + + * doc/loop.texi: Remove section on the removed lambda framework. + Update loop docs with recent changes in preserving loop structure. + +2014-03-18 Richard Biener <rguenther@suse.de> + + * doc/lto.texi (-fresolution): Document. + +2014-03-18 Richard Biener <rguenther@suse.de> + + * doc/contrib.texi: Adjust my name. + +2014-03-18 Jakub Jelinek <jakub@redhat.com> + + PR ipa/58721 + * internal-fn.c: Include diagnostic-core.h. + (expand_BUILTIN_EXPECT): New function. + * gimplify.c (gimplify_call_expr): Use false instead of FALSE. + (gimplify_modify_expr): Gimplify 3 argument __builtin_expect into + IFN_BUILTIN_EXPECT call instead of __builtin_expect builtin call. + * ipa-inline-analysis.c (find_foldable_builtin_expect): Handle + IFN_BUILTIN_EXPECT. + * predict.c (expr_expected_value_1): Handle IFN_BUILTIN_EXPECT. + Revert 3 argument __builtin_expect code. + (strip_predict_hints): Handle IFN_BUILTIN_EXPECT. + * gimple-fold.c (gimple_fold_call): Likewise. + * tree.h (fold_builtin_expect): New prototype. + * builtins.c (build_builtin_expect_predicate): Add predictor + argument, if non-NULL, create 3 argument __builtin_expect. + (fold_builtin_expect): No longer static. Add ARG2 argument, + pass it through to build_builtin_expect_predicate. + (fold_builtin_2): Adjust caller. + (fold_builtin_3): Handle BUILT_IN_EXPECT. + * internal-fn.def (BUILTIN_EXPECT): New. + +2014-03-18 Tobias Burnus <burnus@net-b.de> + + PR ipa/58721 + * predict.def (PRED_FORTRAN_OVERFLOW, PRED_FORTRAN_FAIL_ALLOC, + PRED_FORTRAN_FAIL_IO, PRED_FORTRAN_WARN_ONCE, PRED_FORTRAN_SIZE_ZERO, + PRED_FORTRAN_INVALID_BOUND, PRED_FORTRAN_ABSENT_DUMMY): Add. + +2014-03-18 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/58721 + * predict.c (combine_predictions_for_bb): Fix up formatting. + (expr_expected_value_1, expr_expected_value): Add predictor argument, + fill what it points to if non-NULL. + (tree_predict_by_opcode): Adjust caller, use the predictor. + * predict.def (PRED_COMPARE_AND_SWAP): Add. + +2014-03-18 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.c (sparc_do_work_around_errata): Speed up and use + proper constant for the store mode. + +2014-03-18 Ilya Enkovich <ilya.enkovich@intel.com> + + * symtab.c (change_decl_assembler_name): Fix transparent alias + chain construction. + +2014-03-16 Renlin Li <Renlin.Li@arm.com> + + * config/aarch64/aarch64.c: Correct the comments about the + aarch64 stack layout. + +2014-03-18 Thomas Schwinge <thomas@codesourcery.com> + + * omp-low.c (lower_rec_input_clauses) <build_omp_barrier>: Restore + check for GF_OMP_FOR_KIND_FOR. + +2013-03-18 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/i386.h (ADDITIONAL_REGISTER_NAMES): Add + ymm and zmm register names. + +2014-03-17 Jakub Jelinek <jakub@redhat.com> + + PR target/60516 + * config/i386/i386.c (ix86_expand_epilogue): Adjust REG_CFA_ADJUST_CFA + note creation for the 2010-08-31 changes. + +2014-03-17 Marek Polacek <polacek@redhat.com> + + PR middle-end/60534 + * omp-low.c (omp_max_vf): Treat -fno-tree-loop-optimize the same + as -fno-tree-loop-vectorize. + (expand_omp_simd): Likewise. + +2014-03-15 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc-protos.h (tls_call_delay): Delete. + (eligible_for_call_delay): New prototype. + * config/sparc/sparc.c (tls_call_delay): Rename into... + (eligible_for_call_delay): ...this. Return false if the instruction + cannot be put in the delay slot of a branch. + (eligible_for_restore_insn): Simplify. + (eligible_for_return_delay): Return false if the instruction cannot be + put in the delay slot of a branch and simplify. + (eligible_for_sibcall_delay): Return false if the instruction cannot be + put in the delay slot of a branch. + * config/sparc/sparc.md (fix_ut699): New attribute. + (tls_call_delay): Delete. + (in_call_delay): Reimplement. + (eligible_for_sibcall_delay): Rename into... + (in_sibcall_delay): ...this. + (eligible_for_return_delay): Rename into... + (in_return_delay): ...this. + (in_branch_delay): Reimplement. + (in_uncond_branch_delay): Delete. + (in_annul_branch_delay): Delete. + +2014-03-14 Richard Henderson <rth@redhat.com> + + PR target/60525 + * config/i386/i386.md (floathi<X87MODEF>2): Delete expander; rename + define_insn from *floathi<X87MODEF>2_i387; allow nonimmediate_operand. + (*floathi<X87MODEF>2_i387_with_temp): Remove. + (floathi splitters): Remove. + (float<SWI48x>xf2): New pattern. + (float<SWI48><MODEF>2): Rename from float<SWI48x><X87MODEF>2. Drop + code that tried to handle DImode for 32-bit, but which was excluded + by the pattern's condition. Drop allocation of stack temporary. + (*floatsi<MODEF>2_vector_mixed_with_temp): Remove. + (*float<SWI48><MODEF>2_mixed_with_temp): Remove. + (*float<SWI48><MODEF>2_mixed_interunit): Remove. + (*float<SWI48><MODEF>2_mixed_nointerunit): Remove. + (*floatsi<MODEF>2_vector_sse_with_temp): Remove. + (*float<SWI48><MODEF>2_sse_with_temp): Remove. + (*float<SWI48><MODEF>2_sse_interunit): Remove. + (*float<SWI48><MODEF>2_sse_nointerunit): Remove. + (*float<SWI48x><X87MODEF>2_i387_with_temp): Remove. + (*float<SWI48x><X87MODEF>2_i387): Remove. + (all float _with_temp splitters): Remove. + (*float<SWI48x><MODEF>2_i387): New pattern. + (*float<SWI48><MODEF>2_sse): New pattern. + (float TARGET_USE_VECTOR_CONVERTS splitters): Merge them. + (float TARGET_SSE_PARTIAL_REG_DEPENDENCY splitters): Merge them. + +2014-03-14 Jakub Jelinek <jakub@redhat.com> + Marek Polacek <polacek@redhat.com> + + PR middle-end/60484 + * common.opt (dump_base_name_prefixed): New Variable. + * opts.c (finish_options): Don't prepend directory to x_dump_base_name + if x_dump_base_name_prefixed is already set, set it at the end. + +2014-03-14 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/60508 + * lra-constraints.c (get_reload_reg): Add new parameter + in_subreg_p. + (process_addr_reg, simplify_operand_subreg, curr_insn_transform): + Pass the new parameter values. + +2014-03-14 Richard Biener <rguenther@suse.de> + + * common.opt: Revert unintented changes from r205065. + * opts.c: Likewise. + +2014-03-14 Richard Biener <rguenther@suse.de> + + PR middle-end/60518 + * cfghooks.c (split_block): Properly adjust all loops the + block was a latch of. + +2014-03-14 Martin Jambor <mjambor@suse.cz> + + PR lto/60461 + * ipa-prop.c (ipa_modify_call_arguments): Fix iteration condition + and simplify it. + +2014-03-14 Georg-Johann Lay <avr@gjlay.de> + + PR target/59396 + * config/avr/avr.c (avr_set_current_function): Pass function name + through default_strip_name_encoding before sanity checking instead + of skipping the first char of the assembler name. + +2014-03-13 Richard Henderson <rth@redhat.com> + + PR debug/60438 + * config/i386/i386.c (ix86_split_fp_branch): Remove pushed argument. + (ix86_force_to_memory, ix86_free_from_memory): Remove. + * config/i386/i386-protos.h: Likewise. + * config/i386/i386.md (floathi<X87MODEF>2): Use assign_386_stack_local + in the expander instead of a splitter. + (float<SWI48x><X87MODEF>2): Use assign_386_stack_local if there is + any possibility of requiring a memory. + (*floatsi<MODEF>2_vector_mixed): Remove, and the splitters. + (*floatsi<MODEF>2_vector_sse): Remove, and the splitters. + (fp branch splitters): Update for ix86_split_fp_branch. + (*jcc<X87MODEF>_<SWI24>_i387): Remove r/f alternative. + (*jcc<X87MODEF>_<SWI24>_r_i387): Likewise. + (splitter for jcc<X87MODEF>_<SWI24>_i387 r/f): Remove. + (*fop_<MODEF>_2_i387): Remove f/r alternative. + (*fop_<MODEF>_3_i387): Likewise. + (*fop_xf_2_i387, *fop_xf_3_i387): Likewise. + (splitters for the fop_* register patterns): Remove. + (fscalexf4_i387): Rename from *fscalexf4_i387. + (ldexpxf3): Use gen_floatsixf2 and gen_fscalexf4_i387. + +2014-03-13 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59779 + * tree-dfa.c (get_ref_base_and_extent): Use double_int + type for bitsize and maxsize instead of HOST_WIDE_INT. + +2014-03-13 Steven Bosscher <steven@gcc.gnu.org> + + PR rtl-optimization/57320 + * function.c (rest_of_handle_thread_prologue_and_epilogue): Cleanup + the CFG after thread_prologue_and_epilogue_insns. + +2014-03-13 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/57189 + * lra-constraints.c (process_alt_operands): Disfavor spilling + vector pseudos. + +2014-03-13 Cesar Philippidis <cesar@codesourcery.com> + + * lto-wrapper.c (maybe_unlink_file): Suppress diagnostic + messages. + +2014-03-13 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59025 + PR middle-end/60418 + * tree-ssa-reassoc.c (sort_by_operand_rank): For SSA_NAMEs with the + same rank, sort by bb_rank and gimple_uid of SSA_NAME_DEF_STMT first. + +2014-03-13 Georg-Johann Lay <avr@gjlay.de> + + PR target/60486 + * config/avr/avr.c (avr_out_plus): Swap cc_plus and cc_minus in + calls of avr_out_plus_1. + +2014-03-13 Bin Cheng <bin.cheng@arm.com> + + * tree-cfgcleanup.c (remove_forwarder_block_with_phi): Record + BB's single pred and update the father loop's latch info later. + +2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types. + (VEC_M): Likewise. + (VEC_N): Likewise. + (VEC_R): Likewise. + (VEC_base): Likewise. + (mov<MODE>, VEC_M modes): If we are loading TImode into VSX + registers, we need to swap double words in little endian mode. + + * config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode + to be a container mode for 128-bit integer operations added in ISA + 2.07. Unlike TImode and PTImode, the preferred register set is + the Altivec/VMX registers for the 128-bit operations. + + * config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add + declarations. + (rs6000_split_128bit_ok_p): Likewise. + + * config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support + macros for creating ISA 2.07 normal and overloaded builtin + functions with 3 arguments. + (BU_P8V_OVERLOAD_3): Likewise. + (VPERM_1T): Add support for V1TImode in 128-bit vector operations + for use as overloaded functions. + (VPERM_1TI_UNS): Likewise. + (VSEL_1TI): Likewise. + (VSEL_1TI_UNS): Likewise. + (ST_INTERNAL_1ti): Likewise. + (LD_INTERNAL_1ti): Likewise. + (XXSEL_1TI): Likewise. + (XXSEL_1TI_UNS): Likewise. + (VPERM_1TI): Likewise. + (VPERM_1TI_UNS): Likewise. + (XXPERMDI_1TI): Likewise. + (SET_1TI): Likewise. + (LXVD2X_V1TI): Likewise. + (STXVD2X_V1TI): Likewise. + (VEC_INIT_V1TI): Likewise. + (VEC_SET_V1TI): Likewise. + (VEC_EXT_V1TI): Likewise. + (EQV_V1TI): Likewise. + (NAND_V1TI): Likewise. + (ORC_V1TI): Likewise. + (VADDCUQ): Add support for 128-bit integer arithmetic instructions + added in ISA 2.07. Add both normal 'altivec' builtins, and the + overloaded builtin. + (VADDUQM): Likewise. + (VSUBCUQ): Likewise. + (VADDEUQM): Likewise. + (VADDECUQ): Likewise. + (VSUBEUQM): Likewise. + (VSUBECUQ): Likewise. + + * config/rs6000/rs6000-c.c (__int128_type): New static to hold + __int128_t and __uint128_t types. + (__uint128_type): Likewise. + (altivec_categorize_keyword): Add support for vector __int128_t, + vector __uint128_t, vector __int128, and vector unsigned __int128 + as a container type for TImode operations that need to be done in + VSX/Altivec registers. + (rs6000_macro_to_expand): Likewise. + (altivec_overloaded_builtins): Add ISA 2.07 overloaded functions + to support 128-bit integer instructions vaddcuq, vadduqm, + vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm. + (altivec_resolve_overloaded_builtin): Add support for V1TImode. + + * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support + for V1TImode, and set up preferences to use VSX/Altivec registers. + Setup VSX reload handlers. + (rs6000_debug_reg_global): Likewise. + (rs6000_init_hard_regno_mode_ok): Likewise. + (rs6000_preferred_simd_mode): Likewise. + (vspltis_constant): Do not allow V1TImode as easy altivec constants. + (easy_altivec_constant): Likewise. + (output_vec_const_move): Likewise. + (rs6000_expand_vector_set): Convert V1TImode set and extract to + simple move. + (rs6000_expand_vector_extract): Likewise. + (reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg + addressing. + (rs6000_const_vec): Add support for V1TImode. + (rs6000_emit_le_vsx_load): Swap double words when loading or + storing TImode/V1TImode. + (rs6000_emit_le_vsx_store): Likewise. + (rs6000_emit_le_vsx_move): Likewise. + (rs6000_emit_move): Add support for V1TImode. + (altivec_expand_ld_builtin): Likewise. + (altivec_expand_st_builtin): Likewise. + (altivec_expand_vec_init_builtin): Likewise. + (altivec_expand_builtin): Likewise. + (rs6000_init_builtins): Add support for V1TImode type. Add + support for ISA 2.07 128-bit integer builtins. Define type names + for the VSX/Altivec vector types. + (altivec_init_builtins): Add support for overloaded vector + functions with V1TImode type. + (rs6000_preferred_reload_class): Prefer Altivec registers for V1TImode. + (rs6000_move_128bit_ok_p): Move 128-bit move/split validation to + external function. + (rs6000_split_128bit_ok_p): Likewise. + (rs6000_handle_altivec_attribute): Create V1TImode from vector + __int128_t and vector __uint128_t. + + * config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators + and mode attributes. + (VSX_M): Likewise. + (VSX_M2): Likewise. + (VSm): Likewise. + (VSs): Likewise. + (VSr): Likewise. + (VSv): Likewise. + (VS_scalar): Likewise. + (VS_double): Likewise. + (vsx_set_v1ti): New builtin function to create V1TImode from TImode. + + * config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say whether + we support the ISA 2.07 128-bit integer arithmetic instructions. + (ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode. + (enum rs6000_builtin_type_index): Add fields to hold V1TImode + and TImode types for use with the builtin functions. + (V1TI_type_node): Likewise. + (unsigned_V1TI_type_node): Likewise. + (intTI_type_internal_node): Likewise. + (uintTI_type_internal_node): Likewise. + + * config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA 2.07 + 128-bit builtin functions. + (UNSPEC_VADDEUQM): Likewise. + (UNSPEC_VADDECUQ): Likewise. + (UNSPEC_VSUBCUQ): Likewise. + (UNSPEC_VSUBEUQM): Likewise. + (UNSPEC_VSUBECUQ): Likewise. + (VM): Add V1TImode to vector mode iterators. + (VM2): Likewise. + (VI_unit): Likewise. + (altivec_vadduqm): Add ISA 2.07 128-bit binary builtins. + (altivec_vaddcuq): Likewise. + (altivec_vsubuqm): Likewise. + (altivec_vsubcuq): Likewise. + (altivec_vaddeuqm): Likewise. + (altivec_vaddecuq): Likewise. + (altivec_vsubeuqm): Likewise. + (altivec_vsubecuq): Likewise. + + * config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector + mode iterators. + (BOOL_128): Likewise. + (BOOL_REGS_OUTPUT): Likewise. + (BOOL_REGS_OP1): Likewise. + (BOOL_REGS_OP2): Likewise. + (BOOL_REGS_UNARY): Likewise. + (BOOL_REGS_AND_CR0): Likewise. + + * config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07 + 128-bit integer builtin support. + (vec_vadduqm): Likewise. + (vec_vaddecuq): Likewise. + (vec_vaddeuqm): Likewise. + (vec_vsubecuq): Likewise. + (vec_vsubeuqm): Likewise. + (vec_vsubcuq): Likewise. + (vec_vsubuqm): Likewise. + + * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): + Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm, + vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding + 128-bit integer add/subtract to ISA 2.07. + +2014-03-12 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (arc_predicate_delay_insns): + Fix third argument passed to conditionalize_nonjump. + +2014-03-12 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Add BUILT_IN_LFLOORF, + BUILT_IN_LLFLOOR, BUILT_IN_LCEILF and BUILT_IN_LLCEIL. + * config/aarch64/arm_neon.h (vcvtaq_u64_f64): Call __builtin_llfloor + instead of __builtin_lfloor. + (vcvtnq_u64_f64): Call __builtin_llceil instead of __builtin_lceil. + +2014-03-12 Jakub Jelinek <jakub@redhat.com> + + * tree-ssa-ifcombine.c (forwarder_block_to): New function. + (tree_ssa_ifcombine_bb_1): New function. + (tree_ssa_ifcombine_bb): Use it. Handle also cases where else_bb + is an empty forwarder block to then_bb or vice versa and then_bb + and else_bb are effectively swapped. + +2014-03-12 Christian Bruel <christian.bruel@st.com> + + PR target/60264 + * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Emit a + REG_CFA_DEF_CFA note. + (arm_expand_epilogue_apcs_frame): call arm_add_cfa_adjust_cfa_note. + (arm_unwind_emit): Allow REG_CFA_DEF_CFA. + +2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR tree-optimization/60454 + * tree-ssa-math-opts.c (find_bswap_1): Fix bswap detection. + +2014-03-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config.gcc (aarch64*-*-*): Use ISA flags from aarch64-arches.def. + Do not define target_cpu_default2 to generic. + * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Use generic cpu. + * config/aarch64/aarch64.c (aarch64_override_options): Update comment. + * config/aarch64/aarch64-arches.def (armv8-a): Use generic cpu. + +2014-03-12 Jakub Jelinek <jakub@redhat.com> + Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/60502 + * tree-ssa-reassoc.c (eliminate_not_pairs): Use build_all_ones_cst + instead of build_low_bits_mask. + +2014-03-12 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/60482 + * tree-vrp.c (register_edge_assert_for_1): Don't add assert + if there are multiple uses, but op doesn't live on E edge. + * tree-cfg.c (assert_unreachable_fallthru_edge_p): Also ignore + clobber stmts before __builtin_unreachable. + +2014-03-11 Richard Sandiford <rdsandiford@googlemail.com> + + * builtins.c (expand_builtin_setjmp_receiver): Use and clobber + hard_frame_pointer_rtx. + * cse.c (cse_insn): Remove volatile check. + * cselib.c (cselib_process_insn): Likewise. + * dse.c (scan_insn): Likewise. + +2014-03-11 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (conditionalize_nonjump): New function, + broken out of ... + (arc_ifcvt): ... this. + (arc_predicate_delay_insns): Use it. + +2014-03-11 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/predicates.md (extend_operand): During/after reload, + allow const_int_operand. + * config/arc/arc.md (mulsidi3_700): Use extend_operand predicate. + (umulsidi3_700): Likewise. Change operand 2 constraint back to "cL". + (mulsi3_highpart): Change operand 2 constraint alternatives 2 and 3 + to "i". + (umulsi3_highpart_i): Likewise. + +2014-03-11 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c (get_constraint_for_ptr_offset): + Add asserts to guard possible wrong-code bugs. + +2014-03-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60429 + PR tree-optimization/60485 + * tree-ssa-structalias.c (set_union_with_increment): Properly + take into account all fields that overlap the shifted vars. + (do_sd_constraint): Likewise. + (do_ds_constraint): Likewise. + (get_constraint_for_ptr_offset): Likewise. + +2014-03-11 Chung-Lin Tang <cltang@codesourcery.com> + + * config/nios2/nios2.c (machine_function): Add fp_save_offset field. + (nios2_compute_frame_layout): + Add calculation of cfun->machine->fp_save_offset. + (nios2_expand_prologue): Correct setting of frame pointer register + in prologue. + (nios2_expand_epilogue): Update recovery of stack pointer from + frame pointer accordingly. + (nios2_initial_elimination_offset): Update calculation of offset + for eliminating to HARD_FRAME_POINTER_REGNUM. + +2014-03-10 Jakub Jelinek <jakub@redhat.com> + + PR ipa/60457 + * ipa.c (symtab_remove_unreachable_nodes): Don't call + cgraph_get_create_node on VAR_DECLs. + +2014-03-10 Richard Biener <rguenther@suse.de> + + PR middle-end/60474 + * tree.c (signed_or_unsigned_type_for): Handle OFFSET_TYPEs. + +2014-03-08 Douglas B Rupp <rupp@gnat.com> + + * config/vms/vms.opt (vms_float_format): New variable. + +2014-03-08 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (-fcilkplus): Update implementation status. + +2014-03-08 Paulo Matos <paulo@matos-sorge.com> + Richard Biener <rguenther@suse.de> + + * lto-wrapper.c (merge_and_complain): Ensure -fshort-double is used + consistently accross all TUs. + (run_gcc): Enable -fshort-double automatically at link at link-time + and disallow override. + +2014-03-08 Richard Sandiford <rdsandiford@googlemail.com> + + PR target/58271 + * config/mips/mips.c (mips_option_override): Promote -mpaired-single + warning to an error. Disable TARGET_PAIRED_SINGLE and TARGET_MIPS3D + if they can't be used. + +2014-03-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (HAVE_AS_IX86_TLSLDMPLT): Improve test + for Solaris 11/x86 ld. + * configure: Regenerate. + +2014-03-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (TLS_SECTION_ASM_FLAG): Save as tls_section_flag. + (LIB_TLS_SPEC): Save as ld_tls_libs. + (HAVE_AS_IX86_TLSLDMPLT): Define as 1/0. + (HAVE_AS_IX86_TLSLDM): New test. + * configure, config.in: Regenerate. + * config/i386/i386.c (legitimize_tls_address): Fall back to + TLS_MODEL_GLOBAL_DYNAMIC on 32-bit Solaris/x86 if tool chain + cannot support TLS_MODEL_LOCAL_DYNAMIC. + * config/i386/i386.md (*tls_local_dynamic_base_32_gnu): Use if + instead of #ifdef in HAVE_AS_IX86_TLSLDMPLT test. + +2014-03-07 Paulo Matos <paulo@matos-sorge.com> + + * common.opt (fira-loop-pressure): Mark as optimization. + +2014-03-07 Thomas Schwinge <thomas@codesourcery.com> + + * langhooks.c (lhd_omp_mappable_type): The error_mark_node is not + an OpenMP mappable type. + +2014-03-06 Matthias Klose <doko@ubuntu.com> + + * Makefile.in (s-mlib): Only pass MULTIARCH_DIRNAME if + MULTILIB_OSDIRNAMES is not defined. + +2014-03-06 Jakub Jelinek <jakub@redhat.com> + Meador Inge <meadori@codesourcery.com> + + PR target/58595 + * config/arm/arm.c (arm_tls_symbol_p): Remove. + (arm_legitimize_address): Call legitimize_tls_address for any + arm_tls_referenced_p expression, handle constant addend. Call it + before testing for !TARGET_ARM. + (thumb_legitimize_address): Don't handle arm_tls_symbol_p here. + +2014-03-06 Richard Biener <rguenther@suse.de> + + PR middle-end/60445 + PR lto/60424 + PR lto/60427 + Revert + 2014-03-04 Paulo Matos <paulo@matos-sorge.com> + + * tree-streamer.c (record_common_node): Assert we don't record + nodes with type double. + (preload_common_node): Skip type double, complex double and double + pointer since it is now frontend dependent due to fshort-double option. + +2014-03-06 Richard Biener <rguenther@suse.de> + + * gcc.c (PLUGIN_COND): Always enable unless -fno-use-linker-plugin + or -fno-lto is specified and the linker has full plugin support. + * collect2.c (lto_mode): Default to LTO_MODE_WHOPR if LTO is enabled. + (main): Remove -flto processing, adjust lto_mode using use_plugin late. + * lto-wrapper.c (merge_and_complain): Merge compile-time + optimization levels. + (run_gcc): And pass it through to the link options. + +2014-03-06 Alexandre Oliva <aoliva@redhat.com> + + PR debug/60381 + Revert: + 2014-02-28 Alexandre Oliva <aoliva@redhat.com> + PR debug/59992 + * cselib.c (remove_useless_values): Skip to avoid quadratic + behavior if the condition moved from... + (cselib_process_insn): ... here holds. + +2014-03-05 Jakub Jelinek <jakub@redhat.com> + + PR plugins/59335 + * Makefile.in (PLUGIN_HEADERS): Add tree-phinodes.h, stor-layout.h, + ssa-iterators.h, $(RESOURCE_H) and tree-cfgcleanup.h. + + PR plugins/59335 + * config/i386/t-i386 (OPTIONS_H_EXTRA): Add stringop.def. + (TM_H): Add x86-tune.def. + +2014-03-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (generic_tunings): + Use cortexa57_extra_costs. + +2014-03-05 Jakub Jelinek <jakub@redhat.com> + + PR lto/60404 + * cfgexpand.c (expand_used_vars): Do not assume all SSA_NAMEs + of PARM/RESULT_DECLs must be coalesced with optimize && in_lto_p. + * tree-ssa-coalesce.c (coalesce_ssa_name): Use MUST_COALESCE_COST - 1 + cost for in_lto_p. + +2014-03-04 Heiher <r@hev.cc> + + * config/mips/mips-cpus.def (loongson3a): Mark as a MIPS64r2 processor. + * config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Adjust accordingly. + +2014-03-04 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/predicates.md (const2356_operand): Change to ... + (const2367_operand): ... this. + * config/i386/sse.md (avx512pf_scatterpf<mode>sf): Use + const2367_operand. + (*avx512pf_scatterpf<mode>sf_mask): Ditto. + (*avx512pf_scatterpf<mode>sf): Ditto. + (avx512pf_scatterpf<mode>df): Ditto. + (*avx512pf_scatterpf<mode>df_mask): Ditto. + (*avx512pf_scatterpf<mode>df): Ditto. + * config/i386/i386.c (ix86_expand_builtin): Update + incorrect hint operand error message. + +2014-03-04 Richard Biener <rguenther@suse.de> + + * lto-section-in.c (lto_get_section_data): Fix const cast. + +2014-03-04 Paulo Matos <paulo@matos-sorge.com> + + * tree-streamer.c (record_common_node): Assert we don't record + nodes with type double. + (preload_common_node): Skip type double, complex double and double + pointer since it is now frontend dependent due to fshort-double option. + +2014-03-04 Richard Biener <rguenther@suse.de> + + PR lto/60405 + * lto-streamer-in.c (lto_read_body): Remove LTO bytecode version check. + (lto_input_toplevel_asms): Likewise. + * lto-section-in.c (lto_get_section_data): Instead do it here + for every section. + +2014-03-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60382 + * tree-vect-loop.c (vect_is_simple_reduction_1): Do not consider + dead PHIs a reduction. + +2014-03-03 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/xmmintrin.h (enum _mm_hint) <_MM_HINT_ET0>: Correct + hint value. + (_mm_prefetch): Move out of GCC target("sse") pragma. + * config/i386/prfchwintrin.h (_m_prefetchw): Move out of + GCC target("prfchw") pragma. + * config/i386/i386.md (prefetch): Emit prefetchwt1 only + for locality <= 2. + * config/i386/i386.c (ix86_option_override_internal): Enable + -mprfchw with -mprefetchwt1. + +2014-03-03 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.md (casesi_load) <length attribute alternative 0>: + Mark as varying. + +2014-03-03 Joern Rennecke <joern.rennecke@embecosm.com> + + * opts.h (CL_PCH_IGNORE): Define. + * targhooks.c (option_affects_pch_p): + Return false for options that have CL_PCH_IGNORE set. + * opt-functions.awk: Process PchIgnore. + * doc/options.texi: Document PchIgnore. + + * config/arc/arc.opt (misize): Add PchIgnore property. + +2014-03-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_preferred_reload_class): Disallow + reload of PLUS rtx's outside of GENERAL_REGS or BASE_REGS; relax + constraint on constants to permit them being loaded into + GENERAL_REGS or BASE_REGS. + +2014-03-03 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78-real.md (cbranchsi4_real_signed): Add + anti-cacnonical alternatives. + (negandhi3_real): New pattern. + * config/rl78/rl78-virt.md (negandhi3_virt): New pattern. + +2014-03-03 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + + * config/avr/avr-mcus.def: Remove atxmega16x1. + * config/avr/avr-tables.opt: Regenerate. + * config/avr/t-multilib: Regenerate. + * doc/avr-mmcu.texi: Regenerate. + +2014-03-03 Tobias Grosser <tobias@grosser.es> + Mircea Namolaru <mircea.namolaru@inria.fr> + + PR tree-optimization/58028 + * graphite-clast-to-gimple.c (set_cloog_options): Don't remove + scalar dimensions. + +2014-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/neon.md (*movmisalign<mode>): Legitimize addresses + not handled by recognizers. + +2014-03-03 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/60175 + * function.c (expand_function_end): Don't emit + clobber_return_register sequence if clobber_after is a BARRIER. + * cfgexpand.c (construct_exit_block): Append instructions before + return_label to prev_bb. + +2014-03-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/constraints.md: Document reserved use of "wc". + +2014-03-02 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/60150 + * ipa.c (function_and_variable_visibility): When dissolving comdat + group, also set all symbols to local. + +2014-03-02 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/60306 + + Revert: + 2013-12-14 Jan Hubicka <jh@suse.cz> + PR middle-end/58477 + * ipa-prop.c (stmt_may_be_vtbl_ptr_store): Skip clobbers. + +2014-03-02 Jon Beniston <jon@beniston.com> + + PR bootstrap/48230 + PR bootstrap/50927 + PR bootstrap/52466 + PR target/46898 + * config/lm32/lm32.c (lm32_legitimate_constant_p): Remove, as incorrect. + (TARGET_LEGITIMATE_CONSTANT_P): Undefine, as not needed. + * config/lm32/lm32.md (movsi_insn): Add 32-bit immediate support. + (simple_return, *simple_return): New patterns + * config/lm32/predicates.md (movsi_rhs_operand): Remove as obsolete. + * configure.ac (force_sjlj_exceptions): Force sjlj exceptions for lm32. + +2014-03-01 Paolo Carlini <paolo.carlini@oracle.com> + + * dwarf2out.c (gen_subprogram_die): Tidy. + +2014-03-01 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/60071 + * config/sh/sh.md (*mov_t_msb_neg): Split into ... + (*mov_t_msb_neg_negc): ... this new insn. + +2014-02-28 Jason Merrill <jason@redhat.com> + + PR c++/58678 + * ipa-devirt.c (ipa_devirt): Don't choose an implicitly-declared + function. + +2014-02-28 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/60314 + * dwarf2out.c (decltype_auto_die): New static. + (gen_subprogram_die): Handle 'decltype(auto)' like 'auto'. + (gen_type_die_with_usage): Handle 'decltype(auto)'. + (is_cxx_auto): Likewise. + +2014-02-28 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.h: Define __ARM_NEON by default if + we are not using general regs only. + +2014-02-28 Richard Biener <rguenther@suse.de> + + PR target/60280 + * tree-cfgcleanup.c (tree_forwarder_block_p): Restrict + previous fix and only allow to remove trivial pre-headers + and latches. Also honor LOOPS_MAY_HAVE_MULTIPLE_LATCHES. + (remove_forwarder_block): Properly update the latch of a loop. + +2014-02-28 Alexandre Oliva <aoliva@redhat.com> + + PR debug/59992 + * cselib.c (cselib_hasher::equal): Special-case VALUE lookup. + (cselib_preserved_hash_table): New. + (preserve_constants_and_equivs): Move preserved vals to it. + (cselib_find_slot): Look it up first. + (cselib_init): Initialize it. + (cselib_finish): Release it. + (dump_cselib_table): Dump it. + +2014-02-28 Alexandre Oliva <aoliva@redhat.com> + + PR debug/59992 + * cselib.c (remove_useless_values): Skip to avoid quadratic + behavior if the condition moved from... + (cselib_process_insn): ... here holds. + +2014-02-28 Alexandre Oliva <aoliva@redhat.com> + + PR debug/57232 + * var-tracking.c (vt_initialize): Apply the same condition to + preserve the CFA base value. + +2014-02-28 Joey Ye <joey.ye@arm.com> + + PR target/PR60169 + * config/arm/arm.c (thumb_far_jump_used_p): Don't change + if reload in progress or completed. + +2014-02-28 Tobias Burnus <burnus@net-b.de> + + PR middle-end/60147 + * tree-pretty-print.c (dump_generic_node, print_declaration): Handle + NAMELIST_DECL. + +2014-02-27 H.J. Lu <hongjiu.lu@intel.com> + + * doc/tm.texi.in (Condition Code Status): Update documention for + relative locations of cc0-setter and cc0-user. + +2014-02-27 Jeff Law <law@redhat.com> + + PR rtl-optimization/52714 + * combine.c (try_combine): When splitting an unrecognized PARALLEL + into two independent simple sets, if I3 is a jump, ensure the + pattern we place into I3 is a (set (pc) ...). + +2014-02-27 Mikael Pettersson <mikpe@it.uu.se> + Jeff Law <law@redhat.com> + + PR rtl-optimization/49847 + * cse.c (fold_rtx) Handle case where cc0 setter and cc0 user + are in different blocks. + * doc/tm.texi (Condition Code Status): Update documention for + relative locations of cc0-setter and cc0-user. + +2014-02-27 Vladimir Makarov <vmakarov@redhat.com> + + PR target/59222 + * lra.c (lra_emit_add): Check SUBREG too. + +2014-02-27 Andreas Schwab <schwab@suse.de> + + * config/m68k/m68k.c (m68k_option_override): Disable + -flive-range-shrinkage for classic m68k. + (m68k_override_options_after_change): Likewise. + +2014-02-27 Marek Polacek <polacek@redhat.com> + + PR middle-end/59223 + * tree-ssa-uninit.c (gate_warn_uninitialized): Run the pass even for + -Wmaybe-uninitialized. + +2014-02-27 Alan Modra <amodra@gmail.com> + + PR target/57936 + * reload1.c (emit_input_reload_insns): When reload_override_in, + set old to rl->in_reg when rl->in_reg is a subreg. + +2014-02-26 Richard Biener <rguenther@suse.de> + + PR bootstrap/60343 + * lra-assigns.c (spill_for): Avoid mixed-sign comparison. + +2014-02-25 Ilya Tocar <ilya.tocar@intel.com> + + * common/config/i386/predicates.md (const1256_operand): Remove. + (const2356_operand): New. + (const_1_to_2_operand): Remove. + * config/i386/sse.md (avx512pf_gatherpf<mode>sf): Change hint value. + (*avx512pf_gatherpf<mode>sf_mask): Ditto. + (*avx512pf_gatherpf<mode>sf): Ditto. + (avx512pf_gatherpf<mode>df): Ditto. + (*avx512pf_gatherpf<mode>df_mask): Ditto. + (*avx512pf_gatherpf<mode>df): Ditto. + (avx512pf_scatterpf<mode>sf): Ditto. + (*avx512pf_scatterpf<mode>sf_mask): Ditto. + (*avx512pf_scatterpf<mode>sf): Ditto. + (avx512pf_scatterpf<mode>df): Ditto. + (*avx512pf_scatterpf<mode>df_mask): Ditto. + (*avx512pf_scatterpf<mode>df): Ditto. + * common/config/i386/xmmintrin.h (_mm_hint): Add _MM_HINT_ET0. + +2014-02-26 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/avx512fintrin.h (_mm512_testn_epi32_mask), + (_mm512_mask_testn_epi32_mask), (_mm512_testn_epi64_mask), + (_mm512_mask_testn_epi64_mask): Move to ... + * config/i386/avx512cdintrin.h: Here. + * config/i386/i386.c (bdesc_args): Change MASK_ISA for testnm. + * config/i386/sse.md (avx512f_vmscalef<mode><round_name>): Remove %. + (avx512f_scalef<mode><mask_name><round_name>): Ditto. + (avx512f_testnm<mode>3<mask_scalar_merge_name>): Change conditon to + TARGET_AVX512F from TARGET_AVX512CD. + +2014-02-26 Richard Biener <rguenther@suse.de> + + PR ipa/60327 + * ipa.c (walk_polymorphic_call_targets): Properly guard + call to inline_update_overall_summary. + +2014-02-26 Bin Cheng <bin.cheng@arm.com> + + PR target/60280 + * tree-cfgcleanup.c (tree_forwarder_block_p): Protect loop preheaders + and latches only if requested. Fix latch if it is removed. + * tree-ssa-dom.c (tree_ssa_dominator_optimize): Set + LOOPS_HAVE_PREHEADERS. + +2014-02-25 Andrew Pinski <apinski@cavium.com> + + * builtins.c (expand_builtin_thread_pointer): Create a new target + when the target is NULL. + +2014-02-25 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/60317 + * params.def (PARAM_LRA_MAX_CONSIDERED_RELOAD_PSEUDOS): New. + * params.h (LRA_MAX_CONSIDERED_RELOAD_PSEUDOS): New. + * lra-assigns.c: Include params.h. + (spill_for): Use LRA_MAX_CONSIDERED_RELOAD_PSEUDOS as guard for + other reload pseudos considerations. + +2014-02-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vector.md (*vector_unordered<mode>): Change split + to use canonical form for nor<mode>3. + +2014-02-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/55426 + * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Allow 128 to 64-bit + conversions. + +2014-02-25 Ilya Tocar <ilya.tocar@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_PREFETCHWT1_SET), + (OPTION_MASK_ISA_PREFETCHWT1_UNSET): New. + (ix86_handle_option): Handle OPT_mprefetchwt1. + * config/i386/cpuid.h (bit_PREFETCHWT1): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect + PREFETCHWT1 CPUID. + * config/i386/i386-c.c (ix86_target_macros_internal): Handle + OPTION_MASK_ISA_PREFETCHWT1. + * config/i386/i386.c (ix86_target_string): Handle mprefetchwt1. + (PTA_PREFETCHWT1): New. + (ix86_option_override_internal): Handle PTA_PREFETCHWT1. + (ix86_valid_target_attribute_inner_p): Handle OPT_mprefetchwt1. + * config/i386/i386.h (TARGET_PREFETCHWT1, TARGET_PREFETCHWT1_P): New. + * config/i386/i386.md (prefetch): Check TARGET_PREFETCHWT1 + (*prefetch_avx512pf_<mode>_: Change into ... + (*prefetch_prefetchwt1_<mode>: This. + * config/i386/i386.opt (mprefetchwt1): New. + * config/i386/xmmintrin.h (_mm_hint): Add _MM_HINT_ET1. + (_mm_prefetch): Handle intent to write. + * doc/invoke.texi (mprefetchwt1), (mno-prefetchwt1): Doccument. + +2014-02-25 Richard Biener <rguenther@suse.de> + + PR middle-end/60291 + * emit-rtl.c (mem_attrs_htab): Remove. + (mem_attrs_htab_hash): Likewise. + (mem_attrs_htab_eq): Likewise. + (set_mem_attrs): Always allocate new mem-attrs when something changed. + (init_emit_once): Do not allocate mem_attrs_htab. + +2014-02-25 Richard Biener <rguenther@suse.de> + + PR lto/60319 + * lto-opts.c (lto_write_options): Output non-explicit conservative + -fwrapv, -fno-trapv and -fno-strict-overflow. + * lto-wrapper.c (merge_and_complain): Handle merging those options. + (run_gcc): And pass them through. + +2014-02-25 Andrey Belevantsev <abel@ispras.ru> + + * sel-sched.c (calculate_new_fences): New parameter ptime. + Calculate it as a maximum over all fence cycles. + (sel_sched_region_2): Adjust the call to calculate_new_fences. + Print the final schedule timing when sched_verbose. + +2014-02-25 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/60292 + * sel-sched.c (fill_vec_av_set): Do not reset target availability + bit fot the fence instruction. + +2014-02-24 Alangi Derick <alangiderick@gmail.com> + + * calls.h: Fix typo in comment. + +2014-02-24 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_output_move_double): Don't valididate when + adjusting offsetable addresses. + +2014-02-24 Guozhi Wei <carrot@google.com> + + * sparseset.h (sparseset_pop): Fix the wrong index. + +2014-02-24 Walter Lee <walt@tilera.com> + + * config.gcc (tilepro-*-*): Change to tilepro*-*-*. + (tilegx-*-linux*): Change to tilegx*-*-linux*; Support tilegxbe + triplet. + * common/config/tilegx/tilegx-common.c + (TARGET_DEFAULT_TARGET_FLAGS): Define. + * config/tilegx/linux.h (ASM_SPEC): Add endian_spec. + (LINK_SPEC): Ditto. + * config/tilegx/sync.md (atomic_test_and_set): Handle big endian. + * config/tilegx/tilegx.c (tilegx_return_in_msb): New. + (tilegx_gimplify_va_arg_expr): Handle big endian. + (tilegx_expand_unaligned_load): Ditto. + (tilegx_expand_unaligned_store): Ditto. + (TARGET_RETURN_IN_MSB): New. + * config/tilegx/tilegx.h (TARGET_DEFAULT): New. + (TARGET_ENDIAN_DEFAULT): New. + (TARGET_BIG_ENDIAN): Handle big endian. + (BYTES_BIG_ENDIAN): Ditto. + (WORDS_BIG_ENDIAN): Ditto. + (FLOAT_WORDS_BIG_ENDIAN): Ditto. + (ENDIAN_SPEC): New. + (EXTRA_SPECS): New. + * config/tilegx/tilegx.md (extv): Handle big endian. + (extzv): Ditto. + (insn_st<n>): Ditto. + (insn_st<n>_add<bitsuffix>): Ditto. + (insn_stnt<n>): Ditto. + (insn_stnt<n>_add<bitsuffix>):Ditto. + (vec_interleave_highv8qi): Handle big endian. + (vec_interleave_highv8qi_be): New. + (vec_interleave_highv8qi_le): New. + (insn_v1int_h): Handle big endian. + (vec_interleave_lowv8qi): Handle big endian. + (vec_interleave_lowv8qi_be): New. + (vec_interleave_lowv8qi_le): New. + (insn_v1int_l): Handle big endian. + (vec_interleave_highv4hi): Handle big endian. + (vec_interleave_highv4hi_be): New. + (vec_interleave_highv4hi_le): New. + (insn_v2int_h): Handle big endian. + (vec_interleave_lowv4hi): Handle big endian. + (vec_interleave_lowv4hi_be): New. + (vec_interleave_lowv4hi_le): New. + (insn_v2int_l): Handle big endian. + (vec_interleave_highv2si): Handle big endian. + (vec_interleave_highv2si_be): New. + (vec_interleave_highv2si_le): New. + (insn_v4int_h): Handle big endian. + (vec_interleave_lowv2si): Handle big endian. + (vec_interleave_lowv2si_be): New. + (vec_interleave_lowv2si_le): New. + (insn_v4int_l): Handle big endian. + * config/tilegx/tilegx.opt (mbig-endian): New option. + (mlittle-endian): New option. + * doc/install.texi: Document tilegxbe-linux. + * doc/invoke.texi: Document -mbig-endian and -mlittle-endian. + +2014-02-24 Martin Jambor <mjambor@suse.cz> + + PR ipa/60266 + * ipa-cp.c (propagate_constants_accross_call): Bail out early if + there are no parameter descriptors. + +2014-02-24 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/60268 + * sched-rgn.c (haifa_find_rgns): Move the nr_regions_initial variable + initialization to ... + (sched_rgn_init): ... here. + (schedule_region): Check for SCHED_PRESSURE_NONE earlier. + +2014-02-23 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.md: Correct ashrsi_reg / lshrsi_reg + names. + +2014-02-23 Edgar E. Iglesias <edgar.iglesias@xilinx.com> + + * config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED + definition. + +2014-02-23 David Holsgrove <david.holsgrove@xilinx.com> + + * /config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk, + define TARGET_ASM_OUTPUT_MI_THUNK and TARGET_ASM_CAN_OUTPUT_MI_THUNK. + +2014-02-23 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/predicates.md: Add cmp_op predicate. + * config/microblaze/microblaze.md: Add branch_compare instruction + which uses cmp_op predicate and emits cmp insn before branch. + * config/microblaze/microblaze.c (microblaze_emit_compare): Rename + to microblaze_expand_conditional_branch and consolidate logic. + (microblaze_expand_conditional_branch): emit branch_compare + insn instead of handling cmp op separate from branch insn. + +2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Relax assert + to permit subregs. + +2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace + define_insn with define_expand and new define_insn + *altivec_lve<VI_char>x_internal. + (altivec_stve<VI_char>x): Replace define_insn with define_expand + and new define_insn *altivec_stve<VI_char>x_internal. + * config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New + prototype. + * config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by + lve*x built-ins. + (altivec_expand_stvex_be): New function. + +2014-02-22 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/avr/avr.c (avr_can_eliminate): Allow elimination from + ARG_POINTER_REGNUM to STACK_POINTER_REGNUM if !frame_pointer_needed. + * config/avr/avr.c (ELIMINABLE_REGS): Add elimination from + ARG_POINTER_REGNUM to STACK_POINTER_REGNUM. + +2014-02-21 Vladimir Makarov <vmakarov@redhat.com> + + PR target/60298 + * lra-constraints.c (inherit_reload_reg): Use lra_emit_move + instead of emit_move_insn. + +2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (altivec_vsumsws): Replace second + vspltw with vsldoi. + (reduc_uplus_v16qi): Use gen_altivec_vsumsws_direct instead of + gen_altivec_vsumsws. + +2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (altivec_lvxl): Rename as + *altivec_lvxl_<mode>_internal and use VM2 iterator instead of V4SI. + (altivec_lvxl_<mode>): New define_expand incorporating + -maltivec=be semantics where needed. + (altivec_lvx): Rename as *altivec_lvx_<mode>_internal. + (altivec_lvx_<mode>): New define_expand incorporating -maltivec=be + semantics where needed. + (altivec_stvx): Rename as *altivec_stvx_<mode>_internal. + (altivec_stvx_<mode>): New define_expand incorporating + -maltivec=be semantics where needed. + (altivec_stvxl): Rename as *altivec_stvxl_<mode>_internal and use + VM2 iterator instead of V4SI. + (altivec_stvxl_<mode>): New define_expand incorporating + -maltivec=be semantics where needed. + * config/rs6000/rs6000-builtin.def: Add new built-in definitions + LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI, LVXL_V16QI, + LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI, LVX_V8HI, LVX_V16QI, STVX_V2DF, + STVX_V2DI, STVX_V4SF, STVX_V4SI, STVX_V8HI, STVX_V16QI, STVXL_V2DF, + STVXL_V2DI, STVXL_V4SF, STVXL_V4SI, STVXL_V8HI, STVXL_V16QI. + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Replace + ALTIVEC_BUILTIN_LVX with ALTIVEC_BUILTIN_LVX_<MODE> throughout; + similarly for ALTIVEC_BUILTIN_LVXL, ALTIVEC_BUILTIN_STVX, and + ALTIVEC_BUILTIN_STVXL. + * config/rs6000/rs6000-protos.h (altivec_expand_lvx_be): New prototype. + (altivec_expand_stvx_be): Likewise. + * config/rs6000/rs6000.c (swap_selector_for_mode): New function. + (altivec_expand_lvx_be): Likewise. + (altivec_expand_stvx_be): Likewise. + (altivec_expand_builtin): Add cases for + ALTIVEC_BUILTIN_STVX_<MODE>, ALTIVEC_BUILTIN_STVXL_<MODE>, + ALTIVEC_BUILTIN_LVXL_<MODE>, and ALTIVEC_BUILTIN_LVX_<MODE>. + (altivec_init_builtins): Add definitions for + __builtin_altivec_lvxl_<mode>, __builtin_altivec_lvx_<mode>, + __builtin_altivec_stvx_<mode>, and __builtin_altivec_stvxl_<mode>. + +2014-02-21 Catherine Moore <clm@codesourcery.com> + + * doc/invoke.texi (mvirt, mno-virt): Document. + * config/mips/mips.opt (mvirt): New option. + * config/mips/mips.h (ASM_SPEC): Pass mvirt to the assembler. + +2014-02-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60276 + * tree-vectorizer.h (struct _stmt_vec_info): Add min_neg_dist field. + (STMT_VINFO_MIN_NEG_DIST): New macro. + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Record + STMT_VINFO_MIN_NEG_DIST. + * tree-vect-stmts.c (vectorizable_load): Verify if assumptions + made for negative dependence distances still hold. + +2014-02-21 Richard Biener <rguenther@suse.de> + + PR middle-end/60291 + * tree-ssa-live.c (mark_all_vars_used_1): Do not walk + DECL_INITIAL for globals not in the current function context. + +2014-02-21 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56490 + * params.def (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS): New param. + * tree-ssa-uninit.c: Include params.h. + (compute_control_dep_chain): Add num_calls argument, return false + if it exceed PARAM_UNINIT_CONTROL_DEP_ATTEMPTS param, pass + num_calls to recursive call. + (find_predicates): Change dep_chain into normal array, + cur_chain into auto_vec<edge, MAX_CHAIN_LEN + 1>, add num_calls + variable and adjust compute_control_dep_chain caller. + (find_def_preds): Likewise. + +2014-02-21 Thomas Schwinge <thomas@codesourcery.com> + + * gimple-pretty-print.c (dump_gimple_omp_for) [flags & TDF_RAW] + <case GF_OMP_FOR_KIND_CILKSIMD>: Add missing break statement. + +2014-02-21 Nick Clifton <nickc@redhat.com> + + * config/stormy16/stormy16.md (pushdqi1): Add mode to post_inc. + (pushhi1): Likewise. + (popqi1): Add mode to pre_dec. + (pophi1): Likewise. + +2014-02-21 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.c (ix86_expand_vec_perm): Use V8SImode + mode for mask of V8SFmode permutation. + +2014-02-20 Richard Henderson <rth@redhat.com> + + PR c++/60272 + * builtins.c (expand_builtin_atomic_compare_exchange): Always make + a new pseudo for OLDVAL. + +2014-02-20 Jakub Jelinek <jakub@redhat.com> + + PR target/57896 + * config/i386/i386.c (expand_vec_perm_interleave2): Don't call + gen_reg_rtx if d->testing_p. + (expand_vec_perm_pshufb2, expand_vec_perm_broadcast_1): Return early + if d->testing_p and we will certainly return true. + (expand_vec_perm_even_odd_1): Likewise. Don't call gen_reg_rtx + if d->testing_p. + +2014-02-20 Uros Bizjak <ubizjak@gmail.com> + + * emit-rtl.c (gen_reg_rtx): Assert that + crtl->emit.regno_pointer_align_length is non-zero. + +2014-02-20 Richard Henderson <rth@redhat.com> + + PR c++/60272 + * builtins.c (expand_builtin_atomic_compare_exchange): Conditionalize + on failure the store back into EXPECT. + +2014-02-20 Chung-Lin Tang <cltang@codesourcery.com> + Sandra Loosemore <sandra@codesourcery.com> + + * config/nios2/nios2.md (unspec): Add UNSPEC_PIC_GOTOFF_SYM enum. + * config/nios2/nios2.c (nios2_function_profiler): Add + -fPIC (flag_pic == 2) support. + (nios2_handle_custom_fpu_cfg): Fix warning parameter. + (nios2_large_offset_p): New function. + (nios2_unspec_reloc_p): Move up position, update to use + nios2_large_offset_p. + (nios2_unspec_address): Remove function. + (nios2_unspec_offset): New function. + (nios2_large_got_address): New function. + (nios2_got_address): Add large offset support. + (nios2_legitimize_tls_address): Update usage of removed and new + functions. + (nios2_symbol_binds_local_p): New function. + (nios2_load_pic_address): Add -fPIC (flag_pic == 2) support. + (nios2_legitimize_address): Update to use nios2_large_offset_p. + (nios2_emit_move_sequence): Avoid legitimizing (const (unspec ...)). + (nios2_print_operand): Merge H/L processing, add hiadj/lo + processing for (const (unspec ...)). + (nios2_unspec_reloc_name): Add UNSPEC_PIC_GOTOFF_SYM case. + +2014-02-20 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (replace_uses_by): Mark altered BBs before + doing the substitution. + (verify_gimple_assign_single): Also verify bare MEM_REFs on the lhs. + +2014-02-20 Martin Jambor <mjambor@suse.cz> + + PR ipa/55260 + * ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Uce correct + info when checking whether lattices are bottom. + +2014-02-20 Richard Biener <rguenther@suse.de> + + PR middle-end/60221 + * tree-eh.c (execute_cleanup_eh_1): Also cleanup empty EH + regions at -O0. + +2014-02-20 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/58555 + * ipa-inline-transform.c (clone_inlined_nodes): Add freq_scale + parameter specifying the scaling. + (inline_call): Update. + (want_inline_recursively): Guard division by zero. + (recursive_inlining): Update. + * ipa-inline.h (clone_inlined_nodes): Update. + +2014-02-20 Ilya Tocar <ilya.tocar@intel.com> + + PR target/60204 + * config/i386/i386.c (classify_argument): Pass structures of size + 64 bytes or less in register. + +2014-02-20 Ilya Tocar <ilya.tocar@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/avx512erintrin.h (_mm_rcp28_round_sd): Swap operands. + (_mm_rcp28_round_ss): Ditto. + (_mm_rsqrt28_round_sd): Ditto. + (_mm_rsqrt28_round_ss): Ditto. + * config/i386/avx512erintrin.h (_mm_rcp14_round_sd): Ditto. + (_mm_rcp14_round_ss): Ditto. + (_mm_rsqrt14_round_sd): Ditto. + (_mm_rsqrt14_round_ss): Ditto. + * config/i386/sse.md (rsqrt14<mode>): Put nonimmediate operand as + the first input operand, get rid of match_dup. + (avx512er_exp2<mode><mask_name><round_saeonly_name>): Set type + attribute to sse. + (<mask_codefor>avx512er_rcp28<mode><mask_name><round_saeonly_name>): + Ditto. + (avx512er_vmrcp28<mode><round_saeonly_name>): Put nonimmediate + operand as the first input operand, set type attribute. + (<mask_codefor>avx512er_rsqrt28<mode><mask_name><round_saeonly_name>): + Set type attribute. + (avx512er_vmrsqrt28<mode><round_saeonly_name>): Put nonimmediate + operand as the first input operand, set type attribute. + +2014-02-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (vspltis_constant): Fix most significant + bit of zero. + +2014-02-19 H.J. Lu <hongjiu.lu@intel.com> + + PR target/60207 + * config/i386/i386.c (construct_container): Remove TFmode check + for X86_64_INTEGER_CLASS. + +2014-02-19 Uros Bizjak <ubizjak@gmail.com> + + PR target/59794 + * config/i386/i386.c (type_natural_mode): Warn for ABI changes + only when -Wpsabi is enabled. + +2014-02-19 Michael Hudson-Doyle <michael.hudson@linaro.org> + + PR target/59799 + * config/aarch64/aarch64.c (aarch64_pass_by_reference): The rules for + passing arrays in registers are the same as for structs, so remove the + special case for them. + +2014-02-19 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: For a bit-field + destination type, extract only the valid bits if the source type is not + integral and has a different mode. + +2014-02-19 Richard Biener <rguenther@suse.de> + + PR ipa/60243 + * tree-inline.c (estimate_num_insns): Avoid calling cgraph_get_node + for all calls. + +2014-02-19 Richard Biener <rguenther@suse.de> + + PR ipa/60243 + * ipa-prop.c: Include stringpool.h and tree-ssanames.h. + (ipa_modify_call_arguments): Emit an argument load explicitely and + preserve virtual SSA form there and for the replacement call. + Do not update SSA form nor free dominance info. + +2014-02-18 Jan Hubicka <hubicka@ucw.cz> + + * ipa.c (function_and_variable_visibility): Also clear WEAK + flag when disolving COMDAT_GROUP. + +2014-02-18 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.h (ipa_ancestor_jf_data): Update ocmment. + * ipa-prop.c (ipa_set_jf_known_type): Return early when + not devirtualizing. + (ipa_set_ancestor_jf): Set type to NULL hwen it is not preserved; + do more sanity checks. + (detect_type_change): Return true when giving up early. + (compute_complex_assign_jump_func): Fix type parameter of + ipa_set_ancestor_jf. + (compute_complex_ancestor_jump_func): Likewise. + (update_jump_functions_after_inlining): Fix updating of + ancestor function. + * ipa-cp.c (ipa_get_jf_ancestor_result): Be ready for type to be NULL. + +2014-02-18 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_update_edges_for_call_stmt_node): Also remove + inline clones when edge disappears. + +2014-02-18 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60203 + * config/rs6000/rs6000.md (mov<mode>_64bit, TF/TDmode moves): + Split 64-bit moves into 2 patterns. Do not allow the use of + direct move for TDmode in little endian, since the decimal value + has little endian bytes within a word, but the 64-bit pieces are + ordered in a big endian fashion, and normal subreg's of TDmode are + not allowed. + (mov<mode>_64bit_dm): Likewise. + (movtd_64bit_nodm): Likewise. + +2014-02-18 Eric Botcazou <ebotcazou@adacore.com> + + PR tree-optimization/60174 + * tree-ssa-reassoc.c (init_range_entry): Do not look into the defining + statement of an SSA_NAME that occurs in an abnormal PHI node. + +2014-02-18 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/60142 + * final.c (SEEN_BB): Remove. + (SEEN_NOTE, SEEN_EMITTED): Renumber. + (final_scan_insn): Don't force_source_line on second + NOTE_INSN_BASIC_BLOCK. + +2014-02-18 Uros Bizjak <ubizjak@gmail.com> + + PR target/60205 + * config/i386/i386.h (struct ix86_args): Add warn_avx512f. + * config/i386/i386.c (init_cumulative_args): Initialize warn_avx512f. + (type_natural_mode): Warn ABI change when %zmm register is not + available for AVX512F vector value passing. + +2014-02-18 Kai Tietz <ktietz@redhat.com> + + PR target/60193 + * config/i386/i386.c (ix86_expand_prologue): Use value in + rax register as displacement when restoring %r10 or %rax. + Fix wrong offset when restoring both registers. + +2014-02-18 Eric Botcazou <ebotcazou@adacore.com> + + * ipa-prop.c (compute_complex_ancestor_jump_func): Replace overzealous + assertion with conditional return. + +2014-02-18 Jakub Jelinek <jakub@redhat.com> + Uros Bizjak <ubizjak@gmail.com> + + PR driver/60233 + * config/i386/driver-i386.c (host_detect_local_cpu): If + YMM state is not saved by the OS, also clear has_f16c. Move + CPUID 0x80000001 handling before YMM state saving checking. + +2014-02-18 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/58960 + * haifa-sched.c (alloc_global_sched_pressure_data): New, + factored out from ... + (sched_init): ... here. + (free_global_sched_pressure_data): New, factored out from ... + (sched_finish): ... here. + * sched-int.h (free_global_sched_pressure_data): Declare. + * sched-rgn.c (nr_regions_initial): New static global. + (haifa_find_rgns): Initialize it. + (schedule_region): Disable sched-pressure for the newly + generated regions. + +2014-02-17 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.c (free_stmt_vec_info): Clear BB and + release SSA defs of pattern stmts. + +2014-02-17 Richard Biener <rguenther@suse.de> + + * tree-inline.c (expand_call_inline): Release the virtual + operand defined by the call we are about to inline. + +2014-02-17 Richard Biener <rguenther@suse.de> + + * tree-ssa.c (verify_ssa): If verify_def found an error, ICE. + +2014-02-17 Kirill Yukhin <kirill.yukhin@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/avx512fintrin.h (_mm512_maskz_permutexvar_epi64): Swap + arguments order in builtin. + (_mm512_permutexvar_epi64): Ditto. + (_mm512_mask_permutexvar_epi64): Ditto + (_mm512_maskz_permutexvar_epi32): Ditto + (_mm512_permutexvar_epi32): Ditto + (_mm512_mask_permutexvar_epi32): Ditto + +2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (p8_vmrgew): Handle little endian targets. + (p8_vmrgow): Likewise. + +2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vsx.md (vsx_xxpermdi_<mode>): Handle little + endian targets. + +2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60203 + * config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints. + (mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves + into 64-bit and 32-bit moves. On 64-bit moves, add support for + using direct move instructions on ISA 2.07. Also adjust + instruction length for 64-bit. + (mov<mode>_64bit, TFmode/TDmode): Likewise. + (mov<mode>_32bit, TFmode/TDmode): Likewise. + +2014-02-15 Alan Modra <amodra@gmail.com> + + PR target/58675 + PR target/57935 + * config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Use + find_replacement on parts of insn rtl that might be reloaded. + +2014-02-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60183 + * tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating loads. + (tree_ssa_phiprop): Calculate and free post-dominators. + +2014-02-14 Jeff Law <law@redhat.com> + + PR rtl-optimization/60131 + * ree.c (get_extended_src_reg): New function. + (combine_reaching_defs): Use it rather than assuming location of REG. + (find_and_remove_re): Verify first operand of extension is + a REG before adding the insns to the copy list. + +2014-02-14 Roland McGrath <mcgrathr@google.com> + + * configure.ac (HAVE_AS_IX86_UD2): New test for 'ud2' mnemonic. + * configure: Regenerated. + * config.in: Regenerated. + * config/i386/i386.md (trap) [HAVE_AS_IX86_UD2]: Use the mnemonic + instead of ASM_SHORT. + +2014-02-14 Vladimir Makarov <vmakarov@redhat.com> + Richard Earnshaw <rearnsha@arm.com> + + PR rtl-optimization/59535 + * lra-constraints.c (process_alt_operands): Encourage alternative + when unassigned pseudo class is superset of the alternative class. + (inherit_reload_reg): Don't inherit when optimizing for code size. + * config/arm/arm.h (MODE_BASE_REG_CLASS): Add version for LRA + returning CORE_REGS for anything but Thumb1 and BASE_REGS for + modes not less than 4 for Thumb1. + +2014-02-14 Kyle McMartin <kyle@redhat.com> + + PR pch/60010 + * config/host-linux.c (TRY_EMPTY_VM_SPACE): Define for AArch64. + +2014-02-14 Richard Biener <rguenther@suse.de> + + * cilk-common.c (cilk_arrow): Build a MEM_REF, not an INDIRECT_REF. + (get_frame_arg): Drop the assert with langhook types_compatible_p. + Do not strip INDIRECT_REFs. + +2014-02-14 Richard Biener <rguenther@suse.de> + + PR lto/60179 + * lto-streamer-out.c (DFS_write_tree_body): Do not follow + DECL_FUNCTION_SPECIFIC_TARGET. + (hash_tree): Do not hash DECL_FUNCTION_SPECIFIC_TARGET. + * tree-streamer-out.c (pack_ts_target_option): Remove. + (streamer_pack_tree_bitfields): Do not stream TS_TARGET_OPTION. + (write_ts_function_decl_tree_pointers): Do not stream + DECL_FUNCTION_SPECIFIC_TARGET. + * tree-streamer-in.c (unpack_ts_target_option): Remove. + (unpack_value_fields): Do not stream TS_TARGET_OPTION. + (lto_input_ts_function_decl_tree_pointers): Do not stream + DECL_FUNCTION_SPECIFIC_TARGET. + +2014-02-14 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-loop.c (vect_is_slp_reduction): Don't set use_stmt twice. + (get_initial_def_for_induction, vectorizable_induction): Ignore + debug stmts when looking for exit_phi. + (vectorizable_live_operation): Fix up condition. + +2014-02-14 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_asm_function_prologue): Do not use + nreverse() because it changes the content of original tree list. + +2014-02-14 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/t-mlibs (MULTILIB_OPTIONS): Fix typo in comment. + * config/nds32/nds32.c (nds32_merge_decl_attributes): Likewise. + +2014-02-14 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_naked_function_p): Follow the + GNU coding standards. + +2014-02-13 Jakub Jelinek <jakub@redhat.com> + + PR debug/60152 + * dwarf2out.c (gen_subprogram_die): Don't call + add_calling_convention_attribute if subr_die is old_die. + +2014-02-13 Sharad Singhai <singhai@google.com> + + * doc/optinfo.texi: Fix order of nodes. + +2014-02-13 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (xop_vmfrcz<mode>2): Generate const0 in + operands[2], not operands[3]. + +2014-02-13 Richard Biener <rguenther@suse.de> + + PR bootstrap/59878 + * doc/install.texi (ISL): Update recommended version to 0.12.2, + mention the possibility of an in-tree build. + (CLooG): Update recommended version to 0.18.1, mention the + possibility of an in-tree build and clarify that the ISL + bundled with CLooG does not work. + +2014-02-13 Jakub Jelinek <jakub@redhat.com> + + PR target/43546 + * expr.c (compress_float_constant): If x is a hard register, + extend into a pseudo and then move to x. + +2014-02-13 Dominik Vogt <vogt@linux.vnet.ibm.com> + + * config/s390/s390.c (s390_asm_output_function_label): Fix crash + caused by bad second argument to warning_at() with -mhotpatch and + nested functions (e.g. with gfortran). + +2014-02-13 Richard Sandiford <rdsandiford@googlemail.com> + + * opts.c (option_name): Remove "enabled by default" rider. + +2014-02-12 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_option_override): Remove auto increment FIXME. + +2014-02-12 H.J. Lu <hongjiu.lu@intel.com> + Uros Bizjak <ubizjak@gmail.com> + + PR target/60151 + * configure.ac (HAVE_AS_GOTOFF_IN_DATA): Pass --32 to GNU assembler. + * configure: Regenerated. + +2014-02-12 Richard Biener <rguenther@suse.de> + + * vec.c (vec_prefix::calculate_allocation): Move as + inline variant to vec.h. + (vec_prefix::calculate_allocation_1): New out-of-line version. + * vec.h (vec_prefix::calculate_allocation_1): Declare. + (vec_prefix::m_has_auto_buf): Rename to ... + (vec_prefix::m_using_auto_storage): ... this. + (vec_prefix::calculate_allocation): Inline the easy cases + and dispatch to calculate_allocation_1 which doesn't need the + prefix address. + (va_heap::reserve): Use gcc_checking_assert. + (vec<T, A, vl_embed>::embedded_init): Add argument to initialize + m_using_auto_storage. + (auto_vec): Change m_vecpfx member to a vec<T, va_heap, vl_embed> + member and adjust. + (vec<T, va_heap, vl_ptr>::reserve): Remove redundant check. + (vec<T, va_heap, vl_ptr>::release): Avoid casting. + (vec<T, va_heap, vl_ptr>::using_auto_storage): Simplify. + +2014-02-12 Richard Biener <rguenther@suse.de> + + * gcse.c (compute_transp): break from loop over canon_modify_mem_list + when we found a dependence. + +2014-02-12 Thomas Schwinge <thomas@codesourcery.com> + + * gimplify.c (gimplify_call_expr, gimplify_modify_expr): Move + common code... + (maybe_fold_stmt): ... into this new function. + * omp-low.c (lower_omp): Update comment. + + * omp-low.c (lower_omp_target): Add clobber for sizes array, after + last use. + + * omp-low.c (diagnose_sb_0): Make sure label_ctx is valid to + dereference. + +2014-02-12 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/aarch-cost-tables.h (generic_extra_costs): Fix + identifiers in comments. + (cortexa53_extra_costs): Likewise. + * config/arm/arm.c (cortexa9_extra_costs): Fix identifiers in comments. + (cortexa7_extra_costs): Likewise. + (cortexa12_extra_costs): Likewise. + (cortexa15_extra_costs): Likewise. + (v7m_extra_costs): Likewise. + +2014-02-12 Richard Biener <rguenther@suse.de> + + PR middle-end/60092 + * gimple-low.c (lower_builtin_posix_memalign): Lower conditional + of posix_memalign being successful. + (lower_stmt): Restrict lowering of posix_memalign to when + -ftree-bit-ccp is enabled. + +2014-02-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + + * config/avr/avr-c.c (avr_resolve_overloaded_builtin): Pass vNULL for + arg_loc. + * config/spu/spu-c.c (spu_resolve_overloaded_builtin): Likewise. + +2014-02-12 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/60116 + * combine.c (try_combine): Also remove dangling REG_DEAD notes on the + other_insn once the combination has been validated. + +2014-02-11 Jan Hubicka <hubicka@ucw.cz> + + PR lto/59468 + * ipa-utils.h (possible_polymorphic_call_targets): Update prototype + and wrapper. + * ipa-devirt.c: Include demangle.h + (odr_violation_reported): New static variable. + (add_type_duplicate): Update odr_violations. + (maybe_record_node): Add completep parameter; update it. + (record_target_from_binfo): Add COMPLETEP parameter; + update it as needed. + (possible_polymorphic_call_targets_1): Likewise. + (struct polymorphic_call_target_d): Add nonconstruction_targets; + rename FINAL to COMPLETE. + (record_targets_from_bases): Sanity check we found the binfo; + fix COMPLETEP updating. + (possible_polymorphic_call_targets): Add NONCONSTRUTION_TARGETSP + parameter, fix computing of COMPLETEP. + (dump_possible_polymorphic_call_targets): Imrove readability of dump; + at LTO time do demangling. + (ipa_devirt): Use nonconstruction_targets; Improve dumps. + * gimple-fold.c (gimple_get_virt_method_for_vtable): Add can_refer + parameter. + (gimple_get_virt_method_for_binfo): Likewise. + * gimple-fold.h (gimple_get_virt_method_for_binfo, + gimple_get_virt_method_for_vtable): Update prototypes. + +2014-02-11 Vladimir Makarov <vmakarov@redhat.com> + + PR target/49008 + * genautomata.c (add_presence_absence): Fix typo with + {final_}presence_list. + +2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60137 + * config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter + for VSX/Altivec vectors that land in GPR registers. + +2014-02-11 Richard Henderson <rth@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + PR debug/59776 + * tree-sra.c (load_assign_lhs_subreplacements): Add VIEW_CONVERT_EXPR + around drhs if type conversion to lacc->type is not useless. + +2014-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-cores.def (cortex-a57): Use cortexa57 + tuning struct. + (cortex-a57.cortex-a53): Likewise. + * config/aarch64/aarch64.c (cortexa57_tunings): New tuning struct. + +2014-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/thumb2.md (*thumb2_movhi_insn): Add alternatives for + arm_restrict_it. + +2014-02-11 Renlin Li <Renlin.Li@arm.com> + + * doc/sourcebuild.texi: Document check_effective_target_arm_vfp3_ok and + add_options_for_arm_vfp3. + +2014-02-11 Jeff Law <law@redhat.com> + + PR middle-end/54041 + * expr.c (expand_expr_addr_expr_1): Handle expand_expr returning an + object with an undesirable mode. + +2014-02-11 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + PR libgomp/60107 + * config/i386/sol2-9.h: New file. + * config.gcc (i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*, + *-*-solaris2.9*): Use it. + +2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com> + + * config/microblaze/microblaze.md: Add movsi4_rev insn pattern. + * config/microblaze/predicates.md: Add reg_or_mem_operand predicate. + +2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com> + + * config/microblaze/microblaze.c: Extend mcpu version format + +2014-02-10 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.h: Define SIZE_TYPE and PTRDIFF_TYPE. + +2014-02-10 Richard Henderson <rth@redhat.com> + + PR target/59927 + * calls.c (expand_call): Don't double-push for reg_parm_stack_space. + * config/i386/i386.c (init_cumulative_args): Remove sorry for 64-bit + ms-abi vs -mno-accumulate-outgoing-args. + (ix86_expand_prologue): Unconditionally call ix86_eax_live_at_start_p. + * config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Fix comment with + respect to ms-abi. + +2014-02-10 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/60080 + * cfgexpand.c (expand_asm_operands): Attach source location to + ASM_INPUT rtx objects. + * print-rtl.c (print_rtx): Check for UNKNOWN_LOCATION. + +2014-02-10 Nick Clifton <nickc@redhat.com> + + * config/mn10300/mn10300.c (popcount): New function. + (mn10300_expand_prologue): Include saved registers in stack usage + count. + +2014-02-10 Jeff Law <law@redhat.com> + + PR middle-end/52306 + * reload1.c (emit_input_reload_insns): Do not create invalid RTL + when changing the SET_DEST of a prior insn to avoid an input reload. + +2014-02-10 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/sysv4.h (ENDIAN_SELECT): Do not attempt to enforce + big-endian mode for -mcall-aixdesc, -mcall-freebsd, -mcall-netbsd, + -mcall-openbsd, or -mcall-linux. + (CC1_ENDIAN_BIG_SPEC): Remove. + (CC1_ENDIAN_LITTLE_SPEC): Remove. + (CC1_ENDIAN_DEFAULT_SPEC): Remove. + (CC1_SPEC): Remove (always empty) %cc1_endian_... spec. + (SUBTARGET_EXTRA_SPECS): Remove %cc1_endian_big, %cc1_endian_little, + and %cc1_endian_default. + * config/rs6000/sysv4le.h (CC1_ENDIAN_DEFAULT_SPEC): Remove. + +2014-02-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60115 + * tree-eh.c (tree_could_trap_p): Unify TARGET_MEM_REF and + MEM_REF handling. Properly verify that the accesses are not + out of the objects bound. + +2014-02-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (aarch64_override_options): Fix typo from + coretex to cortex. + +2014-02-10 Eric Botcazou <ebotcazou@adacore.com> + + * ipa-devirt.c (get_polymorphic_call_info_from_invariant): Return + proper constants and fix formatting. + (possible_polymorphic_call_targets): Fix formatting. + +2014-02-10 Kirill Yukhin <kirill.yukhin@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/avx512fintrin.h (_mm512_storeu_epi64): Removed. + (_mm512_loadu_epi32): Renamed into... + (_mm512_loadu_si512): This. + (_mm512_storeu_epi32): Renamed into... + (_mm512_storeu_si512): This. + (_mm512_maskz_ceil_ps): Removed. + (_mm512_maskz_ceil_pd): Ditto. + (_mm512_maskz_floor_ps): Ditto. + (_mm512_maskz_floor_pd): Ditto. + (_mm512_floor_round_ps): Ditto. + (_mm512_floor_round_pd): Ditto. + (_mm512_ceil_round_ps): Ditto. + (_mm512_ceil_round_pd): Ditto. + (_mm512_mask_floor_round_ps): Ditto. + (_mm512_mask_floor_round_pd): Ditto. + (_mm512_mask_ceil_round_ps): Ditto. + (_mm512_mask_ceil_round_pd): Ditto. + (_mm512_maskz_floor_round_ps): Ditto. + (_mm512_maskz_floor_round_pd): Ditto. + (_mm512_maskz_ceil_round_ps): Ditto. + (_mm512_maskz_ceil_round_pd): Ditto. + (_mm512_expand_pd): Ditto. + (_mm512_expand_ps): Ditto. + * config/i386/i386.c (ix86_builtins): Remove + IX86_BUILTIN_EXPANDPD512_NOMASK, IX86_BUILTIN_EXPANDPS512_NOMASK. + (bdesc_args): Ditto. + * config/i386/predicates.md (const1256_operand): New. + (const_1_to_2_operand): Ditto. + * config/i386/sse.md (avx512pf_gatherpf<mode>sf): Change hint value. + (*avx512pf_gatherpf<mode>sf_mask): Ditto. + (*avx512pf_gatherpf<mode>sf): Ditto. + (avx512pf_gatherpf<mode>df): Ditto. + (*avx512pf_gatherpf<mode>df_mask): Ditto. + (*avx512pf_gatherpf<mode>df): Ditto. + (avx512pf_scatterpf<mode>sf): Ditto. + (*avx512pf_scatterpf<mode>sf_mask): Ditto. + (*avx512pf_scatterpf<mode>sf): Ditto. + (avx512pf_scatterpf<mode>df): Ditto. + (*avx512pf_scatterpf<mode>df_mask): Ditto. + (*avx512pf_scatterpf<mode>df): Ditto. + (avx512f_expand<mode>): Removed. + (<shift_insn><mode>3<mask_name>): Change predicate type. + +2014-02-08 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-data-refs.c (vect_analyze_data_refs): For clobbers + not at the end of datarefs vector use ordered_remove to avoid + reordering datarefs vector. + + PR c/59984 + * gimplify.c (gimplify_bind_expr): In ORT_SIMD region + mark local addressable non-static vars as GOVD_PRIVATE + instead of GOVD_LOCAL. + * omp-low.c (lower_omp_for): Move gimple_bind_vars + and BLOCK_VARS of gimple_bind_block to new_stmt rather + than copying them. + + PR middle-end/60092 + * tree-ssa-ccp.c (surely_varying_stmt_p): Don't return true + if TYPE_ATTRIBUTES (gimple_call_fntype ()) contain + assume_aligned or alloc_align attributes. + (bit_value_assume_aligned): Add ATTR, PTRVAL and ALLOC_ALIGN + arguments. Handle also assume_aligned and alloc_align attributes. + (evaluate_stmt): Adjust bit_value_assume_aligned caller. Handle + calls to functions with assume_aligned or alloc_align attributes. + * doc/extend.texi: Document assume_aligned and alloc_align attributes. + +2014-02-08 Terry Guo <terry.guo@arm.com> + + * doc/invoke.texi: Document ARM -march=armv7e-m. + +2014-02-08 Jakub Jelinek <jakub@redhat.com> + + * cilk-common.c (cilk_init_builtins): Clear TREE_NOTHROW + flag on __cilkrts_rethrow builtin. + + PR ipa/60026 + * ipa-cp.c (determine_versionability): Fail at -O0 + or __attribute__((optimize (0))) or -fno-ipa-cp functions. + * tree-sra.c (ipa_sra_preliminary_function_checks): Similarly. + + Revert: + 2014-02-04 Jakub Jelinek <jakub@redhat.com> + + PR ipa/60026 + * tree-inline.c (copy_forbidden): Fail for + __attribute__((optimize (0))) functions. + +2014-02-07 Jan Hubicka <hubicka@ucw.cz> + + * varpool.c: Include pointer-set.h. + (varpool_remove_unreferenced_decls): Variables in other partitions + will not be output; be however careful to not lose information + about partitioning. + +2014-02-07 Jan Hubicka <hubicka@ucw.cz> + + * gimple-fold.c (gimple_get_virt_method_for_vtable): Do O(1) + lookup in the vtable constructor. + +2014-02-07 Jeff Law <law@redhat.com> + + PR target/40977 + * config/m68k/m68k.md (ashldi_extsi): Turn into a + define_insn_and_split. + + * ipa-inline.c (inline_small_functions): Fix typos. + +2014-02-07 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * config/s390/s390-protos.h (s390_can_use_simple_return_insn) + (s390_can_use_return_insn): Declare. + * config/s390/s390.h (EPILOGUE_USES): Define. + * config/s390/s390.c (s390_mainpool_start): Allow two main_pool + instructions. + (s390_chunkify_start): Handle return JUMP_LABELs. + (s390_early_mach): Emit a main_pool instruction on the entry edge. + (s300_set_up_by_prologue, s390_can_use_simple_return_insn) + (s390_can_use_return_insn): New functions. + (s390_fix_long_loop_prediction): Handle conditional returns. + (TARGET_SET_UP_BY_PROLOGUE): Define. + * config/s390/s390.md (ANY_RETURN): New code iterator. + (*creturn, *csimple_return, return, simple_return): New patterns. + +2014-02-07 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * config/s390/s390.c (s390_restore_gprs_from_fprs): Add REG_CFA_RESTORE + notes to each restore. Also add REG_CFA_DEF_CFA when restoring %r15. + (s390_optimize_prologue): Don't clear RTX_FRAME_RELATED_P. Update the + REG_CFA_RESTORE list when deciding not to restore a register. + +2014-02-07 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * config/s390/s390.c: Include tree-pass.h and context.h. + (s390_early_mach): New function, split out from... + (s390_emit_prologue): ...here. + (pass_data_s390_early_mach): New pass structure. + (pass_s390_early_mach): New class. + (s390_option_override): Create and register early_mach pass. + Move to end of file. + +2014-02-07 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * var-tracking.c (vt_stack_adjustments): Don't require stack_adjusts + to match for the exit block. + +2014-02-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.md ("atomic_load<mode>", "atomic_store<mode>") + ("atomic_compare_and_swap<mode>", "atomic_fetch_<atomic><mode>"): + Reject misaligned operands. + +2014-02-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * optabs.c (expand_atomic_compare_and_swap): Allow expander to fail. + +2014-02-07 Richard Biener <rguenther@suse.de> + + PR middle-end/60092 + * gimple-low.c (lower_builtin_posix_memalign): New function. + (lower_stmt): Call it to lower posix_memalign in a way + to make alignment info accessible. + +2014-02-07 Jakub Jelinek <jakub@redhat.com> + + PR c++/60082 + * tree.c (build_common_builtin_nodes): Set ECF_LEAF for + __builtin_setjmp_receiver. + +2014-02-07 Richard Biener <rguenther@suse.de> + + PR middle-end/60092 + * builtin-types.def (BT_FN_INT_PTRPTR_SIZE_SIZE): Add. + * builtins.def (BUILT_IN_POSIX_MEMALIGN): Likewise. + * tree-ssa-structalias.c (find_func_aliases_for_builtin_call): + Handle BUILT_IN_POSIX_MEMALIGN. + (find_func_clobbers): Likewise. + * tree-ssa-alias.c (ref_maybe_used_by_call_p_1): Likewise. + (call_may_clobber_ref_p_1): Likewise. + +2014-02-06 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/59918 + * ipa-devirt.c (record_target_from_binfo): Remove overactive + sanity check. + +2014-02-06 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/59469 + * lto-cgraph.c (lto_output_node): Use + symtab_get_symbol_partitioning_class. + (lto_output_varpool_node): likewise. + (symtab_get_symbol_partitioning_class): Move here from + lto/lto-partition.c + * cgraph.h (symbol_partitioning_class): Likewise. + (symtab_get_symbol_partitioning_class): Declare. + +2014-02-06 Jan Hubicka <hubicka@ucw.cz> + + * ggc.h (ggc_internal_cleared_alloc): New macro. + * vec.h (vec_safe_copy): Handle memory stats. + * omp-low.c (simd_clone_struct_alloc): Use ggc_internal_cleared_alloc. + * target-globals.c (save_target_globals): Likewise. + +2014-02-06 Jan Hubicka <hubicka@ucw.cz> + + PR target/60077 + * expr.c (emit_move_resolve_push): Export; be bit more selective + on when to clear alias set. + * expr.h (emit_move_resolve_push): Declare. + * function.h (struct function): Add tail_call_marked. + * tree-tailcall.c (optimize_tail_call): Set tail_call_marked. + * config/i386/i386-protos.h (ix86_expand_push): Remove. + * config/i386/i386.md (TImode move expander): De not call + ix86_expand_push. + (FP push expanders): Preserve memory attributes. + * config/i386/sse.md (push<mode>1): Remove. + * config/i386/i386.c (ix86_expand_vector_move): Handle push operation. + (ix86_expand_push): Remove. + * config/i386/mmx.md (push<mode>1): Remove. + +2014-02-06 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/60030 + * internal-fn.c (ubsan_expand_si_overflow_mul_check): Surround + lopart with paradoxical subreg before shifting it up by hprec. + +2014-02-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): New table. + Remove extra newline at end of file. + * config/arm/arm.c (arm_cortex_a57_tune): New tuning struct. + (arm_issue_rate): Handle cortexa57. + * config/arm/arm-cores.def (cortex-a57): Use cortex_a57 tuning. + (cortex-a57.cortex-a53): Likewise. + +2014-02-06 Jakub Jelinek <jakub@redhat.com> + + PR target/59575 + * config/arm/arm.c (emit_multi_reg_push): Add dwarf_regs_mask argument, + don't record in REG_FRAME_RELATED_EXPR registers not set in that + bitmask. + (arm_expand_prologue): Adjust all callers. + (arm_unwind_emit_sequence): Allow saved, but not important for unwind + info, registers also at the lowest numbered registers side. Use + gcc_assert instead of abort, and SET_SRC/SET_DEST macros instead of + XEXP. + + PR debug/59992 + * var-tracking.c (adjust_mems): Before adding a SET to + amd->side_effects, adjust it's SET_SRC using simplify_replace_fn_rtx. + +2014-02-06 Alan Modra <amodra@gmail.com> + + PR target/60032 + * config/rs6000/rs6000.c (rs6000_secondary_memory_needed_mode): Only + change SDmode to DDmode when lra_in_progress. + +2014-02-06 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59150 + * tree-vect-data-refs.c (vect_analyze_data_refs): For clobbers, call + free_data_ref on the dr first, and before goto again also set dr + to the next dr. For simd_lane_access, free old datarefs[i] before + overwriting it. For get_vectype_for_scalar_type failure, don't + free_data_ref if simd_lane_access. + + * Makefile.in (prefix.o, cppbuiltin.o): Depend on $(BASEVER). + + PR target/60062 + * tree.h (opts_for_fn): New inline function. + (opt_for_fn): Define. + * config/i386/i386.c (ix86_function_regparm): Use + opt_for_fn (decl, optimize) instead of optimize. + +2014-02-06 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_symbol): Fix logic + for SYMBOL_REF in large memory model. + +2014-02-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-cores.def (cortex-a53): Specify CRC32 + and crypto support. + (cortex-a57): Likewise. + (cortex-a57.cortex-a53): Likewise. + +2014-02-06 Yury Gribov <y.gribov@samsung.com> + Kugan Vivekanandarajah <kuganv@linaro.org> + + * config/arm/arm.c (arm_vector_alignment_reachable): Check + unaligned_access. + * config/arm/arm.c (arm_builtin_support_vector_misalignment): Likewise. + +2014-02-06 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (gimple_duplicate_sese_region): Fix ordering of + set_loop_copy and initialize_original_copy_tables. + +2014-02-06 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_ashr_simddi): Change QI to SI. + +2014-02-05 Jan Hubicka <hubicka@ucw.cz> + Jakub Jelinek <jakub@redhat.com> + + PR middle-end/60013 + * ipa-inline-analysis.c (compute_bb_predicates): Ensure monotonicity + of the dataflow. + +2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Change + CODE_FOR_altivec_vpku[hw]um to + CODE_FOR_altivec_vpku[hw]um_direct. + * config/rs6000/altivec.md (vec_unpacks_hi_<VP_small_lc>): Change + UNSPEC_VUNPACK_HI_SIGN to UNSPEC_VUNPACK_HI_SIGN_DIRECT. + (vec_unpacks_lo_<VP_small_lc>): Change UNSPEC_VUNPACK_LO_SIGN to + UNSPEC_VUNPACK_LO_SIGN_DIRECT. + +2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (altivec_vsum2sws): Adjust code + generation for -maltivec=be. + (altivec_vsumsws): Simplify redundant test. + +2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * altivec.md (UNSPEC_VPACK_UNS_UNS_MOD_DIRECT): New unspec. + (UNSPEC_VUNPACK_HI_SIGN_DIRECT): Likewise. + (UNSPEC_VUNPACK_LO_SIGN_DIRECT): Likewise. + (mulv8hi3): Use gen_altivec_vpkuwum_direct instead of + gen_altivec_vpkuwum. + (altivec_vpkpx): Test for VECTOR_ELT_ORDER_BIG instead of for + BYTES_BIG_ENDIAN. + (altivec_vpks<VI_char>ss): Likewise. + (altivec_vpks<VI_char>us): Likewise. + (altivec_vpku<VI_char>us): Likewise. + (altivec_vpku<VI_char>um): Likewise. + (altivec_vpku<VI_char>um_direct): New (copy of + altivec_vpku<VI_char>um that still relies on BYTES_BIG_ENDIAN, for + internal use). + (altivec_vupkhs<VU_char>): Emit vupkls* instead of vupkhs* when + target is little endian and -maltivec=be is not specified. + (*altivec_vupkhs<VU_char>_direct): New (copy of + altivec_vupkhs<VU_char> that always emits vupkhs*, for internal use). + (altivec_vupkls<VU_char>): Emit vupkhs* instead of vupkls* when + target is little endian and -maltivec=be is not specified. + (*altivec_vupkls<VU_char>_direct): New (copy of + altivec_vupkls<VU_char> that always emits vupkls*, for internal use). + (altivec_vupkhpx): Emit vupklpx instead of vupkhpx when target is + little endian and -maltivec=be is not specified. + (altivec_vupklpx): Emit vupkhpx instead of vupklpx when target is + little endian and -maltivec=be is not specified. + +2014-02-05 Richard Henderson <rth@redhat.com> + + PR debug/52727 + * combine-stack-adj.c: Revert r206943. + * sched-int.h (struct deps_desc): Add last_args_size. + * sched-deps.c (init_deps): Initialize it. + (sched_analyze_insn): Add OUTPUT dependencies between insns that + contain REG_ARGS_SIZE notes. + +2014-02-05 Jan Hubicka <hubicka@ucw.cz> + + * lto-cgraph.c (asm_nodes_output): Make global. + * lto-wrapper.c (run_gcc): Pass down paralelizm to WPA. + * gcc.c (AS_NEEDS_DASH_FOR_PIPED_INPUT): Allow WPA parameter + (driver_handle_option): Handle OPT_fwpa. + +2014-02-05 Jakub Jelinek <jakub@redhat.com> + + PR ipa/59947 + * ipa-devirt.c (possible_polymorphic_call_targets): Fix + a comment typo and formatting issue. If odr_hash hasn't been + created, return vNULL and set *completep to false. + + PR middle-end/57499 + * tree-eh.c (cleanup_empty_eh): Bail out on totally empty + bb with no successors. + +2014-02-05 James Greenhalgh <james.greenhalgh@arm.com> + + PR target/59718 + * doc/invoke.texi (-march): Clarify documentation for ARM. + (-mtune): Likewise. + (-mcpu): Likewise. + +2014-02-05 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_analyze_loop_2): Be more informative + when not vectorizing because of too many alias checks. + * tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): + Add more verboseness, avoid duplicate MSG_MISSED_OPTIMIZATION. + +2014-02-05 Nick Clifton <nickc@redhat.com> + + * config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Do not + accept extended registers in any mode when compiling for the MN10300. + +2014-02-05 Yury Gribov <y.gribov@samsung.com> + + * cif-code.def (ATTRIBUTE_MISMATCH): New CIF code. + * ipa-inline.c (report_inline_failed_reason): Handle mismatched + sanitization attributes. + (can_inline_edge_p): Likewise. + (sanitize_attrs_match_for_inline_p): New function. + +2014-02-04 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (detect_type_change): Shor circuit testing of + type changes on THIS pointer. + +2014-02-04 John David Anglin <danglin@gcc.gnu.org> + + PR target/59777 + * config/pa/pa.c (legitimize_tls_address): Return original address + if not passed a SYMBOL_REF rtx. + (hppa_legitimize_address): Call legitimize_tls_address for all TLS + addresses. + (pa_emit_move_sequence): Simplify TLS source operands. + (pa_legitimate_constant_p): Reject all TLS constants. + * config/pa/pa.h (PA_SYMBOL_REF_TLS_P): Correct comment. + (CONSTANT_ADDRESS_P): Reject TLS CONST addresses. + +2014-02-04 Jan Hubicka <hubicka@ucw.cz> + + * ipa.c (function_and_variable_visibility): Decompose DECL_ONE_ONLY + groups when we know they are controlled by LTO. + * varasm.c (default_binds_local_p_1): If object is in other partition, + it will be resolved locally. + +2014-02-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * config/host-linux.c (linux_gt_pch_use_address): Don't + use SSIZE_MAX because it is not always defined. + +2014-02-04 Vladimir Makarov <vmakarov@redhat.com> + + PR bootstrap/59913 + * lra-constraints.c (need_for_split_p): Use more 3 reloads as + threshold for pseudo splitting. + (update_ebb_live_info): Process call argument hard registers and + hard registers from insn definition too. + (max_small_class_regs_num): New constant. + (inherit_in_ebb): Update live hard regs through EBBs. Update + reloads_num only for small register classes. Don't split for + outputs of jumps. + +2014-02-04 Markus Trippelsdorf <markus@trippelsdorf.de> + + PR ipa/60058 + * ipa-cp.c (ipa_get_indirect_edge_target_1): Check that target + is non-null. + +2014-02-04 Jan Hubicka <hubicka@ucw.cz> + + * gimple-fold.c (can_refer_decl_in_current_unit_p): Default + visibility is safe. + +2014-02-04 Marek Polacek <polacek@redhat.com> + + * gdbinit.in (pel): Define. + +2014-02-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * doc/invoke.texi (fstrict-volatile-bitfields): Clarify current + behavior. + +2014-02-04 Richard Biener <rguenther@suse.de> + + PR lto/59723 + * lto-streamer-out.c (tree_is_indexable): Force NAMELIST_DECLs + in function context local. + (lto_output_tree_ref): Do not write trees from lto_output_tree_ref. + * lto-streamer-in.c (lto_input_tree_ref): Handle LTO_namelist_decl_ref + similar to LTO_imported_decl_ref. + +2014-02-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/60002 + * cgraphclones.c (build_function_decl_skip_args): Clear + DECL_LANG_SPECIFIC. + + PR tree-optimization/60023 + * tree-if-conv.c (predicate_mem_writes): Pass true instead of + false to gsi_replace. + * tree-vect-stmts.c (vect_finish_stmt_generation): If stmt + has been in some EH region and vec_stmt could throw, add + vec_stmt into the same EH region. + * tree-data-ref.c (get_references_in_stmt): If IFN_MASK_LOAD + has no lhs, ignore it. + * internal-fn.c (expand_MASK_LOAD): Likewise. + + PR ipa/60026 + * tree-inline.c (copy_forbidden): Fail for + __attribute__((optimize (0))) functions. + + PR other/58712 + * omp-low.c (simd_clone_struct_copy): If from->inbranch + is set, copy one less argument. + (expand_simd_clones): Don't subtract clone_info->inbranch + from simd_clone_struct_alloc argument. + + PR rtl-optimization/57915 + * recog.c (simplify_while_replacing): If all unary/binary/relational + operation arguments are constant, attempt to simplify those. + + PR middle-end/59261 + * expmed.c (expand_mult): For MODE_VECTOR_INT multiplication + if there is no vashl<mode>3 or ashl<mode>3 insn, skip_synth. + +2014-02-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60012 + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Apply + TBAA disambiguation to all DDRs. + +2014-02-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + PR target/59788 + * config/sol2.h (LINK_LIBGCC_MAPFILE_SPEC): Define. + (LINK_SPEC): Use it for -shared, -shared-libgcc. + +2014-02-03 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/59882 + * tree.c (get_binfo_at_offset): Do not get confused by empty classes; + +2014-02-03 Jan Hubicka <hubicka@ucw.cz> + + * gimple-fold.c (gimple_extract_devirt_binfo_from_cst): Remove. + * gimple-fold.h (gimple_extract_devirt_binfo_from_cst): Remove. + +2014-02-03 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/59831 + * ipa-cp.c (ipa_get_indirect_edge_target_1): Use ipa-devirt + to figure out targets of polymorphic calls with known decl. + * ipa-prop.c (try_make_edge_direct_virtual_call): Likewise. + * ipa-utils.h (get_polymorphic_call_info_from_invariant): Declare. + * ipa-devirt.c (get_polymorphic_call_info_for_decl): Break out from ... + (get_polymorphic_call_info): ... here. + (get_polymorphic_call_info_from_invariant): New function. + +2014-02-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (ipa_get_indirect_edge_target_1): Do direct + lookup via vtable pointer; check for type consistency + and turn inconsitent facts into UNREACHABLE. + * ipa-prop.c (try_make_edge_direct_virtual_call): Likewise. + * gimple-fold.c (gimple_get_virt_method_for_vtable): Do not ICE on + type inconsistent querries; return UNREACHABLE instead. + +2014-02-03 Richard Henderson <rth@twiddle.net> + + PR tree-opt/59924 + * tree-ssa-uninit.c (push_to_worklist): Don't re-push if we've + already processed this node. + (normalize_one_pred_1): Pass along mark_set. + (normalize_one_pred): Create and destroy a pointer_set_t. + (normalize_one_pred_chain): Likewise. + +2014-02-03 Laurent Aflonsi <laurent.alfonsi@st.com> + + PR gcov-profile/58602 + * gcc/gcov-io.c (gcov_open): Open with truncation when mode < 0. + +2014-02-03 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/59831 + * ipa-cp.c (ipa_get_indirect_edge_target_1): Give up on + -fno-devirtualize; try to devirtualize by the knowledge of + virtual table pointer given by aggregate propagation. + * ipa-prop.c (try_make_edge_direct_virtual_call): Likewise. + (ipa_print_node_jump_functions): Dump also offset that + is relevant for polymorphic calls. + (determine_known_aggregate_parts): Add arg_type parameter; use it + instead of determining the type from pointer type. + (ipa_compute_jump_functions_for_edge): Update call of + determine_known_aggregate_parts. + * gimple-fold.c (gimple_get_virt_method_for_vtable): Break out from ... + (gimple_get_virt_method_for_binfo): ... here; simplify using + vtable_pointer_value_to_vtable. + * gimple-fold.h (gimple_get_virt_method_for_vtable): Declare. + * ipa-devirt.c (subbinfo_with_vtable_at_offset): Turn OFFSET parameter + to unsigned HOST_WIDE_INT; use vtable_pointer_value_to_vtable. + (vtable_pointer_value_to_vtable): Break out from ...; handle also + POINTER_PLUS_EXPR. + (vtable_pointer_value_to_binfo): ... here. + * ipa-utils.h (vtable_pointer_value_to_vtable): Declare. + +2014-02-03 Teresa Johnson <tejohnson@google.com> + + * tree-vect-slp.c (vect_supported_load_permutation_p): Avoid + redef of outer loop index variable. + +2014-02-03 Marc Glisse <marc.glisse@inria.fr> + + PR c++/53017 + PR c++/59211 + * doc/extend.texi (Function Attributes): Typo. + +2014-02-03 Cong Hou <congh@google.com> + + PR tree-optimization/60000 + * tree-vect-loop.c (vect_transform_loop): Set pattern_def_seq to NULL + if the vectorized statement is a store. A store statement can only + appear at the end of pattern statements. + +2014-02-03 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (flag_opts): Add -mlong-double-128. + (ix86_option_override_internal): Default long double to 64-bit for + 32-bit Bionic and to 128-bit for 64-bit Bionic. + + * config/i386/i386.h (LONG_DOUBLE_TYPE_SIZE): Use 128 if + TARGET_LONG_DOUBLE_128 is true. + (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Likewise. + + * config/i386/i386.opt (mlong-double-80): Negate -mlong-double-64. + (mlong-double-64): Negate -mlong-double-128. + (mlong-double-128): New option. + + * config/i386/i386-c.c (ix86_target_macros): Define + __LONG_DOUBLE_128__ for TARGET_LONG_DOUBLE_128. + + * doc/invoke.texi: Document -mlong-double-128. + +2014-02-03 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/60024 + * sel-sched.c (init_regs_for_mode): Check if mode is OK first. + +2014-02-03 Markus Trippelsdorf <markus@trippelsdorf.de> + + * doc/invoke.texi (fprofile-reorder-functions): Fix typo. + +2014-02-03 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/57662 + * sel-sched.c (code_motion_path_driver): Do not mark already not + existing blocks in the visiting bitmap. + +2014-02-03 Andrey Belevantsev <abel@ispras.ru> + + * sel-sched-ir.c (sel_gen_insn_from_expr_after): Reset INSN_DELETED_P + on the insn being emitted. + +2014-02-03 James Greenhalgh <james.greenhalgh@arm.com> + Will Deacon <will.deacon@arm.com> + + * doc/gimple.texi (gimple_asm_clear_volatile): Remove. + +2014-02-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-tables.opt: Regenerate. + +2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_le): Generalize + for vector types other than V16QImode. + * config/rs6000/altivec.md (altivec_vperm_<mode>): Change to a + define_expand, and call altivec_expand_vec_perm_le when producing + code with little endian element order. + (*altivec_vperm_<mode>_internal): New insn having previous + behavior of altivec_vperm_<mode>. + (altivec_vperm_<mode>_uns): Change to a define_expand, and call + altivec_expand_vec_perm_le when producing code with little endian + element order. + (*altivec_vperm_<mode>_uns_internal): New insn having previous + behavior of altivec_vperm_<mode>_uns. + +2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (UNSPEC_VSUMSWS_DIRECT): New unspec. + (altivec_vsumsws): Add handling for -maltivec=be with a little + endian target. + (altivec_vsumsws_direct): New. + (reduc_splus_<mode>): Call gen_altivec_vsumsws_direct instead of + gen_altivec_vsumsws. + +2014-02-02 Jan Hubicka <hubicka@ucw.cz> + + * ipa-devirt.c (subbinfo_with_vtable_at_offset, + vtable_pointer_value_to_binfo): New functions. + * ipa-utils.h (vtable_pointer_value_to_binfo): Declare. + * ipa-prop.c (extr_type_from_vtbl_ptr_store): Use it. + +2014-02-02 Sandra Loosemore <sandra@codesourcery.com> + + * config/nios2/nios2.md (load_got_register): Initialize GOT + pointer from _gp_got instead of _GLOBAL_OFFSET_TABLE_. + * config/nios2/nios2.c (nios2_function_profiler): Likewise. + +2014-02-02 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (update_jump_functions_after_inlining): When type is not + preserverd by passthrough, do not propagate the type. + +2014-02-02 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.c (MIPS_GET_FCSR, MIPS_SET_FCSR): New macros. + (mips_atomic_assign_expand_fenv): New function. + (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): Define. + +2014-02-02 Richard Sandiford <rdsandiford@googlemail.com> + + * doc/extend.texi (__builtin_mips_get_fcsr): Document. + (__builtin_mips_set_fcsr): Likewise. + * config/mips/mips-ftypes.def: Add MIPS_VOID_FTYPE_USI and + MIPS_USI_FTYPE_VOID. + * config/mips/mips-protos.h (mips16_expand_get_fcsr): Declare + (mips16_expand_set_fcsr): Likewise. + * config/mips/mips.c (mips16_get_fcsr_stub): New variable. + (mips16_set_fcsr_stub): Likewise. + (mips16_get_fcsr_one_only_stub): New class. + (mips16_set_fcsr_one_only_stub): Likewise. + (mips16_expand_get_fcsr, mips16_expand_set_fcsr): New functions. + (mips_code_end): Output the get_fcsr and set_fcsr stubs, if needed. + (BUILTIN_AVAIL_MIPS16, AVAIL_ALL): New macros. + (hard_float): New availability predicate. + (mips_builtins): Add get_fcsr and set_fcsr. + (mips_expand_builtin): Check BUILTIN_AVAIL_MIPS16. + * config/mips/mips.md (UNSPEC_GET_FCSR, UNSPEC_SET_FCSR): New unspecs. + (GET_FCSR_REGNUM, SET_FCSR_REGNUM): New constants. + (mips_get_fcsr, *mips_get_fcsr, mips_get_fcsr_mips16_<mode>) + (mips_set_fcsr, *mips_set_fcsr, mips_set_fcsr_mips16_<mode>): New + patterns. + +2014-02-02 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.c (mips_one_only_stub): New class. + (mips_need_mips16_rdhwr_p): Replace with... + (mips16_rdhwr_stub): ...this new variable. + (mips16_stub_call_address): New function. + (mips16_rdhwr_one_only_stub): New class. + (mips_expand_thread_pointer): Use mips16_stub_call_address. + (mips_output_mips16_rdhwr): Delete. + (mips_finish_stub): New function. + (mips_code_end): Use it to handle rdhwr stubs. + +2014-02-02 Uros Bizjak <ubizjak@gmail.com> + + PR target/60017 + * config/i386/i386.c (classify_argument): Fix handling of bit_offset + when calculating size of integer atomic types. + +2014-02-02 H.J. Lu <hongjiu.lu@intel.com> + + * ipa-inline-analysis.c (true_predicate_p): Fix a typo in comments. + +2014-02-01 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/60003 + * gimple-low.c (lower_builtin_setjmp): Set cfun->has_nonlocal_label. + * profile.c (branch_prob): Use gimple_call_builtin_p + to check for BUILT_IN_SETJMP_RECEIVER. + * tree-inline.c (copy_bb): Call notice_special_calls. + +2014-01-31 Vladimir Makarov <vmakarov@redhat.com> + + PR bootstrap/59985 + * lra-constraints.c (process_alt_operands): Update reload_sum only + on the first pass. + +2014-01-31 Richard Henderson <rth@redhat.com> + + PR middle-end/60004 + * tree-eh.c (lower_try_finally_switch): Delay lowering finally block + until after else_eh is processed. + +2014-01-31 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/avx512fintrin.h (_MM_FROUND_TO_NEAREST_INT), + (_MM_FROUND_TO_NEG_INF), (_MM_FROUND_TO_POS_INF), + (_MM_FROUND_TO_ZERO), (_MM_FROUND_CUR_DIRECTION): Are already defined + in smmintrin.h, remove them. + (_MM_FROUND_NO_EXC): Same as above, bit also wrong value. + * config/i386/i386.c (ix86_print_operand): Split sae and rounding. + * config/i386/i386.md (ROUND_SAE): Fix value. + * config/i386/predicates.md (const_4_or_8_to_11_operand): New. + (const48_operand): New. + * config/i386/subst.md (round), (round_expand): Use + const_4_or_8_to_11_operand. + (round_saeonly), (round_saeonly_expand): Use const48_operand. + +2014-01-31 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/constraints.md (Yk): Swap meaning with k. + * config/i386/i386.md (movhi_internal): Change Yk to k. + (movqi_internal): Ditto. + (*k<logic><mode>): Ditto. + (*andhi_1): Ditto. + (*andqi_1): Ditto. + (kandn<mode>): Ditto. + (*<code>hi_1): Ditto. + (*<code>qi_1): Ditto. + (kxnor<mode>): Ditto. + (kortestzhi): Ditto. + (kortestchi): Ditto. + (kunpckhi): Ditto. + (*one_cmplhi2_1): Ditto. + (*one_cmplqi2_1): Ditto. + * config/i386/sse.md (): Change k to Yk. + (avx512f_load<mode>_mask): Ditto. + (avx512f_blendm<mode>): Ditto. + (avx512f_store<mode>_mask): Ditto. + (avx512f_storeu<ssemodesuffix>512_mask): Ditto. + (avx512f_storedqu<mode>_mask): Ditto. + (avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): + Ditto. + (avx512f_ucmp<mode>3<mask_scalar_merge_name>): Ditto. + (avx512f_vmcmp<mode>3<round_saeonly_name>): Ditto. + (avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Ditto. + (avx512f_maskcmp<mode>3): Ditto. + (avx512f_fmadd_<mode>_mask<round_name>): Ditto. + (avx512f_fmadd_<mode>_mask3<round_name>): Ditto. + (avx512f_fmsub_<mode>_mask<round_name>): Ditto. + (avx512f_fmsub_<mode>_mask3<round_name>): Ditto. + (avx512f_fnmadd_<mode>_mask<round_name>): Ditto. + (avx512f_fnmadd_<mode>_mask3<round_name>): Ditto. + (avx512f_fnmsub_<mode>_mask<round_name>): Ditto. + (avx512f_fnmsub_<mode>_mask3<round_name>): Ditto. + (avx512f_fmaddsub_<mode>_mask<round_name>): Ditto. + (avx512f_fmaddsub_<mode>_mask3<round_name>): Ditto. + (avx512f_fmsubadd_<mode>_mask<round_name>): Ditto. + (avx512f_fmsubadd_<mode>_mask3<round_name>): Ditto. + (avx512f_vextract<shuffletype>32x4_1_maskm): Ditto. + (vec_extract_lo_<mode>_maskm): Ditto. + (vec_extract_hi_<mode>_maskm): Ditto. + (avx512f_vternlog<mode>_mask): Ditto. + (avx512f_fixupimm<mode>_mask<round_saeonly_name>): Ditto. + (avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Ditto. + (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto. + (avx512f_<code>v8div16qi2_mask): Ditto. + (avx512f_<code>v8div16qi2_mask_store): Ditto. + (avx512f_eq<mode>3<mask_scalar_merge_name>_1): Ditto. + (avx512f_gt<mode>3<mask_scalar_merge_name>): Ditto. + (avx512f_testm<mode>3<mask_scalar_merge_name>): Ditto. + (avx512f_testnm<mode>3<mask_scalar_merge_name>): Ditto. + (*avx512pf_gatherpf<mode>sf_mask): Ditto. + (*avx512pf_gatherpf<mode>df_mask): Ditto. + (*avx512pf_scatterpf<mode>sf_mask): Ditto. + (*avx512pf_scatterpf<mode>df_mask): Ditto. + (avx512cd_maskb_vec_dupv8di): Ditto. + (avx512cd_maskw_vec_dupv16si): Ditto. + (avx512f_vpermi2var<mode>3_maskz): Ditto. + (avx512f_vpermi2var<mode>3_mask): Ditto. + (avx512f_vpermi2var<mode>3_mask): Ditto. + (avx512f_vpermt2var<mode>3_maskz): Ditto. + (*avx512f_gathersi<mode>): Ditto. + (*avx512f_gathersi<mode>_2): Ditto. + (*avx512f_gatherdi<mode>): Ditto. + (*avx512f_gatherdi<mode>_2): Ditto. + (*avx512f_scattersi<mode>): Ditto. + (*avx512f_scatterdi<mode>): Ditto. + (avx512f_compress<mode>_mask): Ditto. + (avx512f_compressstore<mode>_mask): Ditto. + (avx512f_expand<mode>_mask): Ditto. + * config/i386/subst.md (mask): Change k to Yk. + (mask_scalar_merge): Ditto. + (sd): Ditto. + +2014-01-31 Marc Glisse <marc.glisse@inria.fr> + + * doc/extend.texi (Vector Extensions): Document ?: in C++. + +2014-01-31 Richard Biener <rguenther@suse.de> + + PR middle-end/59990 + * builtins.c (fold_builtin_memory_op): Make sure to not + use a floating-point mode or a boolean or enumeral type for + the copy operation. + +2014-01-30 DJ Delorie <dj@redhat.com> + + * config/msp430/msp430.h (LIB_SPEC): Add -lcrt + * config/msp430/msp430.md (msp430_refsym_need_exit): New. + * config/msp430/msp430.c (msp430_expand_epilogue): Call it + whenever main() has an epilogue. + +2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_expand_vector_init): Remove + unused variable "field". + * config/rs6000/vsx.md (vsx_mergel_<mode>): Add missing DONE. + (vsx_mergeh_<mode>): Likewise. + * config/rs6000/altivec.md (altivec_vmrghb): Likewise. + (altivec_vmrghh): Likewise. + (altivec_vmrghw): Likewise. + (altivec_vmrglb): Likewise. + (altivec_vmrglh): Likewise. + (altivec_vmrglw): Likewise. + (altivec_vspltb): Add missing uses. + (altivec_vsplth): Likewise. + (altivec_vspltw): Likewise. + (altivec_vspltsf): Likewise. + +2014-01-30 Jakub Jelinek <jakub@redhat.com> + + PR target/59923 + * ifcvt.c (cond_exec_process_insns): Don't conditionalize + frame related instructions. + +2014-01-30 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59959 + * lra-constrains.c (simplify_operand_subreg): Assign NO_REGS to + any reload of register whose subreg is invalid. + +2014-01-30 Jakub Jelinek <jakub@redhat.com> + + * config/i386/f16cintrin.h (_cvtsh_ss): Avoid -Wnarrowing warning. + * config/i386/avx512fintrin.h (_mm512_mask_cvtusepi64_storeu_epi32): + Add missing return type - void. + +2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc/config/rs6000/rs6000.c (rs6000_expand_vector_init): Use + gen_vsx_xxspltw_v4sf_direct instead of gen_vsx_xxspltw_v4sf; + remove element index adjustment for endian (now handled in vsx.md + and altivec.md). + (altivec_expand_vec_perm_const): Use + gen_altivec_vsplt[bhw]_direct instead of gen_altivec_vsplt[bhw]. + * gcc/config/rs6000/vsx.md (UNSPEC_VSX_XXSPLTW): New unspec. + (vsx_xxspltw_<mode>): Adjust element index for little endian. + * gcc/config/rs6000/altivec.md (altivec_vspltb): Divide into a + define_expand and a new define_insn *altivec_vspltb_internal; + adjust for -maltivec=be on a little endian target. + (altivec_vspltb_direct): New. + (altivec_vsplth): Divide into a define_expand and a new + define_insn *altivec_vsplth_internal; adjust for -maltivec=be on a + little endian target. + (altivec_vsplth_direct): New. + (altivec_vspltw): Divide into a define_expand and a new + define_insn *altivec_vspltw_internal; adjust for -maltivec=be on a + little endian target. + (altivec_vspltw_direct): New. + (altivec_vspltsf): Divide into a define_expand and a new + define_insn *altivec_vspltsf_internal; adjust for -maltivec=be on + a little endian target. + +2014-01-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59993 + * tree-ssa-forwprop.c (associate_pointerplus): Check we + can propagate form the earlier stmt and avoid the transform + when the intermediate result is needed. + +2014-01-30 Alangi Derick <alangiderick@gmail.com> + + * README.Portability: Fix typo. + +2014-01-30 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.md(cstoresf4, cbranchsf4): Replace + comparison_operator with ordered_comparison_operator. + +2014-01-30 Nick Clifton <nickc@redhat.com> + + * config/mn10300/mn10300-protos.h (mn10300_store_multiple_operation_p): + Rename to mn10300_store_multiple_regs. + * config/mn10300/mn10300.c: Likewise. + * config/mn10300/mn10300.md (store_movm): Fix typo: call + store_multiple_regs. + * config/mn10300/predicates.md (mn10300_store_multiple_operation): + Call mn10300_store_multiple_regs. + +2014-01-30 Nick Clifton <nickc@redhat.com> + DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.c (register_sizes): Make the "upper half" of + %fp 2 to keep registers after it properly word-aligned. + (rl78_alloc_physical_registers_umul): Handle the case where both + input operands are the same. + +2014-01-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59903 + * tree-vect-loop.c (vect_transform_loop): Guard multiple-types + check properly. + +2014-01-30 Jason Merrill <jason@redhat.com> + + PR c++/59633 + * tree.c (walk_type_fields): Handle VECTOR_TYPE. + + PR c++/59645 + * cgraphunit.c (expand_thunk): Copy volatile arg to a temporary. + +2014-01-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59951 + * tree-vect-slp.c (vect_bb_slp_scalar_cost): Skip uses in debug insns. + +2014-01-30 Savin Zlobec <savin.zlobec@gmail.com> + + PR target/59784 + * config/nios2/nios2.c (nios2_fpu_insn_asm): Fix asm output of + SFmode to DFmode case. + +2014-01-29 DJ Delorie <dj@redhat.com> + + * config/msp430/msp430.opt (-minrt): New. + * config/msp430/msp430.h (STARTFILE_SPEC): Link alternate runtime + if -minrt given. + (ENDFILE_SPEC): Likewise. + +2014-01-29 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-analysis.c (clobber_only_eh_bb_p): New function. + (estimate_function_body_sizes): Use it. + +2014-01-29 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58561 + * dwarf2out.c (is_cxx_auto): New. + (is_base_type): Use it. + (gen_type_die_with_usage): Likewise. + +2014-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Use + CODE_FOR_altivec_vmrg*_direct rather than CODE_FOR_altivec_vmrg*. + * config/rs6000/vsx.md (vsx_mergel_<mode>): Adjust for + -maltivec=be with LE targets. + (vsx_mergeh_<mode>): Likewise. + * config/rs6000/altivec.md (UNSPEC_VMRG[HL]_DIRECT): New unspecs. + (mulv8hi3): Use gen_altivec_vmrg[hl]w_direct. + (altivec_vmrghb): Replace with define_expand and new + *altivec_vmrghb_internal insn; adjust for -maltivec=be with LE targets. + (altivec_vmrghb_direct): New define_insn. + (altivec_vmrghh): Replace with define_expand and new + *altivec_vmrghh_internal insn; adjust for -maltivec=be with LE targets. + (altivec_vmrghh_direct): New define_insn. + (altivec_vmrghw): Replace with define_expand and new + *altivec_vmrghw_internal insn; adjust for -maltivec=be with LE targets. + (altivec_vmrghw_direct): New define_insn. + (*altivec_vmrghsf): Adjust for endianness. + (altivec_vmrglb): Replace with define_expand and new + *altivec_vmrglb_internal insn; adjust for -maltivec=be with LE targets. + (altivec_vmrglb_direct): New define_insn. + (altivec_vmrglh): Replace with define_expand and new + *altivec_vmrglh_internal insn; adjust for -maltivec=be with LE targets. + (altivec_vmrglh_direct): New define_insn. + (altivec_vmrglw): Replace with define_expand and new + *altivec_vmrglw_internal insn; adjust for -maltivec=be with LE targets. + (altivec_vmrglw_direct): New define_insn. + (*altivec_vmrglsf): Adjust for endianness. + (vec_widen_umult_hi_v16qi): Use gen_altivec_vmrghh_direct. + (vec_widen_umult_lo_v16qi): Use gen_altivec_vmrglh_direct. + (vec_widen_smult_hi_v16qi): Use gen_altivec_vmrghh_direct. + (vec_widen_smult_lo_v16qi): Use gen_altivec_vmrglh_direct. + (vec_widen_umult_hi_v8hi): Use gen_altivec_vmrghw_direct. + (vec_widen_umult_lo_v8hi): Use gen_altivec_vmrglw_direct. + (vec_widen_smult_hi_v8hi): Use gen_altivec_vmrghw_direct. + (vec_widen_smult_lo_v8hi): Use gen_altivec_vmrglw_direct. + +2014-01-29 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_mov_immediate) + (aarch64_legitimate_address_p, aarch64_class_max_nregs): Adjust + whitespace. + +2014-01-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58742 + * tree-ssa-forwprop.c (associate_pointerplus): Rename to + associate_pointerplus_align. + (associate_pointerplus_diff): New function. + (associate_pointerplus): Likewise. Call associate_pointerplus_align + and associate_pointerplus_diff. + +2014-01-29 Richard Biener <rguenther@suse.de> + + * lto-streamer.h (LTO_major_version): Bump to 3. + (LTO_minor_version): Reset to 0. + +2014-01-29 Renlin Li <Renlin.Li@arm.com> + + * config/arm/arm-arches.def (ARM_ARCH): Add armv7ve arch. + * config/arm/arm.c (FL_FOR_ARCH7VE): New. + (arm_file_start): Generate correct asm header for armv7ve. + * config/arm/bpabi.h: Add multilib support for armv7ve. + * config/arm/driver-arm.c: Change the architectures of cortex-a7 + and cortex-a15 to armv7ve. + * config/arm/t-aprofile: Add multilib support for armv7ve. + * doc/invoke.texi: Document -march=armv7ve. + +2014-01-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58742 + * tree-ssa-forwprop.c (associate_plusminus): Return true + if we changed sth, defer EH cleanup to ... + (ssa_forward_propagate_and_combine): ... here. Call simplify_mult. + (simplify_mult): New function. + +2014-01-29 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59917 + PR tree-optimization/59920 + * tree.c (build_common_builtin_nodes): Remove + __builtin_setjmp_dispatcher initialization. + * omp-low.h (make_gimple_omp_edges): Add a new int * argument. + * profile.c (branch_prob): Use gsi_start_nondebug_after_labels_bb + instead of gsi_after_labels + manually skipping debug stmts. + Don't ignore bbs with BUILT_IN_SETJMP_DISPATCHER, instead + ignore bbs with IFN_ABNORMAL_DISPATCHER. + * tree-inline.c (copy_edges_for_bb): Remove + can_make_abnormal_goto argument, instead add abnormal_goto_dest + argument. Ignore computed_goto_p stmts. Don't call + make_abnormal_goto_edges. If a call might need abnormal edges + for non-local gotos, see if it already has an edge to + IFN_ABNORMAL_DISPATCHER or if it is IFN_ABNORMAL_DISPATCHER + with true argument, don't do anything then, otherwise add + EDGE_ABNORMAL from the call's bb to abnormal_goto_dest. + (copy_cfg_body): Compute abnormal_goto_dest, adjust copy_edges_for_bb + caller. + * gimple-low.c (struct lower_data): Remove calls_builtin_setjmp. + (lower_function_body): Don't emit __builtin_setjmp_dispatcher. + (lower_stmt): Don't set data->calls_builtin_setjmp. + (lower_builtin_setjmp): Adjust comment. + * builtins.def (BUILT_IN_SETJMP_DISPATCHER): Remove. + * tree-cfg.c (found_computed_goto): Remove. + (factor_computed_gotos): Remove. + (make_goto_expr_edges): Return bool, true for computed gotos. + Don't call make_abnormal_goto_edges. + (build_gimple_cfg): Don't set found_computed_goto, don't call + factor_computed_gotos. + (computed_goto_p): No longer static. + (make_blocks): Don't set found_computed_goto. + (get_abnormal_succ_dispatcher, handle_abnormal_edges): New functions. + (make_edges): If make_goto_expr_edges returns true, push bb + into ab_edge_goto vector, for stmt_can_make_abnormal_goto calls + instead of calling make_abnormal_goto_edges push bb into ab_edge_call + vector. Record mapping between bbs and OpenMP regions if there + are any, adjust make_gimple_omp_edges caller. Call + handle_abnormal_edges. + (make_abnormal_goto_edges): Remove. + * tree-cfg.h (make_abnormal_goto_edges): Remove. + (computed_goto_p, get_abnormal_succ_dispatcher): New prototypes. + * internal-fn.c (expand_ABNORMAL_DISPATCHER): New function. + * builtins.c (expand_builtin): Don't handle BUILT_IN_SETJMP_DISPATCHER. + * internal-fn.def (ABNORMAL_DISPATCHER): New. + * omp-low.c (make_gimple_omp_edges): Add region_idx argument, when + filling *region also set *region_idx to (*region)->entry->index. + + PR other/58712 + * read-rtl.c (read_rtx_code): Clear all of RTX_CODE_SIZE (code). + For REGs set ORIGINAL_REGNO. + +2014-01-29 Bingfeng Mei <bmei@broadcom.com> + + * doc/md.texi: Mention that a target shouldn't implement + vec_widen_(s|u)mul_even/odd pair if it is less efficient + than hi/lo pair. + +2014-01-29 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59594 + * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Sort + a copy of the datarefs vector rather than the vector itself. + +2014-01-28 Jason Merrill <jason@redhat.com> + + PR c++/53756 + * dwarf2out.c (auto_die): New static. + (gen_type_die_with_usage): Handle C++1y 'auto'. + (gen_subprogram_die): If in-class DIE had 'auto', emit type again + on definition. + +2014-01-28 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59672 + * config/i386/gnu-user64.h (SPEC_32): Add "m16|" to "m32". + (SPEC_X32): Likewise. + (SPEC_64): Likewise. + * config/i386/i386.c (ix86_option_override_internal): Turn off + OPTION_MASK_ISA_64BIT, OPTION_MASK_ABI_X32 and OPTION_MASK_ABI_64 + for TARGET_16BIT. + (x86_file_start): Output .code16gcc for TARGET_16BIT. + * config/i386/i386.h (TARGET_16BIT): New macro. + (TARGET_16BIT_P): Likewise. + * config/i386/i386.opt: Add m16. + * doc/invoke.texi: Document -m16. + +2014-01-28 Jakub Jelinek <jakub@redhat.com> + + PR preprocessor/59935 + * input.c (location_get_source_line): Bail out on when line number + is zero, and test the return value of lookup_or_add_file_to_cache_tab. + +2014-01-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58742 + * tree-ssa-forwprop.c (associate_plusminus): Handle + pointer subtraction of the form (T)(P + A) - (T)P. + +2014-01-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_new_rtx_costs): Remove useless statement + at const_int_cost. + +2014-01-28 Richard Biener <rguenther@suse.de> + + Revert + 2014-01-28 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/45364 + PR rtl-optimization/59890 + * var-tracking.c (local_get_addr_clear_given_value): Handle + already cleared slot. + (val_reset): Handle not allocated local_get_addr_cache. + (vt_find_locations): Use post-order on the inverted CFG. + +2014-01-28 Richard Biener <rguenther@suse.de> + + * tree-data-ref.h (ddr_is_anti_dependent, ddrs_have_anti_deps): Remove. + +2014-01-28 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/45364 + PR rtl-optimization/59890 + * var-tracking.c (local_get_addr_clear_given_value): Handle + already cleared slot. + (val_reset): Handle not allocated local_get_addr_cache. + (vt_find_locations): Use post-order on the inverted CFG. + +2014-01-28 Alan Modra <amodra@gmail.com> + + * Makefile.in (BUILD_CPPFLAGS): Do not use ALL_CPPFLAGS. + * configure.ac <recursive call for build != host>: Define + GENERATOR_FILE. Comment. Use CXX_FOR_BUILD, CXXFLAGS_FOR_BUILD + and LD_FOR_BUILD too. + * configure: Regenerate. + +2014-01-27 Allan Sandfeld Jensen <sandfeld@kde.org> + + * config/i386/i386.c (get_builtin_code_for_version): Separate + Westmere from Nehalem, Ivy Bridge from Sandy Bridge and + Broadwell from Haswell. + +2014-01-27 Steve Ellcey <sellcey@mips.com> + + * common/config/mips/mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): + Remove TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD. + * config/mips/mips.c (mips_option_override): Change setting + of TARGET_DSP. + * config/mips/mips.h (TARGET_FP_EXCEPTIONS_DEFAULT): Remove. + * config/mips/mips.opt (DSP, DSPR2, FP_EXCEPTIONS, FUSED_MADD, MIPS3D): + Change from Mask to Var. + +2014-01-27 Jeff Law <law@redhat.com> + + * ipa-inline.c (inline_small_functions): Fix typo. + +2014-01-27 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/avx512fintrin.h (_mm512_mask_cvtepi32_storeu_epi8): New. + (_mm512_mask_cvtsepi32_storeu_epi8): Ditto. + (_mm512_mask_cvtusepi32_storeu_epi8): Ditto. + (_mm512_mask_cvtepi32_storeu_epi16): Ditto. + (_mm512_mask_cvtsepi32_storeu_epi16): Ditto. + (_mm512_mask_cvtusepi32_storeu_epi16): Ditto. + (_mm512_mask_cvtepi64_storeu_epi32): Ditto. + (_mm512_mask_cvtsepi64_storeu_epi32): Ditto. + (_mm512_mask_cvtusepi64_storeu_epi32): Ditto. + (_mm512_mask_cvtepi64_storeu_epi16): Ditto. + (_mm512_mask_cvtsepi64_storeu_epi16): Ditto. + (_mm512_mask_cvtusepi64_storeu_epi16): Ditto. + (_mm512_mask_cvtepi64_storeu_epi8): Ditto. + (_mm512_mask_cvtsepi64_storeu_epi8): Ditto. + (_mm512_mask_cvtusepi64_storeu_epi8): Ditto. + (_mm512_storeu_epi64): Ditto. + (_mm512_cmpge_epi32_mask): Ditto. + (_mm512_cmpge_epu32_mask): Ditto. + (_mm512_cmpge_epi64_mask): Ditto. + (_mm512_cmpge_epu64_mask): Ditto. + (_mm512_cmple_epi32_mask): Ditto. + (_mm512_cmple_epu32_mask): Ditto. + (_mm512_cmple_epi64_mask): Ditto. + (_mm512_cmple_epu64_mask): Ditto. + (_mm512_cmplt_epi32_mask): Ditto. + (_mm512_cmplt_epu32_mask): Ditto. + (_mm512_cmplt_epi64_mask): Ditto. + (_mm512_cmplt_epu64_mask): Ditto. + (_mm512_cmpneq_epi32_mask): Ditto. + (_mm512_cmpneq_epu32_mask): Ditto. + (_mm512_cmpneq_epi64_mask): Ditto. + (_mm512_cmpneq_epu64_mask): Ditto. + (_mm512_expand_pd): Ditto. + (_mm512_expand_ps): Ditto. + * config/i386/i386-builtin-types.def: Add PV16QI, PV16QI, PV16HI, + VOID_PV8SI_V8DI_QI, VOID_PV8HI_V8DI_QI, VOID_PV16QI_V8DI_QI, + VOID_PV16QI_V16SI_HI, VOID_PV16HI_V16SI_HI. + * config/i386/i386.c (ix86_builtins): Add + IX86_BUILTIN_EXPANDPD512_NOMASK, IX86_BUILTIN_EXPANDPS512_NOMASK, + IX86_BUILTIN_PMOVDB512_MEM, IX86_BUILTIN_PMOVDW512_MEM, + IX86_BUILTIN_PMOVQB512_MEM, IX86_BUILTIN_PMOVQD512_MEM, + IX86_BUILTIN_PMOVQW512_MEM, IX86_BUILTIN_PMOVSDB512_MEM, + IX86_BUILTIN_PMOVSDW512_MEM, IX86_BUILTIN_PMOVSQB512_MEM, + IX86_BUILTIN_PMOVSQD512_MEM, IX86_BUILTIN_PMOVSQW512_MEM, + IX86_BUILTIN_PMOVUSDB512_MEM, IX86_BUILTIN_PMOVUSDW512_MEM, + IX86_BUILTIN_PMOVUSQB512_MEM, IX86_BUILTIN_PMOVUSQD512_MEM, + IX86_BUILTIN_PMOVUSQW512_MEM. + (bdesc_special_args): Add __builtin_ia32_pmovusqd512mem_mask, + __builtin_ia32_pmovsqd512mem_mask, + __builtin_ia32_pmovqd512mem_mask, + __builtin_ia32_pmovusqw512mem_mask, + __builtin_ia32_pmovsqw512mem_mask, + __builtin_ia32_pmovqw512mem_mask, + __builtin_ia32_pmovusdw512mem_mask, + __builtin_ia32_pmovsdw512mem_mask, + __builtin_ia32_pmovdw512mem_mask, + __builtin_ia32_pmovqb512mem_mask, + __builtin_ia32_pmovusqb512mem_mask, + __builtin_ia32_pmovsqb512mem_mask, + __builtin_ia32_pmovusdb512mem_mask, + __builtin_ia32_pmovsdb512mem_mask, + __builtin_ia32_pmovdb512mem_mask. + (bdesc_args): Add __builtin_ia32_expanddf512, + __builtin_ia32_expandsf512. + (ix86_expand_special_args_builtin): Handle VOID_FTYPE_PV8SI_V8DI_QI, + VOID_FTYPE_PV8HI_V8DI_QI, VOID_FTYPE_PV16HI_V16SI_HI, + VOID_FTYPE_PV16QI_V8DI_QI, VOID_FTYPE_PV16QI_V16SI_HI. + * config/i386/sse.md (unspec): Add UNSPEC_EXPAND_NOMASK. + (avx512f_<code><pmov_src_lower><mode>2_mask_store): New. + (*avx512f_<code>v8div16qi2_store_mask): Renamed to ... + (avx512f_<code>v8div16qi2_mask_store): This. + (avx512f_expand<mode>): New. + +2014-01-27 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/avx512pfintrin.h (_mm512_mask_prefetch_i32gather_pd): + New. + (_mm512_mask_prefetch_i64gather_pd): Ditto. + (_mm512_prefetch_i32scatter_pd): Ditto. + (_mm512_mask_prefetch_i32scatter_pd): Ditto. + (_mm512_prefetch_i64scatter_pd): Ditto. + (_mm512_mask_prefetch_i64scatter_pd): Ditto. + (_mm512_mask_prefetch_i32gather_ps): Fix operand type. + (_mm512_mask_prefetch_i64gather_ps): Ditto. + (_mm512_prefetch_i32scatter_ps): Ditto. + (_mm512_mask_prefetch_i32scatter_ps): Ditto. + (_mm512_prefetch_i64scatter_ps): Ditto. + (_mm512_mask_prefetch_i64scatter_ps): Ditto. + * config/i386/i386-builtin-types.def: Define + VOID_FTYPE_QI_V8SI_PCINT64_INT_INT + and VOID_FTYPE_QI_V8DI_PCINT64_INT_INT. + * config/i386/i386.c (ix86_builtins): Define IX86_BUILTIN_GATHERPFQPD, + IX86_BUILTIN_GATHERPFDPD, IX86_BUILTIN_SCATTERPFDPD, + IX86_BUILTIN_SCATTERPFQPD. + (ix86_init_mmx_sse_builtins): Define __builtin_ia32_gatherpfdpd, + __builtin_ia32_gatherpfdps, __builtin_ia32_gatherpfqpd, + __builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdpd, + __builtin_ia32_scatterpfdps, __builtin_ia32_scatterpfqpd, + __builtin_ia32_scatterpfqps. + (ix86_expand_builtin): Expand new built-ins. + * config/i386/sse.md (avx512pf_gatherpf<mode>): Add SF suffix, + fix memory access data type. + (*avx512pf_gatherpf<mode>_mask): Ditto. + (*avx512pf_gatherpf<mode>): Ditto. + (avx512pf_scatterpf<mode>): Ditto. + (*avx512pf_scatterpf<mode>_mask): Ditto. + (*avx512pf_scatterpf<mode>): Ditto. + (GATHER_SCATTER_SF_MEM_MODE): New. + (avx512pf_gatherpf<mode>df): Ditto. + (*avx512pf_gatherpf<mode>df_mask): Ditto. + (*avx512pf_scatterpf<mode>df): Ditto. + +2014-01-27 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/59934 + * expmed.h (expmed_mode_index): Rework so that analysis and optimziers + know when the MODE_PARTIAL_INT and MODE_VECTOR_INT cases can never be + reached. + +2014-01-27 James Greenhalgh <james.greenhalgh@arm.com> + + * common/config/arm/arm-common.c + (arm_rewrite_mcpu): Handle multiple names. + * config/arm/arm.h + (BIG_LITTLE_SPEC): Do not discard mcpu switches. + +2014-01-27 James Greenhalgh <james.greenhalgh@arm.com> + + * gimple-builder.h (create_gimple_tmp): Delete. + +2014-01-27 Christian Bruel <christian.bruel@st.com> + + * config/sh/sh-mem.cc (sh_expand_cmpnstr): Fix remaining bytes after + words comparisons. + +2014-01-26 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.md (call): Generate indirect long calls to non-local + functions when outputing 32-bit code. + (call_value): Likewise except for special call to buggy powf function. + + * config/pa/pa.c (pa_attr_length_indirect_call): Adjust length of + portable runtime and PIC indirect calls. + (pa_output_indirect_call): Remove unnecessary nop from portable runtime + and PIC call sequences. Use ldo instead of blr to set return register + in PIC call sequence. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilegx/sync.md (atomic_fetch_sub): Fix negation and + avoid clobbering a live register. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins): + Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}. + * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins): + Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (tilegx_function_arg): Start 16-byte + arguments on even registers. + (tilegx_gimplify_va_arg_expr): Align 16-byte var args to + STACK_BOUNDARY. + * config/tilegx/tilegx.h (STACK_BOUNDARY): Change to 16 bytes. + (BIGGEST_ALIGNMENT): Ditto. + (BIGGEST_FIELD_ALIGNMENT): Ditto. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier + insns before bundling. + * config/tilegx/tilegx.md (tile_network_barrier): Update comment. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (tilegx_expand_builtin): Set + PREFETCH_SCHEDULE_BARRIER_P to true for prefetches. + * config/tilepro/tilepro.c (tilepro_expand_builtin): Ditto. + +2014-01-25 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/constraints.md (kl): Delete. + * config/mips/mips.md (divmod<mode>4, udivmod<mode>4): Turn into + define expands, using... + (divmod<mode>4_mips16, udivmod<mode>4_mips16): ...these new + instructions for MIPS16. + (*divmod<mode>4, *udivmod<mode>4): New patterns, taken from the + non-MIPS16 version of the old divmod<mode>4 and udivmod<mode>4. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilepro/tilepro.md (ctzdi2): Use register_operand predicate. + (clzdi2): Ditto. + (ffsdi2): Ditto. + +2014-01-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (tilegx_expand_to_rtl_hook): New. + (TARGET_EXPAND_TO_RTL_HOOK): Define. + +2014-01-25 Richard Sandiford <rdsandiford@googlemail.com> + + * rtlanal.c (canonicalize_condition): Split out duplicated mode check. + Handle XOR. + +2014-01-25 Jakub Jelinek <jakub@redhat.com> + + * print-rtl.c (in_call_function_usage): New var. + (print_rtx): When in CALL_INSN_FUNCTION_USAGE, always print + EXPR_LIST mode as mode and not as reg note name. + + PR middle-end/59561 + * cfgloopmanip.c (copy_loop_info): If + loop->warned_aggressive_loop_optimizations, make sure + the flag is set in target loop too. + +2014-01-24 Balaji V. Iyer <balaji.v.iyer@intel.com> + + * builtins.c (is_builtin_name): Renamed flag_enable_cilkplus to + flag_cilkplus. + * builtins.def: Likewise. + * cilk.h (fn_contains_cilk_spawn_p): Likewise. + * cppbuiltin.c (define_builtin_macros_for_compilation_flags): Likewise. + * ira.c (ira_setup_eliminable_regset): Likewise. + * omp-low.c (gate_expand_omp): Likewise. + (execute_lower_omp): Likewise. + (diagnose_sb_0): Likewise. + (gate_diagnose_omp_blocks): Likewise. + (simd_clone_clauses_extract): Likewise. + (gate): Likewise. + +2014-01-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Remove + correction for little endian... + * config/rs6000/vsx.md (vsx_xxpermdi2_<mode>_1): ...and move it to + here. + +2014-01-24 Jeff Law <law@redhat.com> + + PR tree-optimization/59919 + * tree-vrp.c (find_assert_locations_1): Do not register asserts + for non-returning calls. + +2014-01-24 James Greenhalgh <james.greenhalgh@arm.com> + + * common/config/aarch64/aarch64-common.c + (aarch64_rewrite_mcpu): Handle multiple names. + * config/aarch64/aarch64.h + (BIG_LITTLE_SPEC): Do not discard mcpu switches. + +2014-01-24 Dodji Seketeli <dodji@redhat.com> + + * input.c (add_file_to_cache_tab): Handle the case where fopen + returns NULL. + +2014-01-23 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59929 + * config/i386/i386.md (pushsf splitter): Get stack adjustment + from push operand if code of push isn't PRE_DEC. + +2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/59909 + * doc/invoke.texi (RS/6000 and PowerPC Options): Document + -mquad-memory-atomic. Update -mquad-memory documentation to say + it is only used for non-atomic loads/stores. + + * config/rs6000/predicates.md (quad_int_reg_operand): Allow either + -mquad-memory or -mquad-memory-atomic switches. + + * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Add + -mquad-memory-atomic to ISA 2.07 support. + + * config/rs6000/rs6000.opt (-mquad-memory-atomic): Add new switch + to separate support of normal quad word memory operations (ldq, stq) + from the atomic quad word memory operations. + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Add + support to separate non-atomic quad word operations from atomic + quad word operations. Disable non-atomic quad word operations in + little endian mode so that we don't have to swap words after the + load and before the store. + (quad_load_store_p): Add comment about atomic quad word support. + (rs6000_opt_masks): Add -mquad-memory-atomic to the list of + options printed with -mdebug=reg. + + * config/rs6000/rs6000.h (TARGET_SYNC_TI): Use + -mquad-memory-atomic as the test for whether we have quad word + atomic instructions. + (TARGET_SYNC_HI_QI): If either -mquad-memory-atomic, -mquad-memory, + or -mp8-vector are used, allow byte/half-word atomic operations. + + * config/rs6000/sync.md (load_lockedti): Insure that the address + is a proper indexed or indirect address for the lqarx instruction. + On little endian systems, swap the hi/lo registers after the lqarx + instruction. + (load_lockedpti): Use indexed_or_indirect_operand predicate to + insure the address is valid for the lqarx instruction. + (store_conditionalti): Insure that the address is a proper indexed + or indirect address for the stqcrx. instruction. On little endian + systems, swap the hi/lo registers before doing the stqcrx. + instruction. + (store_conditionalpti): Use indexed_or_indirect_operand predicate to + insure the address is valid for the stqcrx. instruction. + + * gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros): + Define __QUAD_MEMORY__ and __QUAD_MEMORY_ATOMIC__ based on what + type of quad memory support is available. + +2014-01-23 Vladimir Makarov <vmakarov@redhat.com> + + PR regression/59915 + * lra-constraints.c (simplify_operand_subreg): Spill pseudo if + there is a danger of looping. + +2014-01-23 Pat Haugen <pthaugen@us.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't + force flag_ira_loop_pressure if set via command line. + +2014-01-23 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64-simd-builtins.def (ashr): DI mode removed. + (ashr_simd): New builtin handling DI mode. + * config/aarch64/aarch64-simd.md (aarch64_ashr_simddi): New pattern. + (aarch64_sshr_simddi): New match pattern. + * config/aarch64/arm_neon.h (vshr_n_s32): Builtin call modified. + (vshrd_n_s64): Likewise. + * config/aarch64/predicates.md (aarch64_shift_imm64_di): New predicate. + +2014-01-23 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.h (ASM_SPEC): Pass the -mcpu as -mcpu. + (LIB_SPEC): Drop use of memory.ld and peripherals.ld scripts in + favour of mcu specific scripts. + * config/msp430/t-msp430 (MULTILIB_MATCHES): Add more matches for + 430x multilibs. + +2014-01-23 James Greenhalgh <james.greenhalgh@arm.com> + Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/arm_neon.h (vaddv_s8): __LANE0 cleanup. + (vaddv_s16): Likewise. + (vaddv_s32): Likewise. + (vaddv_u8): Likewise. + (vaddv_u16): Likewise. + (vaddv_u32): Likewise. + (vaddvq_s8): Likewise. + (vaddvq_s16): Likewise. + (vaddvq_s32): Likewise. + (vaddvq_s64): Likewise. + (vaddvq_u8): Likewise. + (vaddvq_u16): Likewise. + (vaddvq_u32): Likewise. + (vaddvq_u64): Likewise. + (vaddv_f32): Likewise. + (vaddvq_f32): Likewise. + (vaddvq_f64): Likewise. + (vmaxv_f32): Likewise. + (vmaxv_s8): Likewise. + (vmaxv_s16): Likewise. + (vmaxv_s32): Likewise. + (vmaxv_u8): Likewise. + (vmaxv_u16): Likewise. + (vmaxv_u32): Likewise. + (vmaxvq_f32): Likewise. + (vmaxvq_f64): Likewise. + (vmaxvq_s8): Likewise. + (vmaxvq_s16): Likewise. + (vmaxvq_s32): Likewise. + (vmaxvq_u8): Likewise. + (vmaxvq_u16): Likewise. + (vmaxvq_u32): Likewise. + (vmaxnmv_f32): Likewise. + (vmaxnmvq_f32): Likewise. + (vmaxnmvq_f64): Likewise. + (vminv_f32): Likewise. + (vminv_s8): Likewise. + (vminv_s16): Likewise. + (vminv_s32): Likewise. + (vminv_u8): Likewise. + (vminv_u16): Likewise. + (vminv_u32): Likewise. + (vminvq_f32): Likewise. + (vminvq_f64): Likewise. + (vminvq_s8): Likewise. + (vminvq_s16): Likewise. + (vminvq_s32): Likewise. + (vminvq_u8): Likewise. + (vminvq_u16): Likewise. + (vminvq_u32): Likewise. + (vminnmv_f32): Likewise. + (vminnmvq_f32): Likewise. + (vminnmvq_f64): Likewise. + +2014-01-23 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_dup_lane<mode>): Correct lane number on big-endian. + (aarch64_dup_lane_<vswap_widthi_name><mode>): Likewise. + (*aarch64_mul3_elt<mode>): Likewise. + (*aarch64_mul3_elt<vswap_width_name><mode>): Likewise. + (*aarch64_mul3_elt_to_64v2df): Likewise. + (*aarch64_mla_elt<mode>): Likewise. + (*aarch64_mla_elt_<vswap_width_name><mode>): Likewise. + (*aarch64_mls_elt<mode>): Likewise. + (*aarch64_mls_elt_<vswap_width_name><mode>): Likewise. + (*aarch64_fma4_elt<mode>): Likewise. + (*aarch64_fma4_elt_<vswap_width_name><mode>): Likewise. + (*aarch64_fma4_elt_to_64v2df): Likewise. + (*aarch64_fnma4_elt<mode>): Likewise. + (*aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise. + (*aarch64_fnma4_elt_to_64v2df): Likewise. + (aarch64_sq<r>dmulh_lane<mode>): Likewise. + (aarch64_sq<r>dmulh_laneq<mode>): Likewise. + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise. + (aarch64_sqdmull_lane<mode>_internal): Likewise. + (aarch64_sqdmull2_lane<mode>_internal): Likewise. + +2013-01-23 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_be_checked_get_lane<mode>): New define_expand. + * config/aarch64/aarch64-simd-builtins.def + (BUILTIN_VALL (GETLANE, be_checked_get_lane, 0)): + New builtin definition. + * config/aarch64/arm_neon.h: (__aarch64_vget_lane_any): + Use new safe be builtin. + +2014-01-23 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_be_ld1<mode>): + New define_insn. + (aarch64_be_st1<mode>): Likewise. + (aarch_ld1<VALL:mode>): Define_expand modified. + (aarch_st1<VALL:mode>): Likewise. + * config/aarch64/aarch64.md (UNSPEC_LD1): New unspec definition. + (UNSPEC_ST1): Likewise. + +2014-01-23 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.md: Add trap insn and attribute + +2014-01-23 Dodji Seketeli <dodji@redhat.com> + + PR preprocessor/58580 + * input.h (location_get_source_line): Take an additional line_size + parameter. + (void diagnostics_file_cache_fini): Declare new function. + * input.c (struct fcache): New type. + (fcache_tab_size, fcache_buffer_size, fcache_line_record_size): + New static constants. + (diagnostic_file_cache_init, total_lines_num) + (lookup_file_in_cache_tab, evicted_cache_tab_entry) + (add_file_to_cache_tab, lookup_or_add_file_to_cache_tab) + (needs_read, needs_grow, maybe_grow, read_data, maybe_read_data) + (get_next_line, read_next_line, goto_next_line, read_line_num): + New static function definitions. + (diagnostic_file_cache_fini): New function. + (location_get_source_line): Take an additional output line_len + parameter. Re-write using lookup_or_add_file_to_cache_tab and + read_line_num. + * diagnostic.c (diagnostic_finish): Call + diagnostic_file_cache_fini. + (adjust_line): Take an additional input parameter for the length + of the line, rather than calculating it with strlen. + (diagnostic_show_locus): Adjust the use of + location_get_source_line and adjust_line with respect to their new + signature. While displaying a line now, do not stop at the first + null byte. Rather, display the zero byte as a space and keep + going until we reach the size of the line. + * Makefile.in: Add vec.o to OBJS-libcommon + +2014-01-23 Kirill Yukhin <kirill.yukhin@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/avx512fintrin.h (_mm512_kmov): New. + * config/i386/i386.c (IX86_BUILTIN_KMOV16): Ditto. + (__builtin_ia32_kmov16): Ditto. + * config/i386/i386.md (UNSPEC_KMOV): New. + (kmovw): Ditto. + +2014-01-23 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/avx512fintrin.h (_mm512_loadu_si512): Rename. + (_mm512_storeu_si512): Ditto. + +2014-01-23 Richard Sandiford <rdsandiford@googlemail.com> + + PR target/52125 + * rtl.h (get_referenced_operands): Declare. + * recog.c (get_referenced_operands): New function. + * config/mips/mips.c (mips_reorg_process_insns): Check which asm + operands have been referenced when recording LO_SUM references. + +2014-01-22 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.md: Correct bswaphi2 insn. + +2014-01-22 Jan Hubicka <hubicka@ucw.cz> + + * config/i386/x86-tune.def (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): + Enable for generic and recent AMD targets. + +2014-01-22 Jan Hubicka <hubicka@ucw.cz> + + * combine-stack-adj.c (combine_stack_adjustments_for_block): Remove + ARG_SIZE note when adjustment was eliminated. + +2014-01-22 Jeff Law <law@redhat.com> + + PR tree-optimization/59597 + * tree-ssa-threadupdate.c (dump_jump_thread_path): Move to earlier + in file. Accept new argument REGISTERING and use it to modify + dump output appropriately. + (register_jump_thread): Corresponding changes. + (mark_threaded_blocks): Reinstate code to cancel unprofitable + thread paths involving joiner blocks. Add code to dump cancelled + jump threading paths. + +2014-01-22 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59477 + * lra-constraints.c (inherit_in_ebb): Process call for living hard + regs. Update reloads_num and potential_reload_hard_regs for all insns. + +2014-01-22 Tom Tromey <tromey@redhat.com> + + * config/i386/i386-interix.h (i386_pe_unique_section): Don't use + PARAMS. + * config/cr16/cr16-protos.h (notice_update_cc): Don't use PARAMS. + +2014-01-21 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59896 + * lra-constraints.c (process_alt_operands): Check unused note for + matched operands of insn with no output reloads. + +2014-01-21 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.c (mips_move_to_gpr_cost): Add M16_REGS case. + (mips_move_from_gpr_cost): Likewise. + +2014-01-21 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59858 + * lra-constraints.c (SMALL_REGISTER_CLASS_P): Use + ira_class_hard_regs_num. + (process_alt_operands): Increase reject for dying matched operand. + +2014-01-21 Jakub Jelinek <jakub@redhat.com> + + PR target/59003 + * config/i386/i386.c (expand_small_movmem_or_setmem): If mode is + smaller than size, perform several stores or loads and stores + at dst + count - size to store or copy all of size bytes, rather + than just last modesize bytes. + +2014-01-20 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.c (rl78_propogate_register_origins): Verify + that CLOBBERs are REGs before propogating their values. + +2014-01-20 H.J. Lu <hongjiu.lu@intel.com> + + PR middle-end/59789 + * cgraph.c (cgraph_inline_failed_string): Add type to DEFCIFCODE. + (cgraph_inline_failed_type): New function. + * cgraph.h (DEFCIFCODE): Add type. + (cgraph_inline_failed_type_t): New enum. + (cgraph_inline_failed_type): New prototype. + * cif-code.def: Add CIF_FINAL_NORMAL to OK, FUNCTION_NOT_CONSIDERED, + FUNCTION_NOT_OPTIMIZED, REDEFINED_EXTERN_INLINE, + FUNCTION_NOT_INLINE_CANDIDATE, LARGE_FUNCTION_GROWTH_LIMIT, + LARGE_STACK_FRAME_GROWTH_LIMIT, MAX_INLINE_INSNS_SINGLE_LIMIT, + MAX_INLINE_INSNS_AUTO_LIMIT, INLINE_UNIT_GROWTH_LIMIT, + RECURSIVE_INLINING, UNLIKELY_CALL, NOT_DECLARED_INLINED, + OPTIMIZING_FOR_SIZE, ORIGINALLY_INDIRECT_CALL, + INDIRECT_UNKNOWN_CALL, USES_COMDAT_LOCAL. + Add CIF_FINAL_ERROR to UNSPECIFIED, BODY_NOT_AVAILABLE, + FUNCTION_NOT_INLINABLE, OVERWRITABLE, MISMATCHED_ARGUMENTS, + EH_PERSONALITY, NON_CALL_EXCEPTIONS, TARGET_OPTION_MISMATCH, + OPTIMIZATION_MISMATCH. + * tree-inline.c (expand_call_inline): Emit errors during + early_inlining if cgraph_inline_failed_type returns CIF_FINAL_ERROR. + +2014-01-20 Uros Bizjak <ubizjak@gmail.com> + + PR target/59685 + * config/i386/sse.md (*andnot<mode>3<mask_name>): Handle MODE_V16SF + mode attribute in insn output. + +2014-01-20 Eric Botcazou <ebotcazou@adacore.com> + + * output.h (output_constant): Delete. + * varasm.c (output_constant): Make private. + +2014-01-20 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64-simd.md (vec_perm<mode>): Add BE check. + +2014-01-20 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59860 + * tree.h (fold_builtin_strcat): New prototype. + * builtins.c (fold_builtin_strcat): No longer static. Add len + argument, if non-NULL, don't call c_strlen. Optimize + directly into __builtin_memcpy instead of __builtin_strcpy. + (fold_builtin_2): Adjust fold_builtin_strcat caller. + * gimple-fold.c (gimple_fold_builtin): Handle BUILT_IN_STRCAT. + +2014-01-20 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false + for SImode_address_operand operands, having only a REG argument. + +2014-01-20 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): Expand + loader name using mbig-endian. + (LINUX_TARGET_LINK_SPEC): Pass linker -m flag. + +2014-01-20 James Greenhalgh <james.greenhalgh@arm.com> + + * doc/invoke.texi (-march): Clarify documentation for AArch64. + (-mtune): Likewise. + (-mcpu): Likewise. + +2014-01-20 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-protos.h + (aarch64_cannot_change_mode_class_ptr): Declare. + * config/aarch64/aarch64.c (aarch64_cannot_change_mode_class, + aarch64_cannot_change_mode_class_ptr): New. + * config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Change to call + backend hook aarch64_cannot_change_mode_class. + +2014-01-20 James Greenhalgh <james.greenhalgh@arm.com> + + * common/config/aarch64/aarch64-common.c + (aarch64_handle_option): Don't handle any option order logic here. + * config/aarch64/aarch64.c (aarch64_parse_arch): Do not override + selected_cpu, warn on architecture version mismatch. + (aarch64_override_options): Fix parsing order for option strings. + +2014-01-20 Jan-Benedict Glaw <jbglaw@lug-owl.de> + Iain Sandoe <iain@codesourcery.com> + + PR bootstrap/59496 + * config/rs6000/darwin.h (ADJUST_FIELD_ALIGN): Fix unused variable + warning. Amend comment to reflect current functionality. + +2014-01-20 Richard Biener <rguenther@suse.de> + + PR middle-end/59860 + * builtins.c (fold_builtin_strcat): Remove case better handled + by tree-ssa-strlen.c. + +2014-01-20 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64.opt + (mcpu, march, mtune): Make case-insensitive. + +2014-01-20 Jakub Jelinek <jakub@redhat.com> + + PR target/59880 + * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false + if operands[1] is a REG or ZERO_EXTEND of a REG. + +2014-01-19 Jan Hubicka <hubicka@ucw.cz> + + * varasm.c (compute_reloc_for_constant): Use targetm.binds_local_p. + +2014-01-19 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_attr_length_millicode_call): Correct length of + long non-pic millicode calls. + +2014-01-19 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/vax/vax.h (FUNCTION_ARG_REGNO_P): Fix unused variable warning. + +2014-01-19 Kito Cheng <kito@0xlab.org> + + * builtins.c (expand_movstr): Check movstr expand done or fail. + +2014-01-18 Uros Bizjak <ubizjak@gmail.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/59379 + * config/i386/i386.md (*lea<mode>): Zero-extend return register + to DImode for zero-extended addresses. + +2014-01-19 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/57763 + * bb-reorder.c (fix_crossing_unconditional_branches): Set JUMP_LABEL + on the new indirect jump_insn and increment LABEL_NUSES (label). + +2014-01-18 H.J. Lu <hongjiu.lu@intel.com> + + PR bootstrap/59580 + PR bootstrap/59583 + * config.gcc (x86_archs): New variable. + (x86_64_archs): Likewise. + (x86_cpus): Likewise. + Use $x86_archs, $x86_64_archs and $x86_cpus to check valid + --with-arch/--with-cpu= options. + Support --with-arch=/--with-cpu={nehalem,westmere, + sandybridge,ivybridge,haswell,broadwell,bonnell,silvermont}. + +2014-01-18 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_adjust_cost): Reorder PROCESSOR_K8 + and PROCESSOR_ATHLON to simplify code. Move "memory" calculation. + +2014-01-18 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*swap<mode>): Rename from swap<mode>. + +2014-01-18 Jakub Jelinek <jakub@redhat.com> + + PR target/58944 + * config/i386/i386-c.c (ix86_pragma_target_parse): Temporarily + clear cpp_get_options (parse_in)->warn_unused_macros for + ix86_target_macros_internal with cpp_define. + +2014-01-18 Richard Sandiford <rdsandiford@googlemail.com> + + * jump.c (delete_related_insns): Keep (use (insn))s. + * reorg.c (redundant_insn): Check for barriers too. + +2014-01-17 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (ix86_split_lea_for_addr): Fix a comment typo. + +2014-01-17 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_attr_length_indirect_call): Don't output a short + call to $$dyncall when TARGET_LONG_CALLS is true. + +2014-01-17 Jeff Law <law@redhat.com> + + * ree.c (combine_set_extension): Temporarily disable test for + changing number of hard registers. + +2014-01-17 Jan Hubicka <hubicka@ucw.cz> + + PR middle-end/58125 + * ipa-inline-analysis.c (inline_free_summary): + Do not free summary of aliases. + +2014-01-17 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59706 + * gimplify.c (gimplify_expr): Use create_tmp_var + instead of create_tmp_var_raw. If cond doesn't have + integral type, don't add the IFN_ANNOTATE builtin at all. + +2014-01-17 Martin Jambor <mjambor@suse.cz> + + PR ipa/59736 + * ipa-cp.c (prev_edge_clone): New variable. + (grow_next_edge_clone_vector): Renamed to grow_edge_clone_vectors. + Also resize prev_edge_clone vector. + (ipcp_edge_duplication_hook): Also update prev_edge_clone. + (ipcp_edge_removal_hook): New function. + (ipcp_driver): Register ipcp_edge_removal_hook. + +2014-01-17 Andrew Pinski <apinski@cavium.com> + Steve Ellcey <sellcey@mips.com> + + PR target/59462 + * config/mips/mips.c (mips_print_operand): Check operand mode instead + of operator mode. + +2014-01-17 Jeff Law <law@redhat.com> + + PR middle-end/57904 + * passes.def: Reorder pass_copy_prop, pass_unrolli, pass_ccp sequence + so that pass_ccp runs first. + +2014-01-17 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (ix86_lea_outperforms): Use TARGET_XXX. + (ix86_adjust_cost): Use !TARGET_XXX. + (do_reorder_for_imul): Likewise. + (swap_top_of_ready_list): Likewise. + (ix86_sched_reorder): Likewise. + +2014-01-17 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386-c.c (ix86_target_macros_internal): Handle + PROCESSOR_INTEL. Treat like PROCESSOR_GENERIC. + * config/i386/i386.c (intel_memcpy): New. Duplicate slm_memcpy. + (intel_memset): New. Duplicate slm_memset. + (intel_cost): New. Duplicate slm_cost. + (m_INTEL): New macro. + (processor_target_table): Add "intel". + (ix86_option_override_internal): Replace PROCESSOR_SILVERMONT + with PROCESSOR_INTEL for "intel". + (ix86_lea_outperforms): Support PROCESSOR_INTEL. Duplicate + PROCESSOR_SILVERMONT. + (ix86_issue_rate): Likewise. + (ix86_adjust_cost): Likewise. + (ia32_multipass_dfa_lookahead): Likewise. + (swap_top_of_ready_list): Likewise. + (ix86_sched_reorder): Likewise. + (ix86_avoid_lea_for_addr): Check TARGET_AVOID_LEA_FOR_ADDR + instead of TARGET_OPT_AGU. + * config/i386/i386.h (TARGET_INTEL): New. + (TARGET_AVOID_LEA_FOR_ADDR): Likewise. + (processor_type): Add PROCESSOR_INTEL. + * config/i386/x86-tune.def: Support m_INTEL. Duplicate m_SILVERMONT. + Add X86_TUNE_AVOID_LEA_FOR_ADDR. + +2014-01-17 Marek Polacek <polacek@redhat.com> + + PR c/58346 + * gimple-fold.c (fold_array_ctor_reference): Don't fold if element + size is zero. + +2014-01-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/46590 + * opts.c (default_options_table): Add entries for + OPT_fbranch_count_reg, OPT_fmove_loop_invariants and OPT_ftree_pta, + all enabled at -O1 but not for -Og. + * common.opt (fbranch-count-reg): Remove Init(1). + (fmove-loop-invariants): Likewise. + (ftree-pta): Likewise. + +2014-01-17 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.c (ix86_data_alignment): For compatibility with + (incorrect) GCC 4.8 and earlier alignment assumptions ensure we align + decls to at least the GCC 4.8 used alignments. + + PR fortran/59440 + * tree-nested.c (convert_nonlocal_reference_stmt, + convert_local_reference_stmt): For NAMELIST_DECLs in gimple_bind_vars + of GIMPLE_BIND stmts, adjust associated decls. + +2014-01-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/46590 + * vec.h (vec<>::bseach): New member function implementing + binary search according to C89 bsearch. + (vec<>::qsort): Avoid calling ::qsort for vectors with sizes 0 or 1. + * tree-ssa-loop-im.c (struct mem_ref): Make stored member a + bitmap pointer again. Make accesses_in_loop a flat array. + (mem_ref_obstack): New global. + (outermost_indep_loop): Adjust for mem_ref->stored changes. + (mark_ref_stored): Likewise. + (ref_indep_loop_p_2): Likewise. + (set_ref_stored_in_loop): New helper function. + (mem_ref_alloc): Allocate mem_refs on the mem_ref_obstack obstack. + (memref_free): Adjust. + (record_mem_ref_loc): Simplify. + (gather_mem_refs_stmt): Adjust. + (sort_locs_in_loop_postorder_cmp): New function. + (analyze_memory_references): Sort accesses_in_loop after + loop postorder number. + (find_ref_loc_in_loop_cmp): New function. + (for_all_locs_in_loop): Find relevant cluster of locs in + accesses_in_loop and iterate without recursion. + (execute_sm): Avoid uninit warning. + (struct ref_always_accessed): Simplify. + (ref_always_accessed::operator ()): Likewise. + (ref_always_accessed_p): Likewise. + (tree_ssa_lim_initialize): Initialize mem_ref_obstack, compute + loop postorder numbers here. + (tree_ssa_lim_finalize): Free mem_ref_obstack and loop postorder + numbers. + +2014-01-17 Jan Hubicka <hubicka@ucw.cz> + + PR c++/57945 + * passes.c (rest_of_decl_compilation): Don't call varpool_finalize_decl + on decls for which assemble_alias has been called. + +2014-01-17 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.opt: (mcpu): New option. + * config/msp430/msp430.c (msp430_mcu_name): Use target_mcu. + (msp430_option_override): Parse target_cpu. If the MCU name + matches a generic string, clear target_mcu. + (msp430_attr): Allow numeric interrupt values up to 63. + (msp430_expand_epilogue): No longer invert operand 1 of gen_popm. + * config/msp430/msp430.h (ASM_SPEC): Convert -mcpu into a -mmcu + option. + * config/msp430/t-msp430: (MULTILIB_MATCHES): Remove mcu matches. + Add mcpu matches. + * config/msp430/msp430.md (popm): Use %J rather than %I. + (addsi3): Use msp430_nonimmediate_operand for operand 2. + (addhi_cy_i): Use immediate_operand for operand 2. + * doc/invoke.texi: Document -mcpu option. + +2014-01-17 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/38518 + * df.h (df_analyze_loop): Declare. + * df-core.c: Include cfgloop.h. + (df_analyze_1): Split out main part of df_analyze. + (df_analyze): Adjust. + (loop_inverted_post_order_compute): New function. + (loop_post_order_compute): Likewise. + (df_analyze_loop): New function avoiding whole-function + postorder computes. + * loop-invariant.c (find_defs): Use df_analyze_loop. + (find_invariants): Adjust. + * loop-iv.c (iv_analysis_loop_init): Use df_analyze_loop. + +2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * config/arm/arm.c (arm_v7m_tune): Set max_insns_skipped to 2. + (thumb2_final_prescan_insn): Set max to MAX_INSN_PER_IT_BLOCK. + +2014-01-16 Ilya Enkovich <ilya.enkovich@intel.com> + + * ipa-ref.c (ipa_remove_stmt_references): Fix references + traversal when removing references. + +2014-01-16 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/59775 + * tree.c (get_binfo_at_offset): Look harder for virtual bases. + +2014-01-16 Bernd Schmidt <bernds@codesourcery.com> + + PR middle-end/56791 + * reload.c (find_reloads_address_1): Do not use RELOAD_OTHER when + pushing a reload for an autoinc when we had previously reloaded an + inner part of the address. + +2014-01-16 Jakub Jelinek <jakub@redhat.com> + + * tree-vectorizer.h (struct _loop_vec_info): Add no_data_dependencies + field. + (LOOP_VINFO_NO_DATA_DEPENDENCIES): Define. + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Clear it + when not giving up or versioning for alias only because of + loop->safelen. + (vect_analyze_data_ref_dependences): Set to true. + * tree-vect-stmts.c (hoist_defs_of_uses): Return false if def_stmt + is a GIMPLE_PHI. + (vectorizable_load): Use LOOP_VINFO_NO_DATA_DEPENDENCIES instead of + LOOP_REQUIRES_VERSIONING_FOR_ALIAS, add && !nested_in_vect_loop + to the condition. + + PR middle-end/58344 + * expr.c (expand_expr_real_1): Handle init == NULL_TREE. + + PR target/59839 + * config/i386/i386.c (ix86_expand_builtin): If target doesn't satisfy + operand 0 predicate for gathers, use a new pseudo as subtarget. + +2014-01-16 Vladimir Makarov <vmakarov@redhat.com> + + PR middle-end/59609 + * lra-constraints.c (process_alt_operands): Add printing debug info. + Check absence of input/output reloads for matched operands too. + +2014-01-16 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59835 + * ira.c (ira_init_register_move_cost): Increase cost for + impossible modes. + +2014-01-16 Alan Lawrence <alan.lawrence@arm.com> + + * config/arm/arm.opt (mcpu, march, mtune): Make case-insensitive. + +2014-01-16 Richard Earnshaw <rearnsha@arm.com> + + PR target/59780 + * aarch64.c (aarch64_split_128bit_move): Don't lookup REGNO on + non-register objects. Use gen_(high/low)part more consistently. + Fix assertions. + +2014-01-16 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/59844 + * config/rs6000/rs6000.md (reload_vsx_from_gprsf): Add little + endian support, remove tests for WORDS_BIG_ENDIAN. + (p8_mfvsrd_3_<mode>): Likewise. + (reload_gpr_from_vsx<mode>): Likewise. + (reload_gpr_from_vsxsf): Likewise. + (p8_mfvsrd_4_disf): Likewise. + +2014-01-16 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/46590 + * lcm.c (compute_antinout_edge): Use postorder iteration. + (compute_laterin): Use inverted postorder iteration. + +2014-01-16 Nick Clifton <nickc@redhat.com> + + PR middle-end/28865 + * varasm.c (output_constant): Return the number of bytes actually + emitted. + (output_constructor_array_range): Update the field size with the + number of bytes emitted by output_constant. + (output_constructor_regular_field): Likewise. Also do not + complain if the total number of bytes emitted is now greater + than the expected fieldpos. + * output.h (output_constant): Update prototype and descriptive comment. + +2014-01-16 Marek Polacek <polacek@redhat.com> + + PR middle-end/59827 + * cgraph.c (gimple_check_call_args): Don't use DECL_ARG_TYPE if + it is error_mark_node. + +2014-01-15 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_hard_regno_mode_ok): Use + VALID_AVX256_REG_OR_OI_MODE. + +2014-01-15 Pat Haugen <pthaugen@us.ibm.com> + + * config/rs6000/rs6000.c (rs6000_output_function_prologue): Check if + current procedure should be profiled. + +2014-01-15 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64.c (aarch64_register_move_cost): Correct cost + of moving from/to the STACK_REG register class. + +2014-01-15 Richard Henderson <rth@redhat.com> + + PR debug/54694 + * reginfo.c (global_regs_decl): Globalize. + * rtl.h (global_regs_decl): Declare. + * ira.c (do_reload): Diagnose frame_pointer_needed and it + reserved via global_regs. + +2014-01-15 Teresa Johnson <tejohnson@google.com> + + * tree-ssa-sccvn.c (visit_reference_op_call): Handle NULL vdef. + +2014-01-15 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + + * config/rs6000/altivec.md (mulv8hi3): Explicitly generate vmulesh + and vmulosh rather than call gen_vec_widen_smult_*. + (vec_widen_umult_even_v16qi): Test VECTOR_ELT_ORDER_BIG rather + than BYTES_BIG_ENDIAN to determine use of even or odd instruction. + (vec_widen_smult_even_v16qi): Likewise. + (vec_widen_umult_even_v8hi): Likewise. + (vec_widen_smult_even_v8hi): Likewise. + (vec_widen_umult_odd_v16qi): Likewise. + (vec_widen_smult_odd_v16qi): Likewise. + (vec_widen_umult_odd_v8hi): Likewise. + (vec_widen_smult_odd_v8hi): Likewise. + (vec_widen_umult_hi_v16qi): Explicitly generate vmuleub and + vmuloub rather than call gen_vec_widen_umult_*. + (vec_widen_umult_lo_v16qi): Likewise. + (vec_widen_smult_hi_v16qi): Explicitly generate vmulesb and + vmulosb rather than call gen_vec_widen_smult_*. + (vec_widen_smult_lo_v16qi): Likewise. + (vec_widen_umult_hi_v8hi): Explicitly generate vmuleuh and vmulouh + rather than call gen_vec_widen_umult_*. + (vec_widen_umult_lo_v8hi): Likewise. + (vec_widen_smult_hi_v8hi): Explicitly gnerate vmulesh and vmulosh + rather than call gen_vec_widen_smult_*. + (vec_widen_smult_lo_v8hi): Likewise. + +2014-01-15 Jeff Law <law@redhat.com> + + PR tree-optimization/59747 + * ree.c (find_and_remove_re): Properly handle case where a second + eliminated extension requires widening a copy created for elimination + of a prior extension. + (combine_set_extension): Ensure that the number of hard regs needed + for a destination register does not change when we widen it. + +2014-01-15 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * config.gcc (*-*-rtems*): Add t-rtems to tmake_file. + (arm*-*-uclinux*eabi*): Do not override an existing tmake_file. + (arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*): Likwise. + (arm*-*-rtems*): Use t-rtems from existing tmake_file. + (avr-*-rtems*): Likewise. + (bfin*-rtems*): Likewise. + (moxie-*-rtems*): Likewise. + (h8300-*-rtems*): Likewise. + (i[34567]86-*-rtems*): Likewise. + (lm32-*-rtems*): Likewise. + (m32r-*-rtems*): Likewise. + (m68k-*-rtems*): Likewise. + (microblaze*-*-rtems*): Likewise. + (mips*-*-rtems*): Likewise. + (powerpc-*-rtems*): Likewise. + (sh-*-rtems*): Likewise. + (sparc-*-rtems*): Likewise. + (sparc64-*-rtems*): Likewise. + (v850-*-rtems*): Likewise. + (m32c-*-rtems*): Likewise. + +2014-01-15 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59511 + * ira.c (ira_init_register_move_cost): Use memory costs for some + cases of register move cost calculations. + * lra-constraints.c (lra_constraints): Use REG_FREQ_FROM_BB + instead of BB frequency. + * lra-coalesce.c (move_freq_compare_func, lra_coalesce): Ditto. + * lra-assigns.c (find_hard_regno_for): Ditto. + +2014-01-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59822 + * tree-vect-stmts.c (hoist_defs_of_uses): New function. + (vectorizable_load): Use it to hoist defs of uses of invariant + loads out of the loop. + +2014-01-15 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> + Kugan Vivekanandarajah <kuganv@linaro.org> + + PR target/59695 + * config/aarch64/aarch64.c (aarch64_build_constant): Fix incorrect + truncation. + +2014-01-15 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/59802 + * lcm.c (compute_available): Use inverted postorder to seed + the initial worklist. + +2014-01-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/59803 + * config/s390/s390.c (s390_preferred_reload_class): Don't return + ADDR_REGS for invalid symrefs in non-PIC code. + +2014-01-15 Jakub Jelinek <jakub@redhat.com> + + PR other/58712 + * builtins.c (determine_block_size): Initialize *probable_max_size + even if len_rtx is CONST_INT. + +2014-01-14 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-protos.h (tune_params): Add issue_rate. + * config/aarch64/aarch64.c (generic_tunings): Add issue rate of 2. + (cortexa53_tunings): Likewise. + (aarch64_sched_issue_rate): New function. + (TARGET_SCHED_ISSUE_RATE): Define. + +2014-01-14 Vladimir Makarov <vmakarov@redhat.com> + + * ira-costs.c (find_costs_and_classes): Add missed + ira_init_register_move_cost_if_necessary. + +2014-01-14 Vladimir Makarov <vmakarov@redhat.com> + + PR target/59787 + * config/arm/arm.c (arm_coproc_mem_operand): Add lra_in_progress. + +2014-01-14 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59794 + * config/i386/i386.c (type_natural_mode): Add a bool parameter + to indicate if type is used for function return value. Warn ABI + change if the vector mode isn't available for function return value. + (ix86_function_arg_advance): Pass false to type_natural_mode. + (ix86_function_arg): Likewise. + (ix86_gimplify_va_arg): Likewise. + (function_arg_32): Don't warn ABI change. + (ix86_function_value): Pass true to type_natural_mode. + (ix86_return_in_memory): Likewise. + (ix86_struct_value_rtx): Removed. + (TARGET_STRUCT_VALUE_RTX): Likewise. + +2014-01-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * jump.c (redirect_jump_2): Remove REG_CROSSING_JUMP notes when + converting a conditional jump into a conditional return. + +2014-01-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58921 + PR tree-optimization/59006 + * tree-vect-loop-manip.c (vect_loop_versioning): Remove code + hoisting invariant stmts. + * tree-vect-stmts.c (vectorizable_load): Insert the splat of + invariant loads on the preheader edge if possible. + +2014-01-14 Joey Ye <joey.ye@arm.com> + + * doc/plugin.texi (Building GCC plugins): Update to C++. + +2014-01-14 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/avx512erintrin.h (_mm_rcp28_round_sd): New. + (_mm_rcp28_round_ss): Ditto. + (_mm_rsqrt28_round_sd): Ditto. + (_mm_rsqrt28_round_ss): Ditto. + (_mm_rcp28_sd): Ditto. + (_mm_rcp28_ss): Ditto. + (_mm_rsqrt28_sd): Ditto. + (_mm_rsqrt28_ss): Ditto. + * config/i386/avx512fintrin.h (_mm512_stream_load_si512): Ditto. + * config/i386/i386-builtin-types.def (V8DI_FTYPE_PV8DI): Ditto. + * config/i386/i386.c (IX86_BUILTIN_MOVNTDQA512): Ditto. + (IX86_BUILTIN_RCP28SD): Ditto. + (IX86_BUILTIN_RCP28SS): Ditto. + (IX86_BUILTIN_RSQRT28SD): Ditto. + (IX86_BUILTIN_RSQRT28SS): Ditto. + (bdesc_special_args): Define __builtin_ia32_movntdqa512, + __builtin_ia32_rcp28sd_round, __builtin_ia32_rcp28ss_round, + __builtin_ia32_rsqrt28sd_round, __builtin_ia32_rsqrt28ss_round. + (ix86_expand_special_args_builtin): Expand new FTYPE. + * config/i386/sse.md (define_mode_attr "sse4_1_avx2"): Expand to V8DI. + (srcp14<mode>): Make insn unary. + (avx512f_vmscalef<mode><round_name>): Use substed predicate. + (avx512f_sgetexp<mode><round_saeonly_name>): Ditto. + (avx512f_rndscale<mode><round_saeonly_name>): Ditto. + (<sse4_1_avx2>_movntdqa): Extend to 512 bits. + (avx512er_exp2<mode><mask_name><round_saeonly_name>): + Fix rounding: make it SAE only. + (<mask_codefor>avx512er_rcp28<mode><mask_name><round_saeonly_name>): + Ditto. + (<mask_codefor>avx512er_rsqrt28<mode><mask_name><round_saeonly_name>): + Ditto. + (avx512er_vmrcp28<mode><round_saeonly_name>): Ditto. + (avx512er_vmrsqrt28<mode><round_saeonly_name>): Ditto. + (avx512f_getmant<mode><mask_name><round_saeonly_name>): Ditto. + * config/i386/subst.md (round_saeonly_mask_scalar_operand3): Remove. + (round_saeonly_mask_scalar_operand4): Ditto. + (round_saeonly_mask_scalar_op3): Ditto. + (round_saeonly_mask_scalar_op4): Ditto. + +2014-01-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): + Implement -maltivec=be for vec_insert and vec_extract. + +2014-01-10 DJ Delorie <dj@redhat.com> + + * config/msp430/msp430.md (call_internal): Don't allow memory + references with SP as the base register. + (call_value_internal): Likewise. + * config/msp430/constraints.md (Yc): New. For memory references + that don't use SP as a base register. + + * config/msp430/msp430.c (msp430_print_operand): Add 'J' to mean + "an integer without a # prefix" + * config/msp430/msp430.md (epilogue_helper): Use it. + +2014-01-13 Jakub Jelinek <jakub@redhat.com> + + PR target/59617 + * config/i386/i386.c (ix86_vectorize_builtin_gather): Uncomment + AVX512F gather builtins. + * tree-vect-stmts.c (vectorizable_mask_load_store): For now punt + on gather decls with INTEGER_TYPE masktype. + (vectorizable_load): For INTEGER_TYPE masktype, put the INTEGER_CST + directly into the builtin rather than hoisting it before loop. + + PR tree-optimization/59387 + * tree-scalar-evolution.c: Include gimple-fold.h and gimplify-me.h. + (scev_const_prop): If folded_casts and type has undefined overflow, + use force_gimple_operand instead of force_gimple_operand_gsi and + for each added stmt if it is assign with + arith_code_with_undefined_signed_overflow, call + rewrite_to_defined_overflow. + * tree-ssa-loop-im.c: Don't include gimplify-me.h, include + gimple-fold.h instead. + (arith_code_with_undefined_signed_overflow, + rewrite_to_defined_overflow): Moved to ... + * gimple-fold.c (arith_code_with_undefined_signed_overflow, + rewrite_to_defined_overflow): ... here. No longer static. + Include gimplify-me.h. + * gimple-fold.h (arith_code_with_undefined_signed_overflow, + rewrite_to_defined_overflow): New prototypes. + +2014-01-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Fix typo in description. + +2014-01-13 Eric Botcazou <ebotcazou@adacore.com> + + * builtins.c (get_object_alignment_2): Minor tweak. + * tree-ssa-loop-ivopts.c (may_be_unaligned_p): Rewrite. + +2014-01-13 Christian Bruel <christian.bruel@st.com> + + * config/sh/sh-mem.cc (sh_expand_cmpnstr): Unroll small sizes and + optimized non constant lengths. + +2014-01-13 Jakub Jelinek <jakub@redhat.com> + + PR libgomp/59194 + * omp-low.c (expand_omp_atomic_pipeline): Expand the initial + load as __atomic_load_N if possible. + +2014-01-11 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.c (rs6000_expand_mtfsf_builtin): Remove + target parameter. + (rs6000_expand_builtin): Adjust call. + +2014-01-11 David Edelsohn <dje.gcc@gmail.com> + + PR target/58115 + * config/rs6000/rs6000.h (SWITCHABLE_TARGET): Define. + * config/rs6000/rs6000.c: Include target-globals.h. + (rs6000_set_current_function): Instead of doing target_reinit + unconditionally, use save_target_globals_default_opts and + restore_target_globals. + + * config/rs6000/rs6000-builtin.def (mffs, mtfsf): Add builtins for + FPSCR. + * config/rs6000/rs6000.c (rs6000_expand_mtfsf_builtin): New. + (rs6000_expand_builtin): Handle mffs and mtfsf. + (rs6000_init_builtins): Define mffs and mtfsf. + * config/rs6000/rs6000.md (UNSPECV_MFFS, UNSPECV_MTFSF): New constants. + (rs6000_mffs): New pattern. + (rs6000_mtfsf): New pattern. + +2014-01-11 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (iv_ca_narrow): New parameter. + Start narrowing with START. Apply candidate-use pair + and check overall cost in narrowing. + (iv_ca_prune): Pass new argument. + +2014-01-10 Jeff Law <law@redhat.com> + + PR middle-end/59743 + * ree.c (combine_reaching_defs): Ensure the defining statement + occurs before the extension when optimizing extensions with + different source and destination hard registers. + +2014-01-10 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/58585 + * ipa-devirt.c (build_type_inheritance_graph): Also add types of + vtables into the type inheritance graph. + +2014-01-10 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/59754 + * ree.c (combine_reaching_defs): Disallow !SCALAR_INT_MODE_P + modes in the REGNO != REGNO case. + +2014-01-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000-builtin.def: Fix pasto for VPKSDUS. + +2014-01-10 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59745 + * tree-predcom.c (tree_predictive_commoning_loop): Call + free_affine_expand_cache if giving up because components is NULL. + + * target-globals.c (save_target_globals): Allocate < 4KB structs using + GC in payload of target_globals struct instead of allocating them on + the heap and the larger structs separately using GC. + * target-globals.h (struct target_globals): Make regs, hard_regs, + reload, expmed, ira, ira_int and lra_fields GTY((atomic)) instead + of GTY((skip)) and change type to void *. + (reset_target_globals): Cast loads from those fields to corresponding + types. + +2014-01-10 Steve Ellcey <sellcey@mips.com> + + PR plugins/59335 + * Makefile.in (PLUGIN_HEADERS): Add gimplify.h, gimple-iterator.h, + gimple-ssa.h, fold-const.h, tree-cfg.h, tree-into-ssa.h, + tree-ssanames.h, print-tree.h, varasm.h, and context.h. + +2014-01-10 Richard Earnshaw <rearnsha@arm.com> + + PR target/59744 + * aarch64-modes.def (CC_Zmode): New flags mode. + * aarch64.c (aarch64_select_cc_mode): Only allow NEG when the condition + represents an equality. + (aarch64_get_condition_code): Handle CC_Zmode. + * aarch64.md (compare_neg<mode>): Restrict to equality operations. + +2014-01-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_expand_tbegin): Remove jump over CC + extraction in good case. + +2014-01-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59374 + * tree-vect-slp.c (vect_slp_analyze_bb_1): Move dependence + checking after SLP discovery. Mark stmts not participating + in any SLP instance properly. + +2014-01-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_new_rtx_costs): Use destination mode + when handling a SET rtx. + +2014-01-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-cores.def (cortex-a53): Specify FL_CRC32. + (cortex-a57): Likewise. + (cortex-a57.cortex-a53): Likewise. Remove redundant flags. + +2014-01-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_init_iwmmxt_builtins): Skip + non-iwmmxt builtins. + +2014-01-10 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/58252 + PR ipa/59226 + * ipa-devirt.c record_target_from_binfo): Take as argument + stack of binfos and lookup matching one for virtual inheritance. + (possible_polymorphic_call_targets_1): Update. + +2014-01-10 Huacai Chen <chenhc@lemote.com> + + * config/mips/driver-native.c (host_detect_local_cpu): Handle new + kernel strings for Loongson-2E/2F/3A. + +2014-01-10 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59670 + * tree-vect-data-refs.c (vect_analyze_data_refs): Check + is_gimple_call before calling gimple_call_internal_p. + +2014-01-09 Steve Ellcey <sellcey@mips.com> + + * Makefile.in (TREE_FLOW_H): Remove. + (TREE_SSA_H): Add file names from tree-flow.h. + * doc/tree-ssa.texi (Annotations): Remove reference to tree-flow.h + * tree.h: Remove tree-flow.h reference. + * hash-table.h: Remove tree-flow.h reference. + * tree-ssa-loop-niter.c (dump_affine_iv): Replace tree-flow.h + reference with tree-ssa-loop.h. + +2014-01-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * doc/invoke.texi: Add -maltivec={be,le} options, and document + default element-order behavior for -maltivec. + * config/rs6000/rs6000.opt: Add -maltivec={be,le} options. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure + that -maltivec={le,be} implies -maltivec; disallow -maltivec=le + when targeting big endian, at least for now. + * config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG. + +2014-01-09 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/47735 + * cfgexpand.c (expand_one_var): For SSA_NAMEs, if the underlying + var satisfies use_register_for_decl, just take into account type + alignment, rather than decl alignment. + + PR tree-optimization/59622 + * gimple-fold.c (gimple_fold_call): Fix a typo in message. For + __builtin_unreachable replace the OBJ_TYPE_REF call with a call to + __builtin_unreachable and add if needed a setter of the lhs SSA_NAME. + Don't devirtualize for inplace at all. For targets.length () == 1, + if the call is noreturn and cfun isn't in SSA form yet, clear lhs. + +2014-01-09 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.md (cpu): Remove the unused btver1. + +2014-01-09 H.J. Lu <hongjiu.lu@intel.com> + + * gdbasan.in: Put a breakpoint on __sanitizer::Report. + +2014-01-09 Jakub Jelinek <jakub@redhat.com> + + PR target/58115 + * tree-core.h (struct target_globals): New forward declaration. + (struct tree_target_option): Add globals field. + * tree.h (TREE_TARGET_GLOBALS): Define. + (prepare_target_option_nodes_for_pch): New prototype. + * target-globals.h (struct target_globals): Define even if + !SWITCHABLE_TARGET. + * tree.c (prepare_target_option_node_for_pch, + prepare_target_option_nodes_for_pch): New functions. + * config/i386/i386.h (SWITCHABLE_TARGET): Define. + * config/i386/i386.c: Include target-globals.h. + (ix86_set_current_function): Instead of doing target_reinit + unconditionally, use save_target_globals_default_opts and + restore_target_globals. + +2014-01-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59715 + * tree-cfg.h (split_critical_edges): Declare. + * tree-cfg.c (split_critical_edges): Export. + * tree-ssa-sink.c (execute_sink_code): Split critical edges. + +2014-01-09 Max Ostapenko <m.ostapenko@partner.samsung.com> + + * cfgexpand.c (expand_stack_vars): Optionally disable + asan stack protection. + (expand_used_vars): Likewise. + (partition_stack_vars): Likewise. + * asan.c (asan_emit_stack_protection): Optionally disable + after return stack usage. + (instrument_derefs): Optionally disable memory access instrumentation. + (instrument_builtin_call): Likewise. + (instrument_strlen_call): Likewise. + (asan_protect_global): Optionally disable global variables protection. + * doc/invoke.texi: Added doc for new options. + * params.def: Added new options. + * params.h: Likewise. + +2014-01-09 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/59724 + * ifcvt.c (cond_exec_process_if_block): Don't call + flow_find_head_matching_sequence with 0 longest_match. + * cfgcleanup.c (flow_find_head_matching_sequence): Count even + non-active insns if !stop_after. + (try_head_merge_bb): Revert 2014-01-07 changes. + +2014-01-08 Jeff Law <law@redhat.com> + + * ree.c (get_sub_rtx): New function, extracted from... + (merge_def_and_ext): Here. + (combine_reaching_defs): Use get_sub_rtx. + +2014-01-08 Eric Botcazou <ebotcazou@adacore.com> + + * cgraph.h (varpool_variable_node): Do not choke on null node. + +2014-01-08 Catherine Moore <clm@codesourcery.com> + + * config/mips/mips.md (simple_return): Attempt to use JRC + for microMIPS. + * config/mips/mips.h (MIPS_CALL): Attempt to use JALS for microMIPS. + +2014-01-08 Richard Sandiford <rdsandiford@googlemail.com> + + PR rtl-optimization/59137 + * reorg.c (steal_delay_list_from_target): Call update_block for + elided insns. + (steal_delay_list_from_fallthrough, relax_delay_slots): Likewise. + +2014-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove + two duplicate entries. + +2014-01-08 Richard Sandiford <rdsandiford@googlemail.com> + + Revert: + 2012-10-07 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.c (mips_truncated_op_cost): New function. + (mips_rtx_costs): Adjust test for BADDU. + * config/mips/mips.md (*baddu_di<mode>): Push truncates to operands. + + 2012-10-02 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into... + (*baddu_si): ...this new pattern. + +2014-01-08 Jakub Jelinek <jakub@redhat.com> + + PR ipa/59722 + * ipa-prop.c (ipa_analyze_params_uses): Ignore uses in debug stmts. + +2014-01-08 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/57748 + * expr.h (expand_expr_real, expand_expr_real_1): Add new parameter + inner_reference_p. + (expand_expr, expand_normal): Adjust. + * expr.c (expand_expr_real, expand_expr_real_1): Add new parameter + inner_reference_p. Use inner_reference_p to expand inner references. + (store_expr): Adjust. + * cfgexpand.c (expand_call_stmt): Adjust. + +2014-01-08 Rong Xu <xur@google.com> + + * gcov-io.c (gcov_var): Move from gcov-io.h. + (gcov_position): Ditto. + (gcov_is_error): Ditto. + (gcov_rewrite): Ditto. + * gcov-io.h: Refactor. Move gcov_var to gcov-io.h, and libgcov + only part to libgcc/libgcov.h. + +2014-01-08 Marek Polacek <polacek@redhat.com> + + PR middle-end/59669 + * omp-low.c (simd_clone_adjust): Don't crash if def is NULL. + +2014-01-08 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59667 + * ubsan.c (ubsan_type_descriptor): Call strip_array_types on type2. + +2014-01-08 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/59649 + * stor-layout.c (get_mode_bounds): For BImode return + 0 and STORE_FLAG_VALUE. + +2014-01-08 Richard Biener <rguenther@suse.de> + + PR middle-end/59630 + * gimple.h (is_gimple_builtin_call): Remove. + (gimple_builtin_call_types_compatible_p): New. + (gimple_call_builtin_p): New overload. + * gimple.c (is_gimple_builtin_call): Remove. + (validate_call): Rename to ... + (gimple_builtin_call_types_compatible_p): ... this and export. Also + check return types. + (validate_type): New static function. + (gimple_call_builtin_p): New overload and adjust. + * gimple-fold.c (gimple_fold_builtin): Fold the return value. + (gimple_fold_call): Likewise. Use gimple_call_builtin_p. + (gimple_fold_stmt_to_constant_1): Likewise. + * tsan.c (instrument_gimple): Use gimple_call_builtin_p. + +2014-01-08 Richard Biener <rguenther@suse.de> + + PR middle-end/59471 + * gimplify.c (gimplify_expr): Gimplify register-register type + VIEW_CONVERT_EXPRs to separate stmts. + +2014-01-07 Jeff Law <law@redhat.com> + + PR middle-end/53623 + * ree.c (combine_set_extension): Handle case where source + and destination registers in an extension insn are different. + (combine_reaching_defs): Allow source and destination registers + in extension to be different under limited circumstances. + (add_removable_extension): Remove restriction that the + source and destination registers in the extension are the same. + (find_and_remove_re): Emit a copy from the extension's + destination to its source after the defining insn if + the source and destination registers are different. + + PR middle-end/59285 + * ifcvt.c (merge_if_block): If we are merging a block with more than + one successor with a block with no successors, remove any BARRIER + after the second block. + +2014-01-07 Dan Xio Qiang <ziyan01@163.com> + + * hw-doloop.c (reorg_loops): Release the bitmap obstack. + +2014-01-07 John David Anglin <danglin@gcc.gnu.org> + + PR target/59652 + * config/pa/pa.c (pa_legitimate_address_p): Return false before reload + for 14-bit register offsets when INT14_OK_STRICT is false. + +2014-01-07 Roland Stigge <stigge@antcom.de> + Michael Meissner <meissner@linux.vnet.ibm.com> + + PR 57386/target + * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): + Only check TFmode for SPE constants. Don't check TImode or TDmode. + +2014-01-07 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-elf.h (ASM_SPEC): Remove identity spec for + -mcpu. + +2014-01-07 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/arm/arm.c (arm_expand_neon_args): Call expand_expr + with EXPAND_MEMORY for NEON_ARG_MEMORY; check if the returned + rtx is const0_rtx or not. + +2014-01-07 Richard Sandiford <rdsandiford@googlemail.com> + + PR target/58115 + * target-globals.c (save_target_globals): Remove this_fn_optab + handling. + * toplev.c: Include optabs.h. + (target_reinit): Temporarily restore the global options if another + set of options are in force. + +2014-01-07 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/58668 + * cfgcleanup.c (flow_find_cross_jump): Don't count + any jumps if dir_p is NULL. Remove p1 variable, use active_insn_p + to determine what is counted. + (flow_find_head_matching_sequence): Use active_insn_p to determine + what is counted. + (try_head_merge_bb): Adjust for the flow_find_head_matching_sequence + counting change. + * ifcvt.c (count_bb_insns): Use active_insn_p && !JUMP_P to + determine what is counted. + + PR tree-optimization/59643 + * tree-predcom.c (split_data_refs_to_components): If one dr is + read and one write, determine_offset fails and the write isn't + in the bad component, just put the read into the bad component. + +2014-01-07 Mike Stump <mikestump@comcast.net> + Jakub Jelinek <jakub@redhat.com> + + PR pch/59436 + * tree-core.h (struct tree_optimization_option): Change optabs + type from unsigned char * to void *. + * optabs.c (init_tree_optimization_optabs): Adjust + TREE_OPTIMIZATION_OPTABS initialization. + +2014-01-06 Jakub Jelinek <jakub@redhat.com> + + PR target/59644 + * config/i386/i386.h (struct machine_function): Add + no_drap_save_restore field. + * config/i386/i386.c (ix86_save_reg): Use + !cfun->machine->no_drap_save_restore instead of + crtl->stack_realign_needed. + (ix86_finalize_stack_realign_flags): Don't clear drap_reg unless + this function clears frame_pointer_needed. Set + cfun->machine->no_drap_save_restore if clearing frame_pointer_needed + and DRAP reg is needed. + +2014-01-06 Marek Polacek <polacek@redhat.com> + + PR c/57773 + * doc/implement-c.texi: Mention that other integer types are + permitted as bit-field types in strictly conforming mode. + +2014-01-06 Felix Yang <fei.yang0953@gmail.com> + + * modulo-sched.c (schedule_reg_moves): Clear distance1_uses if it + is newly allocated. + +2014-01-06 Richard Earnshaw <rearnsha@arm.com> + + * aarch64.c (aarch64_rtx_costs): Fix cost calculation for MADD. + +2014-01-06 Martin Jambor <mjambor@suse.cz> + + PR ipa/59008 + * ipa-cp.c (ipcp_discover_new_direct_edges): Changed param_index type + to int. + * ipa-prop.c (ipa_print_node_params): Fix indentation. + +2014-01-06 Eric Botcazou <ebotcazou@adacore.com> + + PR debug/59350 + PR debug/59510 + * var-tracking.c (add_stores): Preserve the value of the source even if + we don't record the store. + +2014-01-06 Terry Guo <terry.guo@arm.com> + + * config.gcc (arm*-*-*): Check --with-arch against arm-arches.def. + +2014-01-05 Iain Sandoe <iain@codesourcery.com> + + PR bootstrap/59541 + * config/darwin.c (darwin_function_section): Adjust return values to + correspond to optimisation changes made in r206070. + +2014-01-05 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_data_alignment): Calculate max_align + from prefetch_block tune setting. + (nocona_cost): Correct size of prefetch block to 64. + +2014-01-04 Eric Botcazou <ebotcazou@adacore.com> + + * config/arm/arm.c (arm_get_frame_offsets): Revamp long lines. + (arm_expand_epilogue_apcs_frame): Take into account the number of bytes + used to save the static chain register in the computation of the offset + from which the FP registers need to be restored. + +2014-01-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59519 + * tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_guard1): Don't + ICE if get_current_def (current_new_name) is already non-NULL, as long + as it is a phi result of some other phi in *new_exit_bb that has + the same argument. + + * config/i386/sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d} + or vmovdqu* for misaligned_operand. + (<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>, + <sse2_avx_avx512f>_loaddqu<mode><mask_name>): Handle <mask_applied>. + * config/i386/i386.c (ix86_expand_special_args_builtin): Set + aligned_mem for AVX512F masked aligned load and store builtins and for + non-temporal moves. + +2014-01-03 Bingfeng Mei <bmei@broadcom.com> + + PR tree-optimization/59651 + * tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): + Address range for negative step should be added by TYPE_SIZE_UNIT. + +2014-01-03 Andreas Schwab <schwab@linux-m68k.org> + + * config/m68k/m68k.c (handle_move_double): Handle pushes with + overlapping registers also for registers other than the stack pointer. + +2014-01-03 Marek Polacek <polacek@redhat.com> + + PR other/59661 + * doc/extend.texi: Fix the return value of __builtin_FUNCTION and + __builtin_FILE. + +2014-01-03 Jakub Jelinek <jakub@redhat.com> + + PR target/59625 + * config/i386/i386.c (ix86_avoid_jump_mispredicts): Don't consider + asm goto as jump. + + * config/i386/i386.md (MODE_SIZE): New mode attribute. + (push splitter): Use <P:MODE_SIZE> instead of + GET_MODE_SIZE (<P:MODE>mode). + (lea splitter): Use <MODE_SIZE> instead of GET_MODE_SIZE (<MODE>mode). + (mov -1, reg peephole2): Likewise. + * config/i386/sse.md (*mov<mode>_internal, + <sse>_storeu<ssemodesuffix><avxsizesuffix>, + <sse2_avx_avx512f>_storedqu<mode>, <sse>_andnot<mode>3, + *<code><mode>3, *andnot<mode>3<mask_name>, + <mask_codefor><code><mode>3<mask_name>): Likewise. + * config/i386/subst.md (mask_mode512bit_condition, + sd_mask_mode512bit_condition): Likewise. + +2014-01-02 Xinliang David Li <davidxl@google.com> + + PR tree-optimization/59303 + * tree-ssa-uninit.c (is_use_properly_guarded): Main cleanup. + (dump_predicates): Better output format. + (pred_equal_p): New function. + (is_neq_relop_p): Ditto. + (is_neq_zero_form_p): Ditto. + (pred_expr_equal_p): Ditto. + (pred_neg_p): Ditto. + (simplify_pred): Ditto. + (simplify_preds_2): Ditto. + (simplify_preds_3): Ditto. + (simplify_preds_4): Ditto. + (simplify_preds): Ditto. + (push_pred): Ditto. + (push_to_worklist): Ditto. + (get_pred_info_from_cmp): Ditto. + (is_degenerated_phi): Ditto. + (normalize_one_pred_1): Ditto. + (normalize_one_pred): Ditto. + (normalize_one_pred_chain): Ditto. + (normalize_preds): Ditto. + (normalize_cond_1): Remove function. + (normalize_cond): Ditto. + (is_gcond_subset_of): Ditto. + (is_subset_of_any): Ditto. + (is_or_set_subset_of): Ditto. + (is_and_set_subset_of): Ditto. + (is_norm_cond_subset_of): Ditto. + (pred_chain_length_cmp): Ditto. + (convert_control_dep_chain_into_preds): Type change. + (find_predicates): Ditto. + (find_def_preds): Ditto. + (destroy_predicates_vecs): Ditto. + (find_matching_predicates_in_rest_chains): Ditto. + (use_pred_not_overlap_with_undef_path_pred): Ditto. + (is_pred_expr_subset): Ditto. + (is_pred_chain_subset_of): Ditto. + (is_included_in): Ditto. + (is_superset_of): Ditto. + +2014-01-02 Richard Sandiford <rdsandiford@googlemail.com> + + Update copyright years. + +2014-01-02 Richard Sandiford <rdsandiford@googlemail.com> + + * common/config/arc/arc-common.c, config/arc/arc-modes.def, + config/arc/arc-protos.h, config/arc/arc.c, config/arc/arc.h, + config/arc/arc.md, config/arc/arc.opt, + config/arm/arm_neon_builtins.def, config/arm/crypto.def, + config/i386/avx512cdintrin.h, config/i386/avx512erintrin.h, + config/i386/avx512fintrin.h, config/i386/avx512pfintrin.h, + config/i386/btver2.md, config/i386/shaintrin.h, config/i386/slm.md, + config/linux-protos.h, config/linux.c, config/winnt-c.c, + diagnostic-color.c, diagnostic-color.h, gimple-ssa-isolate-paths.c, + vtable-verify.c, vtable-verify.h: Use the standard form for the + copyright notice. + +2014-01-02 Tobias Burnus <burnus@net-b.de> + + * gcc.c (process_command): Update copyright notice dates. + * gcov-dump.c: Ditto. + * gcov.c: Ditto. + * doc/cpp.texi: Bump @copying's copyright year. + * doc/cppinternals.texi: Ditto. + * doc/gcc.texi: Ditto. + * doc/gccint.texi: Ditto. + * doc/gcov.texi: Ditto. + * doc/install.texi: Ditto. + * doc/invoke.texi: Ditto. + +2014-01-01 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/nios2/nios2.h (BITS_PER_UNIT): Don't define it. + +2014-01-01 Jakub Jelinek <jakub@redhat.com> + + * config/i386/sse.md (*mov<mode>_internal): Guard + EXT_REX_SSE_REGNO_P (REGNO ()) uses with REG_P. + + PR rtl-optimization/59647 + * cse.c (cse_process_notes_1): Don't substitute negative VOIDmode + new_rtx into UNSIGNED_FLOAT rtxes. + +Copyright (C) 2014 Free Software Foundation, Inc. + +Copying and distribution of this file, with or without modification, +are permitted in any medium without royalty provided the copyright +notice and this notice are preserved. |