diff options
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/powerpc')
28 files changed, 1246 insertions, 11 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-20.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-20.c index b2c29a9..1af8ed7 100644 --- a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-20.c +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-20.c @@ -1,5 +1,5 @@ /* { dg-do compile { target powerpc_altivec_ok } } */ -/* { dg-options "-maltivec -mcpu=G5 -O2" } */ +/* { dg-options "-maltivec -mcpu=G5 -O2 -Wno-deprecated" } */ #include <altivec.h> diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-6.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-6.c index 51d4116..29856fd 100644 --- a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-6.c +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-6.c @@ -1,6 +1,6 @@ /* { dg-do compile { target powerpc*-*-* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -O0 -Wall" } */ +/* { dg-options "-maltivec -O0 -Wall -Wno-deprecated" } */ #include <altivec.h> diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-vec-merge.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-vec-merge.c index 3689f97..b1ed8b8 100644 --- a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-vec-merge.c +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/altivec-vec-merge.c @@ -1,7 +1,7 @@ /* { dg-do run { target { powerpc*-*-* && vmx_hw } } } */ /* { dg-do compile { target { powerpc*-*-* && { ! vmx_hw } } } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -O2" } */ +/* { dg-options "-maltivec -O2 -Wno-deprecated" } */ #include <altivec.h> diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/builtins-1.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/builtins-1.c new file mode 100644 index 0000000..3da7146 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/builtins-1.c @@ -0,0 +1,166 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-options "-mcpu=power8 -O0" } */ + +/* Test that a number of newly added builtin overloads are accepted + by the compiler. */ + +#include <altivec.h> + +vector double y = { 2.0, 4.0 }; +vector double z; + +int main () +{ + vector float fa = {1.0, 2.0, 3.0, -4.0}; + vector float fb = {-2.0, -3.0, -4.0, -5.0}; + vector float fc = vec_cpsgn (fa, fb); + + vector long long la = {5L, 14L}; + vector long long lb = {3L, 86L}; + vector long long lc = vec_and (la, lb); + vector bool long long ld = {0, -1}; + vector long long le = vec_and (la, ld); + vector long long lf = vec_and (ld, lb); + + vector unsigned long long ua = {5L, 14L}; + vector unsigned long long ub = {3L, 86L}; + vector unsigned long long uc = vec_and (ua, ub); + vector bool long long ud = {0, -1}; + vector unsigned long long ue = vec_and (ua, ud); + vector unsigned long long uf = vec_and (ud, ub); + + vector long long lg = vec_andc (la, lb); + vector long long lh = vec_andc (la, ld); + vector long long li = vec_andc (ld, lb); + + vector unsigned long long ug = vec_andc (ua, ub); + vector unsigned long long uh = vec_andc (ua, ud); + vector unsigned long long ui = vec_andc (ud, ub); + + vector double da = {1.0, -4.0}; + vector double db = {-2.0, 5.0}; + vector double dc = vec_cpsgn (da, db); + + vector long long lj = vec_mergeh (la, lb); + vector long long lk = vec_mergeh (la, ld); + vector long long ll = vec_mergeh (ld, la); + + vector unsigned long long uj = vec_mergeh (ua, ub); + vector unsigned long long uk = vec_mergeh (ua, ud); + vector unsigned long long ul = vec_mergeh (ud, ua); + + vector long long lm = vec_mergel (la, lb); + vector long long ln = vec_mergel (la, ld); + vector long long lo = vec_mergel (ld, la); + + vector unsigned long long um = vec_mergel (ua, ub); + vector unsigned long long un = vec_mergel (ua, ud); + vector unsigned long long uo = vec_mergel (ud, ua); + + vector long long lp = vec_nor (la, lb); + vector long long lq = vec_nor (la, ld); + vector long long lr = vec_nor (ld, la); + + vector unsigned long long up = vec_nor (ua, ub); + vector unsigned long long uq = vec_nor (ua, ud); + vector unsigned long long ur = vec_nor (ud, ua); + + vector long long ls = vec_or (la, lb); + vector long long lt = vec_or (la, ld); + vector long long lu = vec_or (ld, la); + + vector unsigned long long us = vec_or (ua, ub); + vector unsigned long long ut = vec_or (ua, ud); + vector unsigned long long uu = vec_or (ud, ua); + + vector unsigned char ca = {0,4,8,1,5,9,2,6,10,3,7,11,15,12,14,13}; + vector long long lv = vec_perm (la, lb, ca); + vector unsigned long long uv = vec_perm (ua, ub, ca); + + vector long long lw = vec_sel (la, lb, lc); + vector long long lx = vec_sel (la, lb, uc); + vector long long ly = vec_sel (la, lb, ld); + + vector unsigned long long uw = vec_sel (ua, ub, lc); + vector unsigned long long ux = vec_sel (ua, ub, uc); + vector unsigned long long uy = vec_sel (ua, ub, ld); + + vector long long lz = vec_xor (la, lb); + vector long long l0 = vec_xor (la, ld); + vector long long l1 = vec_xor (ld, la); + + vector unsigned long long uz = vec_xor (ua, ub); + vector unsigned long long u0 = vec_xor (ua, ud); + vector unsigned long long u1 = vec_xor (ud, ua); + + int ia = vec_all_eq (ua, ub); + int ib = vec_all_ge (ua, ub); + int ic = vec_all_gt (ua, ub); + int id = vec_all_le (ua, ub); + int ie = vec_all_lt (ua, ub); + int ig = vec_all_ne (ua, ub); + + int ih = vec_any_eq (ua, ub); + int ii = vec_any_ge (ua, ub); + int ij = vec_any_gt (ua, ub); + int ik = vec_any_le (ua, ub); + int il = vec_any_lt (ua, ub); + int im = vec_any_ne (ua, ub); + + vector int sia = {9, 16, 25, 36}; + vector int sib = {-8, -27, -64, -125}; + vector int sic = vec_mergee (sia, sib); + vector int sid = vec_mergeo (sia, sib); + + vector unsigned int uia = {9, 16, 25, 36}; + vector unsigned int uib = {8, 27, 64, 125}; + vector unsigned int uic = vec_mergee (uia, uib); + vector unsigned int uid = vec_mergeo (uia, uib); + + vector bool int bia = {0, -1, -1, 0}; + vector bool int bib = {-1, -1, 0, -1}; + vector bool int bic = vec_mergee (bia, bib); + vector bool int bid = vec_mergeo (bia, bib); + + vector unsigned int uie = vec_packsu (ua, ub); + + vector long long l2 = vec_cntlz (la); + vector unsigned long long u2 = vec_cntlz (ua); + vector int sie = vec_cntlz (sia); + vector unsigned int uif = vec_cntlz (uia); + vector short ssa = {20, -40, -60, 80, 100, -120, -140, 160}; + vector short ssb = vec_cntlz (ssa); + vector unsigned short usa = {81, 72, 63, 54, 45, 36, 27, 18}; + vector unsigned short usb = vec_cntlz (usa); + vector signed char sca = {-4, 3, -9, 15, -31, 31, 0, 0, + 1, 117, -36, 99, 98, 97, 96, 95}; + vector signed char scb = vec_cntlz (sca); + vector unsigned char cb = vec_cntlz (ca); + + vector double dd = vec_xl (0, &y); + vec_xst (dd, 0, &z); + + vector double de = vec_round (dd); + + vector double df = vec_splat (de, 0); + vector double dg = vec_splat (de, 1); + vector long long l3 = vec_splat (l2, 0); + vector long long l4 = vec_splat (l2, 1); + vector unsigned long long u3 = vec_splat (u2, 0); + vector unsigned long long u4 = vec_splat (u2, 1); + vector bool long long l5 = vec_splat (ld, 0); + vector bool long long l6 = vec_splat (ld, 1); + + vector long long l7 = vec_div (l3, l4); + vector unsigned long long u5 = vec_div (u3, u4); + + vector long long l8 = vec_mul (l3, l4); + vector unsigned long long u6 = vec_mul (u3, u4); + + vector double dh = vec_ctf (la, -2); + vector double di = vec_ctf (ua, 2); + vector long long l9 = vec_cts (dh, -2); + vector unsigned long long u7 = vec_ctu (di, 2); + + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/builtins-2.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/builtins-2.c new file mode 100644 index 0000000..7f4a392 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/builtins-2.c @@ -0,0 +1,47 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-options "-mcpu=power8 " } */ + +#include <altivec.h> + +void abort (void); + +int main () +{ + vector long long sa = {27L, -14L}; + vector long long sb = {-9L, -2L}; + + vector unsigned long long ua = {27L, 14L}; + vector unsigned long long ub = {9L, 2L}; + + vector long long sc = vec_div (sa, sb); + vector unsigned long long uc = vec_div (ua, ub); + + if (sc[0] != -3L || sc[1] != 7L || uc[0] != 3L || uc[1] != 7L) + abort (); + + vector long long sd = vec_mul (sa, sb); + vector unsigned long long ud = vec_mul (ua, ub); + + if (sd[0] != -243L || sd[1] != 28L || ud[0] != 243L || ud[1] != 28L) + abort (); + + vector long long se = vec_splat (sa, 0); + vector long long sf = vec_splat (sa, 1); + vector unsigned long long ue = vec_splat (ua, 0); + vector unsigned long long uf = vec_splat (ua, 1); + + if (se[0] != 27L || se[1] != 27L || sf[0] != -14L || sf[1] != -14L + || ue[0] != 27L || ue[1] != 27L || uf[0] != 14L || uf[1] != 14L) + abort (); + + vector double da = vec_ctf (sa, -2); + vector double db = vec_ctf (ua, 2); + vector long long sg = vec_cts (da, -2); + vector unsigned long long ug = vec_ctu (db, 2); + + if (da[0] != 108.0 || da[1] != -56.0 || db[0] != 6.75 || db[1] != 3.5 + || sg[0] != 27L || sg[1] != -14L || ug[0] != 27L || ug[1] != 14L) + abort (); + + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/lvsl-lvsr.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/lvsl-lvsr.c new file mode 100644 index 0000000..71dd0a2 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/lvsl-lvsr.c @@ -0,0 +1,21 @@ +/* Test expected code generation for lvsl and lvsr on little endian. + Note that lvsl and lvsr are each produced once, but the filename + causes them to appear twice in the file. */ + +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-options "-O0 -Wno-deprecated" } */ +/* { dg-final { scan-assembler-times "lvsl" 2 } } */ +/* { dg-final { scan-assembler-times "lvsr" 2 } } */ +/* { dg-final { scan-assembler-times "lxvd2x" 2 } } */ +/* { dg-final { scan-assembler-times "vperm" 2 } } */ + + +#include <altivec.h> + +float f[20]; + +void foo () +{ + vector unsigned char a = vec_lvsl (4, f); + vector unsigned char b = vec_lvsr (8, f); +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/pr63335.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/pr63335.c new file mode 100644 index 0000000..931a8b6 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/pr63335.c @@ -0,0 +1,30 @@ +/* { dg-do run { target { powerpc64*-*-* } } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx" } */ + +#include <altivec.h> + +void abort (void); + +vector double vec = (vector double) {99.0, 99.0}; + +int main() { + + int actual = vec_all_nge(vec, vec); + if ( actual != 0) + abort(); + + actual = vec_all_nle(vec, vec); + if ( actual != 0) + abort(); + + actual = vec_any_nge(vec, vec); + if ( actual != 0) + abort(); + + actual = vec_any_nle(vec, vec); + if ( actual != 0) + abort(); + + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/pr64505.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/pr64505.c new file mode 100644 index 0000000..9991621 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/pr64505.c @@ -0,0 +1,231 @@ +/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ +/* { dg-options "-O2 -mpowerpc64" } */ + +/* + * (below is inlined and simplified from previously included headers) + */ + +struct fltcom_st { + short fltbuf[950]; +} fltcom_ __attribute__((common)) ; +#define CM_PLIBOR (*(((double *)&fltcom_ + 1))) +#define CM_QMRG (*(((double *)&fltcom_ + 2))) + +struct fltcom2_st { + short fltbuf2[56]; +} fltcom2_ __attribute__((common)) ; +#define CM_FLPRV ((short *)&fltcom2_ + 17) +#define CM_FLNXT ((short *)&fltcom2_ + 20) +#define CM_FLCPN (*(((double *)&fltcom2_))) +#define CM_FLCNT (*(((short *)&fltcom2_ + 12))) + +struct aidatcm_st { + double cm_aid, cm_ext, cm_basis; + short cm_aiday, cm_exday, cm_dperd, cm_aiexf, cm_aidex, cm_aiok, + cm_aigdo, cm_aildo, cm_prev[3], cm_next[3], cm_aid_pad[2]; + double cm_rvgfact, cm_ai1st, cm_ai2nd; + int cm_aieurok; +} aidatcm_ __attribute__((common)) ; +#define CM_EXDAY aidatcm_.cm_exday +#define CM_BASIS aidatcm_.cm_basis +#define CM_PREV aidatcm_.cm_prev + +struct cshfcm_st { + short bufff[10862]; +} cshfcm_ __attribute__((common)) ; +#define CM_FNUM (*(((short *)&cshfcm_ + 9038))) +#define CM_FIFLX ((double *)&cshfcm_ + 1) +#define CM_FEXTX ((double *)&cshfcm_ + 1201) +#define CM_FSHDT ((short *)&cshfcm_ + 7230) + +struct calctsdb_st { + short calctsdbbuff[115]; +} calctsdb_ __attribute__((common)) ; +#define CM_CTUP_GOOD_TO_GO (*(((short *)&calctsdb_ + 16))) +#define CM_PAYMENT_FREQUENCY (*(((short *)&calctsdb_ + 61))) +#define CM_DISCOUNTING_DAYTYP (*(((short *)&calctsdb_ + 59))) + +struct cf600cm_st { + short bufcf[14404]; +} cf600cm_ __attribute__((common)) ; +#define CM_FLT_RFIXRATES ((double *)&cf600cm_ + 600) + +typedef struct { int id; int type; const char *name; } bregdb_bitinfo_t; + +int +bregdb_eval_bbitcxt_bool_rv(const bregdb_bitinfo_t * const bbit, + const int bbit_default, + const void * const bregucxt); + +static const bregdb_bitinfo_t bbit_calc_dr_d33 = + { 160667, 5, "bbit_calc_dr_d33" }; +#define bbit_calc_dr_d33__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d33, 0, 0) +static const bregdb_bitinfo_t bbit_calc_sx_b24 = + { 158854, 5, "bbit_calc_sx_b24" }; +#define bbit_calc_sx_b24__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_sx_b24, 0, 0) +static const bregdb_bitinfo_t bbit_calc_dr_d36 = + { 161244, 5, "bbit_calc_dr_d36" }; +#define bbit_calc_dr_d36__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d36, 0, 0) +static const bregdb_bitinfo_t bbit_calc_dr_d37 = + { 161315, 5, "bbit_calc_dr_d37" }; +#define bbit_calc_dr_d37__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d37, 0, 0) +static const bregdb_bitinfo_t bbit_calc_dr_d47 = + { 163259, 5, "bbit_calc_dr_d47" }; +#define bbit_calc_dr_d47__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d47, 0, 0) +static const bregdb_bitinfo_t bbit_calc_dr_d46 = + { 163239, 5, "bbit_calc_dr_d46" }; +#define bbit_calc_dr_d46__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d46, 0, 0) +static const bregdb_bitinfo_t bbit_calc_dr_d62 = + { 166603, 5, "bbit_calc_dr_d62" }; +#define bbit_calc_dr_d62__value() \ + bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d62, 0, 0) + + + +int dtyp_is_actact_(short *daytyp); +double rnd_trunc_numb(double in, short num_digits, short rnd_or_trunc); +void datetrn_(const short* dt, short* dt2); +short difday_(short* daytyp_in, short* srtdti, short* enddti, short* ercode); + + +double pow(double x, double y); + + +/* + * (above is inlined and simplified from previously included headers) + */ + + +void calc_1566( + short sCalcType, + short sDayType, + short sFreq, + short asSettleDt[3], + short asMtyDt[3], + short asIssueDt[3], + short asFCpnDt[3], + double dCpn, + short *psNoPer, + double *pdExt, + double *pdAI, + double *pdAI2, + double *pdFCpn, + short *psRcode) +{ + + short ercode = 0; + int isactact; + short days_to_next_cpn = 0; + const short discDaytype = CM_DISCOUNTING_DAYTYP; + int j; + + if(bbit_calc_sx_b24__value()) + isactact = (dtyp_is_actact_(&sDayType) != 0); + else + isactact = (sDayType == 1 || sDayType == 10); + + short days_in_current_period = difday_(&sDayType,CM_FLPRV,CM_FLNXT,&ercode); + const short sfreq1 = (CM_CTUP_GOOD_TO_GO == 1 && CM_PAYMENT_FREQUENCY == 1); + + for (j = 0; j < CM_FNUM; j++) { + + if(j == 0) { + days_to_next_cpn = difday_(&sDayType,asSettleDt,CM_FLNXT,&ercode); + + if(isactact) { + CM_FIFLX[j] = CM_FLCPN / sFreq; + CM_FEXTX[j] = (double)days_to_next_cpn / (double)days_in_current_period; + } + else { + CM_FIFLX[j] = CM_FLCPN * days_in_current_period; + CM_FEXTX[j] = (double)days_to_next_cpn / (double)(1/sfreq1); + } + + if(CM_FNUM == 1) { + CM_FEXTX[j] = (double)days_to_next_cpn / ((double)1/sfreq1); + } + } + else { + + short days_from_settle, days_in_period; + + if(bbit_calc_dr_d46__value()){ + days_from_settle = difday_(&sDayType,asSettleDt, + &CM_FSHDT[j*3],&ercode); + days_in_period = difday_(&sDayType,&CM_FSHDT[(j-1)*3], + &CM_FSHDT[j*3],&ercode); + } + + double cpn_rate = CM_PLIBOR; + + if(bbit_calc_dr_d62__value()) { + if(j < CM_FLCNT && CM_FLT_RFIXRATES[j] != 0) cpn_rate = CM_FLT_RFIXRATES[j]; + } + else { + if(j < CM_FLCNT ) cpn_rate = CM_FLT_RFIXRATES[j]; + } + + if(bbit_calc_dr_d37__value()&& j >= CM_FLCNT && sCalcType == 1570) { + cpn_rate = CM_PLIBOR + CM_QMRG; + + if(bbit_calc_dr_d36__value()){ + double projected_rate = pow((1 + CM_PLIBOR/100.0), + (days_in_period)) - 1; + + projected_rate = projected_rate + CM_QMRG/100.0 * days_in_period; + cpn_rate = 100 * projected_rate * (1/days_in_period); + } + } + + + if(isactact) { + CM_FIFLX[j] = cpn_rate / sFreq; + CM_FEXTX[j] = CM_FEXTX[j-1] + 1; + + if(bbit_calc_dr_d46__value() && discDaytype != 0) { + CM_FEXTX[j] = (double)days_from_settle / (double)(1/sfreq1); + } + } + else { + if(!bbit_calc_dr_d46__value()){ + days_from_settle = difday_(&sDayType,asSettleDt, + &CM_FSHDT[j*3],&ercode); + days_in_period = difday_(&sDayType,&CM_FSHDT[(j-1)*3], + &CM_FSHDT[j*3],&ercode); + + } + + CM_FIFLX[j] = cpn_rate * days_in_period; + CM_FEXTX[j] = (double)days_from_settle / (double)(1/sfreq1); + } + + } + + if(bbit_calc_dr_d33__value() && CM_CTUP_GOOD_TO_GO != 0) { + CM_FIFLX[j] = rnd_trunc_numb (CM_FIFLX[j], 0, 0); + } + + } + + + short accrued_days = difday_(&sDayType,CM_FLPRV,asSettleDt,&ercode); + + if(!bbit_calc_dr_d47__value()) { + if(isactact) { + *pdAI = (CM_FLCPN / sFreq)* accrued_days / ((double)days_in_current_period); + } + else{ + *pdAI = (CM_FLCPN / sFreq)* accrued_days / ((double)1/sFreq); + } + } + + CM_EXDAY = days_to_next_cpn; + CM_BASIS = days_in_current_period; + datetrn_(CM_FLPRV,CM_PREV); +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c new file mode 100644 index 0000000..ab85e91 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c @@ -0,0 +1,35 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +void abort(); + +#define N 16 + +signed char ca[N] __attribute__((aligned(16))); +signed char cb[] __attribute__((aligned(16))) + = {8, 7, 6, 5, 4, 3, 2, 1, 0, -1, -2, -3, -4, -5, -6, -7}; +signed char cc[] __attribute__((aligned(16))) + = {1, 1, 2, 2, 3, 3, 2, 2, 1, 1, 0, 0, -1, -1, -2, -2}; + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} + +int main () +{ + signed char cd[] = {7, 6, 4, 3, 1, 0, 0, -1, -1, -2, -2, -3, -3, -4, -4, -5}; + int i; + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != cd[i]) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c new file mode 100644 index 0000000..170649d --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c @@ -0,0 +1,42 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +void abort (); + +#define N 4096 +int ca[N] __attribute__((aligned(16))); +int cb[N] __attribute__((aligned(16))); +int cc[N] __attribute__((aligned(16))); +int cd[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = ((cb[i] + cc[i]) * cd[i]) >> 3; + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i % 2 ? 1 : -1; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (i % 2 == 1 && ca[i] != (-2 * i - 1955) >> 3) + abort (); + else if (i % 2 == 0 && ca[i] != (1955 + 2 * i) >> 3) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c new file mode 100644 index 0000000..699b5ba --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c @@ -0,0 +1,53 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +#include <altivec.h> +void abort (); + +#define N 4096 +int ca[N] __attribute__((aligned(16))); +int cb[N] __attribute__((aligned(16))); +int cc[N] __attribute__((aligned(16))); +int cd[N] __attribute__((aligned(16))); +int hey; + +__attribute__((noinline)) void foo () +{ + int i; + vector int va, vb, vc, vd, tmp; + vector unsigned int threes = vec_splat_u32(3); + for (i = 0; i < N; i+=4) { + vb = vec_vsx_ld (0, &cb[i]); + vc = vec_vsx_ld (0, &cc[i]); + vd = vec_vsx_ld (0, &cd[i]); + tmp = vec_add (vb, vc); + tmp = vec_sub (tmp, vd); + tmp = vec_sra (tmp, threes); + hey = tmp[3]; + vec_vsx_st (tmp, 0, &ca[i]); + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i + 14; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != (-3 * i - 1969) >> 3) + abort (); + if (hey != ca[N-1]) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c new file mode 100644 index 0000000..529d03e --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c @@ -0,0 +1,56 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +#include "altivec.h" +void abort (); + +#define N 4096 +int ca[N] __attribute__((aligned(16))); +int cb[N] __attribute__((aligned(16))); +int cc[N] __attribute__((aligned(16))); +int cd[N] __attribute__((aligned(16))); +int hey; + +__attribute__((noinline)) void foo () +{ + int i; + vector int va, vb, vc, vd, tmp; + vector unsigned int threes = vec_splat_u32(3); + for (i = 0; i < N; i+=4) { + vb = vec_vsx_ld (0, &cb[i]); + vc = vec_vsx_ld (0, &cc[i]); + vd = vec_vsx_ld (0, &cd[i]); + tmp = vec_add (vb, vc); + tmp = vec_sub (tmp, vd); + tmp = vec_sra (tmp, threes); + hey = tmp[3]; + vec_vsx_st (tmp, 0, &ca[i]); + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i + 14; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != (-3 * i - 1969) >> 3) + abort (); + if (hey != ca[N-1]) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c new file mode 100644 index 0000000..787b02e --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c @@ -0,0 +1,54 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +#include <altivec.h> +void abort (); + +#define N 4096 +long long ca[N] __attribute__((aligned(16))); +long long cb[N] __attribute__((aligned(16))); +long long cc[N] __attribute__((aligned(16))); +long long cd[N] __attribute__((aligned(16))); +long long x; + +__attribute__((noinline)) void foo () +{ + int i; + vector long long va, vb, vc, vd, tmp; + volatile unsigned long long three = 3; + vector unsigned long long threes = vec_splats (three); + for (i = 0; i < N; i+=2) { + vb = vec_vsx_ld (0, (vector long long *)&cb[i]); + vc = vec_vsx_ld (0, (vector long long *)&cc[i]); + vd = vec_vsx_ld (0, (vector long long *)&cd[i]); + tmp = vec_add (vb, vc); + tmp = vec_sub (tmp, vd); + tmp = vec_sra (tmp, threes); + x = vec_extract (tmp, 0); + vec_vsx_st (tmp, 0, (vector long long *)&ca[i]); + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i + 14; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != (-3 * i - 1969) >> 3) + abort (); + if (x != ca[N-1]) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c new file mode 100644 index 0000000..7ca6ad5 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c @@ -0,0 +1,43 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler "stxsdx" } } */ +/* { dg-final { scan-assembler-times "xxpermdi" 1 } } */ + +/* The only xxpermdi expected is for the vec_splats. */ + +#include <altivec.h> +void abort (); + +#define N 4096 +long long ca[N] __attribute__((aligned(16))); +long long cb[N] __attribute__((aligned(16))); +long long cc[N] __attribute__((aligned(16))); +long long cd[N] __attribute__((aligned(16))); +long long x; + +__attribute__((noinline)) void foo () +{ + int i; + vector long long va, vb, vc, vd, tmp; + volatile unsigned long long three = 3; + vector unsigned long long threes = vec_splats (three); + for (i = 0; i < N; i+=2) { + vb = vec_vsx_ld (0, (vector long long *)&cb[i]); + vc = vec_vsx_ld (0, (vector long long *)&cc[i]); + vd = vec_vsx_ld (0, (vector long long *)&cd[i]); + tmp = vec_add (vb, vc); + tmp = vec_sub (tmp, vd); + tmp = vec_sra (tmp, threes); + x = vec_extract (tmp, 0); + vec_vsx_st (tmp, 0, (vector long long *)&ca[i]); + } +} + +int main () +{ + foo (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c new file mode 100644 index 0000000..172e4bd --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c @@ -0,0 +1,51 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler "xxspltw" } } */ + +/* Currently the analyze_swaps phase cannot optimize this loop because + of the presence of an UNSPEC_VSX_CVDPSPN. At such time as this is + handled, we need to add a 'scan-assembler-not "xxpermdi"' directive to + this test. */ +#include <altivec.h> +void abort(); + +#define N 4096 +#define M 10000000 +vector float ca[N][4] = {0}; +vector float cb[N][4] = {0}; +vector float cc[N][4] = {0}; + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + cc[i][0] = vec_mul(vec_splats(cb[i][0][0]), ca[i][0]); + cc[i][0] = vec_madd(cc[i][0],vec_splats(cb[i][0][1]), ca[i][1]); + cc[i][0] = vec_madd(cc[i][0],vec_splats(cb[i][0][2]), ca[i][2]); + cc[i][0] = vec_madd(cc[i][0],vec_splats(cb[i][0][3]), ca[i][3]); + + cc[i][1] = vec_mul(vec_splats(cb[i][1][0]), ca[i][0]); + cc[i][1] = vec_madd(cc[i][0],vec_splats(cb[i][1][1]), ca[i][1]); + cc[i][1] = vec_madd(cc[i][0],vec_splats(cb[i][1][2]), ca[i][2]); + cc[i][1] = vec_madd(cc[i][0],vec_splats(cb[i][1][3]), ca[i][3]); + + cc[i][2] = vec_mul(vec_splats(cb[i][2][0]), ca[i][0]); + cc[i][2] = vec_madd(cc[i][0],vec_splats(cb[i][2][1]), ca[i][1]); + cc[i][2] = vec_madd(cc[i][0],vec_splats(cb[i][2][2]), ca[i][2]); + cc[i][2] = vec_madd(cc[i][0],vec_splats(cb[i][2][3]), ca[i][3]); + + cc[i][3] = vec_mul(vec_splats(cb[i][3][0]), ca[i][0]); + cc[i][3] = vec_madd(cc[i][0],vec_splats(cb[i][3][1]), ca[i][1]); + cc[i][3] = vec_madd(cc[i][0],vec_splats(cb[i][3][2]), ca[i][2]); + cc[i][3] = vec_madd(cc[i][0],vec_splats(cb[i][3][3]), ca[i][3]); + } +} + +int main () +{ + foo (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c new file mode 100644 index 0000000..2b7f73c --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c @@ -0,0 +1,57 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler "vspltw" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +#include <altivec.h> +void abort(); + +typedef struct xx {vector double l; vector double h;} xx; + +#define N 4096 +#define M 10000000 +vector float ca[N][4] = {0}; +vector float cb[N][4] = {0}; +vector float cc[N][4] = {0}; + +__attribute__((noinline)) void foo () +{ + int i; + vector float brow; + + for (i = 0; i < N; i++) { + + brow = cb[i][0]; + cc[i][0] = vec_mul(vec_splats(brow[0]), ca[i][0]); + cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]); + cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]); + cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]); + + brow = cb[i][1]; + cc[i][1] = vec_mul(vec_splats(brow[0]), ca[i][0]); + cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]); + cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]); + cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]); + + brow = cb[i][2]; + cc[i][2] = vec_mul(vec_splats(brow[0]), ca[i][0]); + cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]); + cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]); + cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]); + + brow = cb[i][3]; + cc[i][3] = vec_mul(vec_splats(brow[0]), ca[i][0]); + cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]); + cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]); + cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]); + } +} + +int main () +{ + foo (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c new file mode 100644 index 0000000..7a9cfbf --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O1" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "xxpermdi" } } */ + +/* Verify that we don't try to do permute removal in the presence of + vec_ste. This used to ICE. */ +#include <altivec.h> + +void f (void *p) +{ + vector unsigned int u32 = vec_vsx_ld (1, (const unsigned int *)p); + vec_ste (u32, 1, (unsigned int *)p); +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c new file mode 100644 index 0000000..6ce041a --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c @@ -0,0 +1,41 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +void abort (); + +#define N 256 +signed char ca[N] __attribute__((aligned(16))); +signed char cb[N] __attribute__((aligned(16))); +signed char cc[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = i - 128; + cc[i] = i/2 - 64; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != i - i/2 - 64) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c new file mode 100644 index 0000000..35dacd4 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c @@ -0,0 +1,43 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +void abort (); + +#define N 4096 +signed char ca[N] __attribute__((aligned(16))); +signed char cb[N] __attribute__((aligned(16))); +signed char cc[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} + +__attribute__((noinline)) void init () +{ + int i, ii; + for (i = 0, ii = 0; i < N; ++i, ii = (ii + 1) % 128) { + cb[i] = ii - 128; + cc[i] = ii/2 - 64; + } +} + +int main () +{ + int i, ii; + init (); + foo (); + for (i = 0; i < N; ++i) { + ii = i % 128; + if (ca[i] != ii - ii/2 - 64) + abort (); + } + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c new file mode 100644 index 0000000..61fe99b --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c @@ -0,0 +1,45 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +void abort (); + +#define N 4096 +int ca[N] __attribute__((aligned(16))); +int cb[N] __attribute__((aligned(16))); +int cc[N] __attribute__((aligned(16))); +int cd[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = (cb[i] + cc[i]) * cd[i]; + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i % 2 ? 1 : -1; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (i % 2 == 1 && ca[i] != -2 * i - 1955) + abort (); + else if (i % 2 == 0 && ca[i] != 1955 + 2 * i) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c new file mode 100644 index 0000000..b367fb6 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c @@ -0,0 +1,45 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +void abort (); + +#define N 4096 +int ca[N] __attribute__((aligned(16))); +int cb[N] __attribute__((aligned(16))); +int cc[N] __attribute__((aligned(16))); +int cd[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = ((cb[i] + cc[i]) * cd[i]) >> 3; + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i % 2 ? 1 : -1; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (i % 2 == 1 && ca[i] != (-2 * i - 1955) >> 3) + abort (); + else if (i % 2 == 0 && ca[i] != (1955 + 2 * i) >> 3) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c new file mode 100644 index 0000000..f708452 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c @@ -0,0 +1,32 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +void abort(); + +#define N 16 + +signed char ca[N] __attribute__((aligned(16))); +signed char cb[] __attribute__((aligned(16))) + = {8, 7, 6, 5, 4, 3, 2, 1, 0, -1, -2, -3, -4, -5, -6, -7}; +signed char cc[] __attribute__((aligned(16))) + = {1, 1, 2, 2, 3, 3, 2, 2, 1, 1, 0, 0, -1, -1, -2, -2}; + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} + +int main () +{ + signed char cd[] = {7, 6, 4, 3, 1, 0, 0, -1, -1, -2, -2, -3, -3, -4, -4, -5}; + int i; + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != cd[i]) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c new file mode 100644 index 0000000..27a31b7 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c @@ -0,0 +1,38 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +void abort (); + +#define N 256 +signed char ca[N] __attribute__((aligned(16))); +signed char cb[N] __attribute__((aligned(16))); +signed char cc[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = i - 128; + cc[i] = i/2 - 64; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (ca[i] != i - i/2 - 64) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c new file mode 100644 index 0000000..7264d25 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c @@ -0,0 +1,40 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +void abort (); + +#define N 4096 +signed char ca[N] __attribute__((aligned(16))); +signed char cb[N] __attribute__((aligned(16))); +signed char cc[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} + +__attribute__((noinline)) void init () +{ + int i, ii; + for (i = 0, ii = 0; i < N; ++i, ii = (ii + 1) % 128) { + cb[i] = ii - 128; + cc[i] = ii/2 - 64; + } +} + +int main () +{ + int i, ii; + init (); + foo (); + for (i = 0; i < N; ++i) { + ii = i % 128; + if (ca[i] != ii - ii/2 - 64) + abort (); + } + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c new file mode 100644 index 0000000..cdca070 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c @@ -0,0 +1,42 @@ +/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +void abort (); + +#define N 4096 +int ca[N] __attribute__((aligned(16))); +int cb[N] __attribute__((aligned(16))); +int cc[N] __attribute__((aligned(16))); +int cd[N] __attribute__((aligned(16))); + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = (cb[i] + cc[i]) * cd[i]; + } +} + +__attribute__((noinline)) void init () +{ + int i; + for (i = 0; i < N; ++i) { + cb[i] = 3 * i - 2048; + cc[i] = -5 * i + 93; + cd[i] = i % 2 ? 1 : -1; + } +} + +int main () +{ + int i; + init (); + foo (); + for (i = 0; i < N; ++i) + if (i % 2 == 1 && ca[i] != -2 * i - 1955) + abort (); + else if (i % 2 == 0 && ca[i] != 1955 + 2 * i) + abort (); + return 0; +} diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c index 836b385..934cdad 100644 --- a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-O3 -mcpu=power7" } */ +/* { dg-options "-O3 -mcpu=power7 -Wno-deprecated" } */ /* Test the various load/store varients. */ diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c index e1f0ca8..c4e76e6 100644 --- a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c @@ -7,10 +7,4 @@ #include <altivec.h> -#if __LITTLE_ENDIAN__ -#define OFFSET 1 -#else -#define OFFSET 0 -#endif - -double get_value (vector double *p) { return vec_extract (*p, OFFSET); } +double get_value (vector double *p) { return vec_extract (*p, 0); } diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/warn-lvsl-lvsr.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/warn-lvsl-lvsr.c new file mode 100644 index 0000000..bf889aa --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/warn-lvsl-lvsr.c @@ -0,0 +1,14 @@ +/* Test for deprecation messages on use of lvsl and lvsr for little endian. */ + +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-options "-O0 -Wdeprecated" } */ + +#include <altivec.h> + +float f[20]; + +void foo () +{ + vector unsigned char a = vec_lvsl (4, f); /* { dg-warning "vec_lvsl is deprecated for little endian; use assignment for unaligned loads and stores" } */ + vector unsigned char b = vec_lvsr (8, f); /* { dg-warning "vec_lvsr is deprecated for little endian; use assignment for unaligned loads and stores" } */ +} |