diff options
Diffstat (limited to 'arch/arm/mach-exynos')
40 files changed, 7910 insertions, 63 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 2c177ec..b4dc72f 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -956,7 +956,7 @@ config PANEL_U1_NA_SPR endchoice -if MACH_U1 || MACH_C1 || MACH_M3 || MACH_M0 || MACH_P4 || MACH_P2 || MACH_P4NOTE || MACH_T0 || MACH_TRATS || MACH_GRANDE || MACH_GC1 || MACH_BAFFIN +if MACH_U1 || MACH_C1 || MACH_M3 || MACH_M0 || MACH_P4 || MACH_P2 || MACH_P4NOTE || MACH_T0 || MACH_TRATS || MACH_GRANDE || MACH_GC1 || MACH_BAFFIN || MACH_KONA source "arch/arm/mach-exynos/Kconfig.local" endif @@ -1090,6 +1090,11 @@ config MACH_T0 select S3C_DEV_I2C4 select S3C_DEV_I2C5 +config MACH_KONA + bool "KONA Note8 board" + select S3C_DEV_I2C4 + select S3C_DEV_I2C5 + config MACH_IRON bool "Iron board" select S3C_DEV_I2C4 @@ -1129,6 +1134,14 @@ config T0_04_BD bool "T0 Revison 04 board" default n +config KONA_00_BD + bool "KONA note8 rev00 common Board" + default n + +config KONA_01_BD + bool "KONA note8 rev01 common Board" + default n + config IRON_BD bool "Iron common Board" @@ -1152,6 +1165,9 @@ config JACK_FET config JACK_GROUND_DET bool "Ear Ground Detection Enable" +config USE_ADC_DET + bool "Jack Detection with ADC IC" + config SAMSUNG_ANALOG_UART_SWITCH int "SAMSUNG analog switch for UART" default 1 @@ -1599,6 +1615,16 @@ config EHCI_IRQ_DISTRIBUTION bool "ehci irq distribution" default n +if (LINK_DEVICE_USB || LINK_DEVICE_HSIC) +config EHCI_MODEM_PORTNUM + int "EHCI port number of modem connection" + default 2 +config CMC_MODEM_HSIC_SYSREV + int "System revision number which CMC modem support HSIC i/f" + depends on LTE_MODEM_CMC221 + default 9 +endif + if SEC_MODEM comment "Samsung Modem Feature" @@ -1726,6 +1752,11 @@ endchoice endif +comment "Connectivity Feature" +config GPS_BRCM_475X + bool "BRCM_475X_CHIPSET" + default n + if BT config BT_CSR8811 bool "Enable CSR8811 driver" @@ -1817,3 +1848,13 @@ config CORESIGHT_ETM_DEFAULT_ENABLE help Turns on ETM tracing by default. Otherwise, tracing is disabled by default but can be enabled by other means. + + +config MACH_KONA_SENSOR + bool "KONA Sensor Enable" + help + Support sensors of KONA boards + + BMA254 / BOSCH + YAS532 / YAMAHA + GP2A030A / SHARP diff --git a/arch/arm/mach-exynos/Kconfig.local b/arch/arm/mach-exynos/Kconfig.local index 54baf94..883c9f3 100644 --- a/arch/arm/mach-exynos/Kconfig.local +++ b/arch/arm/mach-exynos/Kconfig.local @@ -271,6 +271,28 @@ config MACH_BAFFIN_KOR_LGT bool "LG U+" endchoice +choice + prompt "KONA Note8 Target Carrier" + depends on MACH_KONA &&\ + (TARGET_LOCALE_EUR || TARGET_LOCALE_USA || TARGET_LOCALE_KOR) + default MACH_KONA_EUR_OPEN + +config MACH_KONA_EUR_OPEN + bool "KONA Note8 EUR OPEN 3G" + +config MACH_KONA_EUR_WIFI + bool "KONA Note8 EUR wifi" + +config MACH_KONA_EUR_LTE + bool "KONA Note8 EUR LTE" + +config MACH_KONALTE_USA_ATT + bool "ATT" + +config MACH_KONA_KOR_WIFI + bool "KONA Note8 KOR ANY" +endchoice + menu "M0 CTC based models" depends on MACH_M0_CTC && TARGET_LOCALE_CHN diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index f086ae3..8e3c1f0 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -104,6 +104,13 @@ obj-$(CONFIG_MACH_SMDK4X12) += mach-smdk4x12.o ifeq ($(CONFIG_MACH_P4NOTE),y) obj-$(CONFIG_MACH_MIDAS) += mach-p4notepq.o px-switch.o p4note-jack.o else +ifeq ($(CONFIG_MACH_KONA),y) +ifeq ($(CONFIG_KONA_00_BD),y) +obj-$(CONFIG_MACH_MIDAS) += mach-kona.o px-switch.o board-kona-battery.o +else +obj-$(CONFIG_MACH_MIDAS) += mach-kona.o +endif +else ifeq ($(CONFIG_MACH_IRON),y) obj-$(CONFIG_MACH_MIDAS) += board-grande.o grande-jack.o else @@ -114,6 +121,7 @@ obj-$(CONFIG_MACH_MIDAS) += mach-midas.o endif endif endif +endif obj-$(CONFIG_MACH_SLP_MIDAS) += board-slp-midas.o midas-sensor.o obj-$(CONFIG_MACH_SLP_PQ) += board-slp-pq.o obj-$(CONFIG_MACH_REDWOOD) += board-redwood.o @@ -133,6 +141,7 @@ obj-$(CONFIG_MACH_SMDK5250) += board-smdk5250-input.o obj-$(CONFIG_MACH_SMDK5250) += board-smdk5250-spi.o obj-$(CONFIG_MACH_P4NOTE) += p4-input.o +obj-$(CONFIG_MACH_KONA) += kona-input.o ifeq ($(CONFIG_MACH_GRANDE),y) obj-$(CONFIG_MIDAS_COMMON) += sec-common.o board-gps-bcm475x.o \ @@ -164,16 +173,25 @@ ifeq ($(CONFIG_MACH_P4NOTELTE_USA_VZW),y) obj-$(CONFIG_MIDAS_COMMON) += sec-common.o\ midas-tsp.o board-midas-wlan.o \ midas-camera.o midas-thermistor.o \ - midas-mhl.o midas-lcd.o midas-sound.o \ - board-gps-bcm475x.o + midas-mhl.o midas-lcd.o midas-sound.o + +obj-$(CONFIG_GPS_BRCM_475X) += board-gps-bcm475x.o else obj-$(CONFIG_MIDAS_COMMON) += sec-common.o\ midas-tsp.o board-midas-wlan.o \ midas-camera.o midas-thermistor.o \ - midas-mhl.o midas-lcd.o midas-sound.o \ - board-gps-bcm475x.o + midas-mhl.o midas-lcd.o midas-sound.o + +obj-$(CONFIG_GPS_BRCM_475X) += board-gps-bcm475x.o endif #CONFIG_MACH_P4NOTELTE_USA_VZW else +ifeq ($(CONFIG_MACH_KONA),y) +obj-$(CONFIG_MIDAS_COMMON) += sec-common.o\ + midas-tsp.o board-midas-wlan.o \ + midas-camera.o midas-thermistor.o \ + midas-mhl.o midas-lcd.o midas-sound.o \ + midas-wacom.o board-gps-bcm4752.o +else ifeq ($(CONFIG_MACH_SLP_T0_LTE),y) obj-$(CONFIG_MIDAS_COMMON) += sec-common.o \ board-midas-wlan.o \ @@ -197,9 +215,12 @@ endif endif endif endif +endif obj-$(CONFIG_IRON_BD) += board-iron-gpio.o board-grande-power.o obj-$(CONFIG_GRANDE_BD) += board-grande-gpio.o board-grande-power.o obj-$(CONFIG_P4NOTE_00_BD) += p4note-gpio.o p4note-power.o +obj-$(CONFIG_KONA_00_BD) += kona-gpio.o kona-power.o +obj-$(CONFIG_KONA_01_BD) += kona-01-gpio.o kona-01-power.o obj-$(CONFIG_GC1_00_BD) += gc1-gpio.o gc1-power.o gc1-jack.o obj-$(CONFIG_MACH_T0) += t0-gpio.o t0-power.o obj-$(CONFIG_MACH_BAFFIN) += baffin-gpio.o baffin-power.o @@ -222,9 +243,14 @@ else ifeq ($(CONFIG_MACH_IRON),y) obj-$(CONFIG_MACH_MIDAS) += sec-reboot.o board-grande-sensor.o else +ifeq ($(CONFIG_MACH_KONA_SENSOR), y) +obj-$(CONFIG_MACH_MIDAS) += sec-reboot.o +obj-$(CONFIG_MACH_KONA_SENSOR) += kona-sensor.o +else obj-$(CONFIG_MACH_MIDAS) += sec-reboot.o midas-sensor.o endif endif +endif obj-$(CONFIG_LEDS_LP5521) += midas-leds.o obj-$(CONFIG_MACH_U1) += sec-reboot.o diff --git a/arch/arm/mach-exynos/board-gps-bcm4752.c b/arch/arm/mach-exynos/board-gps-bcm4752.c new file mode 100644 index 0000000..de166f1 --- /dev/null +++ b/arch/arm/mach-exynos/board-gps-bcm4752.c @@ -0,0 +1,43 @@ +#include <linux/init.h> +#include <linux/err.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <mach/gpio.h> +#include <plat/gpio-cfg.h> +#include <mach/board-gps.h> + +static struct device *gps_dev; + +static int __init gps_bcm4752_init(void) +{ + BUG_ON(!sec_class); + gps_dev = device_create(sec_class, NULL, 0, NULL, "gps"); + BUG_ON(!gps_dev); + + s3c_gpio_cfgpin(GPIO_GPS_RXD, S3C_GPIO_SFN(GPIO_GPS_RXD_AF)); + s3c_gpio_setpull(GPIO_GPS_RXD, S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(GPIO_GPS_TXD, S3C_GPIO_SFN(GPIO_GPS_TXD_AF)); + s3c_gpio_setpull(GPIO_GPS_TXD, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgpin(GPIO_GPS_CTS, S3C_GPIO_SFN(GPIO_GPS_CTS_AF)); + s3c_gpio_setpull(GPIO_GPS_CTS, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgpin(GPIO_GPS_RTS, S3C_GPIO_SFN(GPIO_GPS_RTS_AF)); + s3c_gpio_setpull(GPIO_GPS_RTS, S3C_GPIO_PULL_NONE); + + if (gpio_request(GPIO_GPS_PWR_EN, "GPS_PWR_EN")) { + WARN(1, "fail to request gpio (GPS_PWR_EN)\n"); + gpio_free(GPIO_GPS_PWR_EN); + return 1; + } + + s3c_gpio_setpull(GPIO_GPS_PWR_EN, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgpin(GPIO_GPS_PWR_EN, S3C_GPIO_OUTPUT); + gpio_direction_output(GPIO_GPS_PWR_EN, 0); + + gpio_export(GPIO_GPS_PWR_EN, 1); + + gpio_export_link(gps_dev, "GPS_PWR_EN", GPIO_GPS_PWR_EN); + + return 0; +} + +device_initcall(gps_bcm4752_init);
\ No newline at end of file diff --git a/arch/arm/mach-exynos/board-grande.c b/arch/arm/mach-exynos/board-grande.c index 79c0fa8..ede2570 100755 --- a/arch/arm/mach-exynos/board-grande.c +++ b/arch/arm/mach-exynos/board-grande.c @@ -1553,7 +1553,7 @@ static void __init exynos4_reserve_mem(void) #endif static const char map[] __initconst = - "s3cfb.0=fimd;exynos4-fb.0=fimd;" + "s3cfb.0=fimd;exynos4-fb.0=fimd;samsung-pd.1=fimd;" "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;s3c-fimc.3=fimc3;" "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;exynos4210-fimc.2=fimc2;exynos4210-fimc.3=fimc3;" #ifdef CONFIG_ION_EXYNOS diff --git a/arch/arm/mach-exynos/board-kona-battery.c b/arch/arm/mach-exynos/board-kona-battery.c new file mode 100644 index 0000000..0905725 --- /dev/null +++ b/arch/arm/mach-exynos/board-kona-battery.c @@ -0,0 +1,578 @@ +/* arch/arm/mach-exynos/board-hershey-power.c + * + * Copyright (C) 2012 Samsung Electronics Co, Ltd. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/err.h> +#include <linux/gpio.h> +#include <linux/kernel.h> +#include <linux/switch.h> +#include <linux/i2c.h> +#include <linux/i2c-gpio.h> +#include <linux/regulator/machine.h> + +#include <mach/gpio-rev00-kona.h> + +#include <linux/battery/sec_battery.h> +#include <linux/battery/sec_fuelgauge.h> +#include <linux/battery/sec_charger.h> +#include <linux/gpio.h> +#include <linux/gpio_event.h> +#include <plat/gpio-cfg.h> +#include <linux/stmpe811-adc.h> + +#include <linux/usb/android_composite.h> +#include <plat/devs.h> + +#include <mach/usb_switch.h> + + + +#define SEC_FUELGAUGE_I2C_ID 4 +#define SEC_MAX77693MFD_I2C_ID 5 +#define P30_USB 7 + +#define SEC_BATTERY_PMIC_NAME "" + +#define TA_ADC_LOW 150 + +static struct power_supply *charger_supply; +static bool is_jig_on; + + +/* cable state */ +bool is_cable_attached; + +static void sec_bat_initial_check(void) +{ + struct power_supply *psy = power_supply_get_by_name("battery"); + union power_supply_propval value; + int ret = 0; + + value.intval = gpio_get_value(GPIO_TA_nCONNECTED); + pr_debug("%s: %d\n", __func__, value.intval); + + ret = psy->set_property(psy, POWER_SUPPLY_PROP_ONLINE, &value); + if (ret) { + pr_err("%s: fail to set power_suppy ONLINE property(%d)\n", + __func__, ret); + } +} + +static bool sec_bat_gpio_init(void) +{ + return true; +} + +static bool sec_fg_gpio_init(void) +{ + return true; +} + +static bool sec_chg_gpio_init(void) +{ + return true; +} + +/* Get LP charging mode state */ +unsigned int lpcharge; +static int battery_get_lpm_state(char *str) +{ + get_option(&str, &lpcharge); + pr_info("%s: Low power charging mode: %d\n", __func__, lpcharge); + + return lpcharge; +} +__setup("lpcharge=", battery_get_lpm_state); + +static bool sec_bat_is_lpm(void) +{ + return lpcharge == 1 ? true : false; +} + +void check_jig_status(int status) +{ + if (status) { + pr_info("%s: JIG On so reset fuel gauge capacity\n", __func__); + is_jig_on = true; + } + +} + +static bool sec_bat_check_jig_status(void) +{ + return !gpio_get_value(GPIO_IF_CON_SENSE) ? 1 : 0; +} + +int current_cable_type = POWER_SUPPLY_TYPE_BATTERY; + +static int sec_bat_check_cable_callback(void) +{ + struct usb_gadget *gadget = + platform_get_drvdata(&s3c_device_usbgadget); + bool attach = true; + int adc_1, adc_2, avg_adc; + + if (!charger_supply) { + charger_supply = power_supply_get_by_name("sec-charger"); + + if (!charger_supply) + pr_err("%s: failed to get power supplies\n", __func__); + } + + /* ADC check margin (300~500ms) */ + msleep(350); + + usb_switch_lock(); + usb_switch_set_path(USB_PATH_ADCCHECK); + + adc_1 = stmpe811_get_adc_data(6); + adc_2 = stmpe811_get_adc_data(6); + + avg_adc = (adc_1 + adc_2)/2; + + usb_switch_clr_path(USB_PATH_ADCCHECK); + usb_switch_unlock(); + + pr_info("[BAT] %s: Adc value (%d)\n", __func__, avg_adc); + + attach = !gpio_get_value(GPIO_TA_nCONNECTED) ? true : false; + + if(attach) { + if(avg_adc > TA_ADC_LOW) + current_cable_type = POWER_SUPPLY_TYPE_MAINS; + else + current_cable_type = POWER_SUPPLY_TYPE_USB; + + is_cable_attached = true; + } + else { + current_cable_type = POWER_SUPPLY_TYPE_BATTERY; + is_cable_attached = false; + } + + /* temp code : only set vbus enable when usb attaced */ + if (gadget) { + if (attach) + usb_gadget_vbus_connect(gadget); + else + usb_gadget_vbus_disconnect(gadget); + } + +#if 0 + pr_info("%s: Cable type(%s), Attach(%d), Adc(%d)\n", + __func__, + current_cable_type == POWER_SUPPLY_TYPE_BATTERY ? + "Battery" : current_cable_type == POWER_SUPPLY_TYPE_USB ? + "USB" : "TA", attach, adc); +#endif + + return current_cable_type; +} + +static bool sec_bat_check_cable_result_callback(int cable_type) +{ + bool ret = true; + current_cable_type = cable_type; + + switch (cable_type) { + case POWER_SUPPLY_TYPE_USB: + pr_info("%s set vbus applied\n", + __func__); + break; + case POWER_SUPPLY_TYPE_BATTERY: + pr_info("%s set vbus cut\n", + __func__); + break; + case POWER_SUPPLY_TYPE_MAINS: + break; + default: + pr_err("%s cable type (%d)\n", + __func__, cable_type); + ret = false; + break; + } + /* omap4_kona_tsp_ta_detect(cable_type); */ + + return ret; +} + +/* callback for battery check + * return : bool + * true - battery detected, false battery NOT detected + */ +static bool sec_bat_check_callback(void) { return true; } +static bool sec_bat_check_result_callback(void) { return true; } + +/* callback for OVP/UVLO check + * return : int + * battery health + */ +static int sec_bat_ovp_uvlo_callback(void) +{ + int health; + health = POWER_SUPPLY_HEALTH_GOOD; + + return health; +} + +static bool sec_bat_ovp_uvlo_result_callback(int health) { return true; } + +/* + * val.intval : temperature + */ +static bool sec_bat_get_temperature_callback( + enum power_supply_property psp, + union power_supply_propval *val) { return true; } + +static bool sec_fg_fuelalert_process(bool is_fuel_alerted) { return true; } + +static sec_bat_adc_region_t cable_adc_value_table[] = { + { 0, 500 }, /* POWER_SUPPLY_TYPE_BATTERY */ + { 0, 0 }, /* POWER_SUPPLY_TYPE_UPS */ + { 1000, 1500 }, /* POWER_SUPPLY_TYPE_MAINS */ + { 0, 0 }, /* POWER_SUPPLY_TYPE_USB */ + { 0, 0 }, /* POWER_SUPPLY_TYPE_OTG */ + { 0, 0 }, /* POWER_SUPPLY_TYPE_DOCK */ + { 0, 0 }, /* POWER_SUPPLY_TYPE_MISC */ +}; + +static sec_charging_current_t charging_current_table[] = { + {0, 0, 0, 0}, /* POWER_SUPPLY_TYPE_UNKNOWN */ + {0, 0, 0, 0}, /* POWER_SUPPLY_TYPE_BATTERY */ + {1000, 900, 250, 0}, /* POWER_SUPPLY_TYPE_UPS */ + {1800, 1800, 275, 0}, /* POWER_SUPPLY_TYPE_MAINS*/ + {500, 500, 250, 0}, /* POWER_SUPPLY_TYPE_USB*/ + {1000, 900, 250, 0}, /* POWER_SUPPLY_TYPE_USB_DCP */ + {1000, 900, 250, 0}, /* POWER_SUPPLY_TYPE_USB_CDP */ + {1000, 900, 250, 0}, /* POWER_SUPPLY_TYPE_USB_ACA */ + {0, 0, 0, 0}, /* POWER_SUPPLY_TYPE_OTG */ + {0, 0, 0, 0}, /* POWER_SUPPLY_TYPE_DOCK */ + {500, 500, 0, 0}, /* POWER_SUPPLY_TYPE_MISC */ +}; + +/* unit: seconds */ +static int polling_time_table[] = { + 10, /* BASIC */ + 30, /* CHARGING */ + 30, /* DISCHARGING */ + 30, /* NOT_CHARGING */ + 1800, /* SLEEP */ +}; + +static struct battery_data_t kona_battery_data[] = { + /* SDI battery data */ + { + .Capacity = 0x2530, + .low_battery_comp_voltage = 3600, + .low_battery_table = { + /* range, slope, offset */ + {-5000, 0, 0}, /* dummy for top limit */ + {-1250, 0, 3320}, + {-750, 97, 3451}, + {-100, 96, 3461}, + {0, 0, 3456}, + }, + .temp_adjust_table = { + /* range, slope, offset */ + {47000, 122, 8950}, + {60000, 200, 51000}, + {100000, 0, 0}, /* dummy for top limit */ + }, + .type_str = "SDI", + } +}; + +static bool sec_bat_adc_none_init(struct platform_device *pdev) { return true; } +static bool sec_bat_adc_none_exit(void) { return true; } +static int sec_bat_adc_none_read(unsigned int channel) { return 0; } + +static bool sec_bat_adc_ap_init(struct platform_device *pdev) { return true; } +static bool sec_bat_adc_ap_exit(void) { return true; } +static int sec_bat_adc_ap_read(unsigned int channel) { return 0; } + +static bool sec_bat_adc_ic_init(struct platform_device *pdev) { return true; } +static bool sec_bat_adc_ic_exit(void) { return true; } +static int sec_bat_adc_ic_read(unsigned int channel) { return 0; } + +static sec_battery_platform_data_t sec_battery_pdata = { + /* NO NEED TO BE CHANGED */ + .initial_check = sec_bat_initial_check, + .bat_gpio_init = sec_bat_gpio_init, + .fg_gpio_init = sec_fg_gpio_init, + .chg_gpio_init = sec_chg_gpio_init, + + .is_lpm = sec_bat_is_lpm, + .check_jig_status = sec_bat_check_jig_status, + .check_cable_callback = + sec_bat_check_cable_callback, + .check_cable_result_callback = + sec_bat_check_cable_result_callback, + .check_battery_callback = + sec_bat_check_callback, + .check_battery_result_callback = + sec_bat_check_result_callback, + .ovp_uvlo_callback = sec_bat_ovp_uvlo_callback, + .ovp_uvlo_result_callback = + sec_bat_ovp_uvlo_result_callback, + .fuelalert_process = sec_fg_fuelalert_process, + .get_temperature_callback = + sec_bat_get_temperature_callback, + + .adc_api[SEC_BATTERY_ADC_TYPE_NONE] = { + .init = sec_bat_adc_none_init, + .exit = sec_bat_adc_none_exit, + .read = sec_bat_adc_none_read + }, + .adc_api[SEC_BATTERY_ADC_TYPE_AP] = { + .init = sec_bat_adc_ap_init, + .exit = sec_bat_adc_ap_exit, + .read = sec_bat_adc_ap_read + }, + .adc_api[SEC_BATTERY_ADC_TYPE_IC] = { + .init = sec_bat_adc_ic_init, + .exit = sec_bat_adc_ic_exit, + .read = sec_bat_adc_ic_read + }, + .cable_adc_value = cable_adc_value_table, + .charging_current = charging_current_table, + .polling_time = polling_time_table, + /* NO NEED TO BE CHANGED */ + + .pmic_name = SEC_BATTERY_PMIC_NAME, + + .adc_check_count = 7, + .adc_type = { + SEC_BATTERY_ADC_TYPE_IC, /* CABLE_CHECK */ + SEC_BATTERY_ADC_TYPE_NONE, /* BAT_CHECK */ + SEC_BATTERY_ADC_TYPE_NONE, /* TEMP */ + SEC_BATTERY_ADC_TYPE_NONE, /* TEMP_AMB */ + SEC_BATTERY_ADC_TYPE_NONE, /* FULL_CHECK */ + }, + + /* Battery */ + .vendor = "SDI SDI", + .technology = POWER_SUPPLY_TECHNOLOGY_LION, + .battery_data = (void *)kona_battery_data, + .bat_polarity_ta_nconnected = 1, /* active HIGH */ + .bat_irq_attr = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + .cable_check_type = + SEC_BATTERY_CABLE_CHECK_NOUSBCHARGE | + SEC_BATTERY_CABLE_CHECK_INT, + .cable_source_type = SEC_BATTERY_CABLE_SOURCE_CALLBACK, + + .event_check = false, + .event_waiting_time = 60, + + /* Monitor setting */ + .polling_type = SEC_BATTERY_MONITOR_ALARM, + .monitor_initial_count = 3, + + /* Battery check */ + .battery_check_type = SEC_BATTERY_CHECK_NONE, + .check_count = 3, + + /* Battery check by ADC */ + .check_adc_max = 0, + .check_adc_min = 0, + + /* OVP/UVLO check */ + .ovp_uvlo_check_type = SEC_BATTERY_OVP_UVLO_CHGPOLLING, + + /* Temperature check */ + .thermal_source = SEC_BATTERY_THERMAL_SOURCE_FG, + + .temp_check_type = SEC_BATTERY_TEMP_CHECK_TEMP, + .temp_check_count = 1, + .temp_high_threshold_event = 500, /* set temp value */ + .temp_high_recovery_event = 420, + .temp_low_threshold_event = -50, + .temp_low_recovery_event = 0, + .temp_high_threshold_normal = 500, + .temp_high_recovery_normal = 420, + .temp_low_threshold_normal = -50, + .temp_low_recovery_normal = 0, + .temp_high_threshold_lpm = 500, + .temp_high_recovery_lpm = 420, + .temp_low_threshold_lpm = -50, + .temp_low_recovery_lpm = 0, + + .full_check_type = SEC_BATTERY_FULLCHARGED_CHGINT, + .full_check_type_2nd = SEC_BATTERY_FULLCHARGED_TIME, + .full_check_count = 80, + .chg_polarity_full_check = 1, + .full_condition_type = 0, + .full_condition_soc = 100, + .full_condition_ocv = 4300, + + .recharge_condition_type = SEC_BATTERY_RECHARGE_CONDITION_VCELL, + .recharge_condition_soc = 99, + .recharge_condition_avgvcell = 4257, + .recharge_condition_vcell = 4257, + + .charging_total_time = 10 * 60 * 60, + .recharging_total_time = 90 * 60, + .charging_reset_time = 10 * 60, + + /* Fuel Gauge */ + .fg_irq_attr = IRQF_TRIGGER_FALLING, + .fuel_alert_soc = 1, + .repeated_fuelalert = false, + .capacity_calculation_type = + SEC_FUELGAUGE_CAPACITY_TYPE_DYNAMIC_SCALE, + .capacity_max = 1000, + .capacity_min = 0, + .capacity_max_margin = 30, + + /* Charger */ + .chg_polarity_en = 0, /* active LOW charge enable */ + .chg_polarity_status = 0, + .chg_irq_attr = IRQF_TRIGGER_RISING, + .chg_float_voltage = 4300, + + .chg_curr_siop_lv1 = 1500, + .chg_curr_siop_lv2 = 1000, + .chg_curr_siop_lv3 = 500, +}; + +/* set NCP1851 Charger gpio i2c */ +static struct i2c_gpio_platform_data kona_gpio_i2c13_pdata = { + .sda_pin = (GPIO_CHG_SDA), + .scl_pin = (GPIO_CHG_SCL), + .udelay = 10, + .timeout = 0, +}; + +static struct platform_device kona_gpio_i2c13_device = { + .name = "i2c-gpio", + .id = 13, + .dev = { + .platform_data = &kona_gpio_i2c13_pdata, + }, +}; + +/* set MAX17050 Fuel Gauge gpio i2c */ +static struct i2c_gpio_platform_data kona_gpio_i2c14_pdata = { + .sda_pin = (GPIO_FUEL_SDA), + .scl_pin = (GPIO_FUEL_SCL), + .udelay = 10, + .timeout = 0, +}; + +static struct platform_device kona_gpio_i2c14_device = { + .name = "i2c-gpio", + .id = 14, + .dev = { + .platform_data = &kona_gpio_i2c14_pdata, + }, +}; + +static struct platform_device sec_device_battery = { + .name = "sec-battery", + .id = -1, + .dev.platform_data = &sec_battery_pdata, +}; + +static struct i2c_board_info sec_brdinfo_charger[] __initdata = { + { + I2C_BOARD_INFO("sec-charger", + SEC_CHARGER_I2C_SLAVEADDR), + .platform_data = &sec_battery_pdata, + }, +}; + +static struct i2c_board_info sec_brdinfo_fuelgauge[] __initdata = { + { + I2C_BOARD_INFO("sec-fuelgauge", + SEC_FUELGAUGE_I2C_SLAVEADDR), + .platform_data = &sec_battery_pdata, + }, +}; + +static struct platform_device *sec_battery_devices[] __initdata = { + &kona_gpio_i2c13_device, + &kona_gpio_i2c14_device, + &sec_device_battery, +}; + +static void charger_gpio_init(void) +{ + int ret; + + ret = gpio_request(GPIO_TA_nCONNECTED, "GPIO_TA_nCONNECTED"); + if (ret) { + printk(KERN_ERR "%s: gpio_request fail[%d], ret = %d\n", + __func__, GPIO_TA_nCONNECTED, ret); + return; + } + +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + if (system_rev >= 3) + ret = gpio_request(GPIO_CHG_NEW_INT, "GPIO_CHG_INT"); + else + ret = gpio_request(GPIO_CHG_INT, "GPIO_CHG_INT"); +#else + ret = gpio_request(GPIO_CHG_INT, "GPIO_CHG_INT"); +#endif + if (ret) { + printk(KERN_ERR "%s: gpio_request fail[%d], ret = %d\n", + __func__, GPIO_CHG_INT, ret); + return; + } + + s3c_gpio_setpull(GPIO_TA_nCONNECTED, S3C_GPIO_PULL_UP); + s5p_register_gpio_interrupt(GPIO_TA_nCONNECTED); + s3c_gpio_cfgpin(GPIO_TA_nCONNECTED, S3C_GPIO_SFN(0xF)); /* EINT */ + +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + if (system_rev >= 3) { + s3c_gpio_setpull(GPIO_CHG_NEW_INT, S3C_GPIO_PULL_NONE); + s5p_register_gpio_interrupt(GPIO_CHG_NEW_INT); + s3c_gpio_cfgpin(GPIO_CHG_NEW_INT, S3C_GPIO_SFN(0xF)); /* EINT */ + } else { + s3c_gpio_setpull(GPIO_CHG_INT, S3C_GPIO_PULL_NONE); + s5p_register_gpio_interrupt(GPIO_CHG_INT); + s3c_gpio_cfgpin(GPIO_CHG_INT, S3C_GPIO_SFN(0xF)); /* EINT */ + } +#else + s3c_gpio_setpull(GPIO_CHG_INT, S3C_GPIO_PULL_NONE); + s5p_register_gpio_interrupt(GPIO_CHG_INT); + s3c_gpio_cfgpin(GPIO_CHG_INT, S3C_GPIO_SFN(0xF)); /* EINT */ + #endif + + sec_battery_pdata.bat_irq = gpio_to_irq(GPIO_TA_nCONNECTED); + +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + if (system_rev >= 3) + sec_battery_pdata.chg_irq = gpio_to_irq(GPIO_CHG_NEW_INT); + else if (system_rev > 0) + sec_battery_pdata.chg_irq = gpio_to_irq(GPIO_CHG_INT); +#else + if (system_rev > 0) + sec_battery_pdata.chg_irq = gpio_to_irq(GPIO_CHG_INT); +#endif +} + +void __init exynos_kona_charger_init(void) +{ + pr_info("%s: KONA charger init\n", __func__); + charger_gpio_init(); + + platform_add_devices(sec_battery_devices, + ARRAY_SIZE(sec_battery_devices)); + + i2c_register_board_info(13, sec_brdinfo_charger, + ARRAY_SIZE(sec_brdinfo_charger)); + + i2c_register_board_info(14, sec_brdinfo_fuelgauge, + ARRAY_SIZE(sec_brdinfo_fuelgauge)); +} diff --git a/arch/arm/mach-exynos/board-midas-wlan.c b/arch/arm/mach-exynos/board-midas-wlan.c index 5d9a584..409b3bb 100644 --- a/arch/arm/mach-exynos/board-midas-wlan.c +++ b/arch/arm/mach-exynos/board-midas-wlan.c @@ -196,8 +196,13 @@ static int brcm_wlan_set_carddetect(int onoff) udelay(200); +#ifdef CONFIG_MACH_KONA + mmc_force_presence_change_onoff(&s3c_device_hsmmc3, onoff); + /*temporal code for Kona-Wi-Fi*/ +#else mmc_force_presence_change(&s3c_device_hsmmc3); /* msleep(500); wait for carddetect */ +#endif return 0; } diff --git a/arch/arm/mach-exynos/charger-slp.c b/arch/arm/mach-exynos/charger-slp.c new file mode 100644 index 0000000..c8bdefe --- /dev/null +++ b/arch/arm/mach-exynos/charger-slp.c @@ -0,0 +1,271 @@ +/* + * linux/arch/arm/mach-exynos/charger-slp.c + * COPYRIGHT(C) 2011 + * MyungJoo Ham <myungjoo.ham@samsung.com> + * + * Charger Support with Charger-Manager Framework + * + */ + +#include <linux/io.h> +#include <linux/err.h> +#include <linux/platform_device.h> +#include <linux/regulator/consumer.h> +#include <linux/power/charger-manager.h> +#include <linux/hwmon.h> +#include <linux/platform_data/ntc_thermistor.h> + +#include <plat/adc.h> +#include <plat/pm.h> + +#include <mach/regs-pmu.h> +#include <mach/irqs.h> + +#include "board-mobile.h" + +#define S5P_WAKEUP_STAT_WKSRC_MASK 0x000ffe3f +#define ADC_SAMPLING_CNT 7 +#define SDI_2100MA_BATT 4350000 + +/* Temperatures in milli-centigrade */ +#define SECBATTSPEC_TEMP_HIGH (65 * 1000) +#define SECBATTSPEC_TEMP_HIGH_REC (43 * 1000) +#define SECBATTSPEC_TEMP_LOW (-5 * 1000) +#define SECBATTSPEC_TEMP_LOW_REC (0 * 1000) + +#ifdef CONFIG_SENSORS_NTC_THERMISTOR +struct platform_device midas_ncp15wb473_thermistor; +static int ntc_adc_num = -EINVAL; /* Uninitialized */ +static struct s3c_adc_client *ntc_adc; + +int __init adc_ntc_init(int port) +{ + int err = 0; + + if (port < 0 || port > 9) + return -EINVAL; + ntc_adc_num = port; + + ntc_adc = s3c_adc_register(&midas_ncp15wb473_thermistor, + NULL, NULL, 0); + if (IS_ERR(ntc_adc)) { + err = PTR_ERR(ntc_adc); + ntc_adc = NULL; + return err; + } + + return 0; +} + +static int read_thermistor_uV(void) +{ + int val, i; + int adc_min = 0; + int adc_max = 0; + int adc_total = 0; + + s64 converted; + + WARN(ntc_adc == NULL || ntc_adc_num < 0, + "NTC-ADC is not initialized for %s.\n", __func__); + + for (i = 0; i < ADC_SAMPLING_CNT; i++) { + val = s3c_adc_read(ntc_adc, ntc_adc_num); + if (val < 0) { + pr_err("%s : read failed.(%d).\n", __func__, val); + return -EAGAIN; + } + + if (i != 0) { + if (val > adc_max) + adc_max = val; + else if (val < adc_min) + adc_min = val; + } else { + adc_max = val; + adc_min = val; + } + + adc_total += val; + } + + val = (adc_total - (adc_max + adc_min)) / (ADC_SAMPLING_CNT - 2); + + /* Multiplied by maximum input voltage */ + converted = 1800000LL * (s64) val; + /* Divided by resolution */ + converted >>= 12; + + return converted; +} + +static struct ntc_thermistor_platform_data ncp15wb473_pdata = { + .read_uV = read_thermistor_uV, + .pullup_uV = 1800000, /* VCC_1.8V_AP */ + .pullup_ohm = 100000, /* 100K */ + .pulldown_ohm = 100000, /* 100K */ + .connect = NTC_CONNECTED_GROUND, +}; + +static int __read_thermistor_mC(int *mC) +{ + int ret; + static struct device *hwmon; + static struct hwmon_property *entry; + + if (ntc_adc_num == -EINVAL) + return -ENODEV; + + if (hwmon == NULL) + hwmon = hwmon_find_device(&midas_ncp15wb473_thermistor.dev); + + if (IS_ERR_OR_NULL(hwmon)) { + hwmon = NULL; + return -ENODEV; + } + + if (entry == NULL) + entry = hwmon_get_property(hwmon, "temp1_input"); + if (IS_ERR_OR_NULL(entry)) { + entry = NULL; + return -ENODEV; + } + + ret = hwmon_get_value(hwmon, entry, mC); + if (ret < 0) { + entry = NULL; + return ret; + } + + return 0; +} +#else +static int __read_thermistor_mC(int *mC) +{ + *mC = 25000; + return 0; +} +#endif + +enum temp_stat { TEMP_OK = 0, TEMP_HOT = 1, TEMP_COLD = -1 }; + +static int midas_thermistor_ck(int *mC) +{ + static enum temp_stat state = TEMP_OK; + + __read_thermistor_mC(mC); + + switch (state) { + case TEMP_OK: + if (*mC >= SECBATTSPEC_TEMP_HIGH) + state = TEMP_HOT; + else if (*mC <= SECBATTSPEC_TEMP_LOW) + state = TEMP_COLD; + break; + case TEMP_HOT: + if (*mC <= SECBATTSPEC_TEMP_LOW) + state = TEMP_COLD; + else if (*mC < SECBATTSPEC_TEMP_HIGH_REC) + state = TEMP_OK; + break; + case TEMP_COLD: + if (*mC >= SECBATTSPEC_TEMP_HIGH) + state = TEMP_HOT; + else if (*mC > SECBATTSPEC_TEMP_LOW_REC) + state = TEMP_OK; + default: + pr_err("%s has invalid state %d\n", __func__, state); + } + + return state; +} + +static bool s3c_wksrc_rtc_alarm(void) +{ + u32 reg = s3c_suspend_wakeup_stat & S5P_WAKEUP_STAT_WKSRC_MASK; + + if ((reg & S5P_WAKEUP_STAT_RTCALARM) && + !(reg & ~S5P_WAKEUP_STAT_RTCALARM)) + return true; /* yes, it is */ + + return false; +} + +static char *midas_charger_stats[] = { +#if defined(CONFIG_BATTERY_MAX77693_CHARGER) + "max77693-charger", +#endif + NULL }; + +struct charger_cable charger_cable_vinchg1[] = { + { + .extcon_name = "max77693-muic", + .name = "USB", + .min_uA = 475000, + .max_uA = 475000 + 25000, + }, { + .extcon_name = "max77693-muic", + .name = "TA", + .min_uA = 650000, + .max_uA = 650000 + 25000, + }, { + .extcon_name = "max77693-muic", + .name = "MHL", + }, +}; + +static struct charger_regulator midas_regulators[] = { + { + .regulator_name = "vinchg1", + .cables = charger_cable_vinchg1, + .num_cables = ARRAY_SIZE(charger_cable_vinchg1), + }, +}; + +static struct charger_desc midas_charger_desc = { + .psy_name = "battery", + .polling_interval_ms = 30000, + .polling_mode = CM_POLL_EXTERNAL_POWER_ONLY, + .fullbatt_vchkdrop_ms = 30000, + .fullbatt_vchkdrop_uV = 50000, + .fullbatt_uV = 4200000, + .battery_present = CM_CHARGER_STAT, + .psy_charger_stat = midas_charger_stats, + .psy_fuel_gauge = "max17047-fuelgauge", + .is_temperature_error = midas_thermistor_ck, + .measure_ambient_temp = true, + .measure_battery_temp = false, + .soc_margin = 0, + + .charger_regulators = midas_regulators, + .num_charger_regulators = ARRAY_SIZE(midas_regulators), +}; + +struct charger_global_desc midas_charger_g_desc = { + .rtc = "rtc0", + .is_rtc_only_wakeup_reason = s3c_wksrc_rtc_alarm, + .assume_timer_stops_in_suspend = false, +}; + +struct platform_device midas_charger_manager = { + .name = "charger-manager", + .dev = { + .platform_data = &midas_charger_desc, + }, +}; + +#ifdef CONFIG_SENSORS_NTC_THERMISTOR +struct platform_device midas_ncp15wb473_thermistor = { + .name = "ncp15wb473", + .dev = { + .platform_data = &ncp15wb473_pdata, + }, +}; +#endif + +void cm_change_fullbatt_uV(void) +{ + midas_charger_desc.fullbatt_uV = SDI_2100MA_BATT; +} +EXPORT_SYMBOL(cm_change_fullbatt_uV); + diff --git a/arch/arm/mach-exynos/cpufreq.c b/arch/arm/mach-exynos/cpufreq.c index cdfec03..b592651 100644 --- a/arch/arm/mach-exynos/cpufreq.c +++ b/arch/arm/mach-exynos/cpufreq.c @@ -709,6 +709,8 @@ static struct notifier_block exynos_cpufreq_policy_notifier = { static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy) { + int ret; + policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu); cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu); @@ -729,9 +731,26 @@ static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy) cpumask_setall(policy->cpus); } - return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table); + ret = cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table); + if (ret) + return ret; + + cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu); + + return 0; +} + +static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy) +{ + cpufreq_frequency_table_put_attr(policy->cpu); + return 0; } +static struct freq_attr *exynos_cpufreq_attr[] = { + &cpufreq_freq_attr_scaling_available_freqs, + NULL, +}; + static int exynos_cpufreq_reboot_notifier_call(struct notifier_block *this, unsigned long code, void *_cmd) { @@ -755,7 +774,9 @@ static struct cpufreq_driver exynos_driver = { .target = exynos_target, .get = exynos_getspeed, .init = exynos_cpufreq_cpu_init, + .exit = exynos_cpufreq_cpu_exit, .name = "exynos_cpufreq", + .attr = exynos_cpufreq_attr, #ifdef CONFIG_PM .suspend = exynos_cpufreq_suspend, .resume = exynos_cpufreq_resume, diff --git a/arch/arm/mach-exynos/cpuidle-exynos4.c b/arch/arm/mach-exynos/cpuidle-exynos4.c index 3bfc3fb..88b941f 100644 --- a/arch/arm/mach-exynos/cpuidle-exynos4.c +++ b/arch/arm/mach-exynos/cpuidle-exynos4.c @@ -10,6 +10,7 @@ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/cpu_pm.h> #include <linux/cpuidle.h> #include <linux/io.h> #include <linux/suspend.h> @@ -568,6 +569,8 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev, local_irq_disable(); + cpu_pm_enter(); + if (log_en) pr_info("+++aftr\n"); @@ -630,6 +633,8 @@ early_wakeup: if (log_en) pr_info("---aftr\n"); + cpu_pm_exit(); + local_irq_enable(); idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + (after.tv_usec - before.tv_usec); @@ -663,12 +668,14 @@ static int exynos4_enter_core0_lpa(struct cpuidle_device *dev, #endif local_irq_disable(); + cpu_pm_enter(); + #if defined(CONFIG_INTERNAL_MODEM_IF) || defined(CONFIG_SAMSUNG_PHONE_TTY) gpio_set_value(GPIO_PDA_ACTIVE, 0); #endif if (log_en) - pr_info("+++lpa\n"); + pr_debug("+++lpa\n"); do_gettimeofday(&before); @@ -741,7 +748,7 @@ early_wakeup: ARRAY_SIZE(exynos4_lpa_save)); #ifdef CONFIG_EXYNOS4_CPUFREQ - if ((exynos_result_of_asv > 1) && !soc_is_exynos4210()) { + if (!soc_is_exynos4210()) { exynos4x12_set_abb_member(ABB_ARM, abb_val); exynos4x12_set_abb_member(ABB_INT, abb_val_int); } @@ -758,11 +765,13 @@ early_wakeup: do_gettimeofday(&after); if (log_en) - pr_info("---lpa\n"); + pr_debug("---lpa\n"); #if defined(CONFIG_INTERNAL_MODEM_IF) || defined(CONFIG_SAMSUNG_PHONE_TTY) gpio_set_value(GPIO_PDA_ACTIVE, 1); #endif + cpu_pm_exit(); + local_irq_enable(); idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + (after.tv_usec - before.tv_usec); diff --git a/arch/arm/mach-exynos/include/mach/gpio-midas.h b/arch/arm/mach-exynos/include/mach/gpio-midas.h index 2ed73f2..bd52930 100644 --- a/arch/arm/mach-exynos/include/mach/gpio-midas.h +++ b/arch/arm/mach-exynos/include/mach/gpio-midas.h @@ -39,6 +39,10 @@ #include "gpio-rev00-naples.h" #elif defined(CONFIG_MACH_P4NOTE) #include "gpio-rev00-p4notepq.h" +#elif defined(CONFIG_MACH_KONA) && defined(CONFIG_KONA_00_BD) +#include "gpio-rev00-kona.h" +#elif defined(CONFIG_MACH_KONA) && defined(CONFIG_KONA_01_BD) +#include "gpio-rev01-kona.h" #elif defined(CONFIG_MACH_GC1) #include "gpio-rev00-gc1.h" #elif defined(CONFIG_MACH_T0_CHN_CTC) diff --git a/arch/arm/mach-exynos/include/mach/gpio-rev00-kona.h b/arch/arm/mach-exynos/include/mach/gpio-rev00-kona.h new file mode 100644 index 0000000..dc4d0f5 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/gpio-rev00-kona.h @@ -0,0 +1,309 @@ +#ifndef __MACH_GPIO_MIDAS_H +#define __MACH_GPIO_MIDAS_H __FILE__ + +#include <mach/gpio.h> + +extern void midas_config_gpio_table(void); +extern void midas_config_sleep_gpio_table(void); + +/* GPA0 */ +#define GPIO_BT_RXD EXYNOS4_GPA0(0) +#define GPIO_BT_RXD_AF 2 +#define GPIO_BT_TXD EXYNOS4_GPA0(1) +#define GPIO_BT_TXD_AF 2 +#define GPIO_BT_CTS EXYNOS4_GPA0(2) +#define GPIO_BT_CTS_AF 2 +#define GPIO_BT_RTS EXYNOS4_GPA0(3) +#define GPIO_BT_RTS_AF 2 +#define GPIO_GPS_RXD EXYNOS4_GPA0(4) +#define GPIO_GPS_RXD_AF 2 +#define GPIO_GPS_TXD EXYNOS4_GPA0(5) +#define GPIO_GPS_TXD_AF 2 +#define GPIO_GPS_CTS EXYNOS4_GPA0(6) +#define GPIO_GPS_CTS_AF 2 +#define GPIO_GPS_RTS EXYNOS4_GPA0(7) +#define GPIO_GPS_RTS_AF 2 + +/* GPA1 */ +#define GPIO_AP_RXD EXYNOS4_GPA1(0) +#define GPIO_AP_TXD EXYNOS4_GPA1(1) +#define GPIO_TSP_SDA_18V EXYNOS4_GPA1(2) +#define GPIO_TSP_SCL_18V EXYNOS4_GPA1(3) +#define GPIO_DOCK_RXD EXYNOS4_GPA1(4) +#define GPIO_DOCK_TXD EXYNOS4_GPA1(5) + +/* GPB */ +#define GPIO_CODEC_SDA_18V_00 EXYNOS4_GPB(0) +#define GPIO_CODEC_SCL_18V_00 EXYNOS4_GPB(1) +#define GPIO_MHL_SDA_1_8V_00 EXYNOS4_GPB(2) +#define GPIO_MHL_SCL_1_8V_00 EXYNOS4_GPB(3) + +/* GPC0 */ +#define GPIO_PCM_CLK EXYNOS4_GPC0(0) +#define GPIO_LCD_EN EXYNOS4_GPC0(1) +#define GPIO_LCD_22V_EN_00 EXYNOS4_GPC0(1) +#define GPIO_PCM_SYNC EXYNOS4_GPC0(2) +#define GPIO_PCM_IN EXYNOS4_GPC0(3) +#define GPIO_PCM_OUT EXYNOS4_GPC0(4) + +/* GPC1 */ +#define GPIO_PEN_PDCT EXYNOS4_GPC1(0) +#define GPIO_PEN_LDO_EN EXYNOS4_GPC1(1) +#define GPIO_PEN_IRQ EXYNOS4_GPC1(2) +#define GPIO_PEN_SDA EXYNOS4_GPC1(3) +#define GPIO_PEN_SCL EXYNOS4_GPC1(4) + +/* GPD0 */ +#define GPIO_VIBTONE_PWM EXYNOS4_GPD0(0) +#define GPIO_LED_BACKLIGHT_PWM EXYNOS4_GPD0(1) +#define GPIO_PMIC_SDA EXYNOS4_GPD0(2) +#define GPIO_PMIC_SCL EXYNOS4_GPD0(3) + +/* GPD1 */ +#define GPIO_5M_CAM_SCL EXYNOS4_GPD1(0) +#define GPIO_5M_CAM_SDA EXYNOS4_GPD1(1) +#define GPIO_GSENSE_SDA_18V EXYNOS4_GPD1(2) +#define GPIO_GSENSE_SCL_18V EXYNOS4_GPD1(3) + +/* GPF0 */ +#define GPIO_LCD_FREQ_SCL EXYNOS4_GPF0(4) +#define GPIO_LCD_FREQ_SDA EXYNOS4_GPF0(5) + +/* GPF1 */ +#define GPIO_MDM2AP_HSIC_READY EXYNOS4_GPF1(1) +#define GPIO_AP2MDM_STATUS EXYNOS4_GPF1(6) +#if defined(CONFIG_QC_MODEM) +#define GPIO_TSP_VENDOR1 EXYNOS4_GPF1(3) +#else +#define GPIO_TSP_VENDOR1 EXYNOS4_GPF1(6) +#endif +#define GPIO_TSP_VENDOR2 EXYNOS4_GPF1(7) + +/* GPF2 */ +#define GPIO_VT_CAM_nSTBY EXYNOS4_GPF2(1) +#define GPIO_MDM2AP_HSIC_PWR_ACTIVE EXYNOS4_GPF2(2) +#define GPIO_WCN_PRIORITY EXYNOS4_GPF2(3) +#define GPIO_MDM_LTE_FRAME_SYNC EXYNOS4_GPF2(4) +#define GPIO_WLAN_WAKE EXYNOS4_GPF2(5) +#define GPIO_BT_NEW_WAKE EXYNOS4_GPF2(6) + +/* GPF3 */ +#if defined(CONFIG_QC_MODEM) +#define GPIO_BUCK2_NEW_SEL EXYNOS4_GPF3(0) +#define GPIO_BUCK3_SEL EXYNOS4_GPF3(1) +#define GPIO_BUCK4_SEL EXYNOS4_GPF3(2) +#define GPIO_CHG_INT EXYNOS4_GPF3(3) +#else +#define GPIO_BUCK3_NEW_SEL EXYNOS4_GPF3(2) +#define GPIO_BUCK4_NEW_SEL EXYNOS4_GPF3(3) +#endif +#define GPIO_MHL_RST EXYNOS4_GPF3(4) +#define GPIO_MHL_INT EXYNOS4_GPF3(5) + +/* GPJ0 */ +#define GPIO_AP2MDM_ERR_FATAL EXYNOS4212_GPJ0(1) +#define GPIO_SUB_MIC_BIAS_EN EXYNOS4212_GPJ0(3) +#define GPIO_EAR_SND_SEL EXYNOS4212_GPJ0(4) +#define GPIO_CAM_EN2 EXYNOS4212_GPJ0(5) +#define GPIO_CAM_EN1 EXYNOS4212_GPJ0(6) +#define GPIO_5M_nSTBY EXYNOS4212_GPJ0(7) + +/* GPJ1 */ +#define GPIO_VT_CAM_nRST EXYNOS4212_GPJ1(0) +#define GPIO_PS_ALS_EN EXYNOS4212_GPJ1(1) +#define GPIO_LINEOUT_EN EXYNOS4212_GPJ1(2) +#define GPIO_CAM_MCLK EXYNOS4212_GPJ1(3) +#define GPIO_MHL_INT_AF S3C_GPIO_SFN(0xF) +#define MHL_INT_IRQ gpio_to_irq(GPIO_MHL_INT) +#define GPIO_MHL_WAKE_UP EXYNOS4212_GPJ1(4) +#define MHL_WAKEUP_IRQ gpio_to_irq(GPIO_MHL_WAKE_UP) +//#define GPIO_CAM_SW_EN EXYNOS4212_GPJ1(0) +//#define GPIO_TORCH_SET EXYNOS4212_GPJ1(2) + +/* GPK0 */ +#define GPIO_eMMC_CLK EXYNOS4_GPK0(0) +#define GPIO_eMMC_CMD EXYNOS4_GPK0(1) +#define GPIO_eMMC_EN EXYNOS4_GPK0(2) +#define GPIO_eMMC_D0 EXYNOS4_GPK0(3) +#define GPIO_eMMC_D1 EXYNOS4_GPK0(4) +#define GPIO_eMMC_D2 EXYNOS4_GPK0(5) +#define GPIO_eMMC_D3 EXYNOS4_GPK0(6) + +/* GPK1 */ +#define GPIO_eMMC_D4 EXYNOS4_GPK1(3) +#define GPIO_eMMC_D5 EXYNOS4_GPK1(4) +#define GPIO_eMMC_D6 EXYNOS4_GPK1(5) +#define GPIO_eMMC_D7 EXYNOS4_GPK1(6) + +/* GPK2 */ +#define GPIO_TFLASH_CLK EXYNOS4_GPK2(0) +#define GPIO_TFLASH_CMD EXYNOS4_GPK2(1) +#define GPIO_TFLASH_D0 EXYNOS4_GPK2(3) +#define GPIO_TFLASH_D1 EXYNOS4_GPK2(4) +#define GPIO_TFLASH_D2 EXYNOS4_GPK2(5) +#define GPIO_TFLASH_D3 EXYNOS4_GPK2(6) + +/* GPK3 */ +#define GPIO_WLAN_SDIO_CLK EXYNOS4_GPK3(0) +#define GPIO_WLAN_SDIO_CLK_AF 2 +#define GPIO_WLAN_SDIO_CMD EXYNOS4_GPK3(1) +#define GPIO_WLAN_SDIO_CMD_AF 2 +#define GPIO_WLAN_SDIO_D0 EXYNOS4_GPK3(3) +#define GPIO_WLAN_SDIO_D0_AF 2 +#define GPIO_WLAN_SDIO_D1 EXYNOS4_GPK3(4) +#define GPIO_WLAN_SDIO_D1_AF 2 +#define GPIO_WLAN_SDIO_D2 EXYNOS4_GPK3(5) +#define GPIO_WLAN_SDIO_D2_AF 2 +#define GPIO_WLAN_SDIO_D3 EXYNOS4_GPK3(6) +#define GPIO_WLAN_SDIO_D3_AF 2 + +/* GPL0 */ +#define GPIO_ACTIVE_STATE EXYNOS4_GPL0(0) +#define GPIO_AP2MDM_PMIC_RESET_N EXYNOS4_GPL0(0) +#define GPIO_PS_ALS_SCL_28V EXYNOS4_GPL0(1) +#define GPIO_PS_ALS_SDA_28V EXYNOS4_GPL0(2) +#define GPIO_IRDA_WAKE EXYNOS4_GPL0(3) +#define GPIO_HDMI_EN EXYNOS4_GPL0(4) +#define GPIO_BT_EN EXYNOS4_GPL0(6) + +/* GPL1 */ +#define GPIO_PDA_ACTIVE EXYNOS4_GPL1(0) +#define GPIO_5M_nRST EXYNOS4_GPL1(1) + +/* GPL2 */ +#define GPIO_GYRO_DE EXYNOS4_GPL2(0) +#define GPIO_IRDA_EN EXYNOS4_GPL2(1) +#define GPIO_GPS_PWR_EN EXYNOS4_GPL2(2) +#define GPIO_MOTOR_EN EXYNOS4_GPL2(4) +#define GPIO_PHONE_ON EXYNOS4_GPL2(5) +#define GPIO_AP2MDM_PON_RESET_N EXYNOS4_GPL2(5) +#define GPIO_ACCESSORY_EN EXYNOS4_GPL2(6) +#define GPIO_UART_SEL EXYNOS4_GPL2(7) + +/* GPM0 */ +#define GPIO_MIC_BIAS_EN EXYNOS4212_GPM0(0) +#define GPIO_LED_BACKLIGHT_RESET EXYNOS4212_GPM0(1) +#define GPIO_TSP_2TOUCH_EN EXYNOS4212_GPM0(5) +#define GPIO_IRDA_IRQ EXYNOS4212_GPM0(6) + +/* GPM1 */ +#define GPIO_LED_BACKLIGHT_SDA EXYNOS4212_GPM1(0) +#define GPIO_LED_BACKLIGHT_SCL EXYNOS4212_GPM1(1) +#define GPIO_HW_REV0 EXYNOS4212_GPM1(2) +#define GPIO_HW_REV1 EXYNOS4212_GPM1(3) +#define GPIO_HW_REV2 EXYNOS4212_GPM1(4) +#define GPIO_HW_REV3 EXYNOS4212_GPM1(5) + +/* GPM2 */ +#define GPIO_CHG_SDA EXYNOS4212_GPM2(0) +#define GPIO_CHG_SCL EXYNOS4212_GPM2(1) +#define GPIO_VTCAM_MCLK EXYNOS4212_GPM2(2) +#define GPIO_TSP_INT EXYNOS4212_GPM2(3) +#define GPIO_SUSPEND_REQUEST EXYNOS4212_GPM2(4) +#define GPIO_AP2MDM_WAKEUP EXYNOS4212_GPM2(4) + +/* GPM3 */ +#define GPIO_PMIC_DVS1 EXYNOS4212_GPM3(0) +#define GPIO_PMIC_DVS2 EXYNOS4212_GPM3(1) +#define GPIO_PMIC_DVS3 EXYNOS4212_GPM3(2) +#define GPIO_CP_REQ_RESET EXYNOS4212_GPM3(3) +#define GPIO_AP2MDM_SOFT_RESET EXYNOS4212_GPM3(3) +#define GPIO_AP_DUMP_INT EXYNOS4212_GPM3(4) +#define GPIO_WLAN_EN EXYNOS4212_GPM3(5) +#define GPIO_WLAN_EN_AF 1 +#define GPIO_CP_DUMP_INT EXYNOS4212_GPM3(6) + +/* GPM4 */ +#define GPIO_ADC_SCL EXYNOS4212_GPM4(0) +#define GPIO_ADC_SDA EXYNOS4212_GPM4(1) +#define GPIO_VT_CAM_SCL_18V EXYNOS4212_GPM4(2) +#define GPIO_VT_CAM_SDA_18V EXYNOS4212_GPM4(3) +#define GPIO_CODEC_LDO_EN EXYNOS4212_GPM4(4) +#define GPIO_WM8994_LDO EXYNOS4212_GPM4(4) +#define GPIO_TSP_LDO_ON EXYNOS4212_GPM4(5) +#define GPIO_OTG_EN EXYNOS4212_GPM4(6) + +/* GPX0 */ +#define GPIO_ACC_INT EXYNOS4_GPX0(0) +#define GPIO_ADC_INT EXYNOS4_GPX0(1) +#define GPIO_PS_ALS_INT EXYNOS4_GPX0(2) +#define GPIO_EAR_SEND_END_LTE EXYNOS4_GPX0(2) +#define GPIO_HALL_SENSOR_INT EXYNOS4_GPX0(3) +#define GPIO_DOCK_INT EXYNOS4_GPX0(4) +#define GPIO_MDM2AP_STATUS EXYNOS4_GPX0(5) +#if !defined(CONFIG_QC_MODEM) +#define GPIO_REMOTE_SENSE_IRQ EXYNOS4_GPX0(5) +#endif +#define GPIO_GYRO_INT EXYNOS4_GPX0(6) +#if !defined(CONFIG_QC_MODEM) +#define GPIO_CHG_INT EXYNOS4_GPX0(6) +#endif +#define GPIO_MDM2AP_HSIC_RESUME_REQ EXYNOS4_GPX0(6) +#define GPIO_PMIC_IRQ EXYNOS4_GPX0(7) + +/* GPX1 */ +#define GPIO_IPC_SLAVE_WAKEUP EXYNOS4_GPX1(0) +#define GPIO_AP2MDM_VDDMIN EXYNOS4_GPX1(0) +#define GPIO_MDM2AP_VDDMIN EXYNOS4_GPX1(1) +#define GPIO_IPC_HOST_WAKEUP EXYNOS4_GPX1(1) +#if !defined(CONFIG_QC_MODEM) +#define GPIO_OK_KEY_ANDROID EXYNOS4_GPX1(2) +#endif +#define GPIO_MDM2AP_ERR_FATAL EXYNOS4_GPX1(2) +#define GPIO_ACCESSORY_INT EXYNOS4_GPX1(3) +#define GPIO_TA_nCONNECTED EXYNOS4_GPX1(4) +#define GPIO_PEN_DETECT EXYNOS4_GPX1(5) +#define GPIO_PHONE_ACTIVE EXYNOS4_GPX1(6) +#define GPIO_MDM_LTE_ACTIVE EXYNOS4_GPX1(6) +#define GPIO_SIM_DETECT EXYNOS4_GPX1(7) + +/* GPX2 */ +#if !defined(CONFIG_QC_MODEM) +#define GPIO_BUCK3_SEL EXYNOS4_GPX2(0) +#define GPIO_BUCK4_SEL EXYNOS4_GPX2(1) +#else +#define GPIO_REMOTE_SENSE_IRQ EXYNOS4_GPX2(0) +#define GPIO_OK_KEY_ANDROID EXYNOS4_GPX2(1) +#endif +#define GPIO_VOL_UP EXYNOS4_GPX2(2) +#define GPIO_FUEL_ALERT EXYNOS4_GPX2(3) +#define GPIO_BUCK2_SEL EXYNOS4_GPX2(4) +#define GPIO_EAR_DET_LTE EXYNOS4_GPX2(4) +#define GPIO_WLAN_HOST_WAKE EXYNOS4_GPX2(5) +#define GPIO_WLAN_HOST_WAKE_AF 0xF +#define GPIO_BT_HOST_WAKE EXYNOS4_GPX2(6) +#define IRQ_BT_HOST_WAKE IRQ_EINT(22) +#define GPIO_nPOWER EXYNOS4_GPX2(7) + +/* GPX3 */ +#define GPIO_IF_CON_SENSE EXYNOS4_GPX3(0) +#define GPIO_BT_WAKE EXYNOS4_GPX3(1) +#define GPIO_CHG_NEW_INT EXYNOS4_GPX3(1) +#define GPIO_AP2MDM_HSIC_PORT_ACTIVE EXYNOS4_GPX3(2) +#define GPIO_CP_RST EXYNOS4_GPX3(2) +#define GPIO_VOL_DOWN EXYNOS4_GPX3(3) +#define GPIO_TFLASH_DETECT EXYNOS4_GPX3(4) +#define GPIO_ACCESSORY_OUT_5V EXYNOS4_GPX3(5) +#define GPIO_EAR_SEND_END EXYNOS4_GPX3(6) +#define GPIO_HDMI_HPD EXYNOS4_GPX3(7) + +/* GPY0 */ +#define GPIO_IRDA_SDA EXYNOS4_GPY0(0) +#define GPIO_IRDA_SCL EXYNOS4_GPY0(1) +#define GPIO_FUEL_SDA EXYNOS4_GPY0(2) +#define GPIO_FUEL_SCL EXYNOS4_GPY0(3) +#define GPIO_USB_SEL0 EXYNOS4_GPY0(4) +#define GPIO_USB_SEL1 EXYNOS4_GPY0(5) + +/* GPY1 */ +#define GPIO_PEN_FWE1 EXYNOS4_GPY1(3) + +/* GPY2 */ +#define GPIO_TF_EN EXYNOS4_GPY2(0) +#define GPIO_UART_SEL2 EXYNOS4_GPY2(1) +#define GPIO_MHL_SDA_1_8V EXYNOS4_GPY2(2) +#define GPIO_MHL_SCL_1_8V EXYNOS4_GPY2(3) +#define GPIO_MSENSOR_SDA_18V EXYNOS4_GPY2(4) +#define GPIO_MSENSOR_SCL_18V EXYNOS4_GPY2(5) + +#endif /* __MACH_GPIO_MIDAS_H */ diff --git a/arch/arm/mach-exynos/include/mach/gpio-rev01-kona.h b/arch/arm/mach-exynos/include/mach/gpio-rev01-kona.h new file mode 100644 index 0000000..17ecf27 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/gpio-rev01-kona.h @@ -0,0 +1,286 @@ +#ifndef __MACH_GPIO_MIDAS_H +#define __MACH_GPIO_MIDAS_H __FILE__ + +#include <mach/gpio.h> + +extern void midas_config_gpio_table(void); +extern void midas_config_sleep_gpio_table(void); + +/* GPA0 */ +#define GPIO_BT_RXD EXYNOS4_GPA0(0) +#define GPIO_BT_RXD_AF 2 +#define GPIO_BT_TXD EXYNOS4_GPA0(1) +#define GPIO_BT_TXD_AF 2 +#define GPIO_BT_CTS EXYNOS4_GPA0(2) +#define GPIO_BT_CTS_AF 2 +#define GPIO_BT_RTS EXYNOS4_GPA0(3) +#define GPIO_BT_RTS_AF 2 +#define GPIO_GPS_RXD EXYNOS4_GPA0(4) +#define GPIO_GPS_RXD_AF 2 +#define GPIO_GPS_TXD EXYNOS4_GPA0(5) +#define GPIO_GPS_TXD_AF 2 +#define GPIO_GPS_CTS EXYNOS4_GPA0(6) +#define GPIO_GPS_CTS_AF 2 +#define GPIO_GPS_RTS EXYNOS4_GPA0(7) +#define GPIO_GPS_RTS_AF 2 + +/* GPA1 */ +#define GPIO_AP_RXD EXYNOS4_GPA1(0) +#define GPIO_AP_TXD EXYNOS4_GPA1(1) +#define GPIO_TSP_SDA_18V EXYNOS4_GPA1(2) +#define GPIO_TSP_SCL_18V EXYNOS4_GPA1(3) + +/* GPB */ +#define GPIO_CODEC_SDA_18V_00 EXYNOS4_GPB(0) +#define GPIO_CODEC_SCL_18V_00 EXYNOS4_GPB(1) +#define GPIO_MHL_SDA_1_8V_00 EXYNOS4_GPB(2) +#define GPIO_MHL_SCL_1_8V_00 EXYNOS4_GPB(3) + +/* GPC0 */ +#define GPIO_PCM_CLK EXYNOS4_GPC0(0) +#define GPIO_LCD_EN EXYNOS4_GPC0(1) +#define GPIO_LCD_22V_EN_00 EXYNOS4_GPC0(1) +#define GPIO_PCM_SYNC EXYNOS4_GPC0(2) +#define GPIO_PCM_IN EXYNOS4_GPC0(3) +#define GPIO_PCM_OUT EXYNOS4_GPC0(4) + +/* GPC1 */ +#define GPIO_PEN_PDCT EXYNOS4_GPC1(0) +#define GPIO_PEN_LDO_EN EXYNOS4_GPC1(1) +#define GPIO_PEN_IRQ EXYNOS4_GPC1(2) +#define GPIO_PEN_SDA EXYNOS4_GPC1(3) +#define GPIO_PEN_SCL EXYNOS4_GPC1(4) + +/* GPD0 */ +#define GPIO_VIBTONE_PWM EXYNOS4_GPD0(0) +#define GPIO_LED_BACKLIGHT_PWM EXYNOS4_GPD0(1) +#define GPIO_PMIC_SDA EXYNOS4_GPD0(2) +#define GPIO_PMIC_SCL EXYNOS4_GPD0(3) + +/* GPD1 */ +#define GPIO_5M_CAM_SCL EXYNOS4_GPD1(0) +#define GPIO_5M_CAM_SDA EXYNOS4_GPD1(1) +#define GPIO_GSENSE_SDA_18V EXYNOS4_GPD1(2) +#define GPIO_GSENSE_SCL_18V EXYNOS4_GPD1(3) + +/* GPF0 */ +#define GPIO_LCD_FREQ_SCL EXYNOS4_GPF0(4) +#define GPIO_LCD_FREQ_SDA EXYNOS4_GPF0(5) + +/* GPF1 */ +#define GPIO_MDM2AP_HSIC_READY EXYNOS4_GPF1(1) +#define GPIO_AP2MDM_STATUS EXYNOS4_GPF1(6) +#if defined(CONFIG_QC_MODEM) +#define GPIO_TSP_VENDOR1 EXYNOS4_GPF1(3) +#else +#define GPIO_TSP_VENDOR1 EXYNOS4_GPF1(6) +#endif +#define GPIO_TSP_VENDOR2 EXYNOS4_GPF1(7) + +/* GPF2 */ +#define GPIO_VT_CAM_nSTBY EXYNOS4_GPF2(1) +#define GPIO_MDM2AP_HSIC_PWR_ACTIVE EXYNOS4_GPF2(2) +#define GPIO_WCN_PRIORITY EXYNOS4_GPF2(3) +#define GPIO_MDM_LTE_FRAME_SYNC EXYNOS4_GPF2(4) +#define GPIO_WLAN_WAKE EXYNOS4_GPF2(5) +#define GPIO_BT_NEW_WAKE EXYNOS4_GPF2(6) + +/* GPF3 */ +#if defined(CONFIG_QC_MODEM) +#define GPIO_BUCK2_SEL EXYNOS4_GPF3(0) +#define GPIO_BUCK3_SEL EXYNOS4_GPF3(1) +#define GPIO_BUCK4_SEL EXYNOS4_GPF3(2) +#define GPIO_CHG_INT EXYNOS4_GPF3(3) +#else +#define GPIO_BUCK3_SEL EXYNOS4_GPF3(2) +#define GPIO_BUCK4_SEL EXYNOS4_GPF3(3) +#endif +#define GPIO_MHL_RST EXYNOS4_GPF3(4) +#define GPIO_MHL_INT EXYNOS4_GPF3(5) + +/* GPJ0 */ +#define GPIO_AP2MDM_ERR_FATAL EXYNOS4212_GPJ0(1) +#define GPIO_SUB_MIC_BIAS_EN EXYNOS4212_GPJ0(3) +#define GPIO_EAR_SND_SEL EXYNOS4212_GPJ0(4) +#define GPIO_CAM_EN2 EXYNOS4212_GPJ0(5) +#define GPIO_CAM_EN1 EXYNOS4212_GPJ0(6) +#define GPIO_5M_nSTBY EXYNOS4212_GPJ0(7) + +/* GPJ1 */ +#define GPIO_VT_CAM_nRST EXYNOS4212_GPJ1(0) +#define GPIO_PS_ALS_EN EXYNOS4212_GPJ1(1) +#define GPIO_LINEOUT_EN EXYNOS4212_GPJ1(2) +#define GPIO_CAM_MCLK EXYNOS4212_GPJ1(3) +#define GPIO_MHL_INT_AF S3C_GPIO_SFN(0xF) +#define MHL_INT_IRQ gpio_to_irq(GPIO_MHL_INT) +#define GPIO_MHL_WAKE_UP EXYNOS4212_GPJ1(4) +#define MHL_WAKEUP_IRQ gpio_to_irq(GPIO_MHL_WAKE_UP) +//#define GPIO_CAM_SW_EN EXYNOS4212_GPJ1(0) +//#define GPIO_TORCH_SET EXYNOS4212_GPJ1(2) + +/* GPK0 */ +#define GPIO_eMMC_CLK EXYNOS4_GPK0(0) +#define GPIO_eMMC_CMD EXYNOS4_GPK0(1) +#define GPIO_eMMC_EN EXYNOS4_GPK0(2) +#define GPIO_eMMC_D0 EXYNOS4_GPK0(3) +#define GPIO_eMMC_D1 EXYNOS4_GPK0(4) +#define GPIO_eMMC_D2 EXYNOS4_GPK0(5) +#define GPIO_eMMC_D3 EXYNOS4_GPK0(6) + +/* GPK1 */ +#define GPIO_eMMC_D4 EXYNOS4_GPK1(3) +#define GPIO_eMMC_D5 EXYNOS4_GPK1(4) +#define GPIO_eMMC_D6 EXYNOS4_GPK1(5) +#define GPIO_eMMC_D7 EXYNOS4_GPK1(6) + +/* GPK2 */ +#define GPIO_TFLASH_CLK EXYNOS4_GPK2(0) +#define GPIO_TFLASH_CMD EXYNOS4_GPK2(1) +#define GPIO_TFLASH_D0 EXYNOS4_GPK2(3) +#define GPIO_TFLASH_D1 EXYNOS4_GPK2(4) +#define GPIO_TFLASH_D2 EXYNOS4_GPK2(5) +#define GPIO_TFLASH_D3 EXYNOS4_GPK2(6) + +/* GPK3 */ +#define GPIO_WLAN_SDIO_CLK EXYNOS4_GPK3(0) +#define GPIO_WLAN_SDIO_CLK_AF 2 +#define GPIO_WLAN_SDIO_CMD EXYNOS4_GPK3(1) +#define GPIO_WLAN_SDIO_CMD_AF 2 +#define GPIO_WLAN_SDIO_D0 EXYNOS4_GPK3(3) +#define GPIO_WLAN_SDIO_D0_AF 2 +#define GPIO_WLAN_SDIO_D1 EXYNOS4_GPK3(4) +#define GPIO_WLAN_SDIO_D1_AF 2 +#define GPIO_WLAN_SDIO_D2 EXYNOS4_GPK3(5) +#define GPIO_WLAN_SDIO_D2_AF 2 +#define GPIO_WLAN_SDIO_D3 EXYNOS4_GPK3(6) +#define GPIO_WLAN_SDIO_D3_AF 2 + +/* GPL0 */ +#define GPIO_ACTIVE_STATE EXYNOS4_GPL0(0) +#define GPIO_AP2MDM_PMIC_RESET_N EXYNOS4_GPL0(0) +#define GPIO_PS_ALS_SCL_28V EXYNOS4_GPL0(1) +#define GPIO_PS_ALS_SDA_28V EXYNOS4_GPL0(2) +#define GPIO_IRDA_WAKE EXYNOS4_GPL0(3) +#define GPIO_HDMI_EN EXYNOS4_GPL0(4) +#define GPIO_BT_EN EXYNOS4_GPL0(6) + +/* GPL1 */ +#define GPIO_PDA_ACTIVE EXYNOS4_GPL1(0) +#define GPIO_5M_nRST EXYNOS4_GPL1(1) + +/* GPL2 */ +#define GPIO_GYRO_DE EXYNOS4_GPL2(0) +#define GPIO_IRDA_EN EXYNOS4_GPL2(1) +#define GPIO_GPS_PWR_EN EXYNOS4_GPL2(2) +#define GPIO_PHONE_ON EXYNOS4_GPL2(5) +#define GPIO_AP2MDM_PON_RESET_N EXYNOS4_GPL2(5) + +/* GPM0 */ +#define GPIO_MIC_BIAS_EN EXYNOS4212_GPM0(0) +#define GPIO_LED_BACKLIGHT_RESET EXYNOS4212_GPM0(1) +#define GPIO_TSP_2TOUCH_EN EXYNOS4212_GPM0(5) +#define GPIO_IRDA_IRQ EXYNOS4212_GPM0(6) + +/* GPM1 */ +#define GPIO_LED_BACKLIGHT_SDA EXYNOS4212_GPM1(0) +#define GPIO_LED_BACKLIGHT_SCL EXYNOS4212_GPM1(1) +#define GPIO_HW_REV0 EXYNOS4212_GPM1(2) +#define GPIO_HW_REV1 EXYNOS4212_GPM1(3) +#define GPIO_HW_REV2 EXYNOS4212_GPM1(4) +#define GPIO_HW_REV3 EXYNOS4212_GPM1(5) + +/* GPM2 */ +#define GPIO_IF_PMIC_SDA EXYNOS4212_GPM2(0) +#define GPIO_IF_PMIC_SCL EXYNOS4212_GPM2(1) +#define GPIO_VTCAM_MCLK EXYNOS4212_GPM2(2) +#define GPIO_TSP_INT EXYNOS4212_GPM2(3) +#define GPIO_SUSPEND_REQUEST EXYNOS4212_GPM2(4) +#define GPIO_AP2MDM_WAKEUP EXYNOS4212_GPM2(4) + +/* GPM3 */ +#define GPIO_PMIC_DVS1 EXYNOS4212_GPM3(0) +#define GPIO_PMIC_DVS2 EXYNOS4212_GPM3(1) +#define GPIO_PMIC_DVS3 EXYNOS4212_GPM3(2) +#define GPIO_CP_REQ_RESET EXYNOS4212_GPM3(3) +#define GPIO_AP2MDM_SOFT_RESET EXYNOS4212_GPM3(3) +#define GPIO_AP_DUMP_INT EXYNOS4212_GPM3(4) +#define GPIO_WLAN_EN EXYNOS4212_GPM3(5) +#define GPIO_WLAN_EN_AF 1 +#define GPIO_CP_DUMP_INT EXYNOS4212_GPM3(6) + +/* GPM4 */ +#define GPIO_VT_CAM_SCL_18V EXYNOS4212_GPM4(2) +#define GPIO_VT_CAM_SDA_18V EXYNOS4212_GPM4(3) +#define GPIO_CODEC_LDO_EN EXYNOS4212_GPM4(4) +#define GPIO_WM8994_LDO EXYNOS4212_GPM4(4) +#define GPIO_TSP_LDO_ON EXYNOS4212_GPM4(5) + +/* GPX0 */ +#define GPIO_ACC_INT EXYNOS4_GPX0(0) +#define GPIO_BOOT_MODE EXYNOS4_GPX0(1) +#define GPIO_PS_ALS_INT EXYNOS4_GPX0(2) +#define GPIO_EAR_SEND_END_LTE EXYNOS4_GPX0(2) +#define GPIO_HALL_SENSOR_INT EXYNOS4_GPX0(3) +#define GPIO_MDM2AP_STATUS EXYNOS4_GPX0(5) +#define GPIO_MDM2AP_HSIC_RESUME_REQ EXYNOS4_GPX0(6) +#define GPIO_PMIC_IRQ EXYNOS4_GPX0(7) + +/* GPX1 */ +#define GPIO_IPC_SLAVE_WAKEUP EXYNOS4_GPX1(0) +#define GPIO_AP2MDM_VDDMIN EXYNOS4_GPX1(0) +#define GPIO_MDM2AP_VDDMIN EXYNOS4_GPX1(1) +#define GPIO_IPC_HOST_WAKEUP EXYNOS4_GPX1(1) +#if !defined(CONFIG_QC_MODEM) +#define GPIO_OK_KEY_ANDROID EXYNOS4_GPX1(2) +#endif +#define GPIO_MDM2AP_ERR_FATAL EXYNOS4_GPX1(2) +#define GPIO_IF_PMIC_IRQ EXYNOS4_GPX1(4) +#define GPIO_PEN_DETECT EXYNOS4_GPX1(5) +#define GPIO_PHONE_ACTIVE EXYNOS4_GPX1(6) +#define GPIO_MDM_LTE_ACTIVE EXYNOS4_GPX1(6) +#define GPIO_SIM_DETECT EXYNOS4_GPX1(7) + +/* GPX2 */ +#if defined(CONFIG_QC_MODEM) +#define GPIO_OK_KEY_ANDROID EXYNOS4_GPX2(1) +#endif +#define GPIO_VOL_UP EXYNOS4_GPX2(2) +#define GPIO_FUEL_ALERT EXYNOS4_GPX2(3) +#if !defined(CONFIG_QC_MODEM) +#define GPIO_BUCK2_SEL EXYNOS4_GPX2(4) +#endif +#define GPIO_EAR_DET_LTE EXYNOS4_GPX2(4) +#define GPIO_WLAN_HOST_WAKE EXYNOS4_GPX2(5) +#define GPIO_WLAN_HOST_WAKE_AF 0xF +#define GPIO_BT_HOST_WAKE EXYNOS4_GPX2(6) +#define IRQ_BT_HOST_WAKE IRQ_EINT(22) +#define GPIO_nPOWER EXYNOS4_GPX2(7) + +/* GPX3 */ +#define GPIO_PMIC_JIGONB EXYNOS4_GPX3(0) +#define GPIO_BT_WAKE EXYNOS4_GPX3(1) +#define GPIO_AP2MDM_HSIC_PORT_ACTIVE EXYNOS4_GPX3(2) +#define GPIO_CP_RST EXYNOS4_GPX3(2) +#define GPIO_VOL_DOWN EXYNOS4_GPX3(3) +#define GPIO_TFLASH_DETECT EXYNOS4_GPX3(4) +#define GPIO_OTG_EN EXYNOS4_GPX3(5) +#define GPIO_EAR_SEND_END EXYNOS4_GPX3(6) +#define GPIO_HDMI_HPD EXYNOS4_GPX3(7) + +/* GPY0 */ +#define GPIO_IRDA_SDA EXYNOS4_GPY0(0) +#define GPIO_IRDA_SCL EXYNOS4_GPY0(1) +#define GPIO_FUEL_SDA EXYNOS4_GPY0(2) +#define GPIO_FUEL_SCL EXYNOS4_GPY0(3) + +/* GPY1 */ +#define GPIO_PEN_FWE1 EXYNOS4_GPY1(3) + +/* GPY2 */ +#define GPIO_TF_EN EXYNOS4_GPY2(0) +#define GPIO_MHL_SDA_1_8V EXYNOS4_GPY2(2) +#define GPIO_MHL_SCL_1_8V EXYNOS4_GPY2(3) +#define GPIO_MSENSOR_SDA_18V EXYNOS4_GPY2(4) +#define GPIO_MSENSOR_SCL_18V EXYNOS4_GPY2(5) + +#endif /* __MACH_GPIO_MIDAS_H */ diff --git a/arch/arm/mach-exynos/include/mach/kona-input.h b/arch/arm/mach-exynos/include/mach/kona-input.h new file mode 100644 index 0000000..24e46b1 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/kona-input.h @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-exynos/include/mach/p4-input.h + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __kona_INPUT_H +#define __kona_INPUT_H __FILE__ + +void kona_tsp_init(u32 system_rev); +void kona_key_init(void); +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301) +extern void synaptics_ts_charger_infom(bool en); +#endif + +#endif /* __kona_INPUT_H */ diff --git a/arch/arm/mach-exynos/include/mach/kona-sensor.h b/arch/arm/mach-exynos/include/mach/kona-sensor.h new file mode 100644 index 0000000..5739a2f --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/kona-sensor.h @@ -0,0 +1,16 @@ +/* + * arch/arm/mach-exynos/include/mach/kona-sensor.h + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __kona_SENSOR_H +#define __kona_SENSOR_H __FILE__ + +int kona_sensor_init(void); + +#endif /* __kona_INPUT_H */ diff --git a/arch/arm/mach-exynos/include/mach/usb_switch.h b/arch/arm/mach-exynos/include/mach/usb_switch.h index a5340e5..b39a4f6 100644 --- a/arch/arm/mach-exynos/include/mach/usb_switch.h +++ b/arch/arm/mach-exynos/include/mach/usb_switch.h @@ -8,7 +8,7 @@ enum usb_path_t { USB_PATH_ADCCHECK = (1 << 28), USB_PATH_TA = (1 << 24), USB_PATH_CP = (1 << 20), -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) USB_PATH_AP = (1 << 16), #else USB_PATH_OTG = (1 << 16), diff --git a/arch/arm/mach-exynos/kona-01-gpio.c b/arch/arm/mach-exynos/kona-01-gpio.c new file mode 100644 index 0000000..450bad4 --- /dev/null +++ b/arch/arm/mach-exynos/kona-01-gpio.c @@ -0,0 +1,690 @@ +/* + * linux/arch/arm/mach-exynos/midas-gpio.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS - GPIO setting in set board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* Kona Gpio config history + + * 2013. 02. 02 : jaecheol kim (jc22.kim@samsung.com) + => KONA 3g : GT-N5100_REV0.8_IF_PMIC_0201_1700.pdf + */ + +#include <linux/gpio.h> +#include <linux/serial_core.h> +#include <plat/devs.h> +#include <plat/gpio-cfg.h> +#include <plat/regs-serial.h> +#include <mach/gpio-midas.h> +#include <plat/cpu.h> +#include <mach/pmu.h> + +struct gpio_init_data { + uint num; + uint cfg; + uint val; + uint pud; + uint drv; +}; + +extern int s3c_gpio_slp_cfgpin(unsigned int pin, unsigned int config); +extern int s3c_gpio_slp_setpull_updown(unsigned int pin, unsigned int config); + +#ifdef CONFIG_MIDAS_COMMON +/* + * P4NOTE GPIO Init Table + */ +static struct gpio_init_data kona_init_gpios[] = { + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPA1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* FAC_RXD */ + {EXYNOS4_GPA1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* FAC_TXD */ +#endif + + {EXYNOS4_GPA1(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPA1(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + + {EXYNOS4_GPD0(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD0(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* GSENSE_SDA_1.8V */ + {EXYNOS4_GPD1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* GSENSE_SCL_1.8V */ + + {EXYNOS4_GPF0(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPF0(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF3(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK2_SEL */ + {EXYNOS4_GPF3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK3_SEL */ + {EXYNOS4_GPF3(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK4_SEL */ +#endif + + {EXYNOS4_GPL2(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* MOTOR_EN -> NC */ + {EXYNOS4_GPL2(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* ACCESSORY_EN -> NC */ + {EXYNOS4_GPL2(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* UART_SEL -> NC */ + + {EXYNOS4212_GPM4(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* ADC_I2C_SCL -> NC */ + {EXYNOS4212_GPM4(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* ADC_I2C_SDA -> NC */ + {EXYNOS4212_GPM4(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* USB_OTG_EN -> NC */ + + {EXYNOS4_GPX0(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* ADC_INT */ + {EXYNOS4_GPX0(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* ADC_IC_INT */ +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_MACH_KONA_EUR_LTE) + {EXYNOS4_GPX0(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* PS_ALS_INT */ +#else + {EXYNOS4_GPX0(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* EAR_SEND_END_AP */ +#endif + {EXYNOS4_GPX0(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* COVER_DET */ + {EXYNOS4_GPX0(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* DOCK_INT -> NC*/ +#if !defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX0(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* REMOTE_SENSE_IRQ -> NC */ + {EXYNOS4_GPX0(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* CHG_INT -> NC*/ +#endif + {EXYNOS4_GPX0(7), S3C_GPIO_SFN(0xF), S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* AP_PMIC_IRQ */ + + {EXYNOS4_GPX1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* ACCESSORY_INT -> NC */ + + {EXYNOS4_GPX1(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* OVP_FLAG */ +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX1(7), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* SIM_DETECT */ +#endif + +#if !defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX2(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK3_SEL */ + {EXYNOS4_GPX2(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK4_SEL */ +#endif + {EXYNOS4_GPX2(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* FUEL_ALERT */ + {EXYNOS4_GPX2(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPX2(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* BT_HOST_WAKEUP */ + {EXYNOS4_GPX2(7), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* nPower */ + + {EXYNOS4_GPX3(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* IF_CON_SENSE -> PMIC_JIGONB */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ +#else + {EXYNOS4_GPX3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* BT_WAKE */ +#endif +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPX3(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* CP_PMU_RST */ +#endif + {EXYNOS4_GPX3(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* V_ACCESSORY_5V -> NC*/ + + {EXYNOS4_GPK1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPK1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPK1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + + {EXYNOS4_GPK3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_CMD */ + {EXYNOS4_GPK3(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(0) */ + {EXYNOS4_GPK3(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(1) */ + {EXYNOS4_GPK3(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(2) */ + {EXYNOS4_GPK3(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(3) */ + + {EXYNOS4_GPY0(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY0(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY0(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* USB_SEL0 -> NC */ + {EXYNOS4_GPY0(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* USB_SEL1 -> NC */ + {EXYNOS4_GPY1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPY2(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ +#endif + + {EXYNOS4212_GPJ1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* CAM_MCLK */ + {EXYNOS4212_GPM2(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* VTCAM_MCLK */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPM3(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, +#endif + +#if defined(CONFIG_QC_MODEM) + /* GPIO_AP2MDM_PMIC_RESET_N */ + {EXYNOS4_GPL0(0), + S3C_GPIO_OUTPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_UP, S5P_GPIO_DRVSTR_LV4}, +#endif +}; + +/* + * kona GPIO Sleep Table + */ +static unsigned int kona_sleep_gpio_table[][3] = { + {EXYNOS4_GPA0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* BT_UART_RXD */ + {EXYNOS4_GPA0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* BT_UART_TXD */ + {EXYNOS4_GPA0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* BT_UART_CTS */ + {EXYNOS4_GPA0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* BT_UART_RTS */ +#if !defined(CONFIG_QC_MODEM) + {EXYNOS4_GPA0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* GPS_UART_RXD */ + {EXYNOS4_GPA0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* GPS_UART_TXD */ + {EXYNOS4_GPA0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* GPS_UART_CTS */ + {EXYNOS4_GPA0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* GPS_UART_RTS */ +#else + {EXYNOS4_GPA0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AP_RXD */ + {EXYNOS4_GPA0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AP_TXD */ + {EXYNOS4_GPA0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPA0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPA1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3G : AP_RXD LTE : NC */ + {EXYNOS4_GPA1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3G : AP_TXD LTE : NC */ + {EXYNOS4_GPA1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* TSP_SDA_1.8V */ + {EXYNOS4_GPA1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* TSP_SCL_1.8V */ + {EXYNOS4_GPA1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC*/ + {EXYNOS4_GPA1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPB(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPB(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPB(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPB(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPC0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_CLK(NC) */ + {EXYNOS4_GPC0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_EN */ + {EXYNOS4_GPC0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_SYNC(NC) */ + {EXYNOS4_GPC0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_IN(NC) */ + {EXYNOS4_GPC0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_OUT(NC) */ + + {EXYNOS4_GPC1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_PDCT */ + {EXYNOS4_GPC1(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PEN_LDO_EN */ + + {EXYNOS4_GPC1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_IRQ_1.8V */ + {EXYNOS4_GPC1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_SDA_1.8V */ + {EXYNOS4_GPC1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_SCL_1.8V */ + + {EXYNOS4_GPD0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPD0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* LED_BACKLIGHT_PWM */ + {EXYNOS4_GPD0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPD0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + + {EXYNOS4_GPD1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3M_SDA_1.8V */ + {EXYNOS4_GPD1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3M_SCL_1.8V */ + {EXYNOS4_GPD1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPD1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + + {EXYNOS4_GPF0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_HSYNC */ + {EXYNOS4_GPF0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_VSYNC */ + {EXYNOS4_GPF0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_DE */ + {EXYNOS4_GPF0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_PCLK */ + {EXYNOS4_GPF0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_FREQ_SCL */ + {EXYNOS4_GPF0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_FREQ_SDA */ + {EXYNOS4_GPF0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPF1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MDM2AP_HSIC_READY */ +#else + {EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPF1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR1 */ +#else + {EXYNOS4_GPF1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPF1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF1(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* AP2MDM_STATUS */ +#else + {EXYNOS4_GPF1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR1 */ +#endif + {EXYNOS4_GPF1(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR2 */ + + {EXYNOS4_GPF2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* VT_CAM_nSTBY */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF2(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MDM2AP_HSIC_PWR_ACTIVE */ + {EXYNOS4_GPF2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* WCN_PRIORITY */ + {EXYNOS4_GPF2(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MDM_LTE_FRAME_SYNC */ +#else + {EXYNOS4_GPF2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPF2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF2(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BT_WAKE */ +#else + {EXYNOS4_GPF2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPF2(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF3(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK2_SEL */ + {EXYNOS4_GPF3(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK3_SEL */ + {EXYNOS4_GPF3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK4_SEL */ + {EXYNOS4_GPF3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#else + {EXYNOS4_GPF3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK3_SEL */ + {EXYNOS4_GPF3(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK4_SEL */ +#endif + + {EXYNOS4_GPF3(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* MHL_RST */ + {EXYNOS4_GPF3(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* MHL_INT */ + + /* Exynos4212 specific gpio */ + {EXYNOS4212_GPJ0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_PCLK */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPJ0(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_DOWN}, /*AP2MDM_ERR_FATAL*/ +#else + {EXYNOS4212_GPJ0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4212_GPJ0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPJ0(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* SUB_MICBIAS_EN */ + {EXYNOS4212_GPJ0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* EAR_SND_SEL */ + {EXYNOS4212_GPJ0(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* CAM_EN2 */ + {EXYNOS4212_GPJ0(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* CAM_EN1 */ + {EXYNOS4212_GPJ0(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* 5M_nSTBY */ + + {EXYNOS4212_GPJ1(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* VT_CAM_nRST */ +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_MACH_KONA_EUR_LTE) + {EXYNOS4212_GPJ1(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PS_ALS_EN */ +#else + {EXYNOS4212_GPJ1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4212_GPJ1(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* VPS_SOUND_EN */ + {EXYNOS4212_GPJ1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_MCLK */ + {EXYNOS4212_GPJ1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MLH_WAKE_UP */ + + {EXYNOS4_GPK0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_CLK */ + {EXYNOS4_GPK0(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_CMD */ + {EXYNOS4_GPK0(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* eMMC_EN */ + {EXYNOS4_GPK0(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(0) */ + {EXYNOS4_GPK0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(1) */ + {EXYNOS4_GPK0(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(2) */ + {EXYNOS4_GPK0(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(3) */ + + {EXYNOS4_GPK1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPK1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK1(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(4) */ + {EXYNOS4_GPK1(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(5) */ + {EXYNOS4_GPK1(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(6) */ + {EXYNOS4_GPK1(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(7) */ + + {EXYNOS4_GPK2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPK2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4_GPK3(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPK3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPL0(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* ACTIVE_STATE_HSIC */ +#elif defined(CONFIG_QC_MODEM) + {EXYNOS4_GPL0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_UP}, /* AP2MDM_PMIC_RESET_N */ +#else + {EXYNOS4_GPL0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPL0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* PS_ALS_SCL_1.8V */ + {EXYNOS4_GPL0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* PS_ALS_SDA_1.8V */ + {EXYNOS4_GPL0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC(IRDA_CONTROL) */ + {EXYNOS4_GPL0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* HDMI_EN */ + {EXYNOS4_GPL0(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BT_EN */ + +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPL1(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* PDA_ACTIVE */ +#else + {EXYNOS4_GPL1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPL1(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* 5M_nRST */ + + {EXYNOS4_GPL2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPL2(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* IRDA_EN */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPL2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#else + {EXYNOS4_GPL2(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* GPS_EN */ +#endif + {EXYNOS4_GPL2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPL2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MOTOR_EN -> NC */ + +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM) + {EXYNOS4_GPL2(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* AP2MDM_PON_RESET_N , CP_ON*/ +#else + {EXYNOS4_GPL2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPL2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /*ACCESSORY_EN -> NC */ + {EXYNOS4_GPL2(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* UART_SEL -> NC */ + +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPM0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MICBIAS_EN */ +#else + {EXYNOS4212_GPM0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MICBIAS_EN */ +#endif + {EXYNOS4212_GPM0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* LED_BACKLIGHT_RESET */ + {EXYNOS4212_GPM0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM0(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* 2TOUCH_EN */ + {EXYNOS4212_GPM0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IRDA_IRQ */ + {EXYNOS4212_GPM0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4212_GPM1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MOTOR_I2C_SDA */ + {EXYNOS4212_GPM1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MOTOR_I2C_SCL */ + {EXYNOS4212_GPM1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV0 */ + {EXYNOS4212_GPM1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV1 */ + {EXYNOS4212_GPM1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV2 */ + {EXYNOS4212_GPM1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV3 */ + {EXYNOS4212_GPM1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4212_GPM2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IF_PMIC_SDA */ + {EXYNOS4212_GPM2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IF_PMIC_SCL */ + {EXYNOS4212_GPM2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* VT_CAM_MCLK */ + {EXYNOS4212_GPM2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_INT */ + /* SUSPEND_REQUEST_HSIC for 3G, AP2MDM_WAKEUP for LTE, NC */ + {EXYNOS4212_GPM2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPM3(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS1 */ + {EXYNOS4212_GPM3(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS2 */ + {EXYNOS4212_GPM3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS3 */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4212_GPM3(3), S3C_GPIO_SLP_OUT1, S3C_GPIO_PULL_NONE}, /* RESET_REQ_N */ + {EXYNOS4212_GPM3(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_DOWN}, /* AP_DUMP_INT */ +#elif defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPM3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AP2MDM_SOFT_RESET */ + {EXYNOS4212_GPM3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#else + {EXYNOS4212_GPM3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4212_GPM3(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* WLAN_EN */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4212_GPM3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CP_DUMP_INT */ +#else + {EXYNOS4212_GPM3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4212_GPM3(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4212_GPM4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* ADC_I2C_SCL_1.8V -> NC */ + {EXYNOS4212_GPM4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* ADC_I2C_SDA_1.8V -> NC */ + {EXYNOS4212_GPM4(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM4(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM4(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* CODEC_LDO_EN */ + {EXYNOS4212_GPM4(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM4(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC(USB_OTG_EN) */ + {EXYNOS4212_GPM4(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* IRDA_SDA */ + {EXYNOS4_GPY0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* IRDA_SCL */ + {EXYNOS4_GPY0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SDA_1.8V */ + {EXYNOS4_GPY0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SDA_1.8V */ + {EXYNOS4_GPY0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* PEN_FWE1_1.8V */ + {EXYNOS4_GPY2(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* TF_EN */ + {EXYNOS4_GPY2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SDA_1.8V */ + {EXYNOS4_GPY2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SCL_1.8V */ + {EXYNOS4_GPY2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MSENSE_SDA_1.8V */ + {EXYNOS4_GPY2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MSENSE_SCL_1.8V */ + + {EXYNOS4_GPY3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY5(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY6(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPZ(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_CLK */ + {EXYNOS4_GPZ(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPZ(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_SYNC */ + {EXYNOS4_GPZ(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_CLK */ + {EXYNOS4_GPZ(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_CLK */ + {EXYNOS4_GPZ(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPZ(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + + {EXYNOS4212_GPV0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, +}; /* kona_sleep_gpio_table */ + +struct kona_sleep_table { + unsigned int (*ptr)[3]; + int size; +}; + +#define GPIO_TABLE(_ptr) \ + {.ptr = _ptr, \ + .size = ARRAY_SIZE(_ptr)} \ + + #define GPIO_TABLE_NULL \ + {.ptr = NULL, \ + .size = 0} \ + +static struct kona_sleep_table kona_sleep_table[] = { + GPIO_TABLE(kona_sleep_gpio_table), /* Rev0.8(0x0) */ + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, +}; +#endif /* CONFIG_MIDAS_COMMON */ + +static void config_sleep_gpio_table(int array_size, + unsigned int (*gpio_table)[3]) +{ + u32 i, gpio; + + for (i = 0; i < array_size; i++) { + gpio = gpio_table[i][0]; + s3c_gpio_slp_cfgpin(gpio, gpio_table[i][1]); + s3c_gpio_slp_setpull_updown(gpio, gpio_table[i][2]); + } +} + +#ifdef CONFIG_MIDAS_COMMON +void kona_config_sleep_gpio_table(void) +{ + int i; + int index = min(ARRAY_SIZE(kona_sleep_table), system_rev + 1); + + for (i = 0; i < index; i++) { + if (kona_sleep_table[i].ptr == NULL) + continue; + + config_sleep_gpio_table(kona_sleep_table[i].size, + kona_sleep_table[i].ptr); + } +} +#endif + +/* To save power consumption, gpio pin set before enterling sleep */ +void midas_config_sleep_gpio_table(void) +{ + kona_config_sleep_gpio_table(); +} + +/* Intialize gpio set in midas board */ +void midas_config_gpio_table(void) +{ + u32 i, gpio; + + printk(KERN_DEBUG "%s\n", __func__); + + for (i = 0; i < ARRAY_SIZE(kona_init_gpios); i++) { + gpio = kona_init_gpios[i].num; + if (gpio <= EXYNOS4212_GPV4(1)) { + s3c_gpio_cfgpin(gpio, kona_init_gpios[i].cfg); + s3c_gpio_setpull(gpio, kona_init_gpios[i].pud); + + if (kona_init_gpios[i].val != S3C_GPIO_SETPIN_NONE) + gpio_set_value(gpio, kona_init_gpios[i].val); + + s5p_gpio_set_drvstr(gpio, kona_init_gpios[i].drv); + } + } +} diff --git a/arch/arm/mach-exynos/kona-01-power.c b/arch/arm/mach-exynos/kona-01-power.c new file mode 100644 index 0000000..f83def0 --- /dev/null +++ b/arch/arm/mach-exynos/kona-01-power.c @@ -0,0 +1,445 @@ +/* + * midas-power.c - Power Management of MIDAS Project + * + * Copyright (C) 2011 Samsung Electrnoics + * Chiwoong Byun <woong.byun@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + *======================================= + * Kona power history + *======================================= + * 2013. 2. 02 : jaecheol kim (jc22.kim@samsung.com) + * - kona add if_pmic(max77693) from revision 0.8(gpio=06) + so divide power files based on kona-power.c + */ + +#include <linux/i2c.h> +#include <linux/regulator/machine.h> +#include <plat/gpio-cfg.h> +#include <mach/gpio-midas.h> +#include <mach/irqs.h> + +#include <linux/mfd/max77686.h> +#include <linux/mfd/max77693.h> + + +#ifdef CONFIG_MFD_MAX77693 +static struct regulator_consumer_supply safeout1_supply[] = { + REGULATOR_SUPPLY("safeout1", NULL), +}; + +static struct regulator_consumer_supply safeout2_supply[] = { + REGULATOR_SUPPLY("safeout2", NULL), +}; + +static struct regulator_consumer_supply charger_supply[] = { + REGULATOR_SUPPLY("vinchg1", "charger-manager.0"), + REGULATOR_SUPPLY("vinchg1", NULL), +}; + +static struct regulator_init_data safeout1_init_data = { + .constraints = { + .name = "safeout1 range", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .always_on = 0, + .boot_on = 1, + .state_mem = { + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(safeout1_supply), + .consumer_supplies = safeout1_supply, +}; + +static struct regulator_init_data safeout2_init_data = { + .constraints = { + .name = "safeout2 range", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .always_on = 0, + .boot_on = 0, + .state_mem = { + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(safeout2_supply), + .consumer_supplies = safeout2_supply, +}; + +static struct regulator_init_data charger_init_data = { + .constraints = { + .name = "CHARGER", + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_CURRENT, + .boot_on = 1, + .min_uA = 60000, + .max_uA = 2580000, + }, + .num_consumer_supplies = ARRAY_SIZE(charger_supply), + .consumer_supplies = charger_supply, +}; + +struct max77693_regulator_data max77693_regulators[] = { + {MAX77693_ESAFEOUT1, &safeout1_init_data,}, + {MAX77693_ESAFEOUT2, &safeout2_init_data,}, + {MAX77693_CHARGER, &charger_init_data,}, +}; +#endif + +#if defined(CONFIG_REGULATOR_MAX77686) +/* max77686 */ + +#ifdef CONFIG_SND_SOC_WM8994 +static struct regulator_consumer_supply ldo3_supply[] = { + REGULATOR_SUPPLY("AVDD2", NULL), + REGULATOR_SUPPLY("CPVDD", NULL), + REGULATOR_SUPPLY("DBVDD1", NULL), + REGULATOR_SUPPLY("DBVDD2", NULL), + REGULATOR_SUPPLY("DBVDD3", NULL), +}; +#else +static struct regulator_consumer_supply ldo3_supply[] = {}; +#endif + +static struct regulator_consumer_supply ldo5_supply[] = { + REGULATOR_SUPPLY("vcc_1.8v", NULL), + REGULATOR_SUPPLY("touchkey", NULL), /*touchkey*/ +}; + +static struct regulator_consumer_supply ldo8_supply[] = { + REGULATOR_SUPPLY("vmipi_1.0v", NULL), + REGULATOR_SUPPLY("VDD10", "s5p-mipi-dsim.0"), + REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), + REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), +}; + +static struct regulator_consumer_supply ldo9_supply[] = { + REGULATOR_SUPPLY("vled_ic_1.9v", NULL), +}; + +static struct regulator_consumer_supply ldo10_supply[] = { + REGULATOR_SUPPLY("vmipi_1.8v", NULL), + REGULATOR_SUPPLY("VDD18", "s5p-mipi-dsim.0"), + REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), +}; + +static struct regulator_consumer_supply ldo11_supply[] = { + REGULATOR_SUPPLY("vabb1_1.9v", NULL), +}; + +static struct regulator_consumer_supply ldo12_supply[] = { + REGULATOR_SUPPLY("votg_3.0v", NULL), +}; + +static struct regulator_consumer_supply ldo14_supply[] = { + REGULATOR_SUPPLY("vabb2_1.9v", NULL), +}; + +static struct regulator_consumer_supply ldo18_supply[] = { + REGULATOR_SUPPLY("cam_io_1.8v", NULL), +}; + +static struct regulator_consumer_supply ldo19_supply[] = { + REGULATOR_SUPPLY("vt_core_1.8v", NULL), +}; + +static struct regulator_consumer_supply ldo21_supply[] = { + REGULATOR_SUPPLY("vtf_2.8v", NULL), +}; + +static struct regulator_consumer_supply ldo23_supply[] = { + REGULATOR_SUPPLY("vmotor", NULL), +}; + +static struct regulator_consumer_supply ldo24_supply[] = { + REGULATOR_SUPPLY("cam_a2.8v", NULL), +}; + +static struct regulator_consumer_supply ldo25_supply[] = { + REGULATOR_SUPPLY("tsp_3.3v", NULL), +}; + +static struct regulator_consumer_supply ldo26_supply[] = { + REGULATOR_SUPPLY("3mp_af_2.8v", NULL), +}; + +static struct regulator_consumer_supply max77686_buck1[] = { + REGULATOR_SUPPLY("vdd_mif", NULL), + REGULATOR_SUPPLY("vdd_mif", "exynos4412-busfreq"), +}; + +static struct regulator_consumer_supply max77686_buck2 = + REGULATOR_SUPPLY("vdd_arm", NULL); + +static struct regulator_consumer_supply max77686_buck3[] = { + REGULATOR_SUPPLY("vdd_int", NULL), + REGULATOR_SUPPLY("vdd_int", "exynoss4412-busfreq"), +}; + +static struct regulator_consumer_supply max77686_buck4[] = { + REGULATOR_SUPPLY("vdd_g3d", NULL), + REGULATOR_SUPPLY("vdd_g3d", "mali_dev.0"), +}; + +static struct regulator_consumer_supply max77686_buck9 = + REGULATOR_SUPPLY("3mp_core_1.2v", NULL); + +static struct regulator_consumer_supply max77686_enp32khz[] = { + REGULATOR_SUPPLY("lpo_in", "bcm47511"), + REGULATOR_SUPPLY("lpo", "bcm4334_bluetooth"), +}; + +#define REGULATOR_INIT(_ldo, _name, _min_uV, _max_uV, _always_on, _ops_mask, \ + _disabled) \ + static struct regulator_init_data _ldo##_init_data = { \ + .constraints = { \ + .name = _name, \ + .min_uV = _min_uV, \ + .max_uV = _max_uV, \ + .always_on = _always_on, \ + .boot_on = _always_on, \ + .apply_uV = 1, \ + .valid_ops_mask = _ops_mask, \ + .state_mem = { \ + .disabled = _disabled, \ + .enabled = !(_disabled), \ + } \ + }, \ + .num_consumer_supplies = ARRAY_SIZE(_ldo##_supply), \ + .consumer_supplies = &_ldo##_supply[0], \ + }; + +REGULATOR_INIT(ldo3, "VCC_1.8V_AP", 1800000, 1800000, 1, 0, 0); +REGULATOR_INIT(ldo5, "VCC_1.8V_IO", 1800000, 1800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo8, "VMIPI_1.0V", 1000000, 1000000, 1, + REGULATOR_CHANGE_STATUS, 0); +#if defined(CONFIG_IR_REMOCON_MC96) +REGULATOR_INIT(ldo9, "VLED_IC_1.9V", 1950000, 1950000, 1, + REGULATOR_CHANGE_STATUS, 1); +#else +REGULATOR_INIT(ldo9, "VLED_IC_1.9V", 1950000, 1950000, 0, + REGULATOR_CHANGE_STATUS, 1); +#endif +REGULATOR_INIT(ldo10, "VMIPI_1.8V", 1800000, 1800000, 1, + REGULATOR_CHANGE_STATUS, 0); +REGULATOR_INIT(ldo11, "VABB1_1.9V", 1950000, 1950000, 1, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo12, "VUOTG_3.0V", 3000000, 3000000, 1, + REGULATOR_CHANGE_STATUS, 0); +REGULATOR_INIT(ldo14, "VABB2_1.9V", 1950000, 1950000, 1, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo18, "CAM_IO_1.8V", 1800000, 1800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo19, "VT_CORE_1.8V", 1800000, 1800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo21, "VTF_2.8V", 2800000, 2800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo23, "VCC_MOTOR_3.0V", 3000000, 3000000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo24, "CAM_A2.8V", 2800000, 2800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo25, "TSP_3.3V", 3300000, 3300000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo26, "3MP_AF_2.8V", 2800000, 2800000, 0, + REGULATOR_CHANGE_STATUS, 1); + +static struct regulator_init_data max77686_buck1_data = { + .constraints = { + .name = "vdd_mif range", + .min_uV = 850000, + .max_uV = 1200000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck1), + .consumer_supplies = max77686_buck1, +}; + +static struct regulator_init_data max77686_buck2_data = { + .constraints = { + .name = "vdd_arm range", + .min_uV = 850000, + .max_uV = 1500000, + .apply_uV = 1, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &max77686_buck2, +}; + +static struct regulator_init_data max77686_buck3_data = { + .constraints = { + .name = "vdd_int range", + .min_uV = 850000, + .max_uV = 1300000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck3), + .consumer_supplies = max77686_buck3, +}; + +static struct regulator_init_data max77686_buck4_data = { + .constraints = { + .name = "vdd_g3d range", + .min_uV = 850000, + .max_uV = 1200000, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck4), + .consumer_supplies = max77686_buck4, +}; + +static struct regulator_init_data max77686_buck9_data = { + .constraints = { + .name = "3MP_CORE_1.2V", + .min_uV = 1200000, + .max_uV = 1400000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .state_mem = { + .disabled = 1, + }, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &max77686_buck9, +}; + +static struct regulator_init_data max77686_enp32khz_data = { + .constraints = { + .name = "32KHZ_PMIC", + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .enabled = 1, + .disabled = 0, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_enp32khz), + .consumer_supplies = max77686_enp32khz, +}; + +static struct max77686_regulator_data max77686_regulators[] = { + {MAX77686_BUCK1, &max77686_buck1_data,}, + {MAX77686_BUCK2, &max77686_buck2_data,}, + {MAX77686_BUCK3, &max77686_buck3_data,}, + {MAX77686_BUCK4, &max77686_buck4_data,}, + {MAX77686_BUCK9, &max77686_buck9_data,}, + {MAX77686_LDO3, &ldo3_init_data,}, + {MAX77686_LDO5, &ldo5_init_data,}, + {MAX77686_LDO8, &ldo8_init_data,}, + {MAX77686_LDO9, &ldo9_init_data,}, + {MAX77686_LDO10, &ldo10_init_data,}, + {MAX77686_LDO11, &ldo11_init_data,}, + {MAX77686_LDO12, &ldo12_init_data,}, + {MAX77686_LDO14, &ldo14_init_data,}, + {MAX77686_LDO18, &ldo18_init_data,}, + {MAX77686_LDO19, &ldo19_init_data,}, + {MAX77686_LDO21, &ldo21_init_data,}, + {MAX77686_LDO23, &ldo23_init_data,}, + {MAX77686_LDO24, &ldo24_init_data,}, + {MAX77686_LDO25, &ldo25_init_data,}, + {MAX77686_LDO26, &ldo26_init_data,}, + {MAX77686_P32KH, &max77686_enp32khz_data,}, +}; + +struct max77686_opmode_data max77686_opmode_data[MAX77686_REG_MAX] = { + [MAX77686_LDO3] = {MAX77686_LDO3, MAX77686_OPMODE_NORMAL}, + [MAX77686_LDO8] = {MAX77686_LDO8, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO10] = {MAX77686_LDO10, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO11] = {MAX77686_LDO11, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO12] = {MAX77686_LDO12, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO14] = {MAX77686_LDO14, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK1] = {MAX77686_BUCK1, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK2] = {MAX77686_BUCK2, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK3] = {MAX77686_BUCK3, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK4] = {MAX77686_BUCK4, MAX77686_OPMODE_STANDBY}, +}; + +struct max77686_platform_data exynos4_max77686_info = { + .num_regulators = ARRAY_SIZE(max77686_regulators), + .regulators = max77686_regulators, + .irq_gpio = GPIO_PMIC_IRQ, + .irq_base = IRQ_BOARD_PMIC_START, + .wakeup = 1, + + .opmode_data = max77686_opmode_data, + .ramp_rate = MAX77686_RAMP_RATE_27MV, + + .buck234_gpio_dvs = { + /* Use DVS2 register of each bucks to supply stable power + * after sudden reset */ + {GPIO_PMIC_DVS1, 1}, + {GPIO_PMIC_DVS2, 0}, + {GPIO_PMIC_DVS3, 0}, + }, + .buck234_gpio_selb = { + GPIO_BUCK2_SEL, + GPIO_BUCK3_SEL, + GPIO_BUCK4_SEL, + }, + .buck2_voltage[0] = 1100000, /* 1.1V */ + .buck2_voltage[1] = 1100000, /* 1.1V */ + .buck2_voltage[2] = 1100000, /* 1.1V */ + .buck2_voltage[3] = 1100000, /* 1.1V */ + .buck2_voltage[4] = 1100000, /* 1.1V */ + .buck2_voltage[5] = 1100000, /* 1.1V */ + .buck2_voltage[6] = 1100000, /* 1.1V */ + .buck2_voltage[7] = 1100000, /* 1.1V */ + + .buck3_voltage[0] = 1100000, /* 1.1V */ + .buck3_voltage[1] = 1000000, /* 1.0V */ + .buck3_voltage[2] = 1100000, /* 1.1V */ + .buck3_voltage[3] = 1100000, /* 1.1V */ + .buck3_voltage[4] = 1100000, /* 1.1V */ + .buck3_voltage[5] = 1100000, /* 1.1V */ + .buck3_voltage[6] = 1100000, /* 1.1V */ + .buck3_voltage[7] = 1100000, /* 1.1V */ + + .buck4_voltage[0] = 1100000, /* 1.1V */ + .buck4_voltage[1] = 1000000, /* 1.0V */ + .buck4_voltage[2] = 1100000, /* 1.1V */ + .buck4_voltage[3] = 1100000, /* 1.1V */ + .buck4_voltage[4] = 1100000, /* 1.1V */ + .buck4_voltage[5] = 1100000, /* 1.1V */ + .buck4_voltage[6] = 1100000, /* 1.1V */ + .buck4_voltage[7] = 1100000, /* 1.1V */ +}; + +void midas_power_init(void) +{ + /* do nothing */ + printk(KERN_INFO "%s\n", __func__); +} +#endif /* CONFIG_REGULATOR_MAX77686 */ + +void midas_power_set_muic_pdata(void *pdata, int gpio) +{ + gpio_request(gpio, "AP_PMIC_IRQ"); + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); +} + +void midas_power_gpio_init(void) +{ + /* do nothing */ +} diff --git a/arch/arm/mach-exynos/kona-gpio.c b/arch/arm/mach-exynos/kona-gpio.c new file mode 100644 index 0000000..be4ccbc --- /dev/null +++ b/arch/arm/mach-exynos/kona-gpio.c @@ -0,0 +1,716 @@ +/* + * linux/arch/arm/mach-exynos/midas-gpio.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS - GPIO setting in set board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* Kona Gpio config history + + * 2012. 12. 16 : sexykyu (jk7777.kim) + => KONA 3g : GT-N5100_REV0.3_1128_SW.pdf + => KONA LTE : GT-N5120_REV0.3_EUR_SMD_121211.pdf + */ + +#include <linux/gpio.h> +#include <linux/serial_core.h> +#include <plat/devs.h> +#include <plat/gpio-cfg.h> +#include <plat/regs-serial.h> +#include <mach/gpio-midas.h> +#include <plat/cpu.h> +#include <mach/pmu.h> + +struct gpio_init_data { + uint num; + uint cfg; + uint val; + uint pud; + uint drv; +}; + +extern int s3c_gpio_slp_cfgpin(unsigned int pin, unsigned int config); +extern int s3c_gpio_slp_setpull_updown(unsigned int pin, unsigned int config); + +#ifdef CONFIG_MIDAS_COMMON +/* + * P4NOTE GPIO Init Table + */ +static struct gpio_init_data kona_init_gpios[] = { + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPA1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPA1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, +#endif + + {EXYNOS4_GPD0(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD0(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPD1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* GSENSE_SDA_1.8V */ + {EXYNOS4_GPD1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* GSENSE_SCL_1.8V */ + + {EXYNOS4_GPF0(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPF0(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF3(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK2_SEL */ + {EXYNOS4_GPF3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK3_SEL */ + {EXYNOS4_GPF3(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK4_SEL */ +#endif + + {EXYNOS4_GPX0(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* ADC_INT */ + {EXYNOS4_GPX0(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* ADC_IC_INT */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPX0(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* PS_ALS_INT */ +#else + {EXYNOS4_GPX0(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* EAR_SEND_END_AP */ +#endif + {EXYNOS4_GPX0(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* DET_3.5 */ + {EXYNOS4_GPX0(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* DOCK_INT */ +#if !defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX0(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* REMOTE_SENSE_IRQ */ + {EXYNOS4_GPX0(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* GYRO_INT */ +#endif + {EXYNOS4_GPX0(7), S3C_GPIO_SFN(0xF), S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* AP_PMIC_IRQ */ + + {EXYNOS4_GPX1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* ACCESSORY_INT */ + {EXYNOS4_GPX1(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* TA_INT */ + {EXYNOS4_GPX1(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* OVP_FLAG */ +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX1(7), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* SIM_DETECT */ +#endif + +#if !defined(CONFIG_QC_MODEM) + {EXYNOS4_GPX2(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK3_SEL */ + {EXYNOS4_GPX2(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* BUCK4_SEL */ +#endif + {EXYNOS4_GPX2(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* FUEL_ALERT */ + {EXYNOS4_GPX2(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + {EXYNOS4_GPX2(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* BT_HOST_WAKEUP */ + {EXYNOS4_GPX2(7), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* nPower */ + + {EXYNOS4_GPX3(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* IF_CON_SENSE */ + {EXYNOS4_GPX3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* BT_WAKE */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPX3(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* CP_PMU_RST */ +#endif + {EXYNOS4_GPX3(5), S3C_GPIO_SFN(0xF), S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* V_ACCESSORY_5V */ + + {EXYNOS4_GPK1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPK1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPK1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + + {EXYNOS4_GPK3(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_CMD */ + {EXYNOS4_GPK3(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(0) */ + {EXYNOS4_GPK3(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(1) */ + {EXYNOS4_GPK3(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(2) */ + {EXYNOS4_GPK3(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* WLAN_SDIO_D(3) */ + + {EXYNOS4_GPY0(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY0(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + {EXYNOS4_GPY1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ + + {EXYNOS4212_GPJ1(3), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* CAM_MCLK */ + {EXYNOS4212_GPM2(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* VTCAM_MCLK */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPM3(4), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, +#endif + {EXYNOS4212_GPM4(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, + +#if defined(CONFIG_QC_MODEM) + /* GPIO_AP2MDM_PMIC_RESET_N */ + {EXYNOS4_GPL0(0), + S3C_GPIO_OUTPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_UP, S5P_GPIO_DRVSTR_LV4}, +#endif +}; + +/* + * kona GPIO Sleep Table + */ +static unsigned int kona_sleep_gpio_table[][3] = { + {EXYNOS4_GPA0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPA0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPA0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPA0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, +#if !defined(CONFIG_QC_MODEM) + {EXYNOS4_GPA0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, + {EXYNOS4_GPA0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, + {EXYNOS4_GPA0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPA0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, +#else + {EXYNOS4_GPA0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPA0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AP_PEN_FWE0 */ + {EXYNOS4_GPA0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPA0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPA1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPA1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPA1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPA1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPA1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* DOCK_RXD */ + /* + * UART3-TXD : It should be pulled up during sleep, if this uart is + * used for PC connection like a factory command program. + * Otherwise, a PC might get null characters like noise. + * In addition, LPA mode is also applied to this comment, because + * LPA mode invokes this GPIO sleep configuration. + */ + {EXYNOS4_GPA1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* IPC_TXD */ + + {EXYNOS4_GPB(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPB(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPB(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPB(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPB(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4_GPC0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_CLK(NC) */ + {EXYNOS4_GPC0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_EN */ + {EXYNOS4_GPC0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_SYNC(NC) */ + {EXYNOS4_GPC0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_IN(NC) */ + {EXYNOS4_GPC0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* REC_PCM_OUT(NC) */ + + {EXYNOS4_GPC1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_PDCT */ + {EXYNOS4_GPC1(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PEN_LDO_EN */ + + {EXYNOS4_GPC1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_IRQ_1.8V */ + {EXYNOS4_GPC1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_SDA_1.8V */ + {EXYNOS4_GPC1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP}, /* PEN_SCL_1.8V */ + + {EXYNOS4_GPD0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPD0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* LED_BACKLIGHT_PWM */ + {EXYNOS4_GPD0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPD0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + + {EXYNOS4_GPD1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3M_SDA_1.8V */ + {EXYNOS4_GPD1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3M_SCL_1.8V */ + {EXYNOS4_GPD1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPD1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + + {EXYNOS4_GPF0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_HSYNC */ + {EXYNOS4_GPF0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_VSYNC */ + {EXYNOS4_GPF0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_DE */ + {EXYNOS4_GPF0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_PCLK */ + {EXYNOS4_GPF0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_FREQ_SCL */ + {EXYNOS4_GPF0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_FREQ_SDA */ + {EXYNOS4_GPF0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPF1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MDM2AP_HSIC_READY */ +#else + {EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPF1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR1 */ +#else + {EXYNOS4_GPF1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPF1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF1(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* AP2MDM_STATUS */ +#else + {EXYNOS4_GPF1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR1 */ +#endif + {EXYNOS4_GPF1(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR2 */ + + {EXYNOS4_GPF2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* VT_CAM_nSTBY */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF2(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MDM2AP_HSIC_PWR_ACTIVE */ + {EXYNOS4_GPF2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* WCN_PRIORITY */ + {EXYNOS4_GPF2(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MDM_LTE_FRAME_SYNC */ +#else + {EXYNOS4_GPF2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPF2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF2(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF3(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK2_SEL */ + {EXYNOS4_GPF3(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK3_SEL */ + {EXYNOS4_GPF3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BUCK4_SEL */ +#else + {EXYNOS4_GPF3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPF3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPF3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CHG_INT */ +#else + {EXYNOS4_GPF3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPF3(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* MHL_RST */ + {EXYNOS4_GPF3(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* MHL_INT */ + + + /* Exynos4212 specific gpio */ + {EXYNOS4212_GPJ0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_PCLK */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPJ0(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_DOWN}, /*AP2MDM_ERR_FATAL*/ +#else + {EXYNOS4212_GPJ0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4212_GPJ0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPJ0(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* SUB_MICBIAS_EN */ + {EXYNOS4212_GPJ0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* EAR_SND_SEL */ + {EXYNOS4212_GPJ0(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* CAM_EN2 */ + {EXYNOS4212_GPJ0(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* CAM_EN1 */ + {EXYNOS4212_GPJ0(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* 5M_nSTBY */ + + {EXYNOS4212_GPJ1(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* VT_CAM_nRST */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4212_GPJ1(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PS_ALS_EN */ +#else + {EXYNOS4212_GPJ1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4212_GPJ1(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* VPS_SOUND_EN */ + {EXYNOS4212_GPJ1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_MCLK */ + {EXYNOS4212_GPJ1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MLH_WAKE_UP */ + + {EXYNOS4_GPK0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_CLK */ + {EXYNOS4_GPK0(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_CMD */ + {EXYNOS4_GPK0(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* eMMC_EN */ + {EXYNOS4_GPK0(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(0) */ + {EXYNOS4_GPK0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(1) */ + {EXYNOS4_GPK0(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(2) */ + {EXYNOS4_GPK0(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(3) */ + + {EXYNOS4_GPK1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPK1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK1(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(4) */ + {EXYNOS4_GPK1(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(5) */ + {EXYNOS4_GPK1(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(6) */ + {EXYNOS4_GPK1(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NAND_D(7) */ + + {EXYNOS4_GPK2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPK2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4_GPK2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4_GPK3(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPK3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + {EXYNOS4_GPK3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, + +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPL0(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* ACTIVE_STATE_HSIC */ +#elif defined(CONFIG_QC_MODEM) + {EXYNOS4_GPL0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_UP}, /* AP2MDM_PMIC_RESET_N */ +#else + {EXYNOS4_GPL0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPL0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* PS_ALS_SCL_1.8V */ + {EXYNOS4_GPL0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* PS_ALS_SDA_1.8V */ + {EXYNOS4_GPL0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC(IRDA_CONTROL) */ + {EXYNOS4_GPL0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* HDMI_EN */ + {EXYNOS4_GPL0(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* BT_EN */ + +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4_GPL1(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* PDA_ACTIVE */ +#else + {EXYNOS4_GPL1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4_GPL1(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* 5M_nRST */ + + {EXYNOS4_GPL2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPL2(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* IRDA_EN */ + +#if defined(CONFIG_QC_MODEM) + {EXYNOS4_GPL2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#else + {EXYNOS4_GPL2(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* GPS_EN */ +#endif + {EXYNOS4_GPL2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPL2(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* MOTOR_EN */ + +#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM) + {EXYNOS4_GPL2(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* AP2MDM_PON_RESET_N , CP_ON*/ +#else + {EXYNOS4_GPL2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + + {EXYNOS4_GPL2(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*ACCESSORY_EN */ + {EXYNOS4_GPL2(7), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* UART_SEL */ + +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4212_GPM0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MICBIAS_EN */ +#else + {EXYNOS4212_GPM0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MICBIAS_EN */ +#endif + {EXYNOS4212_GPM0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* LED_BACKLIGHT_RESET */ + {EXYNOS4212_GPM0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM0(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* 2TOUCH_EN */ + {EXYNOS4212_GPM0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IRDA_IRQ */ + {EXYNOS4212_GPM0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4212_GPM1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MOTOR_I2C_SDA */ + {EXYNOS4212_GPM1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MOTOR_I2C_SCL */ + {EXYNOS4212_GPM1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV0 */ + {EXYNOS4212_GPM1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV1 */ + {EXYNOS4212_GPM1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV2 */ + {EXYNOS4212_GPM1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV3 */ + {EXYNOS4212_GPM1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4212_GPM2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CHG_SDA_1.8V */ + {EXYNOS4212_GPM2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CHG_SCL_1.8V */ + {EXYNOS4212_GPM2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* VT_CAM_MCLK */ + {EXYNOS4212_GPM2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_INT */ + /* SUSPEND_REQUEST_HSIC for 3G, AP2MDM_WAKEUP for LTE, NC */ + {EXYNOS4212_GPM2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPM3(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS1 */ + {EXYNOS4212_GPM3(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS2 */ + {EXYNOS4212_GPM3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS3 */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4212_GPM3(3), S3C_GPIO_SLP_OUT1, S3C_GPIO_PULL_NONE}, /* RESET_REQ_N */ + {EXYNOS4212_GPM3(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_DOWN}, /* AP_DUMP_INT */ +#elif defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPM3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AP2MDM_SOFT_RESET */ + {EXYNOS4212_GPM3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#else + {EXYNOS4212_GPM3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4212_GPM3(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* WLAN_EN */ +#if defined(CONFIG_SEC_MODEM) + {EXYNOS4212_GPM3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CP_DUMP_INT */ +#else + {EXYNOS4212_GPM3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif + {EXYNOS4212_GPM3(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4212_GPM4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* ADC_I2C_SCL_1.8V */ + {EXYNOS4212_GPM4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* ADC_I2C_SDA_1.8V */ + {EXYNOS4212_GPM4(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM4(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4212_GPM4(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* CODEC_LDO_EN */ + {EXYNOS4212_GPM4(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* TSP_LDO_ON */ +#if defined(CONFIG_QC_MODEM) + {EXYNOS4212_GPM4(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* USB_OTG_EN */ +#else + {EXYNOS4212_GPM4(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC(USB_OTG_EN) */ +#endif + {EXYNOS4212_GPM4(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* IRDA_SDA */ + {EXYNOS4_GPY0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* IRDA_SCL */ + {EXYNOS4_GPY0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SDA_1.8V */ + {EXYNOS4_GPY0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SDA_1.8V */ + {EXYNOS4_GPY0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* USB_SEL0 */ + {EXYNOS4_GPY0(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* USB_SEL1 */ + + {EXYNOS4_GPY1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* PEN_FWE1_1.8V */ + {EXYNOS4_GPY2(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* TF_EN */ +#if (CONFIG_SAMSUNG_ANALOG_UART_SWITCH == 2) + {EXYNOS4_GPY2(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* UART_SEL2 */ +#else + {EXYNOS4_GPY2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ +#endif /* (CONFIG_SAMSUNG_ANALOG_UART_SWITCH == 2) */ + {EXYNOS4_GPY2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SDA_1.8V */ + {EXYNOS4_GPY2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SCL_1.8V */ + {EXYNOS4_GPY2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MSENSE_SDA_1.8V */ + {EXYNOS4_GPY2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MSENSE_SCL_1.8V */ + + {EXYNOS4_GPY3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY3(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY4(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY5(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY5(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPY6(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPY6(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + {EXYNOS4_GPZ(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_CLK */ + {EXYNOS4_GPZ(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPZ(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_SYNC */ + {EXYNOS4_GPZ(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_CLK */ + {EXYNOS4_GPZ(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MM_I2S_CLK */ + {EXYNOS4_GPZ(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + {EXYNOS4_GPZ(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ + + + {EXYNOS4212_GPV0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV1(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV2(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV3(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + + {EXYNOS4212_GPV4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, + {EXYNOS4212_GPV4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, +}; /* kona_sleep_gpio_table */ + +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) +/* + * ====================================== + * kona lte rev0.2 (gpio3) sleep table + * ====================================== + * a. CHG_INT : GPF3(3) -> GPX3(1) + * b. BT_WAKE : GPX3(1) -> GPF2(6) + */ +static unsigned int konalte_rev02_sleep_gpio_table[][3] = { + {EXYNOS4_GPF3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* BT_WAKE -> CHG_INT */ + {EXYNOS4_GPF2(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NC -> BT_WAKE */ + {EXYNOS4212_GPM4(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC(TSP_LDO_ON) */ +}; + +static unsigned int konalte_rev03_sleep_gpio_table[][3] = { + {EXYNOS4212_GPM4(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC(USB_OTG_EN) */ +}; +#endif + +static unsigned int kona3g_rev05_sleep_gpio_table[][3] = { + /* EAR_SEND_END_AP (OPEN) -> BUCK3_SEL */ + {EXYNOS4_GPF3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, + /* EAR_DET_3.5 (OPEN) -> BUCK4_SEL */ + {EXYNOS4_GPF3(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, +}; + +static unsigned int kona3g_rev06_sleep_gpio_table[][3] = { + /* TSP_LDO_ON -> NC */ + {EXYNOS4212_GPM4(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, +}; + + +struct kona_sleep_table { + unsigned int (*ptr)[3]; + int size; +}; + +#define GPIO_TABLE(_ptr) \ + {.ptr = _ptr, \ + .size = ARRAY_SIZE(_ptr)} \ + + #define GPIO_TABLE_NULL \ + {.ptr = NULL, \ + .size = 0} \ + +static struct kona_sleep_table kona_sleep_table[] = { + GPIO_TABLE(kona_sleep_gpio_table), /* Rev0.8(0x0) */ + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + GPIO_TABLE(konalte_rev02_sleep_gpio_table), /* Real Rev0.2(0x3) */ +#else + GPIO_TABLE(kona3g_rev05_sleep_gpio_table), /* Real Rev0.5(0x3) */ +#endif +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + GPIO_TABLE(konalte_rev03_sleep_gpio_table), /* Real Rev0.3(0x4) */ +#else + GPIO_TABLE(kona3g_rev06_sleep_gpio_table), /* Real Rev0.6(0x4) */ +#endif + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, + GPIO_TABLE_NULL, +}; +#endif /* CONFIG_MIDAS_COMMON */ + +static void config_sleep_gpio_table(int array_size, + unsigned int (*gpio_table)[3]) +{ + u32 i, gpio; + + for (i = 0; i < array_size; i++) { + gpio = gpio_table[i][0]; + s3c_gpio_slp_cfgpin(gpio, gpio_table[i][1]); + s3c_gpio_slp_setpull_updown(gpio, gpio_table[i][2]); + } +} + +#ifdef CONFIG_MIDAS_COMMON +void kona_config_sleep_gpio_table(void) +{ + int i; + int index = min(ARRAY_SIZE(kona_sleep_table), system_rev + 1); + + for (i = 0; i < index; i++) { + if (kona_sleep_table[i].ptr == NULL) + continue; + + config_sleep_gpio_table(kona_sleep_table[i].size, + kona_sleep_table[i].ptr); + } +} +#endif + +/* To save power consumption, gpio pin set before enterling sleep */ +void midas_config_sleep_gpio_table(void) +{ + kona_config_sleep_gpio_table(); +} + +/* Intialize gpio set in midas board */ +void midas_config_gpio_table(void) +{ + u32 i, gpio; + + printk(KERN_DEBUG "%s\n", __func__); + + for (i = 0; i < ARRAY_SIZE(kona_init_gpios); i++) { + gpio = kona_init_gpios[i].num; + if (gpio <= EXYNOS4212_GPV4(1)) { + s3c_gpio_cfgpin(gpio, kona_init_gpios[i].cfg); + s3c_gpio_setpull(gpio, kona_init_gpios[i].pud); + + if (kona_init_gpios[i].val != S3C_GPIO_SETPIN_NONE) + gpio_set_value(gpio, kona_init_gpios[i].val); + + s5p_gpio_set_drvstr(gpio, kona_init_gpios[i].drv); + } + } +} diff --git a/arch/arm/mach-exynos/kona-input.c b/arch/arm/mach-exynos/kona-input.c new file mode 100644 index 0000000..72ffb16 --- /dev/null +++ b/arch/arm/mach-exynos/kona-input.c @@ -0,0 +1,430 @@ +/* + * arch/arm/mach-exynos/p4-input.c + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/i2c.h> +#include <linux/err.h> +#include <linux/gpio.h> +#include <linux/delay.h> +#include <linux/platform_device.h> +#include <plat/gpio-cfg.h> +#include <plat/iic.h> +#include <linux/regulator/consumer.h> + +static u32 hw_rev; + +#ifdef CONFIG_SENSORS_HALL +int ts_powered_on; +EXPORT(ts_powered_on); +#endif + +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301) +#include <linux/synaptics_s7301.h> +static bool have_tsp_ldo; +static struct charger_callbacks *charger_callbacks; + +void synaptics_ts_charger_infom(bool en) +{ + if (charger_callbacks && charger_callbacks->inform_charger) + charger_callbacks->inform_charger(charger_callbacks, en); +} + +static void synaptics_ts_register_callback(struct charger_callbacks *cb) +{ + charger_callbacks = cb; + printk(KERN_DEBUG "[TSP] %s\n", __func__); +} + +static int synaptics_ts_set_power(bool en) +{ + struct regulator *regulator; + + if (!have_tsp_ldo) + return -1; + printk(KERN_DEBUG "[TSP] %s(%d)\n", __func__, en); + + ts_powered_on = en; + + regulator = regulator_get(NULL, "tsp_3.3v"); + if (IS_ERR(regulator)) + return PTR_ERR(regulator); + + if (en) { + s3c_gpio_cfgpin(GPIO_TSP_SDA_18V, S3C_GPIO_SFN(0x3)); + s3c_gpio_setpull(GPIO_TSP_SDA_18V, S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(GPIO_TSP_SCL_18V, S3C_GPIO_SFN(0x3)); + s3c_gpio_setpull(GPIO_TSP_SCL_18V, S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(GPIO_TSP_LDO_ON, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_LDO_ON, S3C_GPIO_PULL_NONE); + + if (regulator_is_enabled(regulator)) { + printk(KERN_DEBUG "[TSP] regulator force disabled before enabling\n"); + regulator_force_disable(regulator); + msleep(100); + } + + regulator_enable(regulator); + gpio_set_value(GPIO_TSP_LDO_ON, 1); + + s3c_gpio_setpull(GPIO_TSP_INT, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgpin(GPIO_TSP_INT, S3C_GPIO_SFN(0xf)); + } else { + s3c_gpio_cfgpin(GPIO_TSP_SDA_18V, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_SDA_18V, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_SDA_18V, 0); + s3c_gpio_cfgpin(GPIO_TSP_SCL_18V, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_SCL_18V, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_SCL_18V, 0); + s3c_gpio_cfgpin(GPIO_TSP_INT, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_INT, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_INT, 0); + s3c_gpio_cfgpin(GPIO_TSP_LDO_ON, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_LDO_ON, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_LDO_ON, 0); + + if (regulator_is_enabled(regulator)) + regulator_disable(regulator); + } + + regulator_put(regulator); + return 0; +} + +static void synaptics_ts_reset(void) +{ + printk(KERN_DEBUG "[TSP] %s\n", __func__); + synaptics_ts_set_power(false); + msleep(100); + synaptics_ts_set_power(true); + msleep(200); +} + +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301_KEYLED) +static void synaptics_ts_led_control(int on_off) +{ + printk(KERN_DEBUG "[TSP] %s [%d]\n", __func__, on_off); + + if (hw_rev < 1) + return ; + + if (on_off == 1) + gpio_direction_output(GPIO_TSP_2TOUCH_EN, 1); + else + gpio_direction_output(GPIO_TSP_2TOUCH_EN, 0); +} +#endif + +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301_KEYS) +static u8 synaptics_button_codes[] = {KEY_MENU, KEY_BACK}; +static u8 synaptics_extend_button_codes[] = + {KEY_DUMMY_1, KEY_MENU, KEY_DUMMY_2, KEY_BACK, KEY_DUMMY_3}; + +static struct synaptics_button_map synpatics_button_map = { + .nbuttons = ARRAY_SIZE(synaptics_button_codes), + .map = synaptics_button_codes, +}; + +static struct synaptics_extend_button_map synptics_extend_button_map = { + .nbuttons = ARRAY_SIZE(synaptics_extend_button_codes), + .map = synaptics_extend_button_codes, + .button_mask = BUTTON_0_MASK | BUTTON_2_MASK | BUTTON_4_MASK, +}; +#endif + +static struct synaptics_platform_data synaptics_ts_pdata = { + .gpio_attn = GPIO_TSP_INT, + .max_x = 799, + .max_y = 1279, + .max_pressure = 255, + .max_width = 100, + .x_line = 26, + .y_line = 41, + .swap_xy = false, + .invert_x = false, + .invert_y = false, +#if defined(CONFIG_SEC_TOUCHSCREEN_SURFACE_TOUCH) + .palm_threshold = 28, +#endif + .set_power = synaptics_ts_set_power, + .hw_reset = synaptics_ts_reset, + .register_cb = synaptics_ts_register_callback, +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301_KEYLED) + .led_control = synaptics_ts_led_control, + .led_event = false, +#endif +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301_KEYS) + .button_map = &synpatics_button_map, + .extend_button_map = &synptics_extend_button_map, + .support_extend_button = false, + .enable_extend_button_event = false, +#endif +}; + +static struct i2c_board_info i2c_synaptics[] __initdata = { + { + I2C_BOARD_INFO(SYNAPTICS_TS_NAME, + SYNAPTICS_TS_ADDR), + .platform_data = &synaptics_ts_pdata, + }, +}; +#elif defined(CONFIG_RMI4_I2C) +#include <linux/interrupt.h> +#include <linux/rmi4.h> +#include <linux/input.h> + +#define TOUCH_ON 1 +#define TOUCH_OFF 0 + +#define RMI4_DEFAULT_ATTN_GPIO GPIO_TSP_INT +#define RMI4_DEFAULT_ATTN_NAME "TSP_INT" + +struct syna_gpio_data { + u16 gpio_number; + char *gpio_name; +}; + +static bool have_tsp_ldo; + +static struct syna_gpio_data rmi4_default_gpio_data = { + .gpio_number = RMI4_DEFAULT_ATTN_GPIO, + .gpio_name = RMI4_DEFAULT_ATTN_NAME, +}; + +#define SYNA_ADDR 0x20 + +static unsigned char SYNA_f1a_button_codes[] = {KEY_MENU, KEY_BACK}; + +static struct rmi_button_map SYNA_f1a_button_map = { + .nbuttons = ARRAY_SIZE(SYNA_f1a_button_codes), + .map = SYNA_f1a_button_codes, +}; + +static int SYNA_ts_power(bool on_off) +{ + struct regulator *regulator; + + if (!have_tsp_ldo) + return -1; + printk(KERN_DEBUG "[TSP] %s(%d)\n", __func__, on_off); + + regulator = regulator_get(NULL, "tsp_3.3v"); + if (IS_ERR(regulator)) + return PTR_ERR(regulator); + + if (on_off) { + s3c_gpio_cfgpin(GPIO_TSP_SDA_18V, S3C_GPIO_SFN(0x3)); + s3c_gpio_setpull(GPIO_TSP_SDA_18V, S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(GPIO_TSP_SCL_18V, S3C_GPIO_SFN(0x3)); + s3c_gpio_setpull(GPIO_TSP_SCL_18V, S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(GPIO_TSP_LDO_ON, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_LDO_ON, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_LDO_ON, 1); + + regulator_enable(regulator); + + s3c_gpio_setpull(GPIO_TSP_INT, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgpin(GPIO_TSP_INT, S3C_GPIO_SFN(0xf)); + } else { + s3c_gpio_cfgpin(GPIO_TSP_SDA_18V, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_SDA_18V, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_SDA_18V, 0); + s3c_gpio_cfgpin(GPIO_TSP_SCL_18V, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_SCL_18V, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_SCL_18V, 0); + s3c_gpio_cfgpin(GPIO_TSP_INT, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_INT, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_INT, 0); + s3c_gpio_cfgpin(GPIO_TSP_LDO_ON, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_LDO_ON, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_LDO_ON, 0); + + if (regulator_is_enabled(regulator)) + regulator_disable(regulator); + } + + regulator_put(regulator); + msleep(200); + return 0; +} + +static int synaptics_touchpad_gpio_setup(void *gpio_data, bool configure) +{ + return SYNA_ts_power(configure); +} + +int SYNA_post_suspend(void *pm_data) { + pr_info("%s: RMI4 callback.\n", __func__); + return SYNA_ts_power(TOUCH_OFF); +} + +int SYNA_pre_resume(void *pm_data) { + pr_info("%s: RMI4 callback.\n", __func__); + return SYNA_ts_power(TOUCH_ON); +} + +static struct rmi_device_platform_data SYNA_platformdata = { + .sensor_name = "s7301", + .attn_gpio = RMI4_DEFAULT_ATTN_GPIO, + .attn_polarity = RMI_ATTN_ACTIVE_LOW, + .gpio_data = &rmi4_default_gpio_data, + .gpio_config = synaptics_touchpad_gpio_setup, + .f1a_button_map = &SYNA_f1a_button_map, +// .reset_delay_ms = 200, +#ifdef CONFIG_PM + .post_suspend = SYNA_post_suspend, + .pre_resume = SYNA_pre_resume, +#endif +#ifdef CONFIG_RMI4_FWLIB + .firmware_name = "KONA-E036", +#endif +}; + +static struct i2c_board_info __initdata i2c_synaptics[] = { + { + I2C_BOARD_INFO("rmi_i2c", SYNA_ADDR), + .platform_data = &SYNA_platformdata, + }, +}; + +#endif /* CONFIG_RMI4_I2C */ + +void __init kona_tsp_init(u32 system_rev) +{ + int gpio = 0, irq = 0, err = 0; + hw_rev = system_rev; + + printk(KERN_DEBUG "[TSP] %s rev : %u\n", + __func__, hw_rev); + + gpio = GPIO_TSP_LDO_ON; + gpio_request(gpio, "TSP_LDO_ON"); + gpio_direction_output(gpio, 0); + gpio_export(gpio, 0); + + have_tsp_ldo = true; + + gpio = GPIO_TSP_INT; + gpio_request(gpio, "TSP_INT"); + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); + s5p_register_gpio_interrupt(gpio); + irq = gpio_to_irq(gpio); + +#ifdef CONFIG_S3C_DEV_I2C3 + s3c_i2c3_set_platdata(NULL); + i2c_synaptics[0].irq = irq; + i2c_register_board_info(3, i2c_synaptics, + ARRAY_SIZE(i2c_synaptics)); +#endif /* CONFIG_S3C_DEV_I2C3 */ + +#if defined(CONFIG_MACH_KONA_EUR_OPEN) +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301_KEYS) + /* rev01 touch button0 & button1 position change */ + if (system_rev == 1) { + synaptics_ts_pdata.button_map->map[0] = KEY_BACK; + synaptics_ts_pdata.button_map->map[1] = KEY_MENU; + } +#endif +#endif +#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_S7301_KEYLED) + if (system_rev > 0) { + synaptics_ts_pdata.led_event = true; + err = gpio_request(GPIO_TSP_2TOUCH_EN, "GPIO_TSP_2TOUCH_EN"); + if (err) + printk(KERN_DEBUG "%s gpio_request error\n", __func__); + else { + s3c_gpio_cfgpin(GPIO_TSP_2TOUCH_EN, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_TSP_2TOUCH_EN, S3C_GPIO_PULL_NONE); + gpio_set_value(GPIO_TSP_2TOUCH_EN, 0); + } + } + + /* + * button changed 2button -> 5button + * KONA 3G, WIFI: gpio >= 3 + * KONA LTE : gpio >=2 + */ + +#if defined(CONFIG_MACH_KONA_EUR_LTE) || \ + defined(CONFIG_MACH_KONALTE_USA_ATT) + if (system_rev >= 2) { +#else + if (system_rev >= 3) { +#endif + synaptics_ts_pdata.support_extend_button = true; + synaptics_ts_pdata.enable_extend_button_event = true; + } +#endif +} + +#if defined(CONFIG_KEYBOARD_GPIO) +#include <mach/sec_debug.h> +#include <linux/gpio_keys.h> +#define GPIO_KEYS(_code, _gpio, _active_low, _iswake, _hook) \ +{ \ + .code = _code, \ + .gpio = _gpio, \ + .active_low = _active_low, \ + .type = EV_KEY, \ + .wakeup = _iswake, \ + .debounce_interval = 10, \ + .isr_hook = _hook, \ + .value = 1 \ +} + +struct gpio_keys_button kona_buttons[] = { + GPIO_KEYS(KEY_VOLUMEUP, GPIO_VOL_UP, + 1, 1, sec_debug_check_crash_key), + GPIO_KEYS(KEY_VOLUMEDOWN, GPIO_VOL_DOWN, + 1, 1, sec_debug_check_crash_key), + GPIO_KEYS(KEY_POWER, GPIO_nPOWER, + 1, 1, sec_debug_check_crash_key), + GPIO_KEYS(KEY_HOMEPAGE, GPIO_OK_KEY_ANDROID, + 1, 1, sec_debug_check_crash_key), +}; + +struct gpio_keys_platform_data kona_gpiokeys_platform_data = { + kona_buttons, + ARRAY_SIZE(kona_buttons), +#ifdef CONFIG_SENSORS_HALL + .gpio_flip_cover = GPIO_HALL_SENSOR_INT, +#endif +}; + +static struct platform_device kona_keypad = { + .name = "gpio-keys", + .dev = { + .platform_data = &kona_gpiokeys_platform_data, + }, +}; +#endif +void __init kona_key_init(void) +{ + int err; +#if defined(CONFIG_KEYBOARD_GPIO) + platform_device_register(&kona_keypad); +#ifdef CONFIG_SENSORS_HALL + /* INT GPX0[3] = WAKEUP_INT0[3] */ + err = gpio_request(GPIO_HALL_SENSOR_INT, "GPIO_HALL_SENSOR_INT"); + + if (err) + printk(KERN_DEBUG "%s gpio_request error\n", __func__); + else { + s3c_gpio_setpull(GPIO_HALL_SENSOR_INT, S3C_GPIO_PULL_DOWN); + s5p_register_gpio_interrupt(GPIO_HALL_SENSOR_INT); + gpio_direction_input(GPIO_HALL_SENSOR_INT); + s3c_gpio_cfgpin(GPIO_HALL_SENSOR_INT, S3C_GPIO_SFN(0xF)); /* EINT */ + gpio_free(GPIO_HALL_SENSOR_INT); + } +#endif +#endif + + + +} diff --git a/arch/arm/mach-exynos/kona-power.c b/arch/arm/mach-exynos/kona-power.c new file mode 100644 index 0000000..b8af85d --- /dev/null +++ b/arch/arm/mach-exynos/kona-power.c @@ -0,0 +1,398 @@ +/* + * midas-power.c - Power Management of MIDAS Project + * + * Copyright (C) 2011 Samsung Electrnoics + * Chiwoong Byun <woong.byun@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/i2c.h> +#include <linux/regulator/machine.h> +#include <plat/gpio-cfg.h> +#include <mach/gpio-midas.h> +#include <mach/irqs.h> + +#include <linux/mfd/max77686.h> + +#if defined(CONFIG_REGULATOR_MAX77686) +/* max77686 */ + +#ifdef CONFIG_SND_SOC_WM8994 +static struct regulator_consumer_supply ldo3_supply[] = { + REGULATOR_SUPPLY("AVDD2", NULL), + REGULATOR_SUPPLY("CPVDD", NULL), + REGULATOR_SUPPLY("DBVDD1", NULL), + REGULATOR_SUPPLY("DBVDD2", NULL), + REGULATOR_SUPPLY("DBVDD3", NULL), +}; +#else +static struct regulator_consumer_supply ldo3_supply[] = {}; +#endif + +static struct regulator_consumer_supply ldo5_supply[] = { + REGULATOR_SUPPLY("vcc_1.8v", NULL), + REGULATOR_SUPPLY("touchkey", NULL), /*touchkey*/ +}; + +static struct regulator_consumer_supply ldo8_supply[] = { + REGULATOR_SUPPLY("vmipi_1.0v", NULL), + REGULATOR_SUPPLY("VDD10", "s5p-mipi-dsim.0"), + REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), + REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), +}; + +static struct regulator_consumer_supply ldo9_supply[] = { + REGULATOR_SUPPLY("vled_ic_1.9v", NULL), +}; + +static struct regulator_consumer_supply ldo10_supply[] = { + REGULATOR_SUPPLY("vmipi_1.8v", NULL), + REGULATOR_SUPPLY("VDD18", "s5p-mipi-dsim.0"), + REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), +}; + +static struct regulator_consumer_supply ldo11_supply[] = { + REGULATOR_SUPPLY("vabb1_1.9v", NULL), +}; + +static struct regulator_consumer_supply ldo12_supply[] = { + REGULATOR_SUPPLY("votg_3.0v", NULL), +}; + +static struct regulator_consumer_supply ldo14_supply[] = { + REGULATOR_SUPPLY("vabb2_1.9v", NULL), +}; + +static struct regulator_consumer_supply ldo18_supply[] = { + REGULATOR_SUPPLY("cam_io_1.8v", NULL), +}; + +static struct regulator_consumer_supply ldo19_supply[] = { + REGULATOR_SUPPLY("vt_core_1.8v", NULL), +}; + +static struct regulator_consumer_supply ldo21_supply[] = { + REGULATOR_SUPPLY("vtf_2.8v", NULL), +}; + +static struct regulator_consumer_supply ldo23_supply[] = { + REGULATOR_SUPPLY("vdd_adc_3.3v", NULL), +}; + +static struct regulator_consumer_supply ldo24_supply[] = { + REGULATOR_SUPPLY("cam_a2.8v", NULL), +}; + +static struct regulator_consumer_supply ldo25_supply[] = { + REGULATOR_SUPPLY("tsp_3.3v", NULL), +}; + +static struct regulator_consumer_supply ldo26_supply[] = { + REGULATOR_SUPPLY("3mp_af_2.8v", NULL), +}; + +static struct regulator_consumer_supply max77686_buck1[] = { + REGULATOR_SUPPLY("vdd_mif", NULL), + REGULATOR_SUPPLY("vdd_mif", "exynos4412-busfreq"), +}; + +static struct regulator_consumer_supply max77686_buck2 = + REGULATOR_SUPPLY("vdd_arm", NULL); + +static struct regulator_consumer_supply max77686_buck3[] = { + REGULATOR_SUPPLY("vdd_int", NULL), + REGULATOR_SUPPLY("vdd_int", "exynoss4412-busfreq"), +}; + +static struct regulator_consumer_supply max77686_buck4[] = { + REGULATOR_SUPPLY("vdd_g3d", NULL), + REGULATOR_SUPPLY("vdd_g3d", "mali_dev.0"), +}; + +static struct regulator_consumer_supply max77686_buck9 = + REGULATOR_SUPPLY("3mp_core_1.2v", NULL); + +static struct regulator_consumer_supply max77686_enp32khz[] = { + REGULATOR_SUPPLY("lpo_in", "bcm47511"), + REGULATOR_SUPPLY("lpo", "bcm4334_bluetooth"), +}; + +#define REGULATOR_INIT(_ldo, _name, _min_uV, _max_uV, _always_on, _ops_mask, \ + _disabled) \ + static struct regulator_init_data _ldo##_init_data = { \ + .constraints = { \ + .name = _name, \ + .min_uV = _min_uV, \ + .max_uV = _max_uV, \ + .always_on = _always_on, \ + .boot_on = _always_on, \ + .apply_uV = 1, \ + .valid_ops_mask = _ops_mask, \ + .state_mem = { \ + .disabled = _disabled, \ + .enabled = !(_disabled), \ + } \ + }, \ + .num_consumer_supplies = ARRAY_SIZE(_ldo##_supply), \ + .consumer_supplies = &_ldo##_supply[0], \ + }; + +REGULATOR_INIT(ldo3, "VCC_1.8V_AP", 1800000, 1800000, 1, 0, 0); +REGULATOR_INIT(ldo5, "VCC_1.8V_IO", 1800000, 1800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo8, "VMIPI_1.0V", 1000000, 1000000, 1, + REGULATOR_CHANGE_STATUS, 0); +#if defined(CONFIG_IR_REMOCON_MC96) +REGULATOR_INIT(ldo9, "VLED_IC_1.9V", 1950000, 1950000, 1, + REGULATOR_CHANGE_STATUS, 1); +#else +REGULATOR_INIT(ldo9, "VLED_IC_1.9V", 1950000, 1950000, 0, + REGULATOR_CHANGE_STATUS, 1); +#endif +REGULATOR_INIT(ldo10, "VMIPI_1.8V", 1800000, 1800000, 1, + REGULATOR_CHANGE_STATUS, 0); +REGULATOR_INIT(ldo11, "VABB1_1.9V", 1950000, 1950000, 1, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo12, "VUOTG_3.0V", 3000000, 3000000, 1, + REGULATOR_CHANGE_STATUS, 0); +REGULATOR_INIT(ldo14, "VABB2_1.9V", 1950000, 1950000, 1, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo18, "CAM_IO_1.8V", 1800000, 1800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo19, "VT_CORE_1.8V", 1800000, 1800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo21, "VTF_2.8V", 2800000, 2800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo23, "VDD_ADC_3.3V", 3300000, 3300000, 1, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo24, "CAM_A2.8V", 2800000, 2800000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo25, "TSP_3.3V", 3300000, 3300000, 0, + REGULATOR_CHANGE_STATUS, 1); +REGULATOR_INIT(ldo26, "3MP_AF_2.8V", 2800000, 2800000, 0, + REGULATOR_CHANGE_STATUS, 1); + +static struct regulator_init_data max77686_buck1_data = { + .constraints = { + .name = "vdd_mif range", + .min_uV = 850000, + .max_uV = 1200000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck1), + .consumer_supplies = max77686_buck1, +}; + +static struct regulator_init_data max77686_buck2_data = { + .constraints = { + .name = "vdd_arm range", + .min_uV = 850000, + .max_uV = 1500000, + .apply_uV = 1, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &max77686_buck2, +}; + +static struct regulator_init_data max77686_buck3_data = { + .constraints = { + .name = "vdd_int range", + .min_uV = 850000, + .max_uV = 1300000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck3), + .consumer_supplies = max77686_buck3, +}; + +static struct regulator_init_data max77686_buck4_data = { + .constraints = { + .name = "vdd_g3d range", + .min_uV = 850000, + .max_uV = 1200000, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck4), + .consumer_supplies = max77686_buck4, +}; + +static struct regulator_init_data max77686_buck9_data = { + .constraints = { + .name = "3MP_CORE_1.2V", + .min_uV = 1200000, + .max_uV = 1400000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .state_mem = { + .disabled = 1, + }, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &max77686_buck9, +}; + +static struct regulator_init_data max77686_enp32khz_data = { + .constraints = { + .name = "32KHZ_PMIC", + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .enabled = 1, + .disabled = 0, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_enp32khz), + .consumer_supplies = max77686_enp32khz, +}; + +static struct max77686_regulator_data max77686_regulators[] = { + {MAX77686_BUCK1, &max77686_buck1_data,}, + {MAX77686_BUCK2, &max77686_buck2_data,}, + {MAX77686_BUCK3, &max77686_buck3_data,}, + {MAX77686_BUCK4, &max77686_buck4_data,}, + {MAX77686_BUCK9, &max77686_buck9_data,}, + {MAX77686_LDO3, &ldo3_init_data,}, + {MAX77686_LDO5, &ldo5_init_data,}, + {MAX77686_LDO8, &ldo8_init_data,}, + {MAX77686_LDO9, &ldo9_init_data,}, + {MAX77686_LDO10, &ldo10_init_data,}, + {MAX77686_LDO11, &ldo11_init_data,}, + {MAX77686_LDO12, &ldo12_init_data,}, + {MAX77686_LDO14, &ldo14_init_data,}, + {MAX77686_LDO18, &ldo18_init_data,}, + {MAX77686_LDO19, &ldo19_init_data,}, + {MAX77686_LDO21, &ldo21_init_data,}, + {MAX77686_LDO23, &ldo23_init_data,}, + {MAX77686_LDO24, &ldo24_init_data,}, + {MAX77686_LDO25, &ldo25_init_data,}, + {MAX77686_LDO26, &ldo26_init_data,}, + {MAX77686_P32KH, &max77686_enp32khz_data,}, +}; + +struct max77686_opmode_data max77686_opmode_data[MAX77686_REG_MAX] = { + [MAX77686_LDO3] = {MAX77686_LDO3, MAX77686_OPMODE_NORMAL}, + [MAX77686_LDO8] = {MAX77686_LDO8, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO10] = {MAX77686_LDO10, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO11] = {MAX77686_LDO11, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO12] = {MAX77686_LDO12, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO14] = {MAX77686_LDO14, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK1] = {MAX77686_BUCK1, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK2] = {MAX77686_BUCK2, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK3] = {MAX77686_BUCK3, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK4] = {MAX77686_BUCK4, MAX77686_OPMODE_STANDBY}, +}; + +struct max77686_platform_data exynos4_max77686_info = { + .num_regulators = ARRAY_SIZE(max77686_regulators), + .regulators = max77686_regulators, + .irq_gpio = GPIO_PMIC_IRQ, + .irq_base = IRQ_BOARD_PMIC_START, + .wakeup = 1, + + .opmode_data = max77686_opmode_data, + .ramp_rate = MAX77686_RAMP_RATE_27MV, + + .buck234_gpio_dvs = { + /* Use DVS2 register of each bucks to supply stable power + * after sudden reset */ + {GPIO_PMIC_DVS1, 1}, + {GPIO_PMIC_DVS2, 0}, + {GPIO_PMIC_DVS3, 0}, + }, + .buck234_gpio_selb = { + GPIO_BUCK2_SEL, + GPIO_BUCK3_SEL, + GPIO_BUCK4_SEL, + }, + .buck2_voltage[0] = 1100000, /* 1.1V */ + .buck2_voltage[1] = 1100000, /* 1.1V */ + .buck2_voltage[2] = 1100000, /* 1.1V */ + .buck2_voltage[3] = 1100000, /* 1.1V */ + .buck2_voltage[4] = 1100000, /* 1.1V */ + .buck2_voltage[5] = 1100000, /* 1.1V */ + .buck2_voltage[6] = 1100000, /* 1.1V */ + .buck2_voltage[7] = 1100000, /* 1.1V */ + + .buck3_voltage[0] = 1100000, /* 1.1V */ + .buck3_voltage[1] = 1000000, /* 1.0V */ + .buck3_voltage[2] = 1100000, /* 1.1V */ + .buck3_voltage[3] = 1100000, /* 1.1V */ + .buck3_voltage[4] = 1100000, /* 1.1V */ + .buck3_voltage[5] = 1100000, /* 1.1V */ + .buck3_voltage[6] = 1100000, /* 1.1V */ + .buck3_voltage[7] = 1100000, /* 1.1V */ + + .buck4_voltage[0] = 1100000, /* 1.1V */ + .buck4_voltage[1] = 1000000, /* 1.0V */ + .buck4_voltage[2] = 1100000, /* 1.1V */ + .buck4_voltage[3] = 1100000, /* 1.1V */ + .buck4_voltage[4] = 1100000, /* 1.1V */ + .buck4_voltage[5] = 1100000, /* 1.1V */ + .buck4_voltage[6] = 1100000, /* 1.1V */ + .buck4_voltage[7] = 1100000, /* 1.1V */ +}; + +void midas_power_init(void) +{ + printk(KERN_INFO "%s\n", __func__); + +#if defined(CONFIG_MACH_KONA_EUR_OPEN) ||\ + defined(CONFIG_MACH_KONA_EUR_WIFI) || defined(CONFIG_MACH_KONA_KOR_WIFI) + if (system_rev >= 3) { + printk(KERN_INFO "%s pmic buck 3, buck4 pin changes\n", + __func__); + exynos4_max77686_info.buck234_gpio_selb[1] = + GPIO_BUCK3_NEW_SEL; + exynos4_max77686_info.buck234_gpio_selb[2] = + GPIO_BUCK4_NEW_SEL; + } +#endif +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + /* + KONA LTE 'BUCK2_SEL' pin moved from rev0.1 + - system_rev >=2 : GPF3[0] + - system_rev < 2 : GPX2[4] + */ + if (system_rev >= 2) { + printk(KERN_INFO "%s pmic buck2 pin changes\n", + __func__); + exynos4_max77686_info.buck234_gpio_selb[0] = + GPIO_BUCK2_NEW_SEL; + } +#endif +} +#endif /* CONFIG_REGULATOR_MAX77686 */ + +void midas_power_set_muic_pdata(void *pdata, int gpio) +{ + gpio_request(gpio, "AP_PMIC_IRQ"); + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); +} + +void midas_power_gpio_init(void) +{ + /* do nothing */ +} diff --git a/arch/arm/mach-exynos/kona-sensor.c b/arch/arm/mach-exynos/kona-sensor.c new file mode 100644 index 0000000..4125321 --- /dev/null +++ b/arch/arm/mach-exynos/kona-sensor.c @@ -0,0 +1,256 @@ +#include <linux/platform_device.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/i2c-gpio.h> +#include <linux/delay.h> +#include <plat/gpio-cfg.h> +#include <plat/iic.h> +#include <plat/devs.h> +#include <mach/regs-gpio.h> +#include <mach/gpio.h> +#include <mach/gpio-rev00-kona.h> +#include <linux/regulator/consumer.h> +#include <linux/err.h> +#include "midas.h" +#include <linux/sensor/sensors_core.h> +#include <linux/sensor/yas.h> +#include <linux/sensor/gp2a.h> +#include <mach/kona-sensor.h> + +#if defined(CONFIG_SENSORS_BMA254) || defined(CONFIG_SENSORS_K3DH) +static int accel_gpio_init(void) +{ + int ret = gpio_request(GPIO_ACC_INT, "accelerometer_irq"); + + pr_info("%s\n", __func__); + + if (ret) { + pr_err("%s, Failed to request gpio accelerometer_irq(%d)\n", + __func__, ret); + return ret; + } + + s3c_gpio_cfgpin(GPIO_ACC_INT, S3C_GPIO_INPUT); + gpio_set_value(GPIO_ACC_INT, 2); + s3c_gpio_setpull(GPIO_ACC_INT, S3C_GPIO_PULL_NONE); + s5p_gpio_set_drvstr(GPIO_ACC_INT, S5P_GPIO_DRVSTR_LV1); + + return ret; +} + +static int acceleromter_get_position(void) +{ + int position = 0; + +#if defined(CONFIG_TARGET_LOCALE_USA) + if (system_rev >= 3) + position = 4; + else if (system_rev >= 1) + position = 3; + else + position = 4; +#elif defined(CONFIG_MACH_KONA_EUR_LTE) + if (system_rev >= 3) + position = 4; + else if (system_rev >= 1) + position = 3; + else + position = 4; +#elif defined(CONFIG_MACH_KONA) + if (system_rev >= 1) + position = 4; + else + position = 4; +#else + position = 4; +#endif + return position; +} + +static struct accel_platform_data accel_pdata = { + .accel_get_position = acceleromter_get_position, + .axis_adjust = true, +}; + +#if defined(CONFIG_SENSORS_BMA254) +static struct i2c_board_info i2c_devs1_1[] __initdata = { + { + I2C_BOARD_INFO("bma254", 0x18), + .platform_data = &accel_pdata, + .irq = IRQ_EINT(0), + }, +}; +#endif +#if defined(CONFIG_SENSORS_K3DH) +static struct i2c_board_info i2c_devs1[] __initdata = { + { + I2C_BOARD_INFO("k3dh", 0x19), + .platform_data = &accel_pdata, + .irq = IRQ_EINT(0), + }, +}; +#endif +#endif + +#ifdef CONFIG_SENSORS_YAS532 +static struct i2c_gpio_platform_data gpio_i2c_data10 = { + .sda_pin = GPIO_MSENSOR_SDA_18V, + .scl_pin = GPIO_MSENSOR_SCL_18V, +}; + +struct platform_device s3c_device_i2c10 = { + .name = "i2c-gpio", + .id = 10, + .dev.platform_data = &gpio_i2c_data10, +}; + +static struct mag_platform_data magnetic_pdata = { + .offset_enable = 0, + .chg_status = CABLE_TYPE_NONE, + .ta_offset.v = {0, 0, 0}, + .usb_offset.v = {0, 0, 0}, + .full_offset.v = {0, 0, 0}, +}; + +static struct i2c_board_info i2c_devs10_emul[] __initdata = { + { + I2C_BOARD_INFO("yas532", 0x2e), + .platform_data = &magnetic_pdata, + }, +}; +#endif + +#ifdef CONFIG_SENSORS_GP2A +static int proximity_leda_on(bool onoff) +{ + pr_info("%s, onoff = %d\n", __func__, onoff); + + gpio_set_value(GPIO_PS_ALS_EN, onoff); + + return 0; +} + +static int optical_gpio_init(void) +{ + int ret = gpio_request(GPIO_PS_ALS_EN, "optical_power_supply_on"); + + pr_info("%s\n", __func__); + + if (ret) { + pr_err("%s, Failed to request gpio optical power supply(%d)\n", + __func__, ret); + return ret; + } + + /* configuring for gp2a gpio for LEDA power */ + s3c_gpio_cfgpin(GPIO_PS_ALS_EN, S3C_GPIO_OUTPUT); + gpio_set_value(GPIO_PS_ALS_EN, 0); + s3c_gpio_setpull(GPIO_PS_ALS_EN, S3C_GPIO_PULL_NONE); + return ret; +} + +static unsigned long gp2a_get_threshold(u8 *thesh_diff) +{ + u8 threshold = 0x09; + + if (thesh_diff) + *thesh_diff = 1; + + if (thesh_diff) + pr_info("%s, threshold low = 0x%x, high = 0x%x\n", + __func__, threshold, (threshold + *thesh_diff)); + else + pr_info("%s, threshold = 0x%x\n", __func__, threshold); + return threshold; +} + +static struct gp2a_platform_data gp2a_pdata = { + .gp2a_led_on = proximity_leda_on, + .p_out = GPIO_PS_ALS_INT, + .gp2a_get_threshold = gp2a_get_threshold, +}; + +static struct platform_device opt_gp2a = { + .name = "gp2a-opt", + .id = -1, + .dev = { + .platform_data = &gp2a_pdata, + }, +}; +#endif + +#if defined(CONFIG_SENSORS_GP2A) || defined(CONFIG_SENSORS_AL3201) +static struct i2c_gpio_platform_data gpio_i2c_data12 = { + .sda_pin = GPIO_PS_ALS_SDA_28V, + .scl_pin = GPIO_PS_ALS_SCL_28V, +}; + +struct platform_device s3c_device_i2c12 = { + .name = "i2c-gpio", + .id = 12, + .dev.platform_data = &gpio_i2c_data12, +}; + +static struct i2c_board_info i2c_devs12_emul[] __initdata = { +#if defined(CONFIG_SENSORS_AL3201) + {I2C_BOARD_INFO("AL3201", 0x1c),}, +#endif +#if defined(CONFIG_SENSORS_GP2A) + {I2C_BOARD_INFO("gp2a", 0x39),}, +#endif +}; +#endif + +static struct platform_device *kona_sensor_devices[] __initdata = { +#if defined(CONFIG_SENSORS_BMA254) || defined(CONFIG_SENSORS_K3DH) + &s3c_device_i2c1, +#endif +#ifdef CONFIG_SENSORS_YAS532 + &s3c_device_i2c10, +#endif +#if defined(CONFIG_SENSORS_GP2A) || defined(CONFIG_SENSORS_AL3201) + &s3c_device_i2c12, +#endif +}; + +int kona_sensor_init(void) +{ + int ret = 0; + + /* accelerometer sensor */ + pr_info("%s, is called\n", __func__); + +#if defined(CONFIG_SENSORS_BMA254) || defined(CONFIG_SENSORS_K3DH) + s3c_i2c1_set_platdata(NULL); + i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); +#endif +#ifdef CONFIG_SENSORS_YAS532 + /* magnetic sensor */ + i2c_register_board_info(10, i2c_devs10_emul, + ARRAY_SIZE(i2c_devs10_emul)); +#endif +#ifdef CONFIG_SENSORS_GP2A + /* optical sensor */ + ret = optical_gpio_init(); + if (ret < 0) + pr_err("%s, optical_gpio_init fail(err=%d)\n", __func__, ret); + + i2c_register_board_info(12, i2c_devs12_emul, + ARRAY_SIZE(i2c_devs12_emul)); + + ret = platform_device_register(&opt_gp2a); + if (ret < 0) { + pr_err("%s, failed to register opt_gp2a(err=%d)\n", + __func__, ret); + return ret; + } +#elif defined(CONFIG_SENSORS_AL3201) + i2c_register_board_info(12, i2c_devs12_emul, + ARRAY_SIZE(i2c_devs12_emul)); +#endif + platform_add_devices(kona_sensor_devices, + ARRAY_SIZE(kona_sensor_devices)); + + return ret; +} + diff --git a/arch/arm/mach-exynos/mach-kona.c b/arch/arm/mach-exynos/mach-kona.c new file mode 100644 index 0000000..e5eee12 --- /dev/null +++ b/arch/arm/mach-exynos/mach-kona.c @@ -0,0 +1,2160 @@ +/* linux/arch/arm/mach-exynos/mach-smdk4212.c + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/serial_core.h> +#include <linux/spi/spi.h> +#include <linux/spi/spi_gpio.h> +#include <linux/clk.h> +#include <linux/gpio.h> +#include <linux/gpio_event.h> +#include <linux/i2c.h> +#include <linux/i2c-gpio.h> +#include <linux/pwm_backlight.h> +#include <linux/input.h> +#include <linux/mmc/host.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/max8649.h> +#include <linux/regulator/fixed.h> +#include <linux/power_supply.h> +#ifdef CONFIG_STMPE811_ADC +#include <linux/stmpe811-adc.h> +#endif +#include <linux/v4l2-mediabus.h> +#include <linux/memblock.h> +#include <linux/delay.h> +#include <linux/bootmem.h> + +#include <asm/mach/arch.h> +#include <asm/mach-types.h> + +#include <plat/regs-serial.h> +#include <plat/exynos4.h> +#include <plat/cpu.h> +#include <plat/clock.h> +#include <plat/keypad.h> +#include <plat/devs.h> +#include <plat/fb-s5p.h> +#include <plat/fb-core.h> +#include <plat/regs-fb-v4.h> +#include <plat/backlight.h> +#include <plat/gpio-cfg.h> +#include <plat/iic.h> +#include <plat/pd.h> +#include <plat/sdhci.h> +#include <plat/mshci.h> +#include <plat/ehci.h> +#include <plat/usbgadget.h> +#include <plat/s3c64xx-spi.h> +#include <plat/tvout.h> +#include <plat/csis.h> +#include <plat/media.h> +#include <plat/adc.h> +#include <media/exynos_fimc_is.h> +#include <mach/exynos-ion.h> + +#include <mach/map.h> +#include <mach/spi-clocks.h> + +#include <mach/dev.h> +#include <mach/ppmu.h> + +#ifdef CONFIG_MFD_MAX77693 +#include <linux/mfd/max77693.h> +#include <linux/mfd/max77693-private.h> +#endif + +#ifdef CONFIG_BATTERY_MAX17047_FUELGAUGE +#include <linux/battery/max17047_fuelgauge.h> +#endif + +#ifdef CONFIG_BATTERY_MAX17047_C_FUELGAUGE +#include <linux/battery/max17047_fuelgauge_c.h> +#endif + +#if defined(CONFIG_BATTERY_SAMSUNG) +#include <linux/power_supply.h> +#include <linux/battery/samsung_battery.h> +#endif + +#ifdef CONFIG_BT_BCM4334 +#include <mach/board-bluetooth-bcm.h> +#endif + +#ifdef CONFIG_EXYNOS4_SETUP_THERMAL +#include <plat/s5p-tmu.h> +#include <mach/regs-tmu.h> +#endif + +#if defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC) || defined(CONFIG_VIDEO_MFC5X) +#include <plat/s5p-mfc.h> +#endif + +#include <plat/fb-s5p.h> + +#ifdef CONFIG_FB_S5P_EXTDSP +struct s3cfb_extdsp_lcd { + int width; + int height; + int bpp; +}; +#endif +#include <mach/dev-sysmmu.h> + +#ifdef CONFIG_VIDEO_JPEG_V2X +#include <plat/jpeg.h> +#endif + +#include <plat/fimg2d.h> +#include <plat/s5p-sysmmu.h> + +#include <mach/sec_debug.h> + +#include <mach/kona-input.h> +#include <mach/midas-wacom.h> + +#include <mach/midas-power.h> +#ifdef CONFIG_SEC_THERMISTOR +#include <mach/sec_thermistor.h> +#endif +#include <mach/midas-thermistor.h> +#include <mach/midas-tsp.h> +#include <mach/regs-clock.h> + +#include <mach/midas-lcd.h> +#include <mach/midas-sound.h> +#ifdef CONFIG_USB_HOST_NOTIFY +#include <linux/host_notify.h> +#include <linux/pm_runtime.h> +#include <linux/usb.h> +#include <linux/usb/hcd.h> +#include <mach/usb_switch.h> +#endif + +#ifdef CONFIG_30PIN_CONN +#include <linux/30pin_con.h> +#endif + +#ifdef CONFIG_MOTOR_DRV_DRV2603 +#include <linux/drv2603_vibrator.h> +#endif + +#include "board-mobile.h" + +#ifdef CONFIG_IR_REMOCON_MC96 +#include <linux/ir_remote_con_mc96.h> +#endif +#ifdef CONFIG_MACH_KONA_SENSOR +#include <mach/kona-sensor.h> +#endif + +/* Following are default values for UCON, ULCON and UFCON UART registers */ +#define SMDK4212_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ + S3C2410_UCON_RXILEVEL | \ + S3C2410_UCON_TXIRQMODE | \ + S3C2410_UCON_RXIRQMODE | \ + S3C2410_UCON_RXFIFO_TOI | \ + S3C2443_UCON_RXERR_IRQEN) + +#define SMDK4212_ULCON_DEFAULT S3C2410_LCON_CS8 + +#define SMDK4212_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ + S5PV210_UFCON_TXTRIG4 | \ + S5PV210_UFCON_RXTRIG4) + +#define SMDK4212_UFCON_GPS (S3C2410_UFCON_FIFOMODE | \ + S5PV210_UFCON_TXTRIG8 | \ + S5PV210_UFCON_RXTRIG32) + +static struct s3c2410_uartcfg smdk4212_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = SMDK4212_UCON_DEFAULT, + .ulcon = SMDK4212_ULCON_DEFAULT, + .ufcon = SMDK4212_UFCON_DEFAULT, +#ifdef CONFIG_BT_BCM4334 + .wake_peer = bcm_bt_lpm_exit_lpm_locked, +#endif + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = SMDK4212_UCON_DEFAULT, + .ulcon = SMDK4212_ULCON_DEFAULT, + .ufcon = SMDK4212_UFCON_GPS, +#ifndef CONFIG_QC_MODEM + .set_runstate = set_gps_uart_op, +#endif + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = SMDK4212_UCON_DEFAULT, + .ulcon = SMDK4212_ULCON_DEFAULT, + .ufcon = SMDK4212_UFCON_DEFAULT, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = SMDK4212_UCON_DEFAULT, + .ulcon = SMDK4212_ULCON_DEFAULT, + .ufcon = SMDK4212_UFCON_DEFAULT, + }, +}; + +static DEFINE_MUTEX(notify_lock); + +#define DEFINE_MMC_CARD_NOTIFIER(num) \ +static void (*hsmmc##num##_notify_func)(struct platform_device *, int state); \ +static int ext_cd_init_hsmmc##num(void (*notify_func)( \ + struct platform_device *, int state)) \ +{ \ + mutex_lock(¬ify_lock); \ + WARN_ON(hsmmc##num##_notify_func); \ + hsmmc##num##_notify_func = notify_func; \ + mutex_unlock(¬ify_lock); \ + return 0; \ +} \ +static int ext_cd_cleanup_hsmmc##num(void (*notify_func)( \ + struct platform_device *, int state)) \ +{ \ + mutex_lock(¬ify_lock); \ + WARN_ON(hsmmc##num##_notify_func != notify_func); \ + hsmmc##num##_notify_func = NULL; \ + mutex_unlock(¬ify_lock); \ + return 0; \ +} + +#ifdef CONFIG_S3C_DEV_HSMMC3 + DEFINE_MMC_CARD_NOTIFIER(3) +#endif + +/* + * call this when you need sd stack to recognize insertion or removal of card + * that can't be told by SDHCI regs + */ +void mmc_force_presence_change(struct platform_device *pdev) +{ + void (*notify_func)(struct platform_device *, int state) = NULL; + mutex_lock(¬ify_lock); +#ifdef CONFIG_S3C_DEV_HSMMC3 + if (pdev == &s3c_device_hsmmc3) + notify_func = hsmmc3_notify_func; +#endif + + if (notify_func) + notify_func(pdev, 1); + else + pr_warn("%s: called for device with no notifier\n", __func__); + mutex_unlock(¬ify_lock); +} +EXPORT_SYMBOL_GPL(mmc_force_presence_change); + +void mmc_force_presence_change_onoff(struct platform_device *pdev, int val) +{ + void (*notify_func)(struct platform_device *, int state) = NULL; + mutex_lock(¬ify_lock); +#ifdef CONFIG_S3C_DEV_HSMMC3 + if (pdev == &s3c_device_hsmmc3) + notify_func = hsmmc3_notify_func; +#endif + + if (notify_func) + notify_func(pdev, val); + else + pr_warn("%s: called for device with no notifier\n", __func__); + mutex_unlock(¬ify_lock); +} +EXPORT_SYMBOL_GPL(mmc_force_presence_change_onoff); + +#ifdef CONFIG_S3C_DEV_HSMMC +static struct s3c_sdhci_platdata smdk4212_hsmmc0_pdata __initdata = { + .cd_type = S3C_MSHCI_CD_PERMANENT, + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, +#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT + .max_width = 8, + .host_caps = MMC_CAP_8_BIT_DATA, +#endif +}; +#endif + +#ifdef CONFIG_S3C_DEV_HSMMC1 +static struct s3c_sdhci_platdata smdk4212_hsmmc1_pdata __initdata = { + .cd_type = S3C_SDHCI_CD_INTERNAL, + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, +}; +#endif + +#ifdef CONFIG_S3C_DEV_HSMMC2 +static struct s3c_sdhci_platdata smdk4212_hsmmc2_pdata __initdata = { + .cd_type = S3C_SDHCI_CD_GPIO, + .ext_cd_gpio = EXYNOS4_GPX3(4), + .ext_cd_gpio_invert = true, + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, + .vmmc_name = "vtf_2.8v" +#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT + .max_width = 8, + .host_caps = MMC_CAP_8_BIT_DATA, +#endif +}; +#endif + +#ifdef CONFIG_S3C_DEV_HSMMC3 +static struct s3c_sdhci_platdata smdk4212_hsmmc3_pdata __initdata = { +/* new code for brm4334 */ + .cd_type = S3C_SDHCI_CD_EXTERNAL, + + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, + .pm_flags = S3C_SDHCI_PM_IGNORE_SUSPEND_RESUME, + .ext_cd_init = ext_cd_init_hsmmc3, + .ext_cd_cleanup = ext_cd_cleanup_hsmmc3, +}; +#endif + +#ifdef CONFIG_EXYNOS4_DEV_MSHC +static struct s3c_mshci_platdata exynos4_mshc_pdata __initdata = { + .cd_type = S3C_MSHCI_CD_PERMANENT, + .fifo_depth = 0x80, +#if defined(CONFIG_EXYNOS4_MSHC_8BIT) && \ + defined(CONFIG_EXYNOS4_MSHC_DDR) + .max_width = 8, + .host_caps = MMC_CAP_8_BIT_DATA | MMC_CAP_1_8V_DDR | + MMC_CAP_UHS_DDR50 | MMC_CAP_CMD23, + .host_caps2 = MMC_CAP2_PACKED_CMD | MMC_CAP2_POWEROFF_NOTIFY, +#elif defined(CONFIG_EXYNOS4_MSHC_8BIT) + .max_width = 8, + .host_caps = MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23, +#elif defined(CONFIG_EXYNOS4_MSHC_DDR) + .host_caps = MMC_CAP_1_8V_DDR | MMC_CAP_UHS_DDR50 | + MMC_CAP_CMD23, +#endif + .int_power_gpio = GPIO_eMMC_EN, +}; +#endif + +#ifdef CONFIG_USB_EHCI_S5P +static struct s5p_ehci_platdata smdk4212_ehci_pdata; + +static void __init smdk4212_ehci_init(void) +{ + struct s5p_ehci_platdata *pdata = &smdk4212_ehci_pdata; + + s5p_ehci_set_platdata(pdata); +} +#endif + +#ifdef CONFIG_USB_OHCI_S5P +static struct s5p_ohci_platdata smdk4212_ohci_pdata; + +static void __init smdk4212_ohci_init(void) +{ + struct s5p_ohci_platdata *pdata = &smdk4212_ohci_pdata; + + s5p_ohci_set_platdata(pdata); +} +#endif + +/* USB GADGET */ +#ifdef CONFIG_USB_GADGET +static struct s5p_usbgadget_platdata smdk4212_usbgadget_pdata; + +#include <linux/usb/android_composite.h> +static void __init smdk4212_usbgadget_init(void) +{ + struct s5p_usbgadget_platdata *pdata = &smdk4212_usbgadget_pdata; + struct android_usb_platform_data *android_pdata = + s3c_device_android_usb.dev.platform_data; + if (android_pdata) { + unsigned int newluns = 0; + unsigned int cdfs = 1; + + printk(KERN_DEBUG "usb: %s: default luns=%d, new luns=%d\n", + __func__, android_pdata->nluns, newluns); + android_pdata->nluns = newluns; + android_pdata->cdfs_support = cdfs; + } else { + printk(KERN_DEBUG "usb: %s android_pdata is not available\n", + __func__); + } + +#if defined(CONFIG_MACH_KONA_EUR_LTE) || defined(CONFIG_MACH_KONALTE_USA_ATT) + s5p_usbgadget_set_platdata(pdata); + pdata = s3c_device_usbgadget.dev.platform_data; + if (pdata) { + /* Squelch Threshold Tune [13:11] (110 : -15%) */ + pdata->phy_tune_mask |= (0x7 << 11); + pdata->phy_tune |= (0x6 << 11); + printk(KERN_DEBUG "usb: %s tune_mask=0x%x, tune=0x%x\n", + __func__, pdata->phy_tune_mask, pdata->phy_tune); + } +#else + s5p_usbgadget_set_platdata(pdata); + pdata = s3c_device_usbgadget.dev.platform_data; + if (pdata) { + /* Squelch Threshold Tune [13:11] (010 : +5%) */ + pdata->phy_tune_mask |= (0x7 << 11); + pdata->phy_tune |= (0x2 << 11); + printk(KERN_DEBUG "usb: %s tune_mask=0x%x, tune=0x%x\n", + __func__, pdata->phy_tune_mask, pdata->phy_tune); + } +#endif +} +#endif + +#ifdef CONFIG_MFD_MAX77693 +#ifdef CONFIG_VIBETONZ +static struct max77693_haptic_platform_data max77693_haptic_pdata = { + .reg2 = MOTOR_LRA | EXT_PWM | DIVIDER_128, + .pwm_id = 0, + .init_hw = NULL, + .motor_en = NULL, + .max_timeout = 10000, + .duty = 35500, + .period = 37904, + .regulator_name = "vmotor", +}; +#endif + +#ifdef CONFIG_BATTERY_MAX77693_CHARGER +static struct max77693_charger_platform_data max77693_charger_pdata = { +#ifdef CONFIG_BATTERY_WPC_CHARGER + .wpc_irq_gpio = GPIO_WPC_INT, + .vbus_irq_gpio = GPIO_V_BUS_INT, + .wc_pwr_det = false, +#endif +}; +#endif + +extern struct max77693_muic_data max77693_muic; +extern struct max77693_regulator_data max77693_regulators; + +static bool is_muic_default_uart_path_cp(void) +{ + return false; +} + +struct max77693_platform_data exynos4_max77693_info = { + .irq_base = IRQ_BOARD_IFIC_START, + .irq_gpio = GPIO_IF_PMIC_IRQ, + .wakeup = 1, + .muic = &max77693_muic, + .is_default_uart_path_cp = is_muic_default_uart_path_cp, + .regulators = &max77693_regulators, + .num_regulators = MAX77693_REG_MAX, +#ifdef CONFIG_VIBETONZ + .haptic_data = &max77693_haptic_pdata, +#endif +#ifdef CONFIG_LEDS_MAX77693 + .led_data = &max77693_led_pdata, +#endif +#ifdef CONFIG_BATTERY_MAX77693_CHARGER + .charger_data = &max77693_charger_pdata, +#endif +}; +#endif + +/* I2C0 */ +static struct i2c_board_info i2c_devs0[] __initdata = { +}; + +#ifdef CONFIG_S3C_DEV_I2C5 +static struct i2c_board_info i2c_devs5[] __initdata = { +}; +struct s3c2410_platform_i2c default_i2c5_data __initdata = { + .bus_num = 5, + .flags = 0, + .slave_addr = 0x10, + .frequency = 100*1000, + .sda_delay = 100, +}; +#endif + +static struct i2c_board_info i2c_devs7[] __initdata = { +#if defined(CONFIG_REGULATOR_MAX77686) /* max77686 on i2c7 with M1 board */ + { + I2C_BOARD_INFO("max77686", (0x12 >> 1)), + .platform_data = &exynos4_max77686_info, + }, +#endif +}; + +/* Bluetooth */ +#ifdef CONFIG_BT_BCM4334 +static struct platform_device bcm4334_bluetooth_device = { + .name = "bcm4334_bluetooth", + .id = -1, +}; +#endif + +/* I2C9 */ +static struct i2c_board_info i2c_devs9_emul[] __initdata = { +}; + +/* I2C11 */ +static struct i2c_board_info i2c_devs11_emul[] __initdata = { +}; + +#if defined (CONFIG_BATTERY_MAX17047_FUELGAUGE) || defined(CONFIG_BATTERY_MAX17047_C_FUELGAUGE) +static struct i2c_gpio_platform_data gpio_i2c_data14 = { + .sda_pin = GPIO_FUEL_SDA, + .scl_pin = GPIO_FUEL_SCL, +}; + +struct platform_device s3c_device_i2c14 = { + .name = "i2c-gpio", + .id = 14, + .dev.platform_data = &gpio_i2c_data14, +}; + +static struct max17047_platform_data max17047_pdata = { + .irq_gpio = GPIO_FUEL_ALERT, +}; + +/* I2C14 */ +static struct i2c_board_info i2c_devs14_emul[] __initdata = { + { + I2C_BOARD_INFO("max17047-fuelgauge", 0x36), + .platform_data = &max17047_pdata, + }, +}; +#endif + +/* I2C15 */ +static struct i2c_gpio_platform_data gpio_i2c_data15 = { + .sda_pin = GPIO_MHL_SDA_1_8V, + .scl_pin = GPIO_MHL_SCL_1_8V, + .udelay = 3, + .timeout = 0, +}; + +struct platform_device s3c_device_i2c15 = { + .name = "i2c-gpio", + .id = 15, + .dev = { + .platform_data = &gpio_i2c_data15, + } +}; + +static struct i2c_board_info i2c_devs15_emul[] __initdata = { +}; + +#if defined(CONFIG_MFD_MAX77693) +static struct i2c_gpio_platform_data gpio_i2c_data17 = { + .sda_pin = GPIO_IF_PMIC_SDA, + .scl_pin = GPIO_IF_PMIC_SCL, +}; + +struct platform_device s3c_device_i2c17 = { + .name = "i2c-gpio", + .id = 17, + .dev.platform_data = &gpio_i2c_data17, +}; + +/* I2C17 */ +static struct i2c_board_info i2c_devs17_emul[] __initdata = { + { + I2C_BOARD_INFO("max77693", (0xCC >> 1)), + .platform_data = &exynos4_max77693_info, + } +}; +#endif + +#if 0 +static struct i2c_gpio_platform_data i2c18_platdata = { + .sda_pin = GPIO_8M_CAM_SDA_18V, + .scl_pin = GPIO_8M_CAM_SCL_18V, + .udelay = 2, /* 250 kHz */ + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0, +}; + +static struct platform_device s3c_device_i2c18 = { + .name = "i2c-gpio", + .id = 18, + .dev.platform_data = &i2c18_platdata, +}; + +/* I2C18 */ +/* No explicit i2c client array here. The channel number 18 is passed + to camera driver from midas-camera.c instead. */ +#endif + +#if defined(CONFIG_STMPE811_ADC) +static struct i2c_gpio_platform_data gpio_i2c_data19 = { + .sda_pin = GPIO_ADC_SDA, + .scl_pin = GPIO_ADC_SCL, +}; + +struct platform_device s3c_device_i2c19 = { + .name = "i2c-gpio", + .id = 19, + .dev.platform_data = &gpio_i2c_data19, +}; + + +/* I2C19 */ +static struct i2c_board_info i2c_devs19_emul[] __initdata = { + { + I2C_BOARD_INFO("stmpe811-adc", (0x82 >> 1)), + .platform_data = &stmpe811_pdata, + }, +}; +#endif + +/* I2C22 */ +#ifdef CONFIG_IR_REMOCON_MC96 +static void irda_wake_en(bool onoff) +{ + gpio_direction_output(GPIO_IRDA_WAKE, onoff); +#if 0 + printk(KERN_ERR "%s: irda_wake_en : %d\n", __func__, onoff); +#endif +} + +static void irda_device_init(void) +{ + int ret; + + printk(KERN_ERR "%s called!\n", __func__); + + ret = gpio_request(GPIO_IRDA_WAKE, "irda_wake"); + if (ret) { + printk(KERN_ERR "%s: gpio_request fail[%d], ret = %d\n", + __func__, GPIO_IRDA_WAKE, ret); + return; + } + + ret = gpio_request(GPIO_IRDA_IRQ, "irda_irq"); + if (ret) { + printk(KERN_ERR "%s: gpio_request fail[%d], ret = %d\n", + __func__, GPIO_IRDA_IRQ, ret); + return; + } + + ret = gpio_request(GPIO_IRDA_EN, "irda_en"); + if (ret) { + printk(KERN_ERR "%s: gpio_request fail[%d], ret = %d\n", + __func__, GPIO_IRDA_EN, ret); + return; + } + + gpio_direction_output(GPIO_IRDA_WAKE, 0); + gpio_direction_output(GPIO_IRDA_EN, 0); + + s3c_gpio_cfgpin(GPIO_IRDA_IRQ, S3C_GPIO_INPUT); + s3c_gpio_setpull(GPIO_IRDA_IRQ, S3C_GPIO_PULL_UP); + gpio_direction_input(GPIO_IRDA_IRQ); + + return; +} + +static int vled_ic_onoff; + +static void irda_vdd_onoff(bool onoff) +{ + static struct regulator *vled_ic; + + if (onoff) { + gpio_set_value(GPIO_IRDA_EN, 1); + + vled_ic = regulator_get(NULL, "vled_ic_1.9v"); + if (IS_ERR(vled_ic)) { + pr_err("could not get regulator vled_ic_1.9v\n"); + return; + } + regulator_enable(vled_ic); + vled_ic_onoff = 1; + } else if (vled_ic_onoff == 1) { + gpio_set_value(GPIO_IRDA_EN, 0); + + if (regulator_is_enabled(vled_ic)) + regulator_force_disable(vled_ic); + regulator_put(vled_ic); + vled_ic_onoff = 0; + } +} + +static struct i2c_gpio_platform_data gpio_i2c_data22 = { + .sda_pin = GPIO_IRDA_SDA, + .scl_pin = GPIO_IRDA_SCL, + .udelay = 2, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0, +}; + +struct platform_device s3c_device_i2c22 = { + .name = "i2c-gpio", + .id = 22, + .dev.platform_data = &gpio_i2c_data22, +}; + +static struct mc96_platform_data mc96_pdata = { + .ir_wake_en = irda_wake_en, + .ir_vdd_onoff = irda_vdd_onoff, +}; + +static struct i2c_board_info i2c_devs22_emul[] __initdata = { + { + I2C_BOARD_INFO("mc96", (0XA0 >> 1)), + .platform_data = &mc96_pdata, + }, +}; +#endif + +#if 0 +#ifdef CONFIG_FB_S5P_NT71391 +static struct i2c_gpio_platform_data gpio_i2c_data23 = { + .scl_pin = GPIO_LCD_FREQ_SCL, + .sda_pin = GPIO_LCD_FREQ_SDA, +}; + +struct platform_device s3c_device_i2c23 = { + .name = "i2c-gpio", + .id = 23, + .dev.platform_data = &gpio_i2c_data23, +}; +#endif +#endif + +#ifdef CONFIG_BACKLIGHT_LP855X +static struct i2c_gpio_platform_data gpio_i2c_data24 = { + .scl_pin = GPIO_LED_BACKLIGHT_SCL, + .sda_pin = GPIO_LED_BACKLIGHT_SDA, +}; + +struct platform_device s3c_device_i2c24 = { + .name = "i2c-gpio", + .id = 24, + .dev.platform_data = &gpio_i2c_data24, +}; +#endif + +#ifdef CONFIG_ANDROID_RAM_CONSOLE +static struct resource ram_console_resource[] = { + { + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device ram_console_device = { + .name = "ram_console", + .id = -1, + .num_resources = ARRAY_SIZE(ram_console_resource), + .resource = ram_console_resource, +}; + +static int __init setup_ram_console_mem(char *str) +{ + unsigned size = memparse(str, &str); + + if (size && (*str == '@')) { + unsigned long long base = 0; + + base = simple_strtoul(++str, &str, 0); + if (reserve_bootmem(base, size, BOOTMEM_EXCLUSIVE)) { + pr_err("%s: failed reserving size %d " + "at base 0x%llx\n", __func__, size, base); + return -1; + } + + ram_console_resource[0].start = base; + ram_console_resource[0].end = base + size - 1; + pr_err("%s: %x at %llx\n", __func__, size, base); + } + return 0; +} + +__setup("ram_console=", setup_ram_console_mem); +#endif + +#if defined(CONFIG_BATTERY_SAMSUNG) +static struct samsung_battery_platform_data samsung_battery_pdata = { + /* charger */ + .charger_name = "max77693-charger", + .fuelgauge_name = "max17047-fuelgauge", + + /* voltage */ + .voltage_max = 4300000, + .voltage_min = 3400000, + .in_curr_limit = 1800, + + /* charging current */ + .chg_curr_ta = 1800, + .chg_curr_dock = 1700, + .chg_curr_siop_lv1 = 1500, + .chg_curr_siop_lv2 = 1000, + .chg_curr_siop_lv3 = 500, + .chg_curr_usb = 475, + .chg_curr_cdp = 1000, + .chg_curr_wpc = 475, + .chg_curr_etc = 475, + + /* charging param */ + .chng_interval = 30, + .chng_susp_interval = 30, + .norm_interval = 30, + .norm_susp_interval = 1800, + .emer_lv1_interval = 30, + .emer_lv2_interval = 10, + + /* recharging voltage */ + .recharge_voltage = 4257000, + + /* absolute timeer */ + .abstimer_charge_duration = 10 * 60 * 60, + .abstimer_charge_duration_wpc = 8 * 60 * 60, + .abstimer_recharge_duration = 1.5 * 60 * 60, + + .cb_det_src = CABLE_DET_CHARGER, + + /* temperature param */ + .overheat_stop_temp = 500, + .overheat_recovery_temp = 420, + .freeze_stop_temp = -50, + .freeze_recovery_temp = 0, + + /* ctia */ + .ctia_spec = false, + .event_time = 10 * 60, + + .temper_src = TEMPER_FUELGAUGE, + +#if defined(CONFIG_S3C_ADC) + .covert_adc = convert_adc, +#endif + + /* vf detect */ + .vf_det_src = VF_DET_UNKNOWN, + .vf_det_th_l = 100, + .vf_det_th_h = 1500, + +// .batt_present_gpio = GPIO_BATT_PRESENT_N_INT, + + .suspend_chging = true, + .led_indicator = false, + .battery_standever = false, +}; + +static struct platform_device samsung_device_battery = { + .name = "samsung-battery", + .id = -1, + .dev.platform_data = &samsung_battery_pdata, +}; + +#endif + +#ifdef CONFIG_USB_HOST_NOTIFY +#ifdef CONFIG_MFD_MAX77693 +static void otg_accessory_power(int enable) +{ + u8 on = (u8)!!enable; + int err; + + /* max77693 otg power control */ + otg_control(enable); +#if !defined(CONFIG_MACH_M3_USA_TMO) + err = gpio_request(GPIO_OTG_EN, "USB_OTG_EN"); + if (err) + printk(KERN_ERR "failed to request USB_OTG_EN\n"); + gpio_direction_output(GPIO_OTG_EN, on); + gpio_free(GPIO_OTG_EN); +#endif + pr_info("%s: otg accessory power = %d\n", __func__, on); +} + +static void otg_accessory_powered_booster(int enable) +{ + u8 on = (u8)!!enable; + + /* max77693 powered otg power control */ + powered_otg_control(enable); + pr_info("%s: otg accessory power = %d\n", __func__, on); +} + +static struct host_notifier_platform_data host_notifier_pdata = { + .ndev.name = "usb_otg", + .booster = otg_accessory_power, + .powered_booster = otg_accessory_powered_booster, + .thread_enable = 0, +}; + +struct platform_device host_notifier_device = { + .name = "host_notifier", + .dev.platform_data = &host_notifier_pdata, +}; +#else +static void px_usb_otg_power(int active); +#define HOST_NOTIFIER_BOOSTER px_usb_otg_power +#define HOST_NOTIFIER_GPIO GPIO_ACCESSORY_OUT_5V +#define RETRY_CNT_LIMIT 100 + +struct host_notifier_platform_data host_notifier_pdata = { + .ndev.name = "usb_otg", + .gpio = HOST_NOTIFIER_GPIO, + .booster = HOST_NOTIFIER_BOOSTER, + .irq_enable = 1, +}; + +struct platform_device host_notifier_device = { + .name = "host_notifier", + .dev.platform_data = &host_notifier_pdata, +}; + +static void __init acc_chk_gpio_init(void) +{ + int err; + err = gpio_request(GPIO_ACCESSORY_EN, "GPIO_USB_OTG_EN"); + if (err) + printk(KERN_DEBUG "%s gpio_request error!\n", __func__); + else { + s3c_gpio_cfgpin(GPIO_ACCESSORY_EN, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(GPIO_ACCESSORY_EN, S3C_GPIO_PULL_NONE); + gpio_direction_output(GPIO_ACCESSORY_EN, false); + } + + err = gpio_request(GPIO_ACCESSORY_OUT_5V, "gpio_acc_5v"); + if (err) + printk(KERN_DEBUG "%s gpio_request error!\n", __func__); + else { + s3c_gpio_cfgpin(GPIO_ACCESSORY_OUT_5V, S3C_GPIO_SFN(0xf)); + s3c_gpio_setpull(GPIO_ACCESSORY_OUT_5V, S3C_GPIO_PULL_NONE); + gpio_direction_input(GPIO_ACCESSORY_OUT_5V); + } +} +#endif +#endif + +#ifdef CONFIG_30PIN_CONN +static void smdk_accessory_gpio_init(void) +{ + int err; + err = gpio_request(GPIO_ACCESSORY_INT, "accessory"); + if (err) + printk(KERN_DEBUG "%s gpio_request error!\n", __func__); + else { + s3c_gpio_cfgpin(GPIO_ACCESSORY_INT, S3C_GPIO_SFN(0xf)); + s3c_gpio_setpull(GPIO_ACCESSORY_INT, S3C_GPIO_PULL_NONE); + gpio_direction_input(GPIO_ACCESSORY_INT); + } + + err = gpio_request(GPIO_DOCK_INT, "dock"); + if (err) + printk(KERN_DEBUG "%s gpio_request error!\n", __func__); + else { + s3c_gpio_cfgpin(GPIO_DOCK_INT, S3C_GPIO_SFN(0xf)); + s3c_gpio_setpull(GPIO_DOCK_INT, S3C_GPIO_PULL_NONE); + gpio_direction_input(GPIO_DOCK_INT); + } +} + +void smdk_accessory_power(u8 token, bool active) +{ + int gpio_acc_en = 0; + int try_cnt = 0; + int gpio_acc_5v = 0; + static bool enable; + static u8 acc_en_token; + int err; + + /* + token info + 0 : power off, + 1 : Keyboard dock + 2 : USB + */ + gpio_acc_en = GPIO_ACCESSORY_EN; + gpio_acc_5v = GPIO_ACCESSORY_OUT_5V; + + err = gpio_request(gpio_acc_en, "GPIO_ACCESSORY_EN"); + if (err) + printk(KERN_DEBUG "%s gpio_request error!\n", __func__); + else { + s3c_gpio_cfgpin(gpio_acc_en, S3C_GPIO_OUTPUT); + s3c_gpio_setpull(gpio_acc_en, S3C_GPIO_PULL_NONE); + } + + if (active) { + if (acc_en_token) { + pr_info("Board : Keyboard dock is connected.\n"); + gpio_direction_output(gpio_acc_en, 0); + msleep(100); + } + + acc_en_token |= (1 << token); + enable = true; + gpio_direction_output(gpio_acc_en, 1); + usleep_range(2000, 2000); + if (0 != gpio_acc_5v) { + /* prevent the overcurrent */ + while (!gpio_get_value(gpio_acc_5v)) { + gpio_direction_output(gpio_acc_en, 0); + msleep(20); + gpio_direction_output(gpio_acc_en, 1); + if (try_cnt > 10) { + pr_err("[acc] failed to enable the accessory_en"); + break; + } else + try_cnt++; + } + + } else + pr_info("[ACC] gpio_acc_5v is not set\n"); + + } else { + if (0 == token) { + gpio_direction_output(gpio_acc_en, 0); + enable = false; + } else { + acc_en_token &= ~(1 << token); + if (0 == acc_en_token) { + gpio_direction_output(gpio_acc_en, 0); + enable = false; + } + } + } + gpio_free(gpio_acc_en); + pr_info("Board : %s (%d,%d) %s\n", __func__, + token, active, enable ? "on" : "off"); +} + +static int smdk_get_acc_state(void) +{ + return gpio_get_value(GPIO_DOCK_INT); +} + +static int smdk_get_dock_state(void) +{ + return gpio_get_value(GPIO_ACCESSORY_INT); +} + +#ifdef CONFIG_SEC_KEYBOARD_DOCK +static struct sec_keyboard_callbacks *keyboard_callbacks; +static int check_sec_keyboard_dock(bool attached) +{ + if (keyboard_callbacks && keyboard_callbacks->check_keyboard_dock) + return keyboard_callbacks-> + check_keyboard_dock(keyboard_callbacks, attached); + return 0; +} + +/* call 30pin func. from sec_keyboard */ +static struct sec_30pin_callbacks *s30pin_callbacks; +static int noti_sec_univ_kbd_dock(unsigned int code) +{ + if (s30pin_callbacks && s30pin_callbacks->noti_univ_kdb_dock) + return s30pin_callbacks-> + noti_univ_kdb_dock(s30pin_callbacks, code); + return 0; +} + +static void check_uart_path(bool en) +{ + int gpio_uart_sel; +#if (CONFIG_SAMSUNG_ANALOG_UART_SWITCH == 2) + int gpio_uart_sel2; +#endif /* (CONFIG_SAMSUNG_ANALOG_UART_SWITCH == 2) */ + + gpio_uart_sel = GPIO_UART_SEL; +#if (CONFIG_SAMSUNG_ANALOG_UART_SWITCH == 2) + gpio_uart_sel2 = GPIO_UART_SEL2; + + if (en) { + gpio_direction_output(gpio_uart_sel, 1); + gpio_direction_output(gpio_uart_sel2, 1); + printk(KERN_DEBUG "[Keyboard] uart_sel : 1, 1\n"); + } else { + gpio_direction_output(gpio_uart_sel, 1); + gpio_direction_output(gpio_uart_sel2, 0); + printk(KERN_DEBUG "[Keyboard] uart_sel : 0, 0\n"); + } +#else /* (CONFIG_SAMSUNG_ANALOG_UART_SWITCH != 2) */ + if (en) + gpio_direction_output(gpio_uart_sel, 1); + else + gpio_direction_output(gpio_uart_sel, 0); + + printk(KERN_DEBUG "[Keyboard] uart_sel : %d\n", + gpio_get_value(gpio_uart_sel)); +#endif /* (CONFIG_SAMSUNG_ANALOG_UART_SWITCH == 2) */ +} + +static void sec_30pin_register_cb(struct sec_30pin_callbacks *cb) +{ + s30pin_callbacks = cb; +} + +static void sec_keyboard_register_cb(struct sec_keyboard_callbacks *cb) +{ + keyboard_callbacks = cb; +} + +static struct sec_keyboard_platform_data kbd_pdata = { + .accessory_irq_gpio = GPIO_ACCESSORY_INT, + .acc_power = smdk_accessory_power, + .check_uart_path = check_uart_path, + .register_cb = sec_keyboard_register_cb, + .noti_univ_kbd_dock = noti_sec_univ_kbd_dock, + .wakeup_key = NULL, +}; + +static struct platform_device sec_keyboard = { + .name = "sec_keyboard", + .id = -1, + .dev = { + .platform_data = &kbd_pdata, + } +}; +#endif + +#ifdef CONFIG_MOTOR_DRV_DRV2603 +static void drv2603_motor_init(void) +{ + int err; + + err = gpio_request(GPIO_MOTOR_EN, "TSP_LDO_ON"); + if (err) + printk(KERN_DEBUG "%s gpio_request error!\n", __func__); + else { + gpio_direction_output(GPIO_MOTOR_EN, 0); + gpio_export(GPIO_MOTOR_EN, 0); + } +} + +static int drv2603_motor_en(bool en) +{ + return gpio_direction_output(GPIO_MOTOR_EN, en); +} + +static struct drv2603_vibrator_platform_data motor_pdata = { + .gpio_en = drv2603_motor_en, + .max_timeout = 10000, + .pwm_id = 0, + .pwm_duty = 38000, + .pwm_period = 38100, +}; + +static struct platform_device sec_motor = { + .name = "drv2603_vibrator", + .id = -1, + .dev = { + .platform_data = &motor_pdata, + } +}; +#endif + +#ifdef CONFIG_USB_HOST_NOTIFY +#ifndef CONFIG_MFD_MAX77693 +static void px_usb_otg_power(int active) +{ + smdk_accessory_power(2, active); +} + +static void px_usb_otg_en(int active) +{ + pr_info("otg %s : %d\n", __func__, active); + + usb_switch_lock(); + + if (active) { + +#ifdef CONFIG_USB_EHCI_S5P + pm_runtime_get_sync(&s5p_device_ehci.dev); +#endif +#ifdef CONFIG_USB_OHCI_S5P + pm_runtime_get_sync(&s5p_device_ohci.dev); +#endif + usb_switch_set_path(USB_PATH_AP); + px_usb_otg_power(1); + + msleep(500); + + host_notifier_pdata.ndev.mode = NOTIFY_HOST_MODE; + if (host_notifier_pdata.usbhostd_start) + host_notifier_pdata.usbhostd_start(); + } else { + +#ifdef CONFIG_USB_OHCI_S5P + pm_runtime_put_sync(&s5p_device_ohci.dev); +#endif +#ifdef CONFIG_USB_EHCI_S5P + pm_runtime_put_sync(&s5p_device_ehci.dev); +#endif + + usb_switch_clr_path(USB_PATH_AP); + host_notifier_pdata.ndev.mode = NOTIFY_NONE_MODE; + if (host_notifier_pdata.usbhostd_stop) + host_notifier_pdata.usbhostd_stop(); + px_usb_otg_power(0); + } + + usb_switch_unlock(); +} +#endif +#endif + +struct acc_con_platform_data acc_con_pdata = { + .otg_en = px_usb_otg_en, + .acc_power = smdk_accessory_power, + .usb_ldo_en = NULL, + .get_acc_state = smdk_get_acc_state, + .get_dock_state = smdk_get_dock_state, +#ifdef CONFIG_SEC_KEYBOARD_DOCK + .check_keyboard = check_sec_keyboard_dock, +#endif + .register_cb = sec_30pin_register_cb, + .accessory_irq_gpio = GPIO_ACCESSORY_INT, + .dock_irq_gpio = GPIO_DOCK_INT, +#if defined(CONFIG_SAMSUNG_MHL_9290) + .mhl_irq_gpio = GPIO_MHL_INT, + .hdmi_hpd_gpio = GPIO_HDMI_HPD, +#endif +}; +struct platform_device sec_device_connector = { + .name = "acc_con", + .id = -1, + .dev.platform_data = &acc_con_pdata, +}; +#endif + +#ifdef CONFIG_VIDEO_FIMG2D +static struct fimg2d_platdata fimg2d_data __initdata = { + .hw_ver = 0x41, + .parent_clkname = "mout_g2d0", + .clkname = "sclk_fimg2d", + .gate_clkname = "fimg2d", + .clkrate = 199 * 1000000, /* 160 Mhz */ +}; +#endif + +/* BUSFREQ to control memory/bus */ +static struct device_domain busfreq; + +static struct platform_device exynos4_busfreq = { + .id = -1, + .name = "exynos-busfreq", +}; + +#ifdef CONFIG_SEC_WATCHDOG_RESET +static struct platform_device watchdog_reset_device = { + .name = "watchdog-reset", + .id = -1, +}; +#endif + +#ifdef CONFIG_CORESIGHT_ETM +#define CORESIGHT_PHYS_BASE 0x10880000 +#define CORESIGHT_ETB_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1000) +#define CORESIGHT_TPIU_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x3000) +#define CORESIGHT_FUNNEL_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x4000) +#define CORESIGHT_ETM_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1C000) + +static struct resource coresight_etb_resources[] = { + { + .start = CORESIGHT_ETB_PHYS_BASE, + .end = CORESIGHT_ETB_PHYS_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device coresight_etb_device = { + .name = "coresight_etb", + .id = -1, + .num_resources = ARRAY_SIZE(coresight_etb_resources), + .resource = coresight_etb_resources, +}; + +static struct resource coresight_tpiu_resources[] = { + { + .start = CORESIGHT_TPIU_PHYS_BASE, + .end = CORESIGHT_TPIU_PHYS_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device coresight_tpiu_device = { + .name = "coresight_tpiu", + .id = -1, + .num_resources = ARRAY_SIZE(coresight_tpiu_resources), + .resource = coresight_tpiu_resources, +}; + +static struct resource coresight_funnel_resources[] = { + { + .start = CORESIGHT_FUNNEL_PHYS_BASE, + .end = CORESIGHT_FUNNEL_PHYS_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device coresight_funnel_device = { + .name = "coresight_funnel", + .id = -1, + .num_resources = ARRAY_SIZE(coresight_funnel_resources), + .resource = coresight_funnel_resources, +}; + +static struct resource coresight_etm_resources[] = { + { + .start = CORESIGHT_ETM_PHYS_BASE, + .end = CORESIGHT_ETM_PHYS_BASE + (SZ_4K * 4) - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device coresight_etm_device = { + .name = "coresight_etm", + .id = -1, + .num_resources = ARRAY_SIZE(coresight_etm_resources), + .resource = coresight_etm_resources, +}; +#endif + +static struct platform_device *midas_devices[] __initdata = { +#ifdef CONFIG_SEC_WATCHDOG_RESET + &watchdog_reset_device, +#endif +#ifdef CONFIG_ANDROID_RAM_CONSOLE + &ram_console_device, +#endif + /* Samsung Power Domain */ + &exynos4_device_pd[PD_MFC], + &exynos4_device_pd[PD_G3D], + &exynos4_device_pd[PD_LCD0], + &exynos4_device_pd[PD_CAM], + &exynos4_device_pd[PD_TV], + &exynos4_device_pd[PD_GPS], +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + &exynos4_device_pd[PD_ISP], +#endif + &exynos4_device_pd[PD_GPS_ALIVE], + /* legacy fimd */ +#ifdef CONFIG_FB_S5P + &s3c_device_fb, +#endif + +#ifdef CONFIG_FB_S5P_MDNIE + &mdnie_device, +#endif + +#ifdef CONFIG_HAVE_PWM + &s3c_device_timer[0], + &s3c_device_timer[1], + &s3c_device_timer[2], + &s3c_device_timer[3], +#endif + +#ifdef CONFIG_SND_SOC_WM8994 + &vbatt_device, +#endif + + &s3c_device_wdt, + &s3c_device_rtc, + + &s3c_device_i2c0, + +#ifdef CONFIG_S3C_DEV_I2C3 + &s3c_device_i2c3, +#endif +#ifdef CONFIG_S3C_DEV_I2C4 + &s3c_device_i2c4, +#endif + /* &s3c_device_i2c5, */ +#ifdef CONFIG_S3C_DEV_I2C6 + &s3c_device_i2c6, +#endif + &s3c_device_i2c7, +#ifdef CONFIG_S3C_DEV_I2C8 + &s3c_device_i2c8, +#endif + /* &s3c_device_i2c9, */ +#if defined (CONFIG_BATTERY_MAX17047_FUELGAUGE) || defined(CONFIG_BATTERY_MAX17047_C_FUELGAUGE) + &s3c_device_i2c14, /* max17047-fuelgauge */ +#endif +#ifdef CONFIG_SAMSUNG_MHL + &s3c_device_i2c15, +#endif +#if defined(CONFIG_MFD_MAX77693) + &s3c_device_i2c17, +#endif +#ifdef CONFIG_IR_REMOCON_MC96 + &s3c_device_i2c22, +#endif + +#if 0 +#ifdef CONFIG_FB_S5P_NT71391 + &s3c_device_i2c23, +#endif +#endif + +#ifdef CONFIG_BACKLIGHT_LP855X + &s3c_device_i2c24, +#endif + +#if defined CONFIG_USB_EHCI_S5P && !defined CONFIG_LINK_DEVICE_HSIC + &s5p_device_ehci, +#endif +#if defined CONFIG_USB_OHCI_S5P && !defined CONFIG_LINK_DEVICE_HSIC + &s5p_device_ohci, +#endif +#ifdef CONFIG_USB_GADGET + &s3c_device_usbgadget, +#endif +#ifdef CONFIG_USB_ANDROID_RNDIS + &s3c_device_rndis, +#endif +#if defined(CONFIG_USB_ANDROID) || defined(CONFIG_USB_G_ANDROID) + &s3c_device_android_usb, + &s3c_device_usb_mass_storage, +#endif +#ifdef CONFIG_EXYNOS4_DEV_MSHC + &s3c_device_mshci, +#endif +#ifdef CONFIG_S3C_DEV_HSMMC + &s3c_device_hsmmc0, +#endif +#ifdef CONFIG_S3C_DEV_HSMMC1 + &s3c_device_hsmmc1, +#endif +#ifdef CONFIG_S3C_DEV_HSMMC2 + &s3c_device_hsmmc2, +#endif +#ifdef CONFIG_S3C_DEV_HSMMC3 + &s3c_device_hsmmc3, +#endif + +#ifdef CONFIG_SND_SAMSUNG_AC97 + &exynos_device_ac97, +#endif +#ifdef CONFIG_SND_SAMSUNG_I2S + &exynos_device_i2s0, +#endif +#ifdef CONFIG_SND_SAMSUNG_PCM + &exynos_device_pcm0, +#endif +#ifdef CONFIG_SND_SAMSUNG_SPDIF + &exynos_device_spdif, +#endif +#if defined(CONFIG_SND_SAMSUNG_RP) || defined(CONFIG_SND_SAMSUNG_ALP) + &exynos_device_srp, +#endif +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + &exynos4_device_fimc_is, +#endif +#ifdef CONFIG_VIDEO_TVOUT + &s5p_device_tvout, + &s5p_device_cec, + &s5p_device_hpd, +#endif +#ifdef CONFIG_FB_S5P_EXTDSP + &s3c_device_extdsp, +#endif +#ifdef CONFIG_VIDEO_FIMC + &s3c_device_fimc0, + &s3c_device_fimc1, + &s3c_device_fimc2, + &s3c_device_fimc3, +/* CONFIG_VIDEO_SAMSUNG_S5P_FIMC is the feature for mainline */ +#elif defined(CONFIG_VIDEO_SAMSUNG_S5P_FIMC) + &s5p_device_fimc0, + &s5p_device_fimc1, + &s5p_device_fimc2, + &s5p_device_fimc3, +#endif +#if defined(CONFIG_VIDEO_FIMC_MIPI) + &s3c_device_csis0, + &s3c_device_csis1, +#endif +#if defined(CONFIG_VIDEO_MFC5X) || defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC) + &s5p_device_mfc, +#endif +#ifdef CONFIG_S5P_SYSTEM_MMU + &SYSMMU_PLATDEV(g2d_acp), + &SYSMMU_PLATDEV(fimc0), + &SYSMMU_PLATDEV(fimc1), + &SYSMMU_PLATDEV(fimc2), + &SYSMMU_PLATDEV(fimc3), + &SYSMMU_PLATDEV(jpeg), + &SYSMMU_PLATDEV(mfc_l), + &SYSMMU_PLATDEV(mfc_r), + &SYSMMU_PLATDEV(tv), +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + &SYSMMU_PLATDEV(is_isp), + &SYSMMU_PLATDEV(is_drc), + &SYSMMU_PLATDEV(is_fd), + &SYSMMU_PLATDEV(is_cpu), +#endif +#endif +#ifdef CONFIG_ION_EXYNOS + &exynos_device_ion, +#endif +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_LITE + &exynos_device_flite0, + &exynos_device_flite1, +#endif +#ifdef CONFIG_VIDEO_FIMG2D + &s5p_device_fimg2d, +#endif + +#ifdef CONFIG_VIDEO_JPEG_V2X + &s5p_device_jpeg, +#endif + &samsung_asoc_dma, +#ifndef CONFIG_SND_SOC_SAMSUNG_USE_DMA_WRAPPER + &samsung_asoc_idma, +#endif +#ifdef CONFIG_BT_BCM4334 + &bcm4334_bluetooth_device, +#endif +#ifdef CONFIG_S5P_DEV_ACE + &s5p_device_ace, +#endif + &exynos4_busfreq, +#ifdef CONFIG_USB_HOST_NOTIFY + &host_notifier_device, +#endif +#ifdef CONFIG_EXYNOS4_SETUP_THERMAL + &s5p_device_tmu, +#endif +#ifdef CONFIG_30PIN_CONN + &sec_device_connector, +#ifdef CONFIG_SEC_KEYBOARD_DOCK + &sec_keyboard, +#endif +#ifdef CONFIG_MOTOR_DRV_DRV2603 + &sec_motor, +#endif +#endif +#ifdef CONFIG_CORESIGHT_ETM + &coresight_etb_device, + &coresight_tpiu_device, + &coresight_funnel_device, + &coresight_etm_device, +#endif +}; + +#ifdef CONFIG_EXYNOS4_SETUP_THERMAL +/* below temperature base on the celcius degree */ +struct s5p_platform_tmu midas_tmu_data __initdata = { + .ts = { + .stop_1st_throttle = 90, + .start_1st_throttle = 100, + .stop_2nd_throttle = 103, + .start_2nd_throttle = 105, + .start_tripping = 110, /* temp to do tripping */ + .start_emergency = 120, /* To protect chip,forcely kernel panic */ + .stop_mem_throttle = 80, + .start_mem_throttle = 85, + .stop_tc = 13, + .start_tc = 10, + }, + .cpufreq = { + .limit_1st_throttle = 800000, /* 800MHz in KHz order */ + .limit_2nd_throttle = 200000, /* 200MHz in KHz order */ + }, + .temp_compensate = { + .arm_volt = 925000, /* vdd_arm in uV for temp compensation */ + .bus_volt = 900000, /* vdd_bus in uV for temp compensation */ + .g3d_volt = 900000, /* vdd_g3d in uV for temp compensation */ + }, +}; +#endif + +#if defined CONFIG_USB_OHCI_S5P && defined CONFIG_LINK_DEVICE_HSIC +static int __init s5p_ohci_device_initcall(void) +{ + return platform_device_register(&s5p_device_ohci); +} +late_initcall(s5p_ohci_device_initcall); +#endif +#if defined CONFIG_USB_EHCI_S5P && defined CONFIG_LINK_DEVICE_HSIC +static int __init s5p_ehci_device_initcall(void) +{ + return platform_device_register(&s5p_device_ehci); +} +late_initcall(s5p_ehci_device_initcall); +#endif + +#if defined(CONFIG_VIDEO_TVOUT) +static struct s5p_platform_hpd hdmi_hpd_data __initdata = { + +}; +static struct s5p_platform_cec hdmi_cec_data __initdata = { + +}; +#endif + +#if defined(CONFIG_CMA) +static void __init exynos4_reserve_mem(void) +{ + static struct cma_region regions[] = { +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + { + .name = "fimc_is", + .size = CONFIG_VIDEO_EXYNOS_MEMSIZE_FIMC_IS * SZ_1K, + { + .alignment = 1 << 26, + }, + .start = 0 + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMD + { + .name = "fimd", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMD * SZ_1K, + { + .alignment = 1 << 20, + }, + .start = 0 + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC0 + { + .name = "fimc0", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC0 * SZ_1K, + .start = 0 + }, +#endif +#if !defined(CONFIG_EXYNOS_CONTENT_PATH_PROTECTION) && \ + defined(CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC0) + { + .name = "mfc0", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC0 * SZ_1K, + { + .alignment = 1 << 17, + }, + .start = 0, + }, +#endif +#if !defined(CONFIG_EXYNOS_CONTENT_PATH_PROTECTION) && \ + defined(CONFIG_ION_EXYNOS_CONTIGHEAP_SIZE) + { + .name = "ion", + .size = CONFIG_ION_EXYNOS_CONTIGHEAP_SIZE * SZ_1K, + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC + { + .name = "mfc", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC * SZ_1K, + { + .alignment = 1 << 17, + }, + .start = 0 + }, +#endif +#if !defined(CONFIG_EXYNOS_CONTENT_PATH_PROTECTION) && \ + defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC) + { + .name = "b2", + .size = 32 << 20, + { .alignment = 128 << 10 }, + }, + { + .name = "b1", + .size = 32 << 20, + { .alignment = 128 << 10 }, + }, + { + .name = "fw", + .size = 1 << 20, + { .alignment = 128 << 10 }, + }, +#endif +#if (CONFIG_VIDEO_SAMSUNG_MEMSIZE_JPEG > 0) + { + .name = "jpeg", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_JPEG * SZ_1K, + .start = 0 + }, +#endif +#ifdef CONFIG_AUDIO_SAMSUNG_MEMSIZE_SRP + { + .name = "srp", + .size = CONFIG_AUDIO_SAMSUNG_MEMSIZE_SRP * SZ_1K, + .start = 0, + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMG2D + { + .name = "fimg2d", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMG2D * SZ_1K, + .start = 0 + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC1 + { + .name = "fimc1", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC1 * SZ_1K, + .start = 0x65c00000, + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC1 + { + .name = "mfc1", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC1 * SZ_1K, + { + .alignment = 1 << 26, + }, + .start = 0x64000000, + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC_NORMAL + { + .name = "mfc-normal", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC_NORMAL * SZ_1K, + .start = 0x64000000, + }, +#endif + { + .size = 0 + }, + }; +#ifdef CONFIG_EXYNOS_CONTENT_PATH_PROTECTION + static struct cma_region regions_secure[] = { +#ifdef CONFIG_ION_EXYNOS_CONTIGHEAP_SIZE + { + .name = "ion", + .size = CONFIG_ION_EXYNOS_CONTIGHEAP_SIZE * SZ_1K, + }, +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC_SECURE + { + .name = "mfc-secure", + .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_MFC_SECURE * SZ_1K, + }, +#endif + { + .name = "sectbl", + .size = SZ_1M, + }, + { + .size = 0 + }, + }; +#else /* !CONFIG_EXYNOS_CONTENT_PATH_PROTECTION */ + struct cma_region *regions_secure = NULL; +#endif + + static const char map[] __initconst = + "s3cfb.0=fimd;exynos4-fb.0=fimd;" + "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;s3c-fimc.3=fimc3;" + "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;exynos4210-fimc.2=fimc2;exynos4210-fimc.3=fimc3;" +#ifdef CONFIG_ION_EXYNOS + "ion-exynos=ion;" +#endif +#ifdef CONFIG_VIDEO_MFC5X + "s3c-mfc/A=mfc0,mfc-secure;" + "s3c-mfc/B=mfc1,mfc-normal;" + "s3c-mfc/AB=mfc;" +#endif +#ifdef CONFIG_VIDEO_SAMSUNG_S5P_MFC + "s5p-mfc/f=fw;" + "s5p-mfc/a=b1;" + "s5p-mfc/b=b2;" +#endif + "samsung-rp=srp;" +#if (CONFIG_VIDEO_SAMSUNG_MEMSIZE_JPEG > 0) + "s5p-jpeg=jpeg;" +#endif +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + "exynos4-fimc-is=fimc_is;" +#endif + "s5p-fimg2d=fimg2d;" +#ifdef CONFIG_EXYNOS_CONTENT_PATH_PROTECTION + "s5p-smem/sectbl=sectbl;" +#endif + "s5p-smem/mfc=mfc-secure;" + "s5p-smem/fimc=ion;" + "s5p-smem/mfc-shm=mfc-normal;" + "s5p-smem/fimd=fimd;" + "s5p-smem/fimc0=fimc0;"; + + s5p_cma_region_reserve(regions, regions_secure, 0, map); +} +#else +static inline void exynos4_reserve_mem(void) +{ +} +#endif + +#ifdef CONFIG_BACKLIGHT_PWM +/* LCD Backlight data */ +static struct samsung_bl_gpio_info smdk4212_bl_gpio_info = { + .no = GPIO_LED_BACKLIGHT_PWM, + .func = S3C_GPIO_SFN(2), +}; + +static struct platform_pwm_backlight_data smdk4212_bl_data = { + .pwm_id = 1, +}; +#endif + +static void __init midas_map_io(void) +{ + clk_xusbxti.rate = 24000000; + s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s3c24xx_init_clocks(24000000); + s3c24xx_init_uarts(smdk4212_uartcfgs, ARRAY_SIZE(smdk4212_uartcfgs)); + +#if defined(CONFIG_S5P_MEM_CMA) + exynos4_reserve_mem(); +#endif + + /* as soon as INFORM6 is visible, sec_debug is ready to run */ + sec_debug_init(); +} + +static void __init exynos_sysmmu_init(void) +{ + ASSIGN_SYSMMU_POWERDOMAIN(fimc0, &exynos4_device_pd[PD_CAM].dev); + ASSIGN_SYSMMU_POWERDOMAIN(fimc1, &exynos4_device_pd[PD_CAM].dev); + ASSIGN_SYSMMU_POWERDOMAIN(fimc2, &exynos4_device_pd[PD_CAM].dev); + ASSIGN_SYSMMU_POWERDOMAIN(fimc3, &exynos4_device_pd[PD_CAM].dev); + ASSIGN_SYSMMU_POWERDOMAIN(jpeg, &exynos4_device_pd[PD_CAM].dev); + +#if defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC) || defined(CONFIG_VIDEO_MFC5X) + ASSIGN_SYSMMU_POWERDOMAIN(mfc_l, &exynos4_device_pd[PD_MFC].dev); + ASSIGN_SYSMMU_POWERDOMAIN(mfc_r, &exynos4_device_pd[PD_MFC].dev); +#endif + ASSIGN_SYSMMU_POWERDOMAIN(tv, &exynos4_device_pd[PD_TV].dev); +#ifdef CONFIG_VIDEO_FIMG2D + sysmmu_set_owner(&SYSMMU_PLATDEV(g2d_acp).dev, &s5p_device_fimg2d.dev); +#endif +#ifdef CONFIG_VIDEO_MFC5X + sysmmu_set_owner(&SYSMMU_PLATDEV(mfc_l).dev, &s5p_device_mfc.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(mfc_r).dev, &s5p_device_mfc.dev); +#endif +#ifdef CONFIG_VIDEO_FIMC + sysmmu_set_owner(&SYSMMU_PLATDEV(fimc0).dev, &s3c_device_fimc0.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(fimc1).dev, &s3c_device_fimc1.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(fimc2).dev, &s3c_device_fimc2.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(fimc3).dev, &s3c_device_fimc3.dev); +#endif +#ifdef CONFIG_VIDEO_TVOUT + sysmmu_set_owner(&SYSMMU_PLATDEV(tv).dev, &s5p_device_tvout.dev); +#endif +#ifdef CONFIG_VIDEO_JPEG_V2X + sysmmu_set_owner(&SYSMMU_PLATDEV(jpeg).dev, &s5p_device_jpeg.dev); +#endif +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + ASSIGN_SYSMMU_POWERDOMAIN(is_isp, &exynos4_device_pd[PD_ISP].dev); + ASSIGN_SYSMMU_POWERDOMAIN(is_drc, &exynos4_device_pd[PD_ISP].dev); + ASSIGN_SYSMMU_POWERDOMAIN(is_fd, &exynos4_device_pd[PD_ISP].dev); + ASSIGN_SYSMMU_POWERDOMAIN(is_cpu, &exynos4_device_pd[PD_ISP].dev); + + sysmmu_set_owner(&SYSMMU_PLATDEV(is_isp).dev, + &exynos4_device_fimc_is.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(is_drc).dev, + &exynos4_device_fimc_is.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(is_fd).dev, + &exynos4_device_fimc_is.dev); + sysmmu_set_owner(&SYSMMU_PLATDEV(is_cpu).dev, + &exynos4_device_fimc_is.dev); +#endif +} + +#ifdef CONFIG_FB_S5P_EXTDSP +struct platform_device s3c_device_extdsp = { + .name = "s3cfb_extdsp", + .id = 0, +}; + +static struct s3cfb_extdsp_lcd dummy_buffer = { + .width = 1920, + .height = 1080, + .bpp = 16, +}; + +static struct s3c_platform_fb default_extdsp_data __initdata = { + .hw_ver = 0x70, + .nr_wins = 1, + .default_win = 0, + .swap = FB_SWAP_WORD | FB_SWAP_HWORD, + .lcd = &dummy_buffer +}; + +void __init s3cfb_extdsp_set_platdata(struct s3c_platform_fb *pd) +{ + struct s3c_platform_fb *npd; + int i; + + if (!pd) + pd = &default_extdsp_data; + + npd = kmemdup(pd, sizeof(struct s3c_platform_fb), GFP_KERNEL); + if (!npd) + printk(KERN_ERR "%s: no memory for platform data\n", __func__); + else { + for (i = 0; i < npd->nr_wins; i++) + npd->nr_buffers[i] = 1; + s3c_device_extdsp.dev.platform_data = npd; + } +} +#endif + +static void __init midas_machine_init(void) +{ + struct clk *ppmu_clk = NULL; + /* + * prevent 4x12 ISP power off problem + * ISP_SYS Register has to be 0 before ISP block power off. + */ + __raw_writel(0x0, S5P_CMU_RESET_ISP_SYS); + + /* initialise the gpios */ + midas_config_gpio_table(); + exynos4_sleep_gpio_table_set = midas_config_sleep_gpio_table; + + midas_power_init(); + + s3c_i2c0_set_platdata(NULL); + i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); + + kona_tsp_init(system_rev); + kona_key_init(); + +#ifdef CONFIG_MOTOR_DRV_DRV2603 + drv2603_motor_init(); +#endif + + midas_sound_init(); + +#ifdef CONFIG_S3C_DEV_I2C5 + s3c_i2c5_set_platdata(&default_i2c5_data); + i2c_register_board_info(5, i2c_devs5, + ARRAY_SIZE(i2c_devs5)); +#endif + +#ifdef CONFIG_S3C_DEV_I2C6 + s3c_i2c6_set_platdata(NULL); +#endif +#if defined(CONFIG_INPUT_WACOM) + midas_wacom_init(); +#endif + + s3c_i2c7_set_platdata(NULL); + i2c_register_board_info(7, i2c_devs7, ARRAY_SIZE(i2c_devs7)); + i2c_register_board_info(9, i2c_devs9_emul, ARRAY_SIZE(i2c_devs9_emul)); + i2c_register_board_info(11, i2c_devs11_emul, + ARRAY_SIZE(i2c_devs11_emul)); + +#if defined(CONFIG_BATTERY_SAMSUNG_P1X) + exynos_kona_charger_init(); +#endif +#if defined (CONFIG_BATTERY_MAX17047_FUELGAUGE) || defined(CONFIG_BATTERY_MAX17047_C_FUELGAUGE) + printk(KERN_INFO "%s() register fuelgauge driver\n", __func__); + i2c_register_board_info(14, i2c_devs14_emul, + ARRAY_SIZE(i2c_devs14_emul)); +#endif +#ifdef CONFIG_SAMSUNG_MHL + printk(KERN_INFO "%s() register sii9234 driver\n", __func__); + + i2c_register_board_info(15, i2c_devs15_emul, + ARRAY_SIZE(i2c_devs15_emul)); +#endif +#if defined(CONFIG_MFD_MAX77693) + i2c_register_board_info(17, i2c_devs17_emul, + ARRAY_SIZE(i2c_devs17_emul)); +#endif +#if defined(CONFIG_STMPE811_ADC) + i2c_register_board_info(19, i2c_devs19_emul, + ARRAY_SIZE(i2c_devs19_emul)); +#endif +#ifdef CONFIG_IR_REMOCON_MC96 + i2c_register_board_info(22, i2c_devs22_emul, + ARRAY_SIZE(i2c_devs22_emul)); +#endif +#if defined(GPIO_OLED_DET) + gpio_request(GPIO_OLED_DET, "OLED_DET"); + s5p_register_gpio_interrupt(GPIO_OLED_DET); + gpio_free(GPIO_OLED_DET); +#endif +#ifdef CONFIG_FB_S5P +#if defined(CONFIG_FB_S5P_MIPI_DSIM) + mipi_fb_init(); +#elif defined(CONFIG_BACKLIGHT_PWM) + samsung_bl_set(&smdk4212_bl_gpio_info, &smdk4212_bl_data); +#endif + s3cfb_set_platdata(&fb_platform_data); +#ifdef CONFIG_EXYNOS_DEV_PD + s3c_device_fb.dev.parent = &exynos4_device_pd[PD_LCD0].dev; +#endif +#endif +#ifdef CONFIG_USB_EHCI_S5P + smdk4212_ehci_init(); +#endif +#ifdef CONFIG_USB_OHCI_S5P + smdk4212_ohci_init(); +#endif +#ifdef CONFIG_USB_GADGET + smdk4212_usbgadget_init(); +#endif + +#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS + exynos4_fimc_is_set_platdata(NULL); +#ifdef CONFIG_EXYNOS_DEV_PD + exynos4_device_fimc_is.dev.parent = &exynos4_device_pd[PD_ISP].dev; +#endif +#endif +#ifdef CONFIG_EXYNOS4_DEV_MSHC + s3c_mshci_set_platdata(&exynos4_mshc_pdata); +#endif +#ifdef CONFIG_S3C_DEV_HSMMC + s3c_sdhci0_set_platdata(&smdk4212_hsmmc0_pdata); +#endif +#ifdef CONFIG_S3C_DEV_HSMMC1 + s3c_sdhci1_set_platdata(&smdk4212_hsmmc1_pdata); +#endif +#ifdef CONFIG_S3C_DEV_HSMMC2 + s3c_sdhci2_set_platdata(&smdk4212_hsmmc2_pdata); +#endif +#ifdef CONFIG_S3C_DEV_HSMMC3 + s3c_sdhci3_set_platdata(&smdk4212_hsmmc3_pdata); +#endif + + midas_camera_init(); + +#ifdef CONFIG_FB_S5P_EXTDSP + s3cfb_extdsp_set_platdata(&default_extdsp_data); +#endif + +#if defined(CONFIG_VIDEO_TVOUT) + s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data); + s5p_hdmi_cec_set_platdata(&hdmi_cec_data); +#ifdef CONFIG_EXYNOS_DEV_PD + s5p_device_tvout.dev.parent = &exynos4_device_pd[PD_TV].dev; + exynos4_device_pd[PD_TV].dev.parent = &exynos4_device_pd[PD_LCD0].dev; +#endif +#endif + +#ifdef CONFIG_MACH_KONA_SENSOR + kona_sensor_init(); +#endif + +#ifdef CONFIG_VIDEO_JPEG_V2X +#ifdef CONFIG_EXYNOS_DEV_PD + s5p_device_jpeg.dev.parent = &exynos4_device_pd[PD_CAM].dev; + exynos4_jpeg_setup_clock(&s5p_device_jpeg.dev, 160000000); +#endif +#endif + +#ifdef CONFIG_ION_EXYNOS + exynos_ion_set_platdata(); +#endif + +#if defined(CONFIG_VIDEO_MFC5X) || defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC) +#ifdef CONFIG_EXYNOS_DEV_PD + s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; +#endif + exynos4_mfc_setup_clock(&s5p_device_mfc.dev, 200 * MHZ); +#endif + +#if defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC) + dev_set_name(&s5p_device_mfc.dev, "s3c-mfc"); + clk_add_alias("mfc", "s5p-mfc", "mfc", &s5p_device_mfc.dev); + s5p_mfc_setname(&s5p_device_mfc, "s5p-mfc"); +#endif +#ifdef CONFIG_VIDEO_FIMG2D + s5p_fimg2d_set_platdata(&fimg2d_data); +#endif + + brcm_wlan_init(); + +#ifdef CONFIG_EXYNOS4_SETUP_THERMAL + s5p_tmu_set_platdata(&midas_tmu_data); +#endif + + exynos_sysmmu_init(); + + platform_add_devices(midas_devices, ARRAY_SIZE(midas_devices)); + +#ifdef CONFIG_S3C_ADC + platform_device_register(&s3c_device_adc); +#endif +#if defined(CONFIG_STMPE811_ADC) + platform_device_register(&s3c_device_i2c19); +#endif +#if defined(CONFIG_BATTERY_SAMSUNG) + platform_device_register(&samsung_device_battery); +#endif +#ifdef CONFIG_SEC_THERMISTOR + platform_device_register(&sec_device_thermistor); +#endif +#if defined(CONFIG_S3C_DEV_I2C5) + platform_device_register(&s3c_device_i2c5); +#endif +#ifdef CONFIG_30PIN_CONN + smdk_accessory_gpio_init(); +#endif +#ifdef CONFIG_USB_HOST_NOTIFY +#ifndef CONFIG_MFD_MAX77693 + acc_chk_gpio_init(); +#endif +#endif + +#ifdef CONFIG_BUSFREQ_OPP + dev_add(&busfreq, &exynos4_busfreq.dev); + + /* PPMUs using for cpufreq get clk from clk_list */ + ppmu_clk = clk_get(NULL, "ppmudmc0"); + if (IS_ERR(ppmu_clk)) + printk(KERN_ERR "failed to get ppmu_dmc0\n"); + clk_enable(ppmu_clk); + clk_put(ppmu_clk); + + ppmu_clk = clk_get(NULL, "ppmudmc1"); + if (IS_ERR(ppmu_clk)) + printk(KERN_ERR "failed to get ppmu_dmc1\n"); + clk_enable(ppmu_clk); + clk_put(ppmu_clk); + + ppmu_clk = clk_get(NULL, "ppmucpu"); + if (IS_ERR(ppmu_clk)) + printk(KERN_ERR "failed to get ppmu_cpu\n"); + clk_enable(ppmu_clk); + clk_put(ppmu_clk); + + ppmu_init(&exynos_ppmu[PPMU_DMC0], &exynos4_busfreq.dev); + ppmu_init(&exynos_ppmu[PPMU_DMC1], &exynos4_busfreq.dev); + ppmu_init(&exynos_ppmu[PPMU_CPU], &exynos4_busfreq.dev); +#endif + + /* 400 kHz for initialization of MMC Card */ + __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS3) & 0xfffffff0) + | 0x9, EXYNOS4_CLKDIV_FSYS3); + /* kona sdhc2,3 clock 44Mhz */ + __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS2) & 0xfff0fff0) + | 0x90009, EXYNOS4_CLKDIV_FSYS2); + __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS1) & 0xfff0fff0) + | 0x80008, EXYNOS4_CLKDIV_FSYS1); + +/* IR_LED */ +#if defined(CONFIG_IR_REMOCON_MC96) + irda_device_init(); +#endif +/* IR_LED */ +} + +static void __init exynos_init_reserve(void) +{ + sec_debug_magic_init(); +} + +MACHINE_START(SMDK4412, "SMDK4x12") + .boot_params = S5P_PA_SDRAM + 0x100, + .init_irq = exynos4_init_irq, + .map_io = midas_map_io, + .init_machine = midas_machine_init, + .timer = &exynos4_timer, + .init_early = &exynos_init_reserve, +MACHINE_END diff --git a/arch/arm/mach-exynos/mach-midas.c b/arch/arm/mach-exynos/mach-midas.c index c2de56b..46161be 100644 --- a/arch/arm/mach-exynos/mach-midas.c +++ b/arch/arm/mach-exynos/mach-midas.c @@ -2675,7 +2675,7 @@ static void __init exynos4_reserve_mem(void) #ifdef CONFIG_EXYNOS_C2C "samsung-c2c=c2c_shdmem;" #endif - "s3cfb.0=fimd;exynos4-fb.0=fimd;" + "s3cfb.0=fimd;exynos4-fb.0=fimd;samsung-pd.1=fimd;" "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;s3c-fimc.3=fimc3;" "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;exynos4210-fimc.2=fimc2;exynos4210-fimc.3=fimc3;" #ifdef CONFIG_ION_EXYNOS diff --git a/arch/arm/mach-exynos/mach-p4notepq.c b/arch/arm/mach-exynos/mach-p4notepq.c index eafb3b9..1502556 100644 --- a/arch/arm/mach-exynos/mach-p4notepq.c +++ b/arch/arm/mach-exynos/mach-p4notepq.c @@ -2259,7 +2259,7 @@ static void __init exynos4_reserve_mem(void) #ifdef CONFIG_EXYNOS_C2C "samsung-c2c=c2c_shdmem;" #endif - "s3cfb.0=fimd;exynos4-fb.0=fimd;" + "s3cfb.0=fimd;exynos4-fb.0=fimd;samsung-pd.1=fimd;" "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;s3c-fimc.3=fimc3;" "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;exynos4210-fimc.2=fimc2;exynos4210-fimc.3=fimc3;" #ifdef CONFIG_ION_EXYNOS diff --git a/arch/arm/mach-exynos/mach-px.c b/arch/arm/mach-exynos/mach-px.c index c5c4cc8..eaec80f 100644 --- a/arch/arm/mach-exynos/mach-px.c +++ b/arch/arm/mach-exynos/mach-px.c @@ -7246,9 +7246,9 @@ static void __init exynos4_reserve_mem(void) static const char map[] __initconst = "android_pmem.0=pmem;android_pmem.1=pmem_gpu1;" - "s3cfb.0=fimd;exynos4-fb.0=fimd;" - "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;" - "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;exynos4210-fimc.2=fimc2;exynos4210-fimc3=fimc3;" + "s3cfb.0=fimd;exynos4-fb.0=fimd;samsung-pd.1=fimd;" + "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;s3c-fimc.3=fimc3;" + "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;exynos4210-fimc.2=fimc2;exynos4210-fimc.3=fimc3;" #ifdef CONFIG_VIDEO_MFC5X "s3c-mfc/A=mfc0,mfc-secure;" "s3c-mfc/B=mfc1,mfc-normal;" diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index 97daba2..da004f3 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c @@ -3693,7 +3693,7 @@ static void __init exynos4_reserve_mem(void) #ifdef CONFIG_EXYNOS_C2C "samsung-c2c=c2c_shdmem;" #endif - "s3cfb.0/fimd=fimd;exynos4-fb.0/fimd=fimd;" + "s3cfb.0/fimd=fimd;exynos4-fb.0/fimd=fimd;samsung-pd.1=fimd;" #ifdef CONFIG_EXYNOS_CONTENT_PATH_PROTECTION "s3cfb.0/video=video;exynos4-fb.0/video=video;" #endif diff --git a/arch/arm/mach-exynos/mach-u1.c b/arch/arm/mach-exynos/mach-u1.c index 59cb0bc..7067012 100644 --- a/arch/arm/mach-exynos/mach-u1.c +++ b/arch/arm/mach-exynos/mach-u1.c @@ -4604,9 +4604,7 @@ static struct sec_bat_adc_table_data temper_table_ADC7[] = { { 1669, -60 }, { 1688, -70 }, }; -#endif -/* temperature table for ADC 7 */ -#ifdef CONFIG_TARGET_LOCALE_NA +#elif defined(CONFIG_TARGET_LOCALE_NA) static struct sec_bat_adc_table_data temper_table_ADC7[] = { { 145, 670 }, { 165, 660 }, @@ -7767,10 +7765,10 @@ static void __init exynos4_reserve_mem(void) static const char map[] __initconst = "android_pmem.0=pmem;android_pmem.1=pmem_gpu1;" - "s3cfb.0=fimd;exynos4-fb.0=fimd;" - "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;" + "s3cfb.0=fimd;exynos4-fb.0=fimd;samsung-pd.1=fimd;" + "s3c-fimc.0=fimc0;s3c-fimc.1=fimc1;s3c-fimc.2=fimc2;s3c-fimc.3=fimc3;" "exynos4210-fimc.0=fimc0;exynos4210-fimc.1=fimc1;" - "exynos4210-fimc.2=fimc2;exynos4210-fimc3=fimc3;" + "exynos4210-fimc.2=fimc2;exynos4210-fimc.3=fimc3;" #ifdef CONFIG_ION_EXYNOS "ion-exynos=ion;" #endif diff --git a/arch/arm/mach-exynos/mdm2.c b/arch/arm/mach-exynos/mdm2.c index f6981ec..09b2a0f 100644 --- a/arch/arm/mach-exynos/mdm2.c +++ b/arch/arm/mach-exynos/mdm2.c @@ -200,6 +200,16 @@ static void mdm_do_first_power_on(struct mdm_modem_drv *mdm_drv) usleep_range(10000, 15000); gpio_direction_output(mdm_drv->ap2mdm_status_gpio, 1); +#ifdef CONFIG_HSIC_EURONLY_APPLY + for (i = 0; i < MDM_PBLRDY_CNT; i++) { + pblrdy = gpio_get_value(mdm_drv->mdm2ap_pblrdy); + if (pblrdy) + break; + usleep_range(5000, 5000); + } + + pr_err("%s: i:%d\n", __func__, i); +#else if (!mdm_drv->mdm2ap_pblrdy) goto start_mdm_peripheral; @@ -211,6 +221,7 @@ static void mdm_do_first_power_on(struct mdm_modem_drv *mdm_drv) } pr_debug("%s: i:%d\n", __func__, i); +#endif start_mdm_peripheral: mdm_peripheral_connect(mdm_drv); @@ -226,6 +237,17 @@ static void mdm_do_soft_power_on(struct mdm_modem_drv *mdm_drv) mdm_peripheral_disconnect(mdm_drv); mdm_toggle_soft_reset(mdm_drv); +#ifdef CONFIG_HSIC_EURONLY_APPLY + + for (i = 0; i < MDM_PBLRDY_CNT; i++) { + pblrdy = gpio_get_value(mdm_drv->mdm2ap_pblrdy); + if (pblrdy) + break; + usleep_range(5000, 5000); + } + + pr_err("%s: i:%d\n", __func__, i); +#else if (!mdm_drv->mdm2ap_pblrdy) goto start_mdm_peripheral; @@ -237,6 +259,7 @@ static void mdm_do_soft_power_on(struct mdm_modem_drv *mdm_drv) } pr_debug("%s: i:%d\n", __func__, i); +#endif start_mdm_peripheral: mdm_peripheral_connect(mdm_drv); @@ -247,6 +270,14 @@ static void mdm_power_on_common(struct mdm_modem_drv *mdm_drv) { power_on_count++; +#ifdef CONFIG_HSIC_EURONLY_APPLY + if(0==(power_on_count%5)) + { + mdm_power_down_common(mdm_drv); + pr_err("%s : power_on_count reset!\n", __func__); + } +#endif + /* this gpio will be used to indicate apq readiness, * de-assert it now so that it can be asserted later. * May not be used. diff --git a/arch/arm/mach-exynos/mdm_common.c b/arch/arm/mach-exynos/mdm_common.c index f0c819f..f47a122 100644 --- a/arch/arm/mach-exynos/mdm_common.c +++ b/arch/arm/mach-exynos/mdm_common.c @@ -797,9 +797,15 @@ static void mdm_modem_initialize_data(struct platform_device *pdev, if (pres) mdm_drv->ap2mdm_pmic_pwr_en_gpio = pres->start; +#ifdef CONFIG_HSIC_EURONLY_APPLY + /* MDM2AP_HSIC_READY */ + pres = platform_get_resource_byname(pdev, IORESOURCE_IO, + "MDM2AP_HSIC_READY"); +#else /* MDM2AP_PBLRDY */ pres = platform_get_resource_byname(pdev, IORESOURCE_IO, "MDM2AP_PBLRDY"); +#endif if (pres) mdm_drv->mdm2ap_pblrdy = pres->start; #ifdef CONFIG_SIM_DETECT @@ -847,8 +853,12 @@ int mdm_common_create(struct platform_device *pdev, #ifdef CONFIG_SIM_DETECT gpio_request(mdm_drv->sim_detect_gpio, "SIM_DETECT"); #endif +#ifdef CONFIG_HSIC_EURONLY_APPLY + gpio_request(mdm_drv->mdm2ap_pblrdy, "MDM2AP_HSIC_READY"); +#else if (mdm_drv->mdm2ap_pblrdy > 0) gpio_request(mdm_drv->mdm2ap_pblrdy, "MDM2AP_PBLRDY"); +#endif if (mdm_drv->ap2mdm_pmic_pwr_en_gpio > 0) { gpio_request(mdm_drv->ap2mdm_pmic_pwr_en_gpio, @@ -1019,7 +1029,11 @@ status_err: simdetect_err: #endif - if (mdm_drv->mdm2ap_pblrdy > 0) { +#ifndef CONFIG_HSIC_EURONLY_APPLY + if (mdm_drv->mdm2ap_pblrdy > 0) +#endif + { + #ifdef CONFIG_ARCH_EXYNOS s3c_gpio_cfgpin(mdm_drv->mdm2ap_pblrdy, S3C_GPIO_SFN(0xf)); s3c_gpio_setpull(mdm_drv->mdm2ap_pblrdy, S3C_GPIO_PULL_NONE); diff --git a/arch/arm/mach-exynos/mdm_device.c b/arch/arm/mach-exynos/mdm_device.c index 6c41e46..620936e 100644 --- a/arch/arm/mach-exynos/mdm_device.c +++ b/arch/arm/mach-exynos/mdm_device.c @@ -56,6 +56,14 @@ static struct resource mdm_resources[] = { .name = "AP2MDM_WAKEUP", .flags = IORESOURCE_IO, }, +#ifdef CONFIG_HSIC_EURONLY_APPLY + { + .start = GPIO_MDM2AP_HSIC_READY, + .end = GPIO_MDM2AP_HSIC_READY, + .name = "MDM2AP_HSIC_READY", + .flags = IORESOURCE_IO, + }, +#endif #ifdef CONFIG_SIM_DETECT { .start = GPIO_SIM_DETECT, @@ -119,8 +127,7 @@ static struct mdm_platform_data mdm_platform_data = { .peripheral_platform_device_ohci = &s5p_device_ohci, #endif .ramdump_timeout_ms = 120000, -#if defined(CONFIG_MACH_P4NOTE) && defined(CONFIG_QC_MODEM) \ - && defined(CONFIG_SIM_DETECT) +#if defined(CONFIG_SIM_DETECT) .sim_polarity = 0, #endif }; @@ -221,6 +228,31 @@ static int __init init_mdm_modem(void) return ret; } #endif + +#if defined(CONFIG_MACH_P4NOTE) && defined(CONFIG_QC_MODEM) \ + && defined(CONFIG_SIM_DETECT) + mdm_platform_data.sim_polarity = 0; +#endif + +#if (defined(CONFIG_MACH_GC1_USA_VZW) || defined(CONFIG_TARGET_LOCALE_EUR)) \ + && defined(CONFIG_QC_MODEM) && defined(CONFIG_SIM_DETECT) + mdm_platform_data.sim_polarity = 1; +#endif + +#if defined(CONFIG_MACH_KONA) && defined(CONFIG_QC_MODEM) \ + && defined(CONFIG_SIM_DETECT) +#if defined(CONFIG_MACH_KONALTE_USA_ATT) + if (system_rev >= 1) + mdm_platform_data.sim_polarity = 0; + else + mdm_platform_data.sim_polarity = 1; +#else + if (system_rev >= 1) + mdm_platform_data.sim_polarity = 1; + else + mdm_platform_data.sim_polarity = 0; +#endif +#endif mdm_device.dev.platform_data = &mdm_platform_data; ret = platform_device_register(&mdm_device); if (ret < 0) { diff --git a/arch/arm/mach-exynos/midas-camera.c b/arch/arm/mach-exynos/midas-camera.c index 636ba13..7bfb378 100644 --- a/arch/arm/mach-exynos/midas-camera.c +++ b/arch/arm/mach-exynos/midas-camera.c @@ -18,6 +18,9 @@ #include <plat/csis.h> #include <plat/pd.h> #include <plat/gpio-cfg.h> +#ifdef CONFIG_VIDEO_FIMC +#include <plat/fimc.h> +#endif #ifdef CONFIG_VIDEO_SAMSUNG_S5P_FIMC #include <plat/fimc-core.h> #include <media/s5p_fimc.h> @@ -60,6 +63,10 @@ #include <media/sr200pc20_platform.h> #endif +#ifdef CONFIG_VIDEO_SR130PC20 +#include <media/sr130pc20_platform.h> +#endif + struct class *camera_class; static int __init camera_class_init(void) @@ -1875,6 +1882,15 @@ static int isx012_get_i2c_busnum(void) return 0; } +static atomic_t flash_status = ATOMIC_INIT(ISX012_FLASH_OFF); +#ifdef CONFIG_MACH_KONA +static int isx012_flash_en(u32 mode, u32 onoff) +{ + pr_info("[ISX012] %s: not supported!\n", __func__); + return 0; +} +#else + static void isx012_flashtimer_handler(unsigned long data) { int ret = -ENODEV; @@ -1889,7 +1905,6 @@ static void isx012_flashtimer_handler(unsigned long data) } -static atomic_t flash_status = ATOMIC_INIT(ISX012_FLASH_OFF); static int isx012_flash_en(u32 mode, u32 onoff) { static int flash_mode = ISX012_FLASH_MODE_NORMAL; @@ -1962,12 +1977,257 @@ out: mutex_unlock(&flash_lock); return 0; } +#endif static int isx012_is_flash_on(void) { return atomic_read(&flash_status); } +#ifdef CONFIG_MACH_KONA +static int isx012_power_on(void) +{ + struct regulator *regulator; + int ret = 0; + + printk(KERN_DEBUG "[ISX012] power on\n"); + printk(KERN_DEBUG "%s: system_rev=%d\n", __func__, system_rev); + + ret = gpio_request(GPIO_5M_nSTBY, "GPJ0"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request 5M_nSTBY\n"); + return ret; + } + ret = gpio_request(GPIO_5M_nRST, "GPL1"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request 5M_nRST\n"); + return ret; + } + + ret = gpio_request(GPIO_CAM_EN2, "GPJ0"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request CAM_EN2\n"); + return ret; + } + + ret = gpio_request(GPIO_VT_CAM_nSTBY, "GPF2"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nSTBY\n"); + return ret; + } + + ret = gpio_request(GPIO_VT_CAM_nRST, "GPJ1"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nRST\n"); + return ret; + } + + /* 5M_CORE_1.2V */ + regulator = regulator_get(NULL, "3mp_core_1.2v"); + if (IS_ERR(regulator)) + return -ENODEV; + +#ifdef CONFIG_MACH_KONA_EUR_LTE /* HW request */ + regulator_set_voltage(regulator, 1250000, 1250000); +#endif + + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "3mp_core_1.2v"); + udelay(10); + + /* CAM_IO_1.8V */ + regulator = regulator_get(NULL, "cam_io_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "cam_io_1.8v"); + udelay(10); + + /* CAM_A2.8V */ + ret = gpio_direction_output(GPIO_CAM_EN2, 1); + CAM_CHECK_ERR_RET(ret, "CAM_A2.8V"); +#if defined(CONFIG_MACH_KONA_EUR_OPEN) || defined(CONFIG_MACH_KONA_EUR_WIFI) + /* Kona 3G use PMIC for A2.8V on Rev0.0 */ + if (system_rev < 1) { + regulator = regulator_get(NULL, "cam_a2.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "cam_a2.8v"); + } +#endif + udelay(10); + + /* VT_CORE_1.8V */ + regulator = regulator_get(NULL, "vt_core_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "vt_core_1.8v"); + udelay(300); /* fix me. 300 is too big */ + + /* VT enable */ + ret = gpio_direction_output(GPIO_VT_CAM_nSTBY, 1); + CAM_CHECK_ERR(ret, "VT_CAM_nSTBY"); + + /* CAM_MCLK */ + /*s5p_gpio_set_drvstr(GPIO_CAM_MCLK, S5P_GPIO_DRVSTR_LV2);*/ + ret = s3c_gpio_cfgpin(GPIO_CAM_MCLK, S3C_GPIO_SFN(2)); + CAM_CHECK_ERR_RET(ret, "cfg mclk"); + s3c_gpio_setpull(GPIO_CAM_MCLK, S3C_GPIO_PULL_NONE); + usleep_range(11000, 12000); /* fix me later */ + + /* VT Reset */ + ret = gpio_direction_output(GPIO_VT_CAM_nRST, 1); + CAM_CHECK_ERR(ret, "VT_CAM_nRST"); + usleep_range(1100, 1200); + + /* VT disable */ + ret = gpio_direction_output(GPIO_VT_CAM_nSTBY, 0); + CAM_CHECK_ERR(ret, "VT_CAM_nSTBY off"); + udelay(20); + + /* 5M Reset */ + ret = gpio_direction_output(GPIO_5M_nRST, 1); + CAM_CHECK_ERR_RET(ret, "5M_nRST"); + udelay(10); + + /* 5MP_AF_2.8V */ + regulator = regulator_get(NULL, "3mp_af_2.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "3mp_af_2.8v"); + usleep_range(6000, 6500); + + gpio_free(GPIO_5M_nSTBY); + gpio_free(GPIO_5M_nRST); + gpio_free(GPIO_CAM_EN2); + gpio_free(GPIO_VT_CAM_nSTBY); + gpio_free(GPIO_VT_CAM_nRST); + + return ret; +} + +static int isx012_power_down(void) +{ + struct regulator *regulator; + int ret = 0; + + printk(KERN_DEBUG "[ISX012] power down\n"); + + ret = gpio_request(GPIO_5M_nSTBY, "GPJ0"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request 3M_nSTBY\n"); + return ret; + } + ret = gpio_request(GPIO_5M_nRST, "GPL1"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request 3M_nRST\n"); + return ret; + } + ret = gpio_request(GPIO_CAM_EN2, "GPJ0"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request CAM_EN2\n"); + return ret; + } + ret = gpio_request(GPIO_VT_CAM_nRST, "GPJ1"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nRST\n"); + return ret; + } + + /* 5MP_AF_2.8V */ + regulator = regulator_get(NULL, "3mp_af_2.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + CAM_CHECK_ERR_RET(ret, "3mp_af_2.8v"); + udelay(10); + + /* VT Reset */ + ret = gpio_direction_output(GPIO_VT_CAM_nRST, 0); + CAM_CHECK_ERR(ret, "VT_CAM_nRST"); + udelay(10); + + /* 5M_nSTBY */ + ret = gpio_direction_output(GPIO_5M_nSTBY, 0); + CAM_CHECK_ERR(ret, "5M_nSTBY"); + udelay(10); + + /* Check delay */ + + /* 5M_nRST */ + ret = gpio_direction_output(GPIO_5M_nRST, 0); + CAM_CHECK_ERR(ret, "5M_nRST"); + udelay(50); + + /* CAM_MCLK */ + ret = s3c_gpio_cfgpin(GPIO_CAM_MCLK, S3C_GPIO_INPUT); + s3c_gpio_setpull(GPIO_CAM_MCLK, S3C_GPIO_PULL_DOWN); + CAM_CHECK_ERR(ret, "cfg mclk"); + udelay(10); + + /* VT_CORE_1.8V */ + regulator = regulator_get(NULL, "vt_core_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "vt_core_1.8v"); + udelay(5); + + /* CAM_A2.8V */ + ret = gpio_direction_output(GPIO_CAM_EN2, 0); + CAM_CHECK_ERR_RET(ret, "CAM_A2.8V"); +#if defined(CONFIG_MACH_KONA_EUR_OPEN) || defined(CONFIG_MACH_KONA_EUR_WIFI) + /* Kona 3G use PMIC for A2.8V on Rev0.0 */ + if (system_rev < 1) { + regulator = regulator_get(NULL, "cam_a2.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "cam_a2.8v"); + } +#endif + udelay(5); + /* CAM_IO_1.8V */ + regulator = regulator_get(NULL, "cam_io_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "cam_io_1.8v"); + udelay(5); + + /* 5MP_CORE_1.2V */ + regulator = regulator_get(NULL, "3mp_core_1.2v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "3mp_core_1.2v"); + + gpio_free(GPIO_5M_nSTBY); + gpio_free(GPIO_5M_nRST); + gpio_free(GPIO_CAM_EN2); + gpio_free(GPIO_VT_CAM_nRST); + return ret; +} + +#else /* ! CONFIG_MACH_KONA */ + /* Power up/down func for P4C, P2. */ static int isx012_power_on(void) { @@ -2125,6 +2385,7 @@ static int isx012_power_down(void) return ret; } +#endif static int isx012_power(int enable) { @@ -2161,6 +2422,10 @@ static int isx012_enable_standby(bool enable) return err; } +#ifdef CONFIG_MACH_KONA + udelay(200); +#endif + /* GPIO_5M_nSTBY */ err = gpio_direction_output(GPIO_5M_nSTBY, enable ? GPIO_LEVEL_LOW : GPIO_LEVEL_HIGH); @@ -2170,6 +2435,7 @@ static int isx012_enable_standby(bool enable) return 0; } +#ifndef CONFIG_MACH_KONA static int px_cam_cfg_init(void) { int ret = -ENODEV; @@ -2197,6 +2463,7 @@ out_free: out: return ret; } +#endif static const char *isx012_get_clk_name(void) { @@ -2292,6 +2559,19 @@ static ssize_t flash_store(struct device *dev, struct device_attribute *attr, } static DEVICE_ATTR(rear_flash, 0664, flash_show, flash_store); +extern u32 isx012_get_vendorid(void); +static ssize_t isx012_rear_vendorid_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u32 vendorid = 0; + + vendorid = isx012_get_vendorid(); + + return sprintf(buf, "0x%04X\n", vendorid); + +} +static DEVICE_ATTR(rear_vendorid, S_IRUGO, isx012_rear_vendorid_show, NULL); + int isx012_create_file(struct class *cls) { struct device *dev_rear = NULL; @@ -2317,6 +2597,11 @@ int isx012_create_file(struct class *cls) if (unlikely(ret < 0)) pr_err("cam_init: failed to create device file, %s\n", dev_attr_rear_flash.attr.name); + + ret = device_create_file(dev_rear, &dev_attr_rear_vendorid); + if (unlikely(ret < 0)) + pr_err("cam_init: failed to create device file, %s\n", + dev_attr_rear_vendorid.attr.name); return 0; } @@ -2773,6 +3058,334 @@ static struct s3c_platform_camera s5k5ccgx = { }; #endif /* #ifdef CONFIG_VIDEO_S5K5CCGX_COMMON */ +#ifdef CONFIG_VIDEO_SR130PC20 +static int sr130pc20_get_i2c_busnum(void) +{ + return 0; +} + +static int sr130pc20_flash_en(u32 mode, u32 onoff) +{ + pr_info("[SR130PC20] %s: not supported!\n", __func__); + return 0; +} + +static int sr130pc20_is_flash_on(void) +{ + pr_info("[SR130PC20] %s: not supported!\n", __func__); + return 0; +} + +static int sr130pc20_power_on(void) +{ + struct regulator *regulator; + int ret = 0; + + printk(KERN_DEBUG "[SR130PC20] power on\n"); + + ret = gpio_request(GPIO_CAM_EN2, "GPJ0"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request CAM_EN2\n"); + return ret; + } + + ret = gpio_request(GPIO_VT_CAM_nSTBY, "GPF2"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nSTBY\n"); + return ret; + } + + ret = gpio_request(GPIO_VT_CAM_nRST, "GPJ1"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nRST\n"); + return ret; + } + + /* 5M_CORE_1.2V */ + regulator = regulator_get(NULL, "3mp_core_1.2v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "3mp_core_1.2v"); + udelay(10); + + /* CAM_IO_1.8V */ + regulator = regulator_get(NULL, "cam_io_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "cam_io_1.8v"); + udelay(10); + + /* CAM_A2.8V */ +#if defined(CONFIG_MACH_KONA_EUR_OPEN) || defined(CONFIG_MACH_KONA_EUR_WIFI) + /* Kona 3G use PMIC for A2.8V on Rev0.0 */ + if (system_rev < 1) { + regulator = regulator_get(NULL, "cam_a2.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "cam_a2.8v"); + } +#endif + ret = gpio_direction_output(GPIO_CAM_EN2, 1); + CAM_CHECK_ERR_RET(ret, "CAM_A2.8V"); + udelay(10); + + /* VT_CORE_1.8V */ + regulator = regulator_get(NULL, "vt_core_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + ret = regulator_enable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR_RET(ret, "vt_core_1.8v"); + udelay(300); /* fix me. 300 is too big */ + + /* VT enable */ + ret = gpio_direction_output(GPIO_VT_CAM_nSTBY, 1); + CAM_CHECK_ERR(ret, "VT_CAM_nSTBY"); + udelay(20); /* fix me. Delete */ + + /* CAM_MCLK */ + /*s5p_gpio_set_drvstr(GPIO_VTCAM_MCLK, S5P_GPIO_DRVSTR_LV2);*/ + ret = s3c_gpio_cfgpin(GPIO_VTCAM_MCLK, S3C_GPIO_SFN(3)); + s3c_gpio_setpull(GPIO_VTCAM_MCLK, S3C_GPIO_PULL_NONE); + CAM_CHECK_ERR_RET(ret, "cfg mclk"); + usleep_range(11000, 12000); /* fix me later */ + + /* VT Reset */ + ret = gpio_direction_output(GPIO_VT_CAM_nRST, 1); + CAM_CHECK_ERR(ret, "VT_CAM_nRST"); + usleep_range(1100, 1200); + + gpio_free(GPIO_CAM_EN2); + gpio_free(GPIO_VT_CAM_nSTBY); + gpio_free(GPIO_VT_CAM_nRST); + return ret; +} + +static int sr130pc20_power_down(void) +{ + struct regulator *regulator; + int ret = 0; + + printk(KERN_DEBUG "[SR130PC20] power down\n"); + + ret = gpio_request(GPIO_CAM_EN2, "GPJ0"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request CAM_EN2\n"); + return ret; + } + ret = gpio_request(GPIO_VT_CAM_nSTBY, "GPF2"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nSTBY\n"); + return ret; + } + + ret = gpio_request(GPIO_VT_CAM_nRST, "GPJ1"); + if (unlikely(ret)) { + printk(KERN_ERR "error: request VT_CAM_nRST\n"); + return ret; + } + + /* VT Reset */ + ret = gpio_direction_output(GPIO_VT_CAM_nRST, 0); + CAM_CHECK_ERR(ret, "VT_CAM_nRST"); + usleep_range(1000, 1100); + + /* CAM_MCLK */ + ret = s3c_gpio_cfgpin(GPIO_VTCAM_MCLK, S3C_GPIO_INPUT); + s3c_gpio_setpull(GPIO_VTCAM_MCLK, S3C_GPIO_PULL_DOWN); + CAM_CHECK_ERR(ret, "cfg mclk"); + udelay(50); + + /* VT disable */ + ret = gpio_direction_output(GPIO_VT_CAM_nSTBY, 0); + CAM_CHECK_ERR(ret, "VT_CAM_nSTBY"); + + /* VT_CORE_1.8V */ + regulator = regulator_get(NULL, "vt_core_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "vt_core_1.8v"); + udelay(5); + + /* CAM_A2.8V */ +#if defined(CONFIG_MACH_KONA_EUR_OPEN) || defined(CONFIG_MACH_KONA_EUR_WIFI) + /* Kona 3G use PMIC for A2.8V on Rev0.0 */ + if (system_rev < 1) { + regulator = regulator_get(NULL, "cam_a2.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "cam_a2.8v"); + } +#endif + ret = gpio_direction_output(GPIO_CAM_EN2, 0); + CAM_CHECK_ERR_RET(ret, "CAM_A2.8V"); + udelay(5); + + /* CAM_IO_1.8V */ + regulator = regulator_get(NULL, "cam_io_1.8v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "cam_io_1.8v"); + udelay(5); + + /* 5MP_CORE_1.2V */ + regulator = regulator_get(NULL, "3mp_core_1.2v"); + if (IS_ERR(regulator)) + return -ENODEV; + if (regulator_is_enabled(regulator)) + ret = regulator_force_disable(regulator); + regulator_put(regulator); + CAM_CHECK_ERR(ret, "3mp_core_1.2v"); + + gpio_free(GPIO_CAM_EN2); + gpio_free(GPIO_VT_CAM_nSTBY); + gpio_free(GPIO_VT_CAM_nRST); + return ret; +} + +static int sr130pc20_power(int enable) +{ + int ret = 0; + + if (enable) + ret = sr130pc20_power_on(); + else + ret = sr130pc20_power_down(); + + if (unlikely(ret)) { + pr_err("%s: power-on/down failed\n", __func__); + return ret; + } + + ret = s3c_csis_power(enable); + if (unlikely(ret)) { + pr_err("%s: csis power-on failed\n", __func__); + return ret; + } + + return ret; +} + +static int sr130pc20_enable_standby(bool enable) +{ + pr_info("[SR130PC20] %s not supported!\n", __func__); + return 0; +} + +static const char *sr130pc20_get_clk_name(void) +{ + return "sclk_cam1"; +} + +static struct sr130pc20_platform_data sr130pc20_plat = { + .default_width = 640, + .default_height = 480, + .pixelformat = V4L2_PIX_FMT_UYVY, + .freq = 24000000, + .is_mipi = 1, + .streamoff_delay = SR130PC20_STREAMOFF_DELAY, + .flash_en = sr130pc20_flash_en, + .is_flash_on = sr130pc20_is_flash_on, + .stby_on = sr130pc20_enable_standby, + .dbg_level = CAMDBG_LEVEL_DEFAULT, +}; + +static struct i2c_board_info sr130pc20_i2c_info = { + I2C_BOARD_INFO("SR130PC20", 0x40>>1), + .platform_data = &sr130pc20_plat, +}; + +static struct s3c_platform_camera sr130pc20 = { + .id = CAMERA_CSI_D, + .get_clk_name = sr130pc20_get_clk_name, + .get_i2c_busnum = sr130pc20_get_i2c_busnum, + .cam_power = sr130pc20_power, /*smdkv310_mipi_cam0_reset,*/ + .type = CAM_TYPE_MIPI, + .fmt = ITU_601_YCBCR422_8BIT, /*MIPI_CSI_YCBCR422_8BIT*/ + .order422 = CAM_ORDER422_8BIT_CBYCRY, + .info = &sr130pc20_i2c_info, + .pixelformat = V4L2_PIX_FMT_UYVY, + .srclk_name = "xusbxti", /* "mout_mpll" */ + .clk_rate = 24000000, /* 48000000 */ + .line_length = 640, + .width = 640, + .height = 480, + .window = { + .left = 0, + .top = 0, + .width = 640, + .height = 480, + }, + + .mipi_lanes = 1, + .mipi_settle = 6, + .mipi_align = 32, + + /* Polarity */ + .inv_pclk = 0, + .inv_vsync = 1, + .inv_href = 0, + .inv_hsync = 0, + .reset_camera = 0, + .initialized = 0, +}; + +static ssize_t sr130pc20_camtype_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + const char cam_type[] = "SF_SR130PC20"; + pr_info("%s\n", __func__); + return sprintf(buf, "%s\n", cam_type); +} +static DEVICE_ATTR(front_camtype, S_IRUGO, sr130pc20_camtype_show, NULL); + +static ssize_t sr130pc20_camfw_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + char type[] = "SR130PC20"; + return sprintf(buf, "%s %s\n", type, type); +} +static DEVICE_ATTR(front_camfw, S_IRUGO, sr130pc20_camfw_show, NULL); + +int sr130pc20_create_file(struct class *cls) +{ + struct device *dev_front = NULL; + int ret = -ENODEV; + + dev_front = device_create(cls, NULL, 0, NULL, "front"); + if (IS_ERR(dev_front)) { + pr_err("cam_init: failed to create device(frontcam_dev)\n"); + return -ENODEV; + } + + ret = device_create_file(dev_front, &dev_attr_front_camtype); + if (unlikely(ret < 0)) + pr_err("cam_init: failed to create device file, %s\n", + dev_attr_front_camtype.attr.name); + + ret = device_create_file(dev_front, &dev_attr_front_camfw); + if (unlikely(ret < 0)) + pr_err("cam_init: failed to create device file, %s\n", + dev_attr_front_camtype.attr.name); + + return 0; +} +#endif /* CONFIG_VIDEO_SR130PC20*/ #ifdef CONFIG_VIDEO_SR200PC20M static int sr200pc20m_get_i2c_busnum(void) @@ -3442,6 +4055,9 @@ static struct s3c_platform_fimc fimc_plat = { #ifdef CONFIG_VIDEO_SR200PC20 &sr200pc20, #endif +#ifdef CONFIG_VIDEO_SR130PC20 + &sr130pc20, +#endif #ifdef WRITEBACK_ENABLED &writeback, #endif diff --git a/arch/arm/mach-exynos/midas-lcd.c b/arch/arm/mach-exynos/midas-lcd.c index f28c196..abbc51e 100644 --- a/arch/arm/mach-exynos/midas-lcd.c +++ b/arch/arm/mach-exynos/midas-lcd.c @@ -44,11 +44,16 @@ #include <linux/mdnie.h> #endif +#ifdef CONFIG_BACKLIGHT_LP855X +#include <linux/platform_data/lp855x.h> +#endif + struct s3c_platform_fb fb_platform_data; unsigned int lcdtype; static int __init lcdtype_setup(char *str) { get_option(&str, &lcdtype); + return 1; } __setup("lcdtype=", lcdtype_setup); @@ -798,6 +803,49 @@ static struct s3cfb_lcd lms501xx = { }, }; #endif + +#ifdef CONFIG_FB_S5P_NT71391 +/* for Geminus based on MIPI-DSI interface */ +static struct s3cfb_lcd nt71391 = { + .name = "nt71391", + .width = 1280, + .height = 800, + .p_width = 172, + .p_height = 108, + .bpp = 24, + .freq = 60, + + /* minumun value is 0 except for wr_act time. */ + .cpu_timing = { + .cs_setup = 0, + .wr_setup = 0, + .wr_act = 1, + .wr_hold = 0, + }, + + .timing = { + .h_fp = 25, + .h_bp = 25, + .h_sw = 41, + .v_fp = 8, /* spec = 3 */ + .v_fpe = 1, + .v_bp = 3, + .v_bpe = 1, + .v_sw = 6, + /* v_fp=stable_vfp + cmd_allow_len + mask_len*/ + .cmd_allow_len = 7, + .stable_vfp = 1, + }, + + .polarity = { + .rise_vclk = 1, + .inv_hsync = 0, + .inv_vsync = 0, + .inv_vden = 0, + }, +}; +#endif + static int reset_lcd(void) { #if defined(GPIO_MLCD_RST) @@ -896,6 +944,69 @@ out: return 0; } +#elif defined(CONFIG_FB_S5P_NT71391) +static int lcd_power_on(void *ld, int enable) +{ + int err; + + printk(KERN_INFO "NT71391 %s : enable=%d\n", __func__, enable); + + err = gpio_request(GPIO_LCD_EN, "LCD_EN"); + if (err) { + printk(KERN_ERR "failed to request LCD_EN control\n"); + return -EPERM; + } + + if (enable) + gpio_set_value(GPIO_LCD_EN, GPIO_LEVEL_HIGH); + else + gpio_set_value(GPIO_LCD_EN, GPIO_LEVEL_LOW); + + gpio_free(GPIO_LCD_EN); + + return 0; +} + +#ifdef CONFIG_BACKLIGHT_LP855X +#define EPROM_CFG5_ADDR 0xA5 +#define EPROM_A5_VAL 0xA0 /* PWM_DIRECT(7)=1, PS_MODE(6:4)=4drivers*/ +#define EPROM_A5_MASK 0x0F /* PWM_FREQ(3:0) : mask */ + +static struct lp855x_rom_data lp8556_eprom_arr[] = { + {EPROM_CFG5_ADDR, EPROM_A5_VAL, EPROM_A5_MASK}, +}; + +static struct lp855x_platform_data lp8856_bl_pdata = { + .mode = PWM_BASED, + .device_control = PWM_CONFIG(LP8556), + .load_new_rom_data = 1, + .size_program = ARRAY_SIZE(lp8556_eprom_arr), + .rom_data = lp8556_eprom_arr, + .use_gpio_en = 1, + .gpio_en = GPIO_LED_BACKLIGHT_RESET, + .power_on_udelay = 1000, +}; + +static struct i2c_board_info i2c_devs24_emul[] __initdata = { + { + I2C_BOARD_INFO("lp8556", (0x58 >> 1)), + .platform_data = &lp8856_bl_pdata, + }, +}; +static int lcd_bl_init(void) +{ + i2c_register_board_info(24, i2c_devs24_emul, + ARRAY_SIZE(i2c_devs24_emul)); + + return 0; +} +#endif + +#ifdef CONFIG_FB_S5P_MDNIE +static struct lcd_platform_data nt71391_platform_data = { +}; +#endif + #else static int lcd_power_on(void *ld, int enable) { @@ -1068,6 +1179,10 @@ void __init mipi_fb_init(void) #if defined(CONFIG_FB_S5P_S6D6AA1) dsim_lcd_info->lcd_panel_info = (void *)&s6d6aa1; #endif + +#if defined(CONFIG_FB_S5P_NT71391) + dsim_lcd_info->lcd_panel_info = (void *)&nt71391; +#endif #if defined(CONFIG_MACH_T0) && defined(CONFIG_FB_S5P_S6EVR02) && defined(GPIO_OLED_ID) if (!gpio_get_value(GPIO_OLED_ID)) { /* for EA8061 DDI */ @@ -1090,6 +1205,11 @@ void __init mipi_fb_init(void) dsim_pd->dsim_info->p = 3; dsim_pd->dsim_info->m = 110; dsim_pd->dsim_info->s = 1; +#elif defined(CONFIG_FB_S5P_NT71391) + /* 230Mbps */ + dsim_pd->dsim_info->p = 3; + dsim_pd->dsim_info->m = 115; + dsim_pd->dsim_info->s = 1; #else /* 500Mbps */ dsim_pd->dsim_info->p = 3; @@ -1105,6 +1225,11 @@ void __init mipi_fb_init(void) platform_device_register(&s5p_device_dsim); /*s3cfb_set_platdata(&fb_platform_data);*/ + +#if defined(CONFIG_FB_S5P_NT71391) + lcd_bl_init(); +#endif + } #endif @@ -1145,6 +1270,9 @@ struct s3c_platform_fb fb_platform_data __initdata = { #if defined(CONFIG_FB_S5P_LMS501XX) .lcd = &lms501xx #endif +#if defined(CONFIG_FB_S5P_NT71391) + .lcd = &nt71391 +#endif }; #endif @@ -1154,6 +1282,9 @@ static struct platform_mdnie_data mdnie_data = { #if defined(CONFIG_FB_S5P_S6C1372) .lcd_pd = &s6c1372_platform_data, #endif +#if defined(CONFIG_FB_S5P_NT71391) + .lcd_pd = &nt71391_platform_data, +#endif }; #endif diff --git a/arch/arm/mach-exynos/midas-mhl.c b/arch/arm/mach-exynos/midas-mhl.c index 93f0bb2..72bc7ed 100644 --- a/arch/arm/mach-exynos/midas-mhl.c +++ b/arch/arm/mach-exynos/midas-mhl.c @@ -54,7 +54,8 @@ static void sii9234_cfg_gpio(void) #if !defined(CONFIG_MACH_C1_KOR_LGT) && !defined(CONFIG_SAMSUNG_MHL_9290) #if !defined(CONFIG_MACH_P4NOTE) && !defined(CONFIG_MACH_T0) && \ - !defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) + !defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) && \ + !defined(CONFIG_MACH_KONA) s3c_gpio_cfgpin(GPIO_MHL_SEL, S3C_GPIO_OUTPUT); s3c_gpio_setpull(GPIO_MHL_SEL, S3C_GPIO_PULL_NONE); gpio_set_value(GPIO_MHL_SEL, GPIO_LEVEL_LOW); @@ -181,7 +182,8 @@ static void sii9234_reset(void) } #ifndef CONFIG_SAMSUNG_USE_11PIN_CONNECTOR -#ifndef CONFIG_MACH_P4NOTE +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) +#else static void mhl_usb_switch_control(bool on) { printk(KERN_INFO "%s() [MHL] USB path change : %s\n", @@ -204,7 +206,7 @@ static void mhl_usb_switch_control(bool on) static struct sii9234_platform_data sii9234_pdata = { .init = sii9234_cfg_gpio, #if defined(CONFIG_SAMSUNG_USE_11PIN_CONNECTOR) || \ - defined(CONFIG_MACH_P4NOTE) + defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) .mhl_sel = NULL, #else .mhl_sel = mhl_usb_switch_control, @@ -258,7 +260,8 @@ static int __init midas_mhl_init(void) } #if defined(CONFIG_MACH_T0_EUR_OPEN) || defined(CONFIG_MACH_T0_CHN_OPEN) sii9234_pdata.ddc_i2c_num = 6; -#elif defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_T0) +#elif defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_T0) \ + || defined(CONFIG_MACH_KONA) sii9234_pdata.ddc_i2c_num = 5; #else sii9234_pdata.ddc_i2c_num = (system_rev == 3 ? 16 : 5); diff --git a/arch/arm/mach-exynos/midas-sound.c b/arch/arm/mach-exynos/midas-sound.c index 32ab866..98d1fed 100644 --- a/arch/arm/mach-exynos/midas-sound.c +++ b/arch/arm/mach-exynos/midas-sound.c @@ -50,6 +50,12 @@ #include <linux/i2c/si47xx_common.h> #endif +#ifdef CONFIG_EXYNOS_SOUND_PLATFORM_DATA +#include <linux/exynos_audio.h> +#endif +#ifdef CONFIG_USE_ADC_DET +#include <linux/sec_jack.h> +#endif #ifdef CONFIG_AUDIENCE_ES305 #include <linux/i2c/es305.h> @@ -80,6 +86,56 @@ struct si47xx_info { #define SET_PLATDATA_CODEC(i2c_pd) s3c_i2c4_set_platdata(i2c_pd) #endif +#ifdef CONFIG_USE_ADC_DET +static struct jack_zone midas_jack_zones[] = { + { + /* adc == 0, unstable zone, default to 3pole if it stays + * in this range for 100ms (10ms delays, 10 samples) + */ + .adc_high = 0, + .delay_ms = 10, + .check_count = 10, + .jack_type = SEC_HEADSET_3POLE, + }, + { + /* 0 < adc <= 1200, unstable zone, default to 3pole if it stays + * in this range for 100ms (10ms delays, 10 samples) + */ + .adc_high = 1200, + .delay_ms = 10, + .check_count = 10, + .jack_type = SEC_HEADSET_3POLE, + }, + { + /* 1200 < adc <= 2600, unstable zone, default to 4pole if it + * stays in this range for 100ms (10ms delays, 10 samples) + */ + .adc_high = 2600, + .delay_ms = 10, + .check_count = 10, + .jack_type = SEC_HEADSET_4POLE, + }, + { + /* 2600 < adc <= 3800, 4 pole zone, default to 4pole if it + * stays in this range for 50ms (10ms delays, 5 samples) + */ + .adc_high = 3800, + .delay_ms = 10, + .check_count = 5, + .jack_type = SEC_HEADSET_4POLE, + }, + { + /* adc > 3800, unstable zone, default to 3pole if it stays + * in this range for two seconds (10ms delays, 200 samples) + */ + .adc_high = 0x7fffffff, + .delay_ms = 10, + .check_count = 200, + .jack_type = SEC_HEADSET_3POLE, + }, +}; +#endif + static DEFINE_SPINLOCK(midas_snd_spinlock); void midas_snd_set_mclk(bool on, bool forced) @@ -205,7 +261,7 @@ static struct wm8994_drc_cfg drc_value[] = { .regs[4] = 0x0000, }, #endif -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) { .name = "cam rec DRC", .regs[0] = 0x019B, @@ -253,6 +309,8 @@ static struct wm8994_pdata wm1811_pdata = { .micbias = {0x22, 0x22}, #elif defined(CONFIG_MACH_C1_USA_ATT) .micbias = {0x2f, 0x29}, +#elif defined(CONFIG_MACH_KONA) + .micbias = {0x2f, 0x2f}, #else .micbias = {0x2f, 0x27}, #endif @@ -273,7 +331,8 @@ static struct wm8994_pdata wm1811_pdata = { defined(CONFIG_MACH_C1_KOR_KT) || defined(CONFIG_MACH_C1_KOR_LGT) || \ defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_GC1) || \ defined(CONFIG_MACH_C1_USA_ATT) || defined(CONFIG_MACH_T0) || \ - defined(CONFIG_MACH_M3) || defined(CONFIG_MACH_BAFFIN) + defined(CONFIG_MACH_M3) || defined(CONFIG_MACH_BAFFIN) || \ + defined(CONFIG_MACH_KONA) .lineout2fb = 0, #else .lineout2fb = 1, @@ -435,6 +494,15 @@ static struct i2c_board_info i2c_2mic[] __initdata = { }; #endif +#ifdef CONFIG_EXYNOS_SOUND_PLATFORM_DATA +struct exynos_sound_platform_data midas_sound_pdata __initdata = { +#ifdef CONFIG_USE_ADC_DET + .zones = midas_jack_zones, + .num_zones = ARRAY_SIZE(midas_jack_zones), +#endif +}; +#endif + static struct platform_device *midas_sound_devices[] __initdata = { #if defined(CONFIG_MACH_C1_KOR_LGT) #ifdef CONFIG_FM34_WE395 @@ -451,11 +519,25 @@ static struct platform_device *midas_sound_devices[] __initdata = { void __init midas_sound_init(void) { printk(KERN_INFO "Sound: start %s\n", __func__); + +#ifdef CONFIG_USE_ADC_DET +#if defined(CONFIG_MACH_KONA) + midas_sound_pdata.use_jackdet_type = 1; +#else + midas_sound_pdata.use_jackdet_type = 0; +#endif +#endif m0_gpio_init(); platform_add_devices(midas_sound_devices, ARRAY_SIZE(midas_sound_devices)); + +#ifdef CONFIG_EXYNOS_SOUND_PLATFORM_DATA + pr_info("%s: set sound platform data for midas device\n", __func__); + if (exynos_sound_set_platform_data(&midas_sound_pdata)) + pr_err("%s: failed to register sound pdata\n", __func__); +#endif #ifdef CONFIG_ARCH_EXYNOS5 #ifndef CONFIG_MACH_P10_LTE_00_BD @@ -476,6 +558,11 @@ void __init midas_sound_init(void) i2c_register_board_info(I2C_NUM_CODEC, i2c_wm1811, ARRAY_SIZE(i2c_wm1811)); +#elif defined(CONFIG_MACH_KONA) + SET_PLATDATA_CODEC(NULL); + i2c_register_board_info(I2C_NUM_CODEC, i2c_wm1811, + ARRAY_SIZE(i2c_wm1811)); + #else if (system_rev != 3 && system_rev >= 0) { SET_PLATDATA_CODEC(NULL); diff --git a/arch/arm/mach-exynos/midas-thermistor.c b/arch/arm/mach-exynos/midas-thermistor.c index 27c7e05..0618978 100644 --- a/arch/arm/mach-exynos/midas-thermistor.c +++ b/arch/arm/mach-exynos/midas-thermistor.c @@ -727,6 +727,111 @@ static struct sec_therm_adc_table temper_table_ap[] = { {762, 310}, {784, 300}, }; +#elif defined(CONFIG_MACH_KONA) +static struct sec_therm_adc_table temper_table_ap[] = { + { 174, 800 }, + { 185, 790 }, + { 196, 780 }, + { 208, 770 }, + { 219, 760 }, + { 228, 750 }, + { 235, 740 }, + { 242, 730 }, + { 250, 720 }, + { 258, 710 }, + { 268, 700 }, + { 275, 690 }, + { 282, 680 }, + { 290, 670 }, + { 297, 660 }, + { 304, 650 }, + { 312, 640 }, + { 320, 630 }, + { 328, 620 }, + { 336, 610 }, + { 344, 600 }, + { 356, 590 }, + { 368, 580 }, + { 380, 570 }, + { 393, 560 }, + { 407, 550 }, + { 420, 540 }, + { 433, 530 }, + { 447, 520 }, + { 460, 510 }, + { 473, 500 }, + { 489, 490 }, + { 505, 480 }, + { 521, 470 }, + { 537, 460 }, + { 552, 450 }, + { 567, 440 }, + { 583, 430 }, + { 598, 420 }, + { 613, 410 }, + { 628, 400 }, + { 649, 390 }, + { 670, 380 }, + { 792, 370 }, + { 715, 360 }, + { 738, 350 }, + { 759, 340 }, + { 780, 330 }, + { 800, 320 }, + { 821, 310 }, + { 842, 300 }, + { 867, 290 }, + { 893, 280 }, + { 928, 270 }, + { 949, 260 }, + { 969, 250 }, + { 992, 240 }, + { 1015, 230 }, + { 1038, 220 }, + { 1061, 210 }, + { 1085, 200 }, + { 1110, 190 }, + { 1138, 180 }, + { 1164, 170 }, + { 1189, 160 }, + { 1214, 150 }, + { 1230, 140 }, + { 1257, 130 }, + { 1284, 120 }, + { 1314, 110 }, + { 1343, 100 }, + { 1366, 90 }, + { 1388, 80 }, + { 1410, 70 }, + { 1432, 60 }, + { 1454, 50 }, + { 1475, 40 }, + { 1496, 30 }, + { 1516, 20 }, + { 1536, 10 }, + { 1556, 0 }, + { 1576, -10 }, + { 1595, -20 }, + { 1613, -30 }, + { 1631, -40 }, + { 1649, -50 }, + { 1666, -60 }, + { 1683, -70 }, + { 1699, -80 }, + { 1714, -90 }, + { 1730, -100 }, + { 1744, -110 }, + { 1759, -120 }, + { 1773, -130 }, + { 1786, -140 }, + { 1799, -150 }, + { 1811, -160 }, + { 1823, -170 }, + { 1835, -180 }, + { 1846, -190 }, + { 1856, -200 }, +}; + #else static struct sec_therm_adc_table temper_table_ap[] = { {196, 700}, @@ -840,6 +945,33 @@ static int get_midas_siop_level(int temp) if (level > prev_level) level = prev_level; } +#elif defined(CONFIG_MACH_KONA) + if (temp > prev_temp) { + if (temp >= 720) + level = 4; + else if (temp >= 700) + level = 3; + else if (temp >= 680) + level = 2; + else if (temp >= 660) + level = 1; + else + level = 0; + } else { + if (temp < 640) + level = 0; + else if (temp < 660) + level = 1; + else if (temp < 680) + level = 2; + else if (temp < 700) + level = 3; + else + level = 4; + + if (level > prev_level) + level = prev_level; + } #elif defined(CONFIG_MACH_T0) if (temp > prev_temp) { if (temp >= 620) diff --git a/arch/arm/mach-exynos/midas-wacom.c b/arch/arm/mach-exynos/midas-wacom.c index 83048ec..725b8b3 100755 --- a/arch/arm/mach-exynos/midas-wacom.c +++ b/arch/arm/mach-exynos/midas-wacom.c @@ -24,9 +24,17 @@ static struct wacom_g5_callbacks *wacom_callbacks; +#ifdef CONFIG_MACH_KONA +#define GPIO_WACOM_LDO_EN GPIO_PEN_LDO_EN +#define GPIO_WACOM_SENSE GPIO_PEN_DETECT +#endif + static int wacom_early_suspend_hw(void) { +#ifndef CONFIG_MACH_KONA gpio_set_value(GPIO_PEN_RESET_N, 0); +#endif + #if defined(CONFIG_MACH_T0_EUR_OPEN) if (system_rev >= 10) gpio_direction_output(GPIO_WACOM_LDO_EN, 0); @@ -46,7 +54,10 @@ static int wacom_late_resume_hw(void) s3c_gpio_setpull(GPIO_PEN_IRQ, S3C_GPIO_PULL_NONE); gpio_direction_output(GPIO_WACOM_LDO_EN, 1); msleep(100); +#ifndef CONFIG_MACH_KONA gpio_set_value(GPIO_PEN_RESET_N, 1); +#endif + return 0; } @@ -76,6 +87,15 @@ static void wacom_register_callbacks(struct wacom_g5_callbacks *cb) static struct wacom_g5_platform_data wacom_platform_data = { +#if defined(CONFIG_MACH_KONA) + .x_invert = 0, + .y_invert = 0, + .xy_switch = 0, + .min_x = WACOM_POSX_OFFSET, + .max_x = WACOM_POSY_MAX, + .min_y = WACOM_POSY_OFFSET, + .max_y = WACOM_POSX_MAX, +#else .x_invert = 1, .y_invert = 0, .xy_switch = 1, @@ -83,6 +103,7 @@ static struct wacom_g5_platform_data wacom_platform_data = { .max_x = WACOM_POSX_MAX, .min_y = 0, .max_y = WACOM_POSY_MAX, +#endif .min_pressure = 0, .max_pressure = WACOM_PRESSURE_MAX, .gpio_pendct = GPIO_PEN_PDCT, @@ -105,7 +126,16 @@ static struct wacom_g5_platform_data wacom_platform_data = { .gpio_pen_insert = GPIO_WACOM_SENSE, #endif }; - +/* I2C Setting */ +#if defined(CONFIG_MACH_KONA) +/* I2C6 */ +static struct i2c_board_info i2c_devs6[] __initdata = { + { + I2C_BOARD_INFO("wacom_g5sp_i2c", 0x56), + .platform_data = &wacom_platform_data, + }, +}; +#elif defined(CONFIG_MACH_T0) #if defined(CONFIG_MACH_T0_EUR_OPEN) ||\ (defined(CONFIG_TARGET_LOCALE_CHN) && !defined(CONFIG_MACH_T0_CHN_CTC)) /* I2C5 */ @@ -124,18 +154,33 @@ static struct i2c_board_info i2c_devs2[] __initdata = { }, }; #endif +#endif void __init midas_wacom_init(void) { int gpio; int ret; +#ifndef CONFIG_MACH_KONA /*RESET*/ gpio = GPIO_PEN_RESET_N; ret = gpio_request(gpio, "PEN_RESET"); s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT); gpio_direction_output(gpio, 0); - +#endif + +#if defined(CONFIG_MACH_KONA) + printk(KERN_INFO "[E-PEN] Use FWE\n"); + gpio = GPIO_PEN_FWE1; + ret = gpio_request(gpio, "PEN_FWE1"); + if (ret) { + printk(KERN_ERR "[E-PEN] failed to request PEN_FWE1.(%d)\n", + ret); + return ; + } + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0x1)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); +#else /*SLP & FWE1*/ if (system_rev < WACOM_FWE1_HWID) { printk(KERN_INFO "[E-PEN] Use SLP\n"); @@ -150,6 +195,7 @@ void __init midas_wacom_init(void) s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0x1)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } +#endif gpio_direction_output(gpio, 0); /*PDCT*/ @@ -169,7 +215,10 @@ void __init midas_wacom_init(void) s5p_register_gpio_interrupt(gpio); gpio_direction_input(gpio); -#if defined(CONFIG_MACH_T0_EUR_OPEN) ||\ +#if defined(CONFIG_MACH_KONA) + i2c_devs6[0].irq = gpio_to_irq(gpio); + irq_set_irq_type(i2c_devs6[0].irq, IRQ_TYPE_EDGE_RISING); +#elif defined(CONFIG_MACH_T0_EUR_OPEN) || \ (defined(CONFIG_TARGET_LOCALE_CHN) && !defined(CONFIG_MACH_T0_CHN_CTC)) i2c_devs5[0].irq = gpio_to_irq(gpio); irq_set_irq_type(i2c_devs5[0].irq, IRQ_TYPE_EDGE_RISING); @@ -186,7 +235,9 @@ void __init midas_wacom_init(void) s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT); gpio_direction_output(gpio, 0); -#if defined(CONFIG_MACH_T0_EUR_OPEN) ||\ +#if defined(CONFIG_MACH_KONA) + i2c_register_board_info(6, i2c_devs6, ARRAY_SIZE(i2c_devs6)); +#elif defined(CONFIG_MACH_T0_EUR_OPEN) ||\ (defined(CONFIG_TARGET_LOCALE_CHN) && !defined(CONFIG_MACH_T0_CHN_CTC)) i2c_register_board_info(5, i2c_devs5, ARRAY_SIZE(i2c_devs5)); #else diff --git a/arch/arm/mach-exynos/px-switch.c b/arch/arm/mach-exynos/px-switch.c index 37173bb..2b31e71 100644 --- a/arch/arm/mach-exynos/px-switch.c +++ b/arch/arm/mach-exynos/px-switch.c @@ -212,7 +212,7 @@ void set_usb_connection_state(bool connected) static void pmic_safeout2(int onoff) { -#if !defined(CONFIG_MACH_P4NOTE) +#if !defined(CONFIG_MACH_P4NOTE) && !defined(CONFIG_MACH_KONA) struct regulator *regulator; regulator = regulator_get(NULL, "safeout2"); @@ -233,7 +233,11 @@ static void pmic_safeout2(int onoff) __func__, onoff); } } - +#if defined(CONFIG_MACH_KONA) + /* kona have switching charger instead of analog USB_VBUS switch + * So, just return */ + return; +#endif regulator_put(regulator); #else if (onoff) { @@ -261,6 +265,10 @@ static void usb_apply_path(enum usb_path_t path) __func__, gpio_get_value(GPIO_USB_SEL0), gpio_get_value(GPIO_USB_SEL1), gpio_get_value(GPIO_USB_SEL_CP)); pr_info("%s: target path %x\n", __func__, path); +#elif defined(CONFIG_MACH_KONA) + pr_info("%s: current gpio before changing : sel0:%d sel1:%d\n", + __func__, gpio_get_value(GPIO_USB_SEL0), + gpio_get_value(GPIO_USB_SEL1)); #else pr_info("%s: current gpio before changing : sel1:%d sel2:%d sel3:%d\n", __func__, gpio_get_value(GPIO_USB_SEL1), @@ -270,7 +278,7 @@ static void usb_apply_path(enum usb_path_t path) /* following checks are ordered according to priority */ if (path & USB_PATH_ADCCHECK) { -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) gpio_set_value(GPIO_USB_SEL0, 1); gpio_set_value(GPIO_USB_SEL1, 0); #else @@ -284,7 +292,7 @@ static void usb_apply_path(enum usb_path_t path) goto out_nochange; } -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) if (path & USB_PATH_TA) { gpio_set_value(GPIO_USB_SEL0, 0); gpio_set_value(GPIO_USB_SEL1, 0); @@ -294,7 +302,7 @@ static void usb_apply_path(enum usb_path_t path) if (path & USB_PATH_CP) { pr_info("DEBUG: set USB path to CP\n"); -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) gpio_set_value(GPIO_USB_SEL0, 0); gpio_set_value(GPIO_USB_SEL1, 1); #else @@ -308,7 +316,7 @@ static void usb_apply_path(enum usb_path_t path) mdelay(3); goto out_cp; } -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) if (path & USB_PATH_AP) { gpio_set_value(GPIO_USB_SEL0, 1); gpio_set_value(GPIO_USB_SEL1, 1); @@ -332,7 +340,7 @@ static void usb_apply_path(enum usb_path_t path) #endif /* CONFIG_MACH_P4NOTE */ /* default */ -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) gpio_set_value(GPIO_USB_SEL0, 1); gpio_set_value(GPIO_USB_SEL1, 1); #else @@ -417,7 +425,7 @@ void usb_switch_unlock(void) up(&usb_switch_sem); } -#ifdef CONFIG_MACH_P4NOTE +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) static void init_gpio(void) { int uart_sel = -1; @@ -515,7 +523,7 @@ static int __init usb_switch_init(void) int ret; /* USB_SEL gpio_request */ -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) gpio_request(GPIO_USB_SEL0, "GPIO_USB_SEL0"); gpio_request(GPIO_USB_SEL1, "GPIO_USB_SEL1"); #if defined(GPIO_USB_SEL_CP) @@ -539,7 +547,7 @@ static int __init usb_switch_init(void) #endif /* CONFIG_MACH_P8LTE */ /* USB_SEL gpio_export */ -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) gpio_export(GPIO_USB_SEL0, 1); gpio_export(GPIO_USB_SEL1, 1); #if defined(GPIO_USB_SEL_CP) @@ -568,7 +576,7 @@ static int __init usb_switch_init(void) BUG_ON(!sec_switch_dev); /* USB_SEL gpio_export_link */ -#if defined(CONFIG_MACH_P4NOTE) +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) gpio_export_link(sec_switch_dev, "GPIO_USB_SEL0", GPIO_USB_SEL0); gpio_export_link(sec_switch_dev, "GPIO_USB_SEL1", GPIO_USB_SEL1); #if defined(GPIO_USB_SEL_CP) @@ -605,14 +613,14 @@ static int __init usb_switch_init(void) /*init_MUTEX(&usb_switch_sem);*/ sema_init(&usb_switch_sem, 1); -#ifdef CONFIG_MACH_P4NOTE +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) init_gpio(); #endif -#if !defined(CONFIG_MACH_P4NOTE) - if (!gpio_get_value(GPIO_USB_SEL1)) { -#else +#if defined(CONFIG_MACH_P4NOTE) || defined(CONFIG_MACH_KONA) if ((!gpio_get_value(GPIO_USB_SEL0)) && (gpio_get_value(GPIO_USB_SEL1))) { +#else + if (!gpio_get_value(GPIO_USB_SEL1)) { #endif usb_switch_lock(); usb_switch_set_path(USB_PATH_CP); diff --git a/arch/arm/mach-exynos/sec-switch.c b/arch/arm/mach-exynos/sec-switch.c index 787a424..d9c9db5 100644 --- a/arch/arm/mach-exynos/sec-switch.c +++ b/arch/arm/mach-exynos/sec-switch.c @@ -452,7 +452,8 @@ void max77693_muic_init_cb(void) } #if !defined(CONFIG_MACH_GC1) && !defined(CONFIG_MACH_T0) && \ -!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) +!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) && \ +!defined(CONFIG_MACH_KONA) int max77693_muic_cfg_uart_gpio(void) { int uart_val, path; @@ -472,7 +473,8 @@ int max77693_muic_cfg_uart_gpio(void) #endif #if !defined(CONFIG_MACH_GC1) && !defined(CONFIG_MACH_T0) && \ -!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) +!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) && \ +!defined(CONFIG_MACH_KONA) void max77693_muic_jig_uart_cb(int path) { pr_info("func:%s : (path=%d\n", __func__, path); @@ -583,7 +585,8 @@ struct max77693_muic_data max77693_muic = { .init_cb = max77693_muic_init_cb, .dock_cb = max77693_muic_dock_cb, #if !defined(CONFIG_MACH_GC1) && !defined(CONFIG_MACH_T0) && \ -!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) +!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) && \ + !defined(CONFIG_MACH_KONA) .cfg_uart_gpio = max77693_muic_cfg_uart_gpio, .jig_uart_cb = max77693_muic_jig_uart_cb, #endif /* CONFIG_MACH_GC1 */ @@ -597,7 +600,8 @@ struct max77693_muic_data max77693_muic = { .host_notify_cb = NULL, #endif #if !defined(CONFIG_MACH_GC1) && !defined(CONFIG_MACH_T0) && \ -!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) +!defined(CONFIG_MACH_M3) && !defined(CONFIG_MACH_SLP_T0_LTE) && \ + !defined(CONFIG_MACH_KONA) .gpio_usb_sel = GPIO_USB_SEL, #else .gpio_usb_sel = -1, diff --git a/arch/arm/mach-exynos/t0-sound.c b/arch/arm/mach-exynos/t0-sound.c index e6a64e4..d1d0f53 100644 --- a/arch/arm/mach-exynos/t0-sound.c +++ b/arch/arm/mach-exynos/t0-sound.c @@ -202,7 +202,7 @@ static struct wm8994_pdata wm1811_pdata = { .jd_ext_cap = 1, /* Regulated mode at highest output voltage */ - .micbias = {0x2f, 0x27}, + .micbias = {0x2f, 0x2b}, .micd_lvl_sel = 0xFF, @@ -377,9 +377,6 @@ static void t0_set_ext_main_mic(int on) /* Main Microphone BIAS */ gpio_set_value(GPIO_MIC_BIAS_EN, on); - if (on) - msleep(100); - pr_info("%s: main_mic bias on = %d\n", __func__, on); #endif } @@ -390,9 +387,6 @@ static void t0_set_ext_sub_mic(int on) /* Sub Microphone BIAS */ gpio_set_value(GPIO_SUB_MIC_BIAS_EN, on); - if (on) - msleep(100); - pr_info("%s: sub_mic bias on = %d\n", __func__, on); #endif } |